JP2008235724A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device capable of stably connecting packages with each other. <P>SOLUTION: A first semiconductor device 10a comprises an external electrode terminal 7a, formed by exposing the bottom surface of an inner lead 4a on the bottom surface of a package and an outer lead 5a protruding from a side surface of the package. A second semiconductor device 10b comprises an external electrode terminal 7b, formed by exposing the bottom surface of an inner lead 4b on the bottom surface of a package. The first and second semiconductor devices are disposed while confronting the bottom surfaces of the packages, and the external electrode terminal 7a and the external electrode terminal 7b are bonded so as to be electrically conducting. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a semiconductor device.

  Along with the multifunction and miniaturization of electronic devices in recent years, the multifunction and thinning of semiconductor devices are also progressing. As a semiconductor device for achieving such an object, a stacked semiconductor element is mounted on a die pad of a lead frame, and an outer lead protruding to the side of a sealing resin constituting an outer shape is bent into a gull wing shape. The QFP package is conventionally known. In addition, a QFN package is also known in the related art in which outer leads are eliminated from this QFP package and external electrode terminals for electrical connection with a mother board are provided on the bottom side of the semiconductor device.

  Hereinafter, the QFP package will be described in detail. 9A and 9B are diagrams illustrating a configuration of a conventional semiconductor device (QFP package), where FIG. 9A is a plan view of the semiconductor device viewed from the top side, FIG. 9B is a side view of the semiconductor device, and FIG. Sectional drawing which shows the outline of the internal structure of this semiconductor device, (d) is a top view which shows the outline of the internal structure of this semiconductor device.

  As shown in FIG. 9, in the semiconductor device (QFP package), a quadrilateral first semiconductor element 11 is placed on a die pad 13 of a lead frame, and a quadrilateral second semiconductor is placed on the first semiconductor element 11. Elements 12 are stacked. Further, four suspension leads 18 extending outward along the diagonal direction are connected to the die pad 13.

  Further, between the adjacent suspension leads 18, an inner lead 15 of a lead frame is provided, one end of which is disposed to face the sides of the first semiconductor element 11 and the second semiconductor element 12. The first semiconductor element 11 and the second semiconductor element 12 and the inner lead 15 are electrically connected by a thin metal wire 14.

  Further, the first semiconductor element 11, the second semiconductor element 12, the die pad 13, the fine metal wire 14, the inner lead 15, and the suspension lead 18 are resin-sealed by a mold resin body 17, and the semiconductor resin is provided by the mold resin body 17. The outer shape of the device is configured. The outer lead 16 of the lead frame protrudes to the side of the mold resin body 17 and is bent in a gull wing shape.

Next, a method for manufacturing the semiconductor device (QFP package) will be described.
First, the conductive plate-like member is etched or pressed to integrally form the die pad 13, the four suspension leads 18, and the plurality of lead portions, thereby producing a lead frame. Next, press working for forming a bent portion of the suspension lead 18 is performed. Next, the first semiconductor element 11 in which the second semiconductor element 12 is stacked is placed on the element mounting surface of the die pad 13 and fixed using a conductive adhesive.

  Next, the electrode pads 11 a and electrode pads 12 a of the first semiconductor element 11 and the second semiconductor element 12 and the inner leads 15 are connected using the fine metal wires 14. Next, the first semiconductor element 11, the second semiconductor element 12, the die pad 13, the fine metal wires 14, the inner leads 15, and the suspension leads 18 are resin-sealed using a mold resin body 17. Next, the tip of the outer lead 16 is cut off and bent into a gull wing shape to obtain a QFP package.

  On the other hand, the QFN package is resin-sealed so that the bottom surface of the inner lead is exposed from the mold resin body, and the tip surface of the inner lead and the side surface of the mold resin body are substantially the same as the QFP package manufacturing method described above. It can be manufactured by separating it into planes.

  As described above, by mounting stacked semiconductor elements in a single package, the semiconductor device can be made multifunctional and thin. However, in such a semiconductor device, when the semiconductor elements to be stacked have the same size, it is difficult to form a thin metal wire for extracting an electric signal from each semiconductor element, and many processing steps are required. Become. Furthermore, even if the sizes of the semiconductor elements are different, it is necessary to design manufacturing conditions and characteristic inspection conditions for achieving stable quality for each semiconductor device having a different combination of semiconductor elements.

  Therefore, the stacked semiconductor elements are not mounted in a single package, but QFP packages mounting one semiconductor element are connected to each other, and one package is housed in a recess provided in the wiring board. Thus, there has been proposed a semiconductor module that achieves multi-function and reduces the thickness of the entire semiconductor module (see, for example, Patent Document 1). Specifically, as shown in FIG. 10, a pair of semiconductor devices (QFP packages) 21a and 21b formed in a gull wing shape in which outer leads 22a and 22b are opposite to each other are overlapped with outer leads 22a and 22b. Connect. According to this conventional semiconductor device, stable quality packages whose characteristics can be confirmed can be combined with each other, and it is necessary to design manufacturing conditions and characteristics inspection conditions each time the combination of semiconductor elements is changed. Disappear.

However, since this conventional semiconductor device has a thickness equivalent to two QFP packages and does not reduce the thickness of the semiconductor device itself, a dedicated wiring board provided with a recess for accommodating one of the packages. If the thickness is not prepared, the thickness of the entire semiconductor module cannot be reduced. Further, the process of connecting the outer leads becomes unstable.
JP 7-312412 A

  In view of the above problems, the present invention can combine stable quality packages whose characteristics are confirmed, can reduce the thickness of the semiconductor device itself, and can connect the packages stably. An object is to provide a semiconductor device.

  The semiconductor device according to claim 1 of the present invention includes an element mounting portion, a semiconductor element mounted on the element mounting portion, an internal terminal electrically connected to the semiconductor element, the element mounting portion, and the semiconductor element. And a sealing resin for resin-sealing the internal terminal, an external terminal electrically connected to the internal terminal, and an exposed terminal electrically connected to the internal terminal, the external terminal being the It protrudes from the side surface of the sealing resin, and the exposed terminal is exposed from the bottom surface of the sealing resin.

  The semiconductor device according to claim 2 of the present invention is the semiconductor device according to claim 1, wherein the internal terminal and the external terminal are integrally formed, and the exposed terminal is a bottom surface of the sealing resin. A part of the surface of the internal terminal is exposed and formed.

  A semiconductor device according to claim 3 of the present invention is the semiconductor device according to claim 1 or 2, wherein a part of the surface of the element mounting portion is exposed from the bottom surface of the sealing resin. It is characterized by.

According to a fourth aspect of the present invention, there is provided a semiconductor device.
A first element mounting portion; a first semiconductor element mounted on the first element mounting portion; a first internal terminal electrically connected to the first semiconductor element; the first element mounting portion; A semiconductor element, a first sealing resin for resin-sealing the first internal terminal, an external terminal electrically connected to the first internal terminal, and a first exposure electrically connected to the first internal terminal A first semiconductor device, wherein the external terminal protrudes from a side surface of the first sealing resin, and the first exposed terminal is exposed from a bottom surface of the first sealing resin;
A second element mounting portion; a second semiconductor element mounted on the second element mounting portion; a second internal terminal electrically connected to the second semiconductor element; the second element mounting portion; Two semiconductor elements, and a second sealing resin for resin-sealing the second internal terminal, and a second exposed terminal electrically connected to the second internal terminal, wherein the second exposed terminal is the A second semiconductor device exposed from the bottom surface of the second sealing resin;
The bottom surface of the first sealing resin of the first semiconductor device and the bottom surface of the second sealing resin of the second semiconductor device are arranged to face each other, and the first exposure of the first semiconductor device The terminal and the second exposed terminal of the second semiconductor device are electrically connected.

  The semiconductor device according to claim 5 of the present invention is the semiconductor device according to claim 4, wherein the first internal terminal and the external terminal of the first semiconductor device are integrally formed, and the first exposed terminal is formed. Is formed such that a part of the surface of the first internal terminal is exposed from the bottom surface of the first sealing resin, and the second exposed terminal of the second semiconductor device is formed of the second sealing resin. A part of the surface of the second internal terminal is exposed from the bottom surface.

  A semiconductor device according to claim 6 of the present invention is the semiconductor device according to claim 4 or 5, wherein a part of the surface of the first element mounting portion is made of the first sealing resin. It is exposed from the bottom surface, and a part of the surface of the second element mounting portion is exposed from the bottom surface of the second sealing resin.

  A semiconductor device according to a seventh aspect of the present invention is the semiconductor device according to any one of the fourth to sixth aspects, further disposed between the first semiconductor device and the second semiconductor device. The first exposed terminal of the first semiconductor device and the second exposed terminal of the second semiconductor device are connected via the conductor to conduct heat. It is characterized by.

  The semiconductor device according to an eighth aspect of the present invention is the semiconductor device according to any one of the fourth to sixth aspects, wherein the first exposed terminal of the first semiconductor device is the first sealing resin. The surface exposed from the surface is convex or concave, and the surface of the second exposed terminal of the second semiconductor device exposed from the second sealing resin is concave or convex. The first exposed terminal and the second exposed terminal are fitted with each other.

  According to the present invention, stable quality packages whose characteristics can be confirmed can be combined, the thickness of the semiconductor device itself can be reduced, and the packages can be connected stably. Therefore, by changing the combination of packages without stacking semiconductor elements, the functions of the semiconductor device can be easily changed, and the number of functions of the semiconductor device can be increased. In addition, quality stability is maintained.

  In addition, a conventional production line for semiconductor devices can be used and can be easily produced. In addition, semiconductor devices having different functions can be easily manufactured simply by changing the combination of packages.

  Moreover, since the joining direction of the first semiconductor device and the second semiconductor device can be changed simply by changing the direction in which the external terminal is bent, the semiconductor device on which the semiconductor element that needs to improve heat dissipation is mounted on the wiring board side. By disposing the means for enhancing the heat dissipation effect on the wiring substrate, the heat dissipation effect of the semiconductor element that needs to improve the heat dissipation can be enhanced.

  Moreover, the heat dissipation effect of the semiconductor element can be enhanced by exposing a part of the surface of the element mounting portion from the sealing resin. Further, by disposing the conductor between the first semiconductor device and the second semiconductor device, the heat dissipation effect of the semiconductor element can be enhanced.

  Furthermore, since the semiconductor device is not different from the conventional semiconductor device, the semiconductor device can be mounted on the wiring board with the same handling as the conventional one.

A semiconductor device according to an embodiment of the present invention will be described with reference to the drawings.
1A and 1B are diagrams illustrating a configuration of a semiconductor device according to an embodiment of the present invention, in which FIG. 1A is a plan view of the semiconductor device viewed from the upper surface side, FIG. 1B is a side view of the semiconductor device, and FIG. ) Is a cross-sectional view schematically showing an internal configuration of the semiconductor device.

  As shown in FIG. 1, the semiconductor device is formed by bonding a first semiconductor device 10a and a second semiconductor device 10b. First, the first semiconductor device 10a disposed on the upper side will be described. 2A and 2B are diagrams illustrating the configuration of the first semiconductor device 10a, where FIG. 2A is a plan view of the first semiconductor device 10a viewed from the upper surface side, FIG. 2B is a side view of the first semiconductor device 10a, and FIG. Is a cross-sectional view showing an outline of the internal configuration of the first semiconductor device 10a, and (d) is a plan view of the first semiconductor device 10a viewed from the bottom surface side.

  As shown in FIG. 2, the first semiconductor device 10a includes a lead frame outer lead (external terminal) 5a protruding laterally from a side surface of a mold resin body (first sealing resin) 6a constituting the outer shape. The QFP package is bent into a gull wing shape on the bottom side.

  That is, in the first semiconductor device 10a, the semiconductor element (first semiconductor element) 1a is mounted on the die pad (first element mounting portion) 2a of the lead frame. The die pad 2a is supported by a plurality of suspension leads (not shown). Further, between the adjacent suspension leads, an inner lead (first internal terminal) 4a of a lead frame is provided, one end of which is arranged to face the side of the semiconductor element 1a. In addition, an electrode portion (not shown) formed on the semiconductor element 1a and the inner lead 4a are electrically connected by a thin metal wire 3a. Further, the semiconductor element 1a, the die pad 2a, the fine metal wire 3a, the inner lead 4a, and the suspension lead are resin-sealed by a mold resin body 6a, and the outer shape of the first semiconductor device 10a is configured by the mold resin body 6a. Yes.

  As described above, the outer lead 5a formed integrally with the inner lead 4a protrudes laterally from the side surface of the mold resin body 6a, and is bent in a gull wing shape on the package bottom surface side.

  The die pad 2a, the suspension lead, the inner lead 4a, and the outer lead 5a of the lead frame are made of a conductive member. The semiconductor element 1a is fixed to the element mounting surface of the die pad 2a using a conductive adhesive.

  Further, from the bottom surface side of the outer peripheral portion of the first semiconductor device 10a (the bottom surface side of the outer peripheral portion formed by the mold resin body 6a), a part of the surface of the inner lead 4a (at least a part of the bottom surface) is formed. The exposed portion forms an external electrode terminal (first exposed terminal) 7a.

  Next, the second semiconductor device 10b disposed on the lower side will be described. 3A and 3B are diagrams showing the configuration of the second semiconductor device 10b, wherein FIG. 3A is a plan view of the second semiconductor device 10b viewed from the top surface side, and FIG. 3B is a plan view of the second semiconductor device 10b viewed from the bottom surface side. FIG. 4C is a cross-sectional view showing an outline of the internal configuration of the second semiconductor device 10b.

  As shown in FIG. 3, the second semiconductor device 10b has a QFN package configuration in which the outer leads of the lead frame are eliminated from the first semiconductor device 10a. That is, in the second semiconductor device 10b, the semiconductor element (second semiconductor element) 1b is mounted on the die pad (second element mounting portion) 2b of the lead frame. The die pad 2b is supported by a plurality of suspension leads (not shown). Further, between the adjacent suspension leads, an inner lead (second internal terminal) 4b of a lead frame is provided, one end of which is disposed to face the side of the semiconductor element 1b. In addition, an electrode portion (not shown) formed on the semiconductor element 1b and the inner lead 4b are electrically connected by a thin metal wire 3b. Further, the semiconductor element 1b, the die pad 2b, the fine metal wire 3b, the inner lead 4b, and the suspension lead are resin-sealed by a mold resin body (second sealing resin) 6b, and the second semiconductor device is sealed by the mold resin body 6b. The outer shape of 10b is configured.

  The die pad 2b, the suspension lead, and the inner lead 4b of the lead frame are made of a conductive member. The semiconductor element 1b is fixed to the element mounting surface of the die pad 2b using a conductive adhesive.

  Further, from the bottom surface side of the outer peripheral portion of the second semiconductor device 10b (the bottom surface side of the outer peripheral portion formed by the mold resin body 6b), a part of the surface of the inner lead 4b (at least a part of the bottom surface) is formed. The exposed portion forms an external electrode terminal (second exposed terminal) 7b.

  As described above, the first semiconductor device 10a having the outer lead 5a bent toward the package bottom side and the second semiconductor device 10b having no outer lead are connected to each other on the package bottom surfaces (the bottom surfaces of the mold resin bodies 6a and 6b). The semiconductor device shown in FIG. 1 is obtained by arranging the electrodes so that the external electrode terminals 7a of the first semiconductor device 10a and the external electrode terminals 7b of the second semiconductor device 10b are electrically connected to each other. be able to.

  In the semiconductor device shown in FIG. 1, a semiconductor element 1a and a semiconductor element 1b are electrically connected via external electrode terminals 7a and 7b, inner leads 4a and 4b, and thin metal wires 3a and 3b. The electric signal is taken out from the outer lead 5a. Therefore, the configuration is the same as the configuration in which the stacked semiconductor elements are mounted on a single semiconductor device.

  As described above, the semiconductor device includes a QFN package that does not have outer leads and has external electrode terminals on the bottom surface of the package, and a QFP package that has outer leads and has external electrode terminals on the bottom surface of the package. The form of the semiconductor device after bonding the external electrode terminals exposed from the bottom of the package is the form of the QFP package.

  When the first semiconductor device 10a shown in FIG. 2 is arranged on the upper side, the outer lead 5a of the first semiconductor device 10a is bent to the package bottom surface side of the first semiconductor device 10a, and the first semiconductor device 10a shown in FIG. 2 It is desirable to arrange the semiconductor device 10b on the lower side with the direction of the top and bottom reversed.

  In addition, the number of external electrode terminals 7a of the first semiconductor device 10a and the number of external electrode terminals 7b of the second semiconductor device 10b are made equal, and the dimensions of the external electrode terminals 7a and the external electrode terminals 7b in plan view are made equal, It is desirable to match the external electrode terminals 7a and 7b.

  Subsequently, a modification of the semiconductor device according to the embodiment of the present invention will be described with reference to the drawings. FIG. 4 is a view for explaining a first modification of the semiconductor device according to the embodiment of the present invention, and shows cross sections of the first semiconductor device and the second semiconductor device, respectively. However, the same members as those described with reference to FIGS. 1 to 3 are denoted by the same reference numerals, and description thereof is omitted.

  As shown in FIG. 4, in this semiconductor device, the outer lead 5a of the first semiconductor device 10a is formed in a gull wing shape bent to the opposite side to the package bottom surface side of the first semiconductor device 10a, and the first semiconductor device 10a is formed. The semiconductor device shown in FIG. 1 is different from the semiconductor device shown in FIG. 1 in that the top and bottom directions are reversed, the second semiconductor device 10b is arranged on the upper side, and the bottom surfaces of the packages are opposed to each other.

  This configuration is effective when the first semiconductor device 10a includes the semiconductor element 1a that requires high heat dissipation. That is, according to this configuration, when the first semiconductor device 10a on which the semiconductor element 1a that requires high heat dissipation is mounted is mounted on the wiring board when mounted on the wiring board, means for increasing the heat dissipation effect on the wiring board. As a result, the heat dissipation effect of the semiconductor device 1a mounted on the first semiconductor device 10a can be enhanced. Therefore, the configuration of the semiconductor device shown in FIG. 1 is effective when the second semiconductor device 10b includes the semiconductor element 1b that requires high heat dissipation.

  Subsequently, a second modification of the semiconductor device according to the embodiment of the present invention will be described based on the drawings. FIG. 5 is a diagram for explaining a second modification of the semiconductor device according to the embodiment of the present invention, wherein (a) is a diagram showing cross sections of the first semiconductor device and the second semiconductor device, and (b). Is a plan view of the first semiconductor device as seen from the bottom surface side, and (c) is a plan view of the second semiconductor device as seen from the bottom surface side. However, the same members as those described with reference to FIGS. 1 to 4 are denoted by the same reference numerals, and description thereof is omitted.

  As shown in FIG. 5, in this semiconductor device, part (bottom surfaces) of the surfaces of the die pads 2a and 2b of the first semiconductor device 10a and the second semiconductor device 10b are exposed from the bottom surfaces of the mold resin bodies 6a and 6b, respectively. 1 is different from the semiconductor device shown in FIG.

  In this semiconductor device, the die pads 2a and 2b exposed from the bottom surface of the package and the external electrode terminals 7a and 7b are joined so as to be electrically conducted. According to this configuration, it is possible to obtain a heat dissipation effect by the outer leads 5a of the first semiconductor device 10a through the die pads 2a and 2b exposed from the bottom surface of the package.

  Then, the 3rd modification of the semiconductor device which concerns on embodiment of this invention is demonstrated based on drawing. FIG. 6 is a view for explaining a third modification of the semiconductor device according to the embodiment of the present invention, and shows cross sections of the first semiconductor device and the second semiconductor device. However, the same members as those described based on FIG. 1 to FIG.

  As shown in FIG. 6, in this semiconductor device, a conductor 8 having a heat dissipation effect is interposed between the first semiconductor device 10a and the second semiconductor device 10b as a means for enhancing the heat dissipation effect. Different from the semiconductor device shown in FIG.

  In this semiconductor device, the conductor 8 is joined to the die pads 2a, 2b and the external electrode terminals 7a, 7b exposed from the package bottom surfaces of the first semiconductor device 10a and the second semiconductor device 10b, and the external electrode terminal 7a. The external electrode terminal 7b and the die pad 2a and the die pad 2b are connected via the conductor 8 to conduct heat.

  The size of the conductor 8 is limited to the size of the first semiconductor device 10a and the second semiconductor device 10b, and is in a range that can be joined to the external electrode terminals 7a and 7b. The material of the conductor 8 is a material that takes heat dissipation into consideration, and the material is not particularly specified, but the surface of the conductor 8 is the bottom surface of each package when the first semiconductor device 10a and the second semiconductor device 10b are joined. The external electrode terminals 7a and 7b and the die pads 2a and 2b exposed from the surface are made of materials and structures that can be electrically independent from each other.

  According to this configuration, the heat radiation effect by the outer leads 5a of the first semiconductor device 10a is greater than that shown in FIG. 5 through the die pads 2a and 2b and the external electrode terminals 7a and 7b exposed from the bottom of the package. Can get more.

  Then, the 4th modification of the semiconductor device which concerns on embodiment of this invention is demonstrated based on drawing. FIGS. 7 and 8 are views for explaining a fourth modification of the semiconductor device according to the embodiment of the present invention. FIGS. 7A and 8A show the first semiconductor device and the second semiconductor. FIGS. 7 (b) and 8 (b) are cross-sectional views showing a state in which the first semiconductor device and the second semiconductor device are joined. FIG. However, the same members as those described with reference to FIGS. 1 to 6 are denoted by the same reference numerals, and description thereof is omitted.

  As shown in FIGS. 7 and 8, in this semiconductor device, the shape of the surface exposed from the package bottom surface of the external electrode terminal 7a of the first semiconductor device 10a is concave (FIG. 7) or convex (FIG. 8). The shape of the surface of the external electrode terminal 7b of the second semiconductor device 10b exposed from the bottom of the package is convex (FIG. 7) or concave (FIG. 8). The external electrode terminal 7a and the external electrode The semiconductor device shown in FIG. 1 is different in that the terminals 7b are fitted and joined. Thus, by making the shapes of the surfaces of the external electrode terminals 7a and 7b exposed from the bottom of the package uneven, it is possible to prevent positional displacement when the external electrode terminals are joined to each other.

  The uneven shape can be formed by etching and pressing at the time of producing the lead frame. Note that. The shape of the unevenness is a quadrangle in FIGS. 7 and 8, but is not limited to this, and the size of the unevenness is not limited as long as the external electrode terminals can be fitted to each other.

  The semiconductor device according to the present invention can combine stable quality packages whose characteristics have been confirmed, can reduce the thickness of the semiconductor device itself, and can stably connect the packages. This is useful for semiconductor devices that require functions.

The figure which shows the structure of the semiconductor device which concerns on embodiment of this invention The figure which shows the structure of the 1st semiconductor device which makes a part of semiconductor device which concerns on embodiment of this invention The figure which shows the structure of the 2nd semiconductor device which makes a part of semiconductor device which concerns on embodiment of this invention The figure for demonstrating the 1st modification of the semiconductor device which concerns on embodiment of this invention The figure for demonstrating the 2nd modification of the semiconductor device which concerns on embodiment of this invention The figure for demonstrating the 3rd modification of the semiconductor device which concerns on embodiment of this invention. The figure for demonstrating the 4th modification of the semiconductor device which concerns on embodiment of this invention. The figure for demonstrating the 4th modification of the semiconductor device which concerns on embodiment of this invention. The figure which shows the structure of the conventional semiconductor device The figure which shows the structure of the conventional semiconductor device

Explanation of symbols

1a, 1b Semiconductor element 2a, 2b Die pad 3a, 3b Thin metal wire 4a, 4b Inner lead 5a Outer lead 6a, 6b Mold resin body 7a, 7b External electrode terminal 8 Conductor 10a First semiconductor device 10b Second semiconductor device 11 First Semiconductor element 11a Electrode pad 12 Second semiconductor element 12a Electrode pad 13 Die pad 14 Metal wire 15 Inner lead 16 Outer lead 17 Mold resin body 18 Suspended lead 21a, 21b Semiconductor device 22a, 22b Outer lead

Claims (8)

  An element mounting portion, a semiconductor element mounted on the element mounting portion, an internal terminal electrically connected to the semiconductor element, and a sealing for resin-sealing the element mounting portion, the semiconductor element, and the internal terminal A resin, an external terminal electrically connected to the internal terminal, and an exposed terminal electrically connected to the internal terminal, the external terminal protruding from a side surface of the sealing resin, and the exposed The terminal is exposed from the bottom surface of the sealing resin.   2. The semiconductor device according to claim 1, wherein the internal terminal and the external terminal are integrally formed, and the exposed terminal is formed by exposing a part of the surface of the internal terminal from a bottom surface of the sealing resin. A semiconductor device which is characterized by being made.   3. The semiconductor device according to claim 1, wherein a part of the surface of the element mounting portion is exposed from the bottom surface of the sealing resin. A first element mounting portion; a first semiconductor element mounted on the first element mounting portion; a first internal terminal electrically connected to the first semiconductor element; the first element mounting portion; A semiconductor element, a first sealing resin for resin-sealing the first internal terminal, an external terminal electrically connected to the first internal terminal, and a first exposure electrically connected to the first internal terminal A first semiconductor device, wherein the external terminal protrudes from a side surface of the first sealing resin, and the first exposed terminal is exposed from a bottom surface of the first sealing resin;
A second element mounting portion; a second semiconductor element mounted on the second element mounting portion; a second internal terminal electrically connected to the second semiconductor element; the second element mounting portion; Two semiconductor elements, and a second sealing resin for resin-sealing the second internal terminal, and a second exposed terminal electrically connected to the second internal terminal, wherein the second exposed terminal is the A second semiconductor device exposed from the bottom surface of the second sealing resin;
The bottom surface of the first sealing resin of the first semiconductor device and the bottom surface of the second sealing resin of the second semiconductor device are arranged to face each other, and the first exposure of the first semiconductor device A semiconductor device, wherein a terminal and the second exposed terminal of the second semiconductor device are electrically connected.   5. The semiconductor device according to claim 4, wherein the first internal terminal and the external terminal of the first semiconductor device are integrally formed, and the first exposed terminal is formed from the bottom surface of the first sealing resin. A part of the surface of the internal terminal is exposed, and the second exposed terminal of the second semiconductor device is partially exposed from the bottom surface of the second sealing resin. A semiconductor device characterized by being formed.   6. The semiconductor device according to claim 4, wherein a part of a surface of the first element mounting portion is exposed from a bottom surface of the first sealing resin, and a surface of the second element mounting portion is exposed. A part of the semiconductor device is exposed from the bottom surface of the second sealing resin.   7. The semiconductor device according to claim 4, further comprising a conductor disposed between the first semiconductor device and the second semiconductor device, wherein the first semiconductor device includes the conductor. A semiconductor device characterized in that one exposed terminal and the second exposed terminal of the second semiconductor device are connected via the conductor to conduct heat.   7. The semiconductor device according to claim 4, wherein the first exposed terminal of the first semiconductor device has a convex or concave shape of a surface exposed from the first sealing resin. And the second exposed terminal of the second semiconductor device has a concave or convex shape of a surface exposed from the second sealing resin, and the first exposed terminal and the second exposed terminal are A semiconductor device characterized by being fitted.

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