JP2008205503A - Image sensor and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image sensor and a manufacturing method which are provided with high aperture ratio and high density light-receiving pixels by preventing leakage to adjacent pixels at a light receiving portion. <P>SOLUTION: Groove portions are formed on a photoelectric conversion layer, and an insulating light-absorbing material is embedded in the groove portions. This utilizes the effect that a photocarrier is not generated, because the photoelectric conversion layer under the light-absorbing material (photoelectric conversion layer left under the groove portions) is light-blocked by the light-absorbing material (paragraph 0013). In addition, since the depth in which the light-absorbing material is embedded surely in the groove portions is required, the groove portions will not penetrate the photoelectric conversion layer, and the photoelectric conversion layer is made to remain under the groove portions (paragraph 0070). <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an image sensor using a photoelectric conversion effect, an electronic device such as a video camera or a digital camera using the image sensor, and a manufacturing method thereof, and in particular, includes a transfer gate portion and a light receiving portion (photodiode). The present invention relates to a stacked stack type light receiving cell.

  Furthermore, the present invention relates to an electronic apparatus such as a liquid crystal display device provided with a stack type light receiving cell and a display cell on the same substrate, and a manufacturing method thereof.

  Optical sensors are widely used as sensors that convert light into electrical signals. For example, it is widely used as an image sensor for facsimile machines, copying machines, video cameras, digital still cameras, and the like.

  In order to meet the demand for multimedia, the density of pixels of the image sensor is rapidly increasing. For example, the standard of digital still camera pixels has been increased from VGA (640 × 480 = 310,000 pixels) to SVGA and XGA, and further to SXGA (1280 × 1024 = 1.31 million pixels). It is out.

  In addition, due to the demand for miniaturization and cost reduction of multimedia tools such as digital still cameras, the optical system is miniaturized from 2/3 inch to 1/2 inch, 1/3 inch, and 1/4 inch year by year.

  As described above, an image sensor having a small light receiving cell and a high conversion efficiency is required in order to realize a high density pixel and a small optical system. In order to satisfy this requirement, for example, a stack type image sensor in which a light receiving portion is stacked on a charge transfer portion has been proposed in order to improve an aperture ratio and increase conversion efficiency. FIG. 22 is a cross-sectional view of a conventional stack type image sensor.

  As shown in FIG. 22, a MOS transistor 2 as a charge transfer unit is formed for each pixel on a silicon substrate 1 having one conductivity type. On the MOS transistor 2, a light receiving part 4 made of a photodiode is formed on the entire surface of the sensor part via an interlayer insulating film 3.

  The MOS transistor 2 includes a source region 5 and a drain region 6, a gate insulating film 7 made of a thermal oxide film, a gate electrode 8, a source electrode 9, a drain electrode 10, a gate electrode 8, and a source electrode 9 and a drain electrode 10. Is made of an interlayer insulating film 11 for interlayer separation. The MOS transistors 2 are separated from each other by an oxide film 12 formed by the LOCOS method.

  The light receiving portion (photodiode) 4 is connected to the source electrode 9 of the transistor 2 and is electrically separated for each pixel, a photoconductive layer 16 formed on the entire surface of the light receiving portion, and all pixels. It is composed of a common transparent electrode 17.

  The stacked image sensor shown in FIG. 22 has a high aperture ratio because the light receiving portion 4 is formed on the entire surface of the element. However, when the density of pixels is increased, the interval between adjacent pixels is narrowed. Then, since the photoelectric conversion layer 16 is not separated for each pixel, the photocarrier 21 generated in the photoelectric conversion layer 16 between the pixels surrounded by the dotted line 20 easily leaks into the adjacent lower electrode 15 as indicated by an arrow. Become. Leakage into adjacent pixels decreases S / N and causes crosstalk.

  An object of the present invention is to provide an electronic device such as an image sensor having a high aperture ratio and a high density light receiving pixel, and a method for manufacturing the same, by preventing leakage into adjacent pixels in the light receiving unit described above. It is in.

  Furthermore, another object of the present invention is to prevent a photocarrier from leaking into an adjacent pixel in the above-described light receiving section, and to provide a light receiving cell having a high aperture ratio and a high density light receiving pixel with a display function. An object is to provide an electronic device provided on the same substrate as a pixel cell and a manufacturing method thereof.

  In order to solve the above-described problem, in the present invention, a groove is formed on the light receiving portion of the photoelectric conversion layer on the side where the light is incident, and an insulating light absorber is embedded in the groove. Since the photoelectric conversion layer below the light absorber is shielded by the light absorber, the fact that no photocarrier is generated is used.

  In order to prevent crosstalk between adjacent light receiving pixels, the light absorber blocks the photoelectric conversion layer in the gap portion of the lower electrode (light receiving pixel) of the light receiving unit as shown by the region 20 in FIG. It is good to form. Accordingly, the gap in the groove is formed so as to overlap at least the gap between the adjacent lower electrodes. From the viewpoint of preventing the aperture ratio and crosstalk, it is most preferable to form the side surface of the groove so as to be substantially flush with the side surface (divided section) of the lower electrode.

  In the present invention, since the groove portion is formed on the incident side of the photoelectric conversion layer and the insulating light absorber is provided here, it is possible to prevent the light receiving portion from leaking into the adjacent pixel. Therefore, the density of the light receiving pixels can be easily realized.

  Embodiments of the present invention will be described with reference to FIGS.

(Embodiment 1)
The present embodiment will be described with reference to FIGS. This embodiment is an example in which the present invention is applied to a stack type image sensor. FIG. 1 is an exploded perspective view of a light receiving unit according to the present embodiment, and FIGS. 2 and 3 are cross-sectional views illustrating a manufacturing process of the image sensor according to the present embodiment.

  FIG. 1 shows a light receiving portion (photodiode) 60 for a light receiving region 3 × 3 pixels. In the light receiving unit 60, a photodiode is formed by a lower electrode 61, a photoelectric conversion layer 62 provided in contact with the lower electrode 61, and an upper electrode 63 provided in contact with the photoelectric conversion layer 62. Yes. The lower electrode 61 is electrically separated for each light receiving pixel, while the upper electrode 63 is common to all the light receiving pixels.

  The photoelectric conversion layer 62 is provided with a groove so as to overlap a gap between adjacent light receiving pixels (lower electrode 61). The insulating light absorber 64 is embedded in this groove. Since the light incident from the upper electrode 63 is absorbed by the light absorber 64 by the light absorber 64, it is prevented from reaching the photoelectric conversion layer 62 below the light absorber 64 in the gap between the light receiving pixels (lower electrode 61). it can. Therefore, it is possible to prevent the generation of photo carriers in the gaps between pixels as described in the conventional example.

  Hereinafter, a method for manufacturing the light receiving portion (photodiode) 60 will be described with reference to FIGS.

  First, as shown in FIG. 2A, a MOS transistor is formed for each light receiving pixel on a n-type or p-type silicon substrate 40 using a known CMOS technology as the charge transfer element 50. An interlayer insulating film 59 for insulating and separating the charge transfer element 50 and the light receiving portion 60 is formed on the entire surface of the light receiving region.

  The MOS transistor 50 includes a source region 51 and a drain region 52, a gate insulating film 53 made of a thermal oxide film, a gate electrode 54, a source electrode 55, a drain electrode 56, a gate electrode 57, and a source electrode 55 and a drain electrode 56. Is formed of an interlayer insulating film 57 for separating the layers. In adjacent pixels, the MOS transistors 50 are separated from each other by an oxide film 58 formed by the LOCOS method.

  As shown in FIG. 2B, after a contact hole reaching the source electrode 55 is formed in the interlayer insulating film 59, a conductive film constituting the lower electrode 61 of the light receiving portion 60 is formed. The conductive film is patterned to form a lower electrode 61 connected to the source electrode 9 and separated for each pixel. The lower electrode 61 may be made of a metal film such as Ti, Mo, Cr, Al.

  Next, the photoelectric conversion layer 62 is formed on the entire surface of the light receiving unit. As a material of the photoelectric conversion layer 62, a single layer film or a multilayer film having a semiconductor layer such as intrinsic or substantially intrinsic amorphous silicon or amorphous silicon germanium, silicon having a PIN junction, a ZnSe film, or a ZnCdTe film. A single layer film or a laminated film having a compound semiconductor layer such as a film can be used.

  Next, in order to form the groove 65 in the photoelectric conversion layer 62, a resist mask 71 is formed as shown in FIG. Using the resist mask 71, a part of the light incident side of the photoelectric conversion layer 62 is removed by a dry etching method such as plasma etching or RIE (reactive ion etching) to form the groove 65.

  By forming the groove 65 by removing only the photoelectric conversion layer 62 between the adjacent lower electrodes 61, the aperture ratio does not need to be reduced. Therefore, in the present embodiment, the resist mask 71 has the same pattern as the mask used for patterning the lower electrode 61 and has an opening in the gap between the lower electrodes 61. Therefore, the groove 65 is formed in a lattice shape, and the shape seen from the front is almost congruent with the gap of the lower electrode 61.

After the resist mask 71 is peeled off, a colored insulator 72 is embedded in the groove 65 as shown in FIG. When the pixels are densified, the interval between the pixels is narrowed, so that the shape of the groove 65 becomes fine. Therefore, a coating film that can be formed by spin coating is suitable for the insulator 72. As such a coating film, an organic resin selected from acrylic, polyimide, polyamide, polyimide amide, and epoxy, or a silicon oxide-based coating film such as PSG or SiO ₂ can be used. In order to color these insulating materials, a pigment or a carbon-based material such as carbon or graphite is dispersed in the insulating material.

  Since the insulator 72 is formed by the coating method, the insulator 72 also covers the surface of the photoelectric conversion layer 72. For this reason, as shown in FIG. 3B, the excess insulator 72 covering the surface of the photoelectric conversion layer 72 is removed by means such as dry etching or CMP. The remaining insulator 72 is the light absorber 64.

  Finally, as shown in FIG. 3C, an upper electrode 63 made of a transparent conductive film is formed on the entire surface of the light receiving region.

(Embodiment 2)
The present embodiment will be described with reference to FIGS. The present embodiment is a modification of the light receiving unit 60 of the first embodiment. FIG. 4 is an exploded perspective view of the light receiving unit 80 of the present embodiment, and FIGS. 5 and 6 are cross-sectional views illustrating the manufacturing steps of the image sensor of the present embodiment.

  FIG. 4 shows a light receiving unit 80 for 3 × 3 pixels in the light receiving region. In the light receiving unit 80, a photodiode is formed by a lower electrode 81, a photoelectric conversion layer 82 provided in contact with the lower electrode 81, and an upper electrode 83 provided on the photoelectric conversion layer 82. The lower electrode 81 is electrically separated for each pixel.

  Further, the upper electrode 83 of the present embodiment is common to all pixels, but the configuration is different from that of the first embodiment. The upper electrode 83 is selectively provided with an opening in the gap portion of the lower electrode 81. That is, the upper electrode 83 includes a portion facing the lower electrode 81 and a portion connecting the portion between adjacent pixels.

  Grooves are formed in the photoelectric conversion layer 82 in a self-aligning manner using the upper electrode 83 as a mask. An insulating light absorber 84 is embedded in the groove. Therefore, the light absorber 84 can absorb the light incident on the photoelectric conversion layer 82 existing in the gap between the pixels below the photoabsorber 84, so that generation of photocarriers in the gap between the pixels as described in the conventional example can be prevented.

  However, since the groove portion is formed in the pattern of the upper electrode 83 described above, unlike the first embodiment, the surface layer of the photoelectric conversion layer 82 is not completely filled with the light absorber 84 in the gap between the pixels, and the photoelectric conversion layer 82 is not filled. However, the light absorber 84 has a higher occupation rate in the pixel gap than the relatively remaining part, and the effect of preventing the generation of photocarriers in the pixel gap is sufficiently obtained. be able to.

  A method for manufacturing the light receiving unit 80 will be described below with reference to FIGS.

  First, as shown in FIG. 5A, as in the first embodiment, a MOS transistor 50 is formed for each light-receiving pixel on a silicon substrate 40 using a known CMOS technology. Then, an interlayer insulating film 59 for insulating and separating the transistor 50 and the light receiving unit 80 is formed on the entire surface of the light receiving region. Then, a lower electrode 81 and a photoelectric conversion layer 82 connected to the source electrode and separated for each pixel are formed. Next, a transparent conductive film 91 constituting the upper electrode 83 is formed.

  Next, as shown in FIG. 5B, a resist mask 92 is formed on the transparent conductive film 91, and the transparent conductive film 91 is patterned into the shape shown in FIG.

  As shown in FIG. 5C, a groove 85 is formed in the photoelectric conversion layer 82 in a self-aligning manner using the upper electrode 83 as a mask by a dry etching method such as plasma etching or RIE. Accordingly, the groove 85 has the same pattern as the opening of the pixel electrode 83, and the side surface of the groove 85 is substantially flush with the end surface of the opening of the upper electrode 83.

  Note that the resist mask 92 may be removed before dry etching, but the resist mask 92 has an effect of preventing the surface of the upper electrode 83 from being altered during dry etching.

  Next, after peeling off the resist mask 92, as shown in FIG. 6A, a colored insulator 93 is embedded in the groove 85 by spin coating. Also in this embodiment, since the shape of the groove 85 becomes fine, an organic resin film that can be formed by the coating method described in Embodiment 1 or a silicon oxide-based coating film may be used for the insulator 93.

  Since the insulator 93 is formed by the coating method, the surface of the upper electrode 83 is covered with the insulator 93. Therefore, as shown in FIG. 6B, the excess insulator 93 covering the surface of the upper electrode 83 is removed by means such as dry etching or CMP. The remaining insulator 93 corresponds to the light absorber 84 shown in FIG. The image sensor of this embodiment is completed through the above steps.

  In the first and second embodiments, since the insulating light absorber is embedded in the photoelectric conversion layers of the light receiving portions 60 and 80, photocarriers can be prevented from being generated in the gaps between pixels, and the S / N ratio is improved. Crosstalk can be prevented. Since the upper electrode 63 of the first embodiment has no opening, patterning is easier than the upper electrode 83 of the second embodiment, and the aperture ratio is high.

  In the first and second embodiments, the charge transfer element 50 is a MOS transistor, but may be a CCD. In order to further increase the density, an SOI type or a trench type is preferable. In the present embodiment, the charge transfer element is a passive type including only a transfer gate. However, the charge transfer element may be configured as an active type including an amplifier.

  The embodiment of the present invention will be described in detail with reference to FIGS.

  This example relates to a transmissive liquid crystal display device in which the image sensor described in Embodiment 1 is provided on the same substrate as a display pixel portion.

  FIG. 7 is a front view of the liquid crystal display device of this embodiment. As shown in FIG. 7, a light receiving area 110 having an imaging function is provided on the same substrate 100 together with the display area 120.

  The light receiving region 110 includes a light receiving matrix 111 in which a plurality of light receiving cells are arranged in a matrix, and light receiving unit driving circuits 112 and 113 for driving the charge transfer elements arranged in the light receiving matrix 111. .

  On the other hand, the display region 120 is an active matrix type integrated with a peripheral circuit, and includes a pixel electrode, an active element connected to the pixel electrode, a pixel matrix 121, and a peripheral for driving the active element arranged in the pixel matrix 121. Drive circuits 122 and 123 are provided. Further, a control circuit 130 for controlling the peripheral drive circuits of the light receiving area 110 and the display area 120 is also formed on the substrate 100.

  In the present embodiment, the charge transfer element of the light receiving unit matrix 111, the active element of the pixel matrix 121, and the peripheral drive circuits 112, 113, 122, 123 and the control circuit 130 for driving the charge transfer element and the active element are connected to the CMOS. Fabricate simultaneously with TFT (Thin Film Transistor) using technology. Hereinafter, a method for manufacturing the liquid crystal panel of this example will be described with reference to FIGS.

  As shown in FIG. 8A, on a glass substrate 500, a light receiving portion TFT 200 that is a charge transfer element of the light receiving matrix 111, a pixel portion TFT 300 that is an active element of the pixel matrix 121, and peripheral drive circuits 112 and 113. , 122 and 123 are formed. Note that in the CMOS-TFT 400, the right side is an N-channel type and the left side is a P-channel type.

  In order to manufacture these TFTs 200, 300, and 400, a base film 510 for preventing diffusion of impurities from the substrate is formed on the entire surface of the glass substrate 500. As the base film 510, a silicon oxide film is formed to a thickness of 200 nm by plasma CVD.

In this embodiment, in order to manufacture a transmissive liquid crystal panel, the substrate 500 may be any substrate that transmits visible light, and a quartz substrate or the like can be used instead of the glass substrate 500. In this embodiment, since the TFTs 200, 300, and 400 are formed of a polycrystalline silicon film, a substrate 500 that can withstand the process of forming the polycrystalline silicon film is selected. The polycrystalline silicon film has a very high mobility of about 10 to 200 cm ² / Vsec, and can be made to respond at high speed by forming the channel forming region of the TFT with polycrystalline silicon. This is effective for the TFT 400.

  Next, an amorphous silicon film having a thickness of 55 nm is formed by plasma CVD and irradiated with excimer laser light to be polycrystallized. As a method for crystallizing the amorphous silicon film, a thermal crystallization method called SPC, an RTA method of irradiating infrared rays, a method using thermal crystallization and laser annealing in combination, or the like can be used.

Next, the polycrystallized silicon film is patterned to form island-like semiconductor layers constituting the source region, drain region, and channel formation region of the TFTs 200, 300, and 400. Next, a gate insulating film 520 covering these semiconductor layers is formed. The gate insulating film 520 is formed to a thickness of 120 nm by plasma CVD using silane (SiH ₄ ) and N ₂ O as source gases.

  Next, a conductive film such as Al, Cr, or a conductive polysilicon film is formed and patterned to form gate electrodes 201, 301, 401, and 402. Using these gate electrodes as a mask, the semiconductor layer is doped with an impurity imparting N-type or P-type conductivity using a known CMOS technology. After doping, the doped impurities are activated.

  In this step, an N-type source region 202 and drain region 203 and a channel formation region 204 are formed in the semiconductor layer of the light receiving portion TFT 200. An N-type source region 302 and drain region 303 and a channel formation region 304 are formed in the semiconductor layer of the light receiving unit TFT 300. As for the CMOS-TFT 400, an N-type source region 403 and a drain region 404 and a channel formation region 405 are formed in the semiconductor layer of the N-channel TFT, and a P-type source is formed in the semiconductor layer of the P-channel TFT. A region 406, a drain region 407, and a channel formation region 408 are formed.

  In this embodiment, a polycrystalline silicon TFT is formed. Therefore, before forming the gate electrodes 201, 301, 401, 402, at least a region that becomes the channel formation regions 204, 303, 405 of the N-channel TFT is a P-type. It is preferable to add the impurities to optimize the threshold value.

  Next, a first interlayer insulating film 530 is formed, and contact holes reaching the source and drain regions of the TFTs 200, 300, and 400 are formed. After that, a laminated film made of a titanium film, an aluminum film, and a titanium film is formed and patterned to form wirings 205, 206, 305, 306, 409, 410, and 411. Note that the N-type source region 403 and the P-type source region 404 are connected by a wiring 411 so that the TFT 400 has a CMOS structure.

  Through the above CMOS process, the pixel TFT 200, the light receiving portion TFT 300, and the CMOS-TFT 400 using polycrystalline silicon are completed at the same time. Here, the TFTs 200, 300, and 400 are top gate planar types, but may be bottom gate types such as a reverse stagger. Also, an LDD structure or an offset structure can be used.

  Next, as shown in FIG. 8B, a second interlayer insulating film 540 for insulatingly separating the light receiving portion TFT 200 and the light receiving portion is formed on the entire surface of the substrate 500. The second interlayer insulating film 540 is preferably a resin film that cancels out unevenness in the lower layer and obtains a flat surface. As such a resin film, polyimide, polyamide, polyimide amide, or acrylic can be used. The surface layer of the second interlayer insulating film 540 may be a resin film in order to obtain a flat surface, and the lower layer may be a single layer or a multilayer of an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride. In this embodiment, a polyimide film is formed to a thickness of 1.5 μm as the second interlayer insulating film 540.

  Next, after forming contact holes reaching the wiring 205 of the light receiving portion TFT 200 and the wiring 305 of the pixel portion TFT 300 in the second interlayer insulating film 540, a metal film of Ti, Cr, Mo or the like is formed. In this embodiment, a titanium film having a thickness of 200 nm is formed as a conductive film by a sputtering method. Then, the titanium film is patterned to form a lower electrode 208 of the light receiving unit connected to the wiring 205 of the light receiving unit TFT, an electrode 308 connected to the wiring 305 of the pixel unit TFT 300, and a light shielding film 309 of the pixel unit TFT 300. To do.

  Next, as shown in FIG. 9, a photoelectric conversion layer of the light receiving unit is formed. 9 to 12, the CMOS-TFT 400 is omitted for the sake of space. In this embodiment, the photoelectric conversion layer is formed using a silicon layer having a PIN junction. First, an n-type amorphous silicon film containing P is formed to a thickness of 30 to 50 nm, here a thickness of 30 nm. An n layer 209 is formed by patterning the n-type amorphous silicon film in the same pattern as the lower electrode 208.

  Next, an intrinsic or substantially intrinsic amorphous silicon film is formed to a thickness of 1 to 2 μm, here 1.5 μm. Continuously, a p-type amorphous silicon film containing B is formed to a thickness of 30 to 100 nm, here to a thickness of 50 nm. Further, a silicon oxide or silicon nitride film serving as an etching stopper (not shown) is formed on the p-type amorphous silicon film to a thickness of 10 to 30 nm. Here, a 20 nm silicon oxide film is formed.

  By patterning, the intrinsic or substantially intrinsic silicon film, p-type silicon film, and silicon oxide film (not shown) are removed except for the light receiving matrix 111 to form an i layer 210, a p layer 211, and an etching stopper (not shown).

Note that the state in which amorphous silicon is substantially intrinsic means that a p-type impurity such as boron is added at about 5 × 10 ¹⁶ to 1 × 10 ¹⁹ cm ⁻³ and the Fermi level is set at the center of the band gap. Say. This is because amorphous silicon does not necessarily have the Fermi level located at the center of the bandgap at the time of film formation, but the Fermi level is slightly shifted in the direction of becoming n-type. Therefore, the Fermi level can be set at the center of the band gap by adding the p-type impurity as described above. Although impurities are added in this case, a state in which the Fermi level is in the center of the bandgap is regarded as a substantially intrinsic state.

  The i layer 210 may be made of amorphous silicon germanium. The n layer 209 and the p layer 111 can be formed using microcrystalline silicon instead of amorphous silicon. Further, silicon nitride, silicon oxide, or silicon carbide to which an n-type impurity such as phosphorus is added can be used as a material for the n layer 209.

  Next, as illustrated in FIG. 10, a resist mask 212 for forming a groove in the photoelectric conversion layer is formed. In this embodiment, in order not to lower the opening, the groove is formed by removing only the i layer 210 and the p layer 211 in the gap of the lower electrode 208. Therefore, the resist mask 212 has an opening in a region that does not face the lower electrode 208.

  The lower electrodes 208 are arranged in a matrix on the light receiving matrix 111, and the arrangement interval may be set only in accordance with a design rule that maximizes the aperture ratio. Since the design rule for manufacturing a semiconductor device on a glass substrate is about 1 to 3 μm, the interval between the lower electrodes 208 can be set to about 1 to 3 μm at the minimum. Here, the interval between the lower electrodes 208 is 2 μm. Accordingly, the openings of the resist mask 212 have a lattice shape with a width of 2 μm.

Next, the groove 213 is formed in the photoelectric conversion layer using the resist mask 212. To form the groove 213, a dry etching method such as plasma etching or RIE (reactive ion etching) is used. In this embodiment, a plasma etching method is used, and a mixed gas of O ₂ and CF ₄ is used as an etching gas. The concentration of CF ₄ is 1 to 10% with respect to the total gas. The etching rate can be controlled by conditions such as CF ₄ concentration and pressure.

Here, a gas having a CF ₄ concentration of 5% is used, and by plasma etching, the p layer 211 at the opening of the resist mask 212 is removed and divided for each light receiving pixel, and the i layer 210 has a depth of about 300 to 500 nm. Remove. Here, the i layer 210 is removed by 500 nm. In the cross-sectional view of FIG. 10, the groove portions 213 are illustrated as being separated from each other. However, actually, the grooves 213 are integrally formed in a lattice shape having a width of 2 μm along the gap between the lower electrodes 208.

  In the present invention, in order to prevent the generation of photocarriers in the gaps between the light receiving pixels, the depth of the groove 213, particularly the depth in the i layer 210 where photocarriers are generated, is important. This depth is a depth at which the light absorber is surely embedded in the groove 213 later, and it is sufficient that the photo carrier in the gap between the pixels can be shielded.

Next, as shown in FIG. 11, after the resist mask 212 is peeled off, the groove portion 213 is filled with a colored insulator 214. In this embodiment, an acrylic resin in which a black pigment is dispersed is applied by spin coating and cured to form an insulator 214 made of black acrylic. Since the spin coating method is used, the insulator 214 covers not only the groove 213 but also the surface of the substrate 500, and the thickness t ₁ of the insulator 214 on the p layer 211 (on an etching stopper (not shown)) is It is almost the same in other areas.

Next, as shown in FIG. 12, the light absorbing material 215 is formed by removing a portion other than the insulator 214 filled in the groove 213 by a dry etching process such as O ₂ ashing.

In this embodiment, O ₂ ashing in which 1 to 5% of CF ₄ gas is mixed is used as a means for forming the light absorber 122. Considering that the etching rate of the resin film is typically about 0.3 to 1 μm / min, the thickness t ₁ of the insulating layer 214 covering the p layer 211 is about 0.3 to 1.5 μm. Like that.

Further, in order not to remove the insulator 214 embedded in the groove portion 213 and at least the insulator 214 embedded in the i layer 210 by O ₂ ashing, the thickness t ₁ of the insulator 214 to be ashed is set to the groove portion 213. Reduce the depth of the ash to ensure a margin for ashing. The thickness t ₁ can be controlled by the rotation speed of the spinner when forming the insulator layer 214, the viscosity of the raw material solution of the insulator 214, and the like.

In FIG. 6, the depth of the groove 213 is 550 nm, which is a value obtained by adding the thickness 50 nm of the p layer 211 and the depth 500 nm from which the i layer is removed, and here, the thickness t _{1 of the} insulator layer 124 to be removed. Was 400 nm.

  In this embodiment, since a transmissive panel is manufactured, it is necessary to completely remove not only the insulator 214 that covers the p-layer 211 but also the insulator 214 that covers the display matrix 121 in the ashing process.

  In the case of the present embodiment, since the gap of the groove 213 is about 1 to 3 μm, plasma hardly enters the groove 213 in the ashing process, and the insulator 214 embedded in the groove 213 is hardly removed. . Furthermore, the surface of the p layer 211 is protected by an etching stopper made of a silicon oxide film (not shown). Accordingly, the ashing can be performed so that the insulator 214 covering the p layer 211 and the display matrix 121 portion is removed by ashing, and the insulating layer 214 embedded in at least the groove portion 213 and the i layer 210 remains.

Further, by increasing the etching selection ratio between the p layer 211 and the insulator 214 made of polyimide or acrylic resin, an etching stopper becomes unnecessary. For example, since the resin material can be removed only with O ₂ gas in the ashing process, the etching rate of the p layer 211 can be reduced by reducing the proportion of the etching gas CF ₄ .

  In addition, when the insulating layer 214 made of a resin material is cured, it is pre-baked to about 200 ° C. before ashing, and after the ashing, the main baking is performed to completely cure, thereby ashing the insulator 214. The etching selectivity with respect to the p layer 211 can be increased.

  After the ashing process, an etching stopper (not shown) on the surface of the p layer 211 is removed by wet etching using buffered hydrofluoric acid. In FIG. 12, the surface of the light absorber 215 is illustrated so as to coincide with the surface of the p layer 211, but the surface of the light absorber 215 may be slightly curled, and at least the light absorber 215. Is embedded in the i layer 210, the effect of the present invention can be obtained.

  Next, an ITO film having a thickness of 100 to 300 nm, here 120 nm, is formed by sputtering and patterned to form an upper electrode 216 on the entire surface of the light receiving matrix 121 as shown in FIG. The light receiving matrix 121 is completed through the above steps. The photodiode formed in the light receiving matrix 121 of this embodiment has a configuration similar to that shown in FIG. In FIG. 1, the lower electrode 208 corresponds to the electrode 61, the photoelectric conversion layer composed of the n layer 209, the i layer 210, and the p layer 211 corresponds to 62, the upper electrode 216 corresponds to 63, and the light absorber 215 is 64.

  Next, a third interlayer insulating film 550 is formed. As an insulating film constituting the third interlayer insulating film 550, a resin film such as polyimide, polyamide, polyimide amide, or acrylic is formed so as to obtain a flat surface. In this example, an acrylic film was formed as an insulating film on the entire surface of the substrate so that the thickness in the display region 120 was 2 μm. The third interlayer insulating film 550 functions as a passivation film in the light receiving matrix 111.

  Then, a contact hole reaching the electrode 308 is formed in the third interlayer insulating film 550, an ITO film having a thickness of 500 to 200 nm, here 120 nm, and patterned to form the pixel electrode 310 of the pixel matrix 121. To do.

  13 is obtained, and a transmissive liquid crystal display device is completed through the cell assembly process.

  The present embodiment is a modification of the light receiving portion (photodiode) of the light receiving matrix 111 of the first embodiment. In this example, the light receiving unit has the same structure as that of the second embodiment.

  A present Example is described using FIGS. 14-19. In addition, the panel structure of a present Example is the same as Example 1 except a light-receiving part, and the same code | symbol as Example 1 shows the same member in a figure. Further, since the drawings are complicated, some of the same members as those in Example 1 are omitted.

  First, the structure shown in FIG. 14 is obtained through the same steps as in the first embodiment. However, in this embodiment, the formation process of the i layer 210 and the p layer 211 is slightly different from that of the first embodiment.

  In this embodiment, after the n layer 209 is formed, an intrinsic or substantially intrinsic amorphous silicon film to be the i layer 210 and a p-type amorphous silicon film to be the p layer 211 are formed, An ITO film serving as an upper electrode of the light receiving matrix 111 is formed to a thickness of 120 nm without forming a silicon oxide film for an etching stopper. Then, the i layer 210, the p layer 211, and the ITO film 601 are formed by patterning, leaving the ITO film, the intrinsic amorphous silicon film, and the p-type amorphous silicon film only in the light receiving matrix 111.

  Next, as shown in FIG. 15, a resist mask 602 for patterning the ITO film 601 is formed. The ITO film 601 is patterned by wet etching to form the upper electrode 603.

The upper electrode 603 has an opening 604. The shape of the upper electrode 603 is the same as that of the upper electrode 83 shown in FIG. 4, and an opening 604 is formed by removing a portion not facing the lower electrode 208. A portion of the ITO film 601 in this portion remains, and the upper electrode 603 is common to all the light receiving pixels. Further, the width w ₂ of the opening 604 of the upper electrode 603 in the cross-sectional direction of FIG. 15 is substantially the same as the interval of the lower electrode 208 so that the aperture ratio does not decrease.

Next, as shown in FIG. 16, a groove 605 is formed in the photoelectric conversion layer. In this embodiment, as in the first embodiment, a plasma etching method using a mixed gas having a CF ₄ concentration of 5% and an O ₂ concentration of 95% is used. In this embodiment, the upper electrode 603 is used as a mask. Then, the p layer 211 present in the opening 604 of the upper electrode 603 and the i layer 210 having a depth of 400 nm are removed, and the groove 605 is formed in a self-aligning manner.

  Note that the resist mask 602 can be removed after the upper electrode 603 is formed. However, if the resist mask 602 is left in the plasma etching process, the upper electrode 603, the pixel portion TFT 300, and the CMOS-TFT 400 can be protected in the plasma etching. .

  Next, after removing the resist mask 602, as shown in FIG. 17, an acrylic resin in which a black pigment is dispersed is applied by a spin coating method and cured to form an insulator 606 made of black acrylic. . Since the spin coating method is used, the insulator 606 fills the groove 605 and covers the entire surface of the substrate 500.

Next, as shown in FIG. 18, as in Example 1, except for the insulator 606 filled in the groove 605 is removed by O ₂ ashing using an etching gas mixed with about 1 to 5% of CF ₄ gas. Thus, the light absorber 607 is formed. The light receiving matrix 111 is completed through the above steps.

  Note that the photodiode formed in the light receiving matrix 111 of this embodiment has the same configuration as that in FIG. In FIG. 4, the lower electrode 208 corresponds to the electrode 81, the photoelectric conversion layer including the n layer 209, the i layer 210, and the p layer 211 corresponds to 82, and the upper electrode 603 corresponds to 83. The light absorber 607 corresponds to 84.

  In FIG. 18, the surface of the light absorber 607 is illustrated so as to coincide with the surface of the upper electrode 603, but the surface of the light absorber 607 may be slightly bent. If at least the light absorber 215 is embedded in the i layer 210, the effect of the present invention can be obtained, and the light absorber 607 can block most of the i layer 210 in the gap between the lower electrodes 208 (light receiving pixels). Therefore, it is possible to prevent photocarriers from being generated in the gaps between the light receiving pixels.

  Next, as shown in FIG. 19, a third interlayer insulating film 550 is formed on the entire surface of the substrate with an acrylic film having a thickness of 2 μm, and a contact hole reaching the electrode 308 is formed in the third interlayer insulating film 550. Then, a 120 nm ITO film is formed and patterned to form the pixel electrode 310 of the pixel matrix 121. After obtaining the configuration of FIG. 19, a transmissive liquid crystal panel is completed through a cell assembly process.

  In the first and second embodiments, the light receiving cell is a stacked type, and after the charge transfer element (light receiving portion TFT 200) is manufactured, the light receiving portion (photodiode) is formed on the TFT 200. Even if is formed of an amorphous silicon film, the light receiving TFT 200 can be formed of polycrystalline silicon. Therefore, an image sensor capable of high-speed response can be formed on an insulating substrate such as a glass substrate.

  In addition, since the image sensor has a stacked structure, consistency with a manufacturing process of a liquid crystal panel conventionally configured with a polycrystalline silicon TFT is maintained. Therefore, the image sensor and the liquid crystal panel can be integrated on the same substrate without deteriorating the characteristics.

  Since the liquid crystal panels of Embodiments 1 and 2 are integrally provided with a light receiving area having an imaging function and a display area, a display having a communication function such as a TV conference system, a TV phone, an Internet terminal, a personal computer, or the like. It is suitable for the part. For example, while watching the video transmitted from the conversation person's terminal on the display, it is possible to take a picture of self-confidence with the light receiving matrix and transfer the picture to the conversation person's terminal, so that the moving image is communicated bidirectionally. It is possible.

  In the first and second embodiments, the light receiving pixels are two-dimensionally arranged in the light receiving matrix 111, but a line sensor in which the light receiving pixels are one-dimensionally arranged may be used. If the format of the light receiving pixels is the same as the format of the display unit, the light receiving pixels correspond to the display pixels on a one-to-one basis. Therefore, signal processing for displaying the image detected by the light receiving matrix 111 on the pixel matrix 121 is performed. Simplification and high speed can be achieved, and the burden on the control circuit 130 is reduced. Even in the case of a line sensor, the number of light receiving pixels is preferably the same as the number of display pixels in the column direction or the row direction.

  When the pixel formats are matched, for example, when the format of the pixel matrix 121 is 640 × 480 (VGA standard), and when the pitch of one light receiving pixel is about 10 μm, the area occupied by the light receiving matrix 111 is 6.4 mm × 4.8 mm. Therefore, it can be integrated in a liquid crystal panel.

  In the first and second embodiments, the liquid crystal panel is a transmissive type, but may be a reflective type. In the case of the reflection type, when the light absorbers 215 and 607 shown in FIGS. 12 and 18 are formed, the insulators 214 and 606 on the pixel matrix 121 are all removed, but may be left on the pixel matrix 121. It can function as a light shielding film of the pixel portion TFT 300.

  In the case of a reflective panel, the substrate 500 is not limited to a transparent substrate like a glassy quartz substrate, and a silicon substrate can be used.

  The present embodiment is a modification of the method for manufacturing the light absorber 215 of the first embodiment. This embodiment will be described with reference to FIGS. In addition, the structure of a present Example is the same as that of Example 1, In FIG.20, 21, the same code | symbol as Example 1 shows the same member, Moreover, since drawing becomes complicated, the member same as Example 1 is a code | symbol. Some are omitted.

  In Example 1, after removing the resist mask 212 for forming the groove 213 as shown in FIG. 11, a colored insulator 214 was formed, but in this example, as shown in FIG. With the mask 212 remaining, a black acrylic resin is applied by spin coating to form an insulator 801.

  Then, O 2 ashing is performed under the same conditions as in the first embodiment, and the insulator 701 and resist mask 212 above the p layer 211 are removed as shown in FIG. When a material whose etching rate is the same as that of the insulator 701 is selected for the resist mask 212, the controllability of the ashing end point is good, and the time point when the resist mask 212 on the p layer 211 is removed is set as the ashing end point. be able to. The resist mask 212 remaining in FIG. 21 can be easily stripped with a dedicated stripping solution. By ashing, the insulator 701 remaining in the groove portion of the photoelectric conversion layer becomes the light absorber 702.

  Further, the resist mask 212 on the p layer 211 can be removed by CMP instead of ashing.

  In addition, it is clear that the manufacturing method of the light absorber 702 of this embodiment can also be applied to the second embodiment.

FIG. 3 is an exploded perspective view of a light receiving unit according to the first embodiment. FIG. 6 is a cross-sectional view illustrating a manufacturing process of the image sensor according to the first embodiment. FIG. 6 is a cross-sectional view illustrating a manufacturing process of the image sensor according to the first embodiment. FIG. 6 is an exploded perspective view of a light receiving unit according to a second embodiment. Sectional drawing which shows the manufacturing process of the image sensor of Embodiment 2. FIG. Sectional drawing which shows the manufacturing process of the image sensor of Embodiment 2. FIG. 1 is a front view of a liquid crystal panel of Example 1. FIG. FIG. 6 is an explanatory diagram of a manufacturing process of the liquid crystal panel of Example 1. FIG. 6 is an explanatory diagram of a manufacturing process of the liquid crystal panel of Example 1. FIG. 6 is an explanatory diagram of a manufacturing process of the liquid crystal panel of Example 1. FIG. 6 is an explanatory diagram of a manufacturing process of the liquid crystal panel of Example 1. FIG. 6 is an explanatory diagram of a manufacturing process of the liquid crystal panel of Example 1. FIG. 6 is an explanatory diagram of a manufacturing process of the liquid crystal panel of Example 1. FIG. 10 is an explanatory diagram of a manufacturing process of a liquid crystal panel of Example 2. FIG. 10 is an explanatory diagram of a manufacturing process of a liquid crystal panel of Example 2. FIG. 10 is an explanatory diagram of a manufacturing process of a liquid crystal panel of Example 2. FIG. 10 is an explanatory diagram of a manufacturing process of a liquid crystal panel of Example 2. FIG. 10 is an explanatory diagram of a manufacturing process of a liquid crystal panel of Example 2. FIG. 10 is an explanatory diagram of a manufacturing process of a liquid crystal panel of Example 2. Explanatory drawing of the preparation process of the light absorber of Example 3. FIG. Explanatory drawing of the preparation process of the light absorber of Example 3. FIG. Sectional drawing of the stack type image sensor of a prior art example.

Explanation of symbols

50 MOS transistor (charge transfer device)
60, 80 Light-receiving part (phototransistor)
61, 81 Lower electrodes 62, 82 Photoelectric conversion layers 63, 83 Upper electrodes 64, 84 Light absorber 200 Light receiving portion TFT
208 Lower electrode 209 n layer 210 i layer 211 p layer 212, 602 resist mask 213 605 groove 214, 606 colored insulator 215, 607 light absorber 216, 603 upper electrode 300 pixel portion TFT
309 Light shielding film 310 Pixel electrode

Claims (9)

A plurality of transistors;
A plurality of lower electrodes electrically connected to each of the plurality of transistors;
A photoelectric conversion layer provided on the plurality of lower electrodes;
An upper electrode having translucency provided on the photoelectric conversion layer,
A groove is provided on the surface of the photoelectric conversion layer,
An image sensor, wherein the photoelectric conversion layer remains under the groove, and the groove is filled with an insulating light absorber. In claim 1,
The photoelectric conversion layer has a structure in which an n layer, an i layer, and a p layer are sequentially stacked,
The image sensor, wherein the n layer is provided in an electrically separated manner for each of the plurality of lower electrodes, and the i layer is provided in common for all of the plurality of lower electrodes. In claim 2,
The image sensor according to claim 1, wherein the p layer is electrically separated for each of the plurality of lower electrodes. In claim 2,
The image sensor, wherein the p layer is provided in common to all of the plurality of lower electrodes. In any one of Claim 1, Claim 2, or Claim 4,
The upper electrode includes
An opening provided at a position overlapping with a part of the gap between the groove and the plurality of lower electrodes;
A plurality of first regions respectively provided at positions overlapping with the plurality of lower electrodes;
An image sensor comprising: a plurality of second regions provided between the plurality of adjacent first regions and electrically connecting all of the plurality of first regions. . Forming a plurality of lower electrodes electrically connected to each of the plurality of transistors, and a photoelectric conversion layer provided on the plurality of lower electrodes,
While forming a groove portion reaching the inside of the photoelectric conversion layer on the surface of the photoelectric conversion layer, the photoelectric conversion layer is left under the groove portion,
Filling the groove with an insulating light absorber,
An image sensor manufacturing method, comprising: forming a translucent upper electrode on the photoelectric conversion layer and the light absorber. Forming a plurality of lower electrodes electrically connected to each of the plurality of transistors, and a photoelectric conversion layer provided on the plurality of lower electrodes,
Forming a translucent first upper electrode on the photoelectric conversion layer;
By etching the first upper electrode, an opening provided at a position overlapping a part of the gap between the plurality of lower electrodes, and a plurality of first provided at a position overlapping the plurality of lower electrodes, respectively. And a plurality of second regions provided between the plurality of adjacent first regions and electrically connecting all of the plurality of first regions are formed. And
On the surface of the photoelectric conversion layer, a groove reaching the inside of the photoelectric conversion layer is formed in a self-aligned manner using the opening, and the photoelectric conversion layer is left under the groove,
A method for manufacturing an image sensor, wherein the groove is filled with an insulating light absorber. Forming a plurality of lower electrodes electrically connected to each of the plurality of transistors, and a photoelectric conversion layer provided on the plurality of lower electrodes,
Forming a translucent first upper electrode on the photoelectric conversion layer;
Forming a resist mask on the first upper electrode;
By etching the first upper electrode, an opening provided at a position overlapping a part of the gap between the plurality of lower electrodes, and a plurality of first provided at a position overlapping the plurality of lower electrodes, respectively. And a plurality of second regions provided between the plurality of adjacent first regions and electrically connecting all of the first regions, a second upper electrode is formed,
By performing dry etching with the resist mask remaining, a groove reaching the inside of the photoelectric conversion layer is formed on the surface of the photoelectric conversion layer, and the photoelectric conversion layer is left under the groove. ,
Removing the resist mask;
A method for manufacturing an image sensor, wherein the groove is filled with an insulating light absorber. In any one of Claims 6 to 8,
The method for manufacturing an image sensor, wherein the insulating light absorber is made of a colored organic resin material or a colored silicon oxide-based coating material.

Images