JP2008204975A - Device and method of inspecting semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To quantitatively obtain a relationship between the saturation time of expansion or contraction of a probe pin and an overdrive quantity, in a probe card during probe inspection at high temperature or low temperature. <P>SOLUTION: The device of inspecting a semiconductor device is provided with: a heating/cooling device 105 for probe pin that heats or cools a probe pin 107 provided in a probe card 106; a probing evaluation circuit 104 that is provided in the heating/cooling device 105, is brought into contact with the probe pin 107 by means of a protective film 103; and a probing evaluation device 109 that detects electric characteristic of the probing evaluation circuit 104 so as to evaluate it. The probing evaluation device 109 detects such electric characteristic in the probing evaluation circuit 104 that changes due to stress caused by contact with the probing pin 107 at high or low temperature, finds a saturation time of expansion or contraction of the probe pin 107 as well as an overdrive quantity to the probe card 106 of the substrate, and outputs them as a result. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an inspection apparatus for a semiconductor device and an inspection method using the same, and more particularly to an inspection apparatus used for probe inspection at a high temperature or a low temperature and an inspection method using the same.

  In recent years, reliability evaluation at high and low temperatures is indispensable for semiconductor devices centering on in-vehicle varieties, and a technique for screening defective products by performing probe inspection at high or low temperatures has been proposed. .

  In the probe inspection at a high temperature or a low temperature, it is necessary to consider expansion or contraction of the probe pin of the probe card at each temperature at the time of inspection. Conventionally, however, the heating time or cooling time of the probe pins constituting the probe card and the overdrive amount are uniform and empirical regardless of the LSI (Large Scale Integrated Circuit) type conditions including the number of pads. It is decided to.

  As a result, the expansion and contraction of the probe pin becomes insufficient, so that the probe pin does not sufficiently hit the pad during the inspection, and contact failure frequently occurs, and the inspection efficiency deteriorates.

  In order to solve this problem, the probe pin is heated or cooled by a heating / cooling device dedicated to the probe card needle (probe pin) installed in the prober device, and then the height of the probe pin from the probe card is adjusted by the camera. Techniques have been proposed for detecting and examining the degree of expansion or contraction of the probe pin.

  Hereinafter, with reference to FIG. 26, a conventional prober apparatus that detects the height of the probe pin from the probe card by a camera and checks the expansion or contraction of the probe pin will be described (see, for example, Patent Document 1).

  As shown in FIG. 26, a prober device 500 is provided with a wafer stage 501 on which a wafer (substrate) on which a semiconductor device is formed is placed on the upper surface, and a wafer that heats or cools the wafer. Overheating cooling device 502, probe card heating / cooling device 504 provided on the side of wafer stage 501 and having heating / cooling unit 503 for heating or cooling probe pin 506 of probe card 505, and probe pin 506 from below A probe pin observation camera 507 to be photographed and a probe pin evaluation device 508 for measuring the height of the probe pin 506 from the lower surface of the probe card 505 from the photographed image data.

  In the probe inspection at the time of high temperature or low temperature by the prober device 500, first, a wafer to be inspected is placed on the wafer stage 501, and then the wafer is heated or heated to a predetermined temperature by the wafer heating / cooling device 502. Cooling.

  Next, the probe pin 506 of the probe card 505 is brought into contact with the probe card heating / cooling unit 503 and heated or cooled to a predetermined temperature by the probe card heating / cooling device 504. The state of expansion or contraction of the probe pin 506 at this time is examined by photographing the probe pin 506 with the probe pin observation camera 507 and analyzing the image with the probe pin evaluation device 508 to detect the height of the probe pin 506.

As described above, according to the conventional method of detecting the expansion or contraction of the probe pin 506, the probe pin 506 is heated or cooled, and the probe pin 506 is observed by the probe pin observation camera 507. The step of detecting the height of the probe pin 506 by 508 is repeated. Thereby, the expansion or contraction of the probe pin can be examined.
JP 2003-344498 A

  However, in the conventional method for examining the expansion or contraction of the probe pin in the probe inspection at a high temperature or a low temperature, the step of heating or cooling the probe pin until the height of each probe pin reaches a saturation state. Since it is necessary to repeat the process of measuring the height of the probe pin and checking the expansion or contraction of the probe pin many times, there is a problem that the work is inefficient.

  In addition, it is difficult to accurately quantify the time during which the height of each probe pin is saturated by heating or cooling.

  Furthermore, there is a problem that it is difficult to determine an appropriate amount of overdrive to be applied to the probe card and a problem that prober setting data must be prepared for each semiconductor chip.

  In view of the above-mentioned conventional problems, the present invention relates to the saturation time and the overdrive amount of the probe pin of the probe card in the probe inspection at the high temperature or low temperature according to the product condition such as the number of pads of the LSI. The purpose is to be able to obtain the relationship quantitatively, and to obtain the optimal overdrive amount for the probe card at high temperature, normal temperature and low temperature so that the prober setting data can be used at any time .

  In order to achieve the above-described object, the present invention provides an inspection device for a semiconductor device, using an evaluation element whose electrical characteristics change when the probe pin comes into contact, and a saturation time of expansion or contraction of the probe pin and a probe card. The amount of overdrive with respect to is determined.

  Specifically, a first semiconductor device inspection apparatus according to the present invention is directed to a semiconductor device inspection apparatus that inspects the electrical characteristics of a semiconductor device formed on a substrate using a prober having a probe card. A probe pin temperature control unit for heating or cooling a probe pin provided on the card, a probing evaluation unit provided in the probe pin temperature control unit for contacting the probe pin, and an electrical characteristic of the probing evaluation unit are detected and evaluated. The probing evaluation device comprises a probe pin expansion or contraction saturation time and a substrate saturation time based on electrical characteristics in the probing evaluation unit that change due to stress due to contact with the probe pin in a high temperature state or a low temperature state. The feature is to obtain and output the overdrive amount for the probe card. To.

  According to the inspection apparatus for a first semiconductor device, the probe pin temperature control unit includes a probing evaluation unit that contacts the probe pin, and a probing evaluation device that detects and evaluates electrical characteristics of the probing evaluation unit. The probing evaluation device determines the probe pin expansion or contraction saturation time and the amount of overdrive of the substrate relative to the probe card based on the electrical characteristics in the probing evaluation unit that change due to stress due to contact with the probe pin in a high temperature state or a low temperature state. Therefore, the relationship between the overdrive amount and the saturation time of the expansion or contraction of the probe pin of the probe card in the probe inspection at the high temperature or low temperature can be obtained quantitatively.

  In the inspection apparatus for a first semiconductor device, the probing evaluation unit includes an evaluation circuit in which a plurality of evaluation elements whose electrical characteristics change due to stress are integrated in a matrix, and one of the plurality of evaluation elements. It is preferable to include a row decoder circuit and a column decoder circuit to be identified, and a current / position detection circuit that detects the amount of current flowing through the evaluation element and the position of the evaluation element in which the current amount has changed.

  In the inspection apparatus for the first semiconductor device, the probing evaluation unit is preferably separable from the probe pin temperature control unit.

  A second semiconductor device inspection apparatus according to the present invention is directed to a semiconductor device inspection apparatus that inspects the electrical characteristics of a semiconductor device formed on a substrate using a prober having a probe card, and heats or cools the substrate. And a probing evaluation unit that detects and evaluates electrical characteristics of the probing evaluation unit, and performs probing evaluation. The device calculates and outputs the saturation time of probe pin expansion or contraction and the amount of overdrive to the probe card on the board from the electrical characteristics in the probing evaluation section that changes due to stress due to contact with the probe pin in a high temperature state or a low temperature state. It is characterized by doing.

  According to the second semiconductor device inspection apparatus, the probing evaluation unit provided below the plurality of pad electrodes formed on the substrate, and the probing evaluation unit for detecting and evaluating the electrical characteristics of the probing evaluation unit The probing evaluation device is provided with a probe pin expansion / contraction saturation time and a substrate over the probe card from the electrical characteristics in the probing evaluation section that change due to stress due to contact with the probe pin in a high temperature state or a low temperature state. Since the drive amount is obtained and outputted, the relationship between the overdrive amount and the saturation time of the expansion or contraction of the probe pin of the probe card in the probe inspection at a high or low temperature can be quantitatively obtained.

  In the inspection apparatus for the second semiconductor device, the probing evaluation unit includes an evaluation circuit in which a plurality of evaluation elements whose electrical characteristics change due to stress are integrated in a matrix, and one of the plurality of evaluation elements. It is preferable to include a row decoder circuit and a column decoder circuit to be identified, and a current / position detection circuit that detects the amount of current flowing through the evaluation element and the position of the evaluation element in which the current amount has changed.

  In the second semiconductor device inspection apparatus, the probing evaluation unit preferably includes a single evaluation element whose electrical characteristics change due to stress and a current detection circuit that detects the amount of current flowing through the evaluation element. .

  In the second semiconductor device inspection apparatus, the probing evaluation apparatus is preferably formed in the semiconductor device.

  In the second semiconductor device inspection apparatus, the probing evaluation apparatus is preferably formed outside the semiconductor device.

  The inspection apparatus for the second semiconductor device further includes an IO pad electrode that is formed on the semiconductor substrate and applies an electrical signal to the semiconductor device, and a fuse circuit that connects the IO pad electrode and the probing evaluation unit. Is preferred.

  In addition, a second semiconductor device inspection device is formed on a semiconductor substrate and applies an electrical signal to the semiconductor device, between the IO pad electrode and the probing evaluation unit, and between the IO pad electrode and the semiconductor device. It is preferable to further include a selector circuit that selectively connects between the circuits constituting the circuit.

  In the second semiconductor device inspection apparatus, a plurality of semiconductor devices are formed across the scribe line formed on the substrate, the probing evaluation unit and the probing evaluation unit are formed on the scribe line, and the probing evaluation unit It is preferable to have a single evaluation element whose electrical characteristics change depending on the current and a current detection circuit that detects the amount of current flowing through the evaluation element.

  The inspection apparatus for the first or second semiconductor device includes a data holding means for holding the output probe pin expansion or contraction saturation time and the value of the overdrive amount for the probe card on the substrate, the data holding means and the prober. It is preferable that the network means for connecting the data holding means is further provided, and the data held in the data holding means is used as an initial set value in the inspection of another semiconductor device.

  A first semiconductor device inspection method according to the present invention includes a substrate temperature control unit that heats or cools a substrate on which a semiconductor device is formed, and a probe pin temperature control unit that heats or cools probe pins provided on a probe card. And a probing evaluation unit that is provided in the probe pin temperature control unit and that contacts the probe pin, and a probing evaluation device that detects and evaluates the electrical characteristics of the probing evaluation unit, and a substrate, A step (a) of heating or cooling the semiconductor device and the probe pin to a predetermined temperature by the temperature control unit and the probe pin temperature control unit, respectively, and a probe for bringing the probe pin into contact with a pad electrode provided in the semiconductor device A step (b) of initializing an overdrive amount corresponding to the stress, and a probe probe at a predetermined temperature; (C) in which the probe pin is brought into contact with the probing evaluation unit with an initial overdrive amount, and a current value flowing through the probing evaluation unit due to expansion or contraction of the probe pin when the probe pin is brought into contact with the probing evaluation unit. A step (d) of measuring and holding the amount of fluctuation every predetermined time, a step (e) of accumulating a plurality of amounts of fluctuation of the held current value to obtain cumulative frequency data, the obtained cumulative frequency data, The step (f) for comparing the reference value of the amount of fluctuation of the current value when the preset protective film and the probe pin are in normal contact with the cumulative frequency data in the step (f) reaches the reference value Determines that the overdrive amount is appropriate. On the other hand, if the cumulative frequency data in step (f) does not reach the reference value, the overdrive amount is determined to be inappropriate. When the overdrive amount is determined to be appropriate in (g) and step (g), the semiconductor device inspection is started. On the other hand, if the overdrive amount is determined to be inappropriate in step (g), And a step (h) of repeating the steps (b) to (g) until the overdrive amount becomes an appropriate value.

  A second semiconductor device inspection method according to the present invention includes a substrate temperature control unit that heats or cools a substrate on which a semiconductor device is formed, and probing evaluation provided below a plurality of pad electrodes formed on the substrate. And a probing evaluation device that detects and evaluates the electrical characteristics of the probing evaluation unit, and the substrate temperature control unit heats the semiconductor device and the probe pin to a predetermined temperature, respectively. Or a step (a) of cooling, a step (b) of initializing an overdrive amount corresponding to the probe stress when the probe pin is brought into contact with a pad electrode provided in the semiconductor device, and a probe pin at a predetermined temperature. A step (c) of contacting the pad electrode on the probing evaluation part with an initial overdrive amount, and probing evaluation A step (d) of measuring and holding the fluctuation amount of the current value flowing through the probing evaluation section due to the expansion or contraction of the probe pin when the probe pin is brought into contact with the electrode pad of the probe pin, and the held current A step (e) for accumulating a plurality of fluctuation values of the value to obtain cumulative frequency data, the obtained cumulative frequency data, and the fluctuation amount of the current value when the preset pad electrode and the probe pin normally contact each other. When the cumulative frequency data in the step (f) for comparing with the reference value and the cumulative frequency data in the step (f) reach the standard value, it is determined that the overdrive amount is appropriate, while the cumulative frequency data in the step (f) is When the reference value has not been reached, the semiconductor device includes the step (g) for determining that the overdrive amount is inappropriate and the step (g) for determining that the overdrive amount is appropriate. On the other hand, if the overdrive amount is determined to be inappropriate in the step (g), the step (b) to the step (g) are repeated until the overdrive amount becomes an appropriate value ( h).

  In the first or second semiconductor device inspection method, the probing evaluation unit includes a plurality of evaluation elements, and the step (d) includes a plurality of time-dependent changes in the amount of change in the current value flowing through each evaluation element in the probing evaluation unit. Including a step of obtaining a saturation time until the change of the current value flowing through each evaluation element does not change with time by measuring once, and in step (e), the cumulative frequency data is the saturation obtained for each evaluation element. It is preferable to obtain by time.

  In the first or second semiconductor device inspection method, a plurality of probing evaluation units each including a single evaluation element are provided, and step (d) flows through the evaluation elements in each probing evaluation unit. In step (e), a step of obtaining a saturation time until there is no change over time in the amount of variation in the current value flowing through the evaluation element of each probing evaluation unit by measuring the variation over time in the amount of variation in the current value, The cumulative frequency data is preferably obtained from the saturation time obtained for each probing evaluation unit.

  In the first or second semiconductor device inspection method, after the step (h), an appropriate value of the obtained overdrive amount is used as an initial set value at the time of inspection of another semiconductor device (I). Is preferably further provided.

  The inspection method for the first or second semiconductor device further includes a step (I) of using the obtained saturation time as an initial set value at the time of inspection of another semiconductor device after the step (h). It is preferable.

  According to the semiconductor device inspection apparatus and the inspection method using the same according to the present invention, the expansion of the probe pin of the probe card in the probe inspection at high temperature or low temperature according to the product condition such as the number of pads being different for each LSI Alternatively, the relationship between the saturation time at which the contraction is saturated and the overdrive amount can be quantitatively acquired. In addition, an appropriate amount of overdrive can be used at any time for probe cards at high temperatures, normal temperatures, and low temperatures.

(First embodiment)
A semiconductor device inspection apparatus according to a first embodiment of the present invention will be described with reference to the drawings.

  FIG. 1 schematically shows a semiconductor device inspection apparatus according to a first embodiment of the present invention. As shown in FIG. 1, the prober apparatus 100 according to the first embodiment includes a wafer stage 101 on which a wafer (substrate) on which a plurality of semiconductor devices are formed is placed on an upper surface, and a lower side of the wafer stage 101. A wafer overheating cooling device 102 that heats or cools the wafer and a plurality of probe pins 107 provided on the side of the wafer stage 101 and provided on the probe card 106 are heated or cooled, and the upper surface is a protective film 103. And a probing evaluation circuit 104 for electrically checking the amount of overdrive with respect to the probe card 106 and the saturation time of expansion or contraction of the probe pin 107, and a probe pin 107 provided below the probing evaluation circuit 104. Probe pin heating / cooling device 105 for heating or cooling, probing evaluation circuit 104 and wiring They are connected by 08, and a probing evaluation device 109 for and evaluates monitors the electrical characteristics of the probing evaluation circuit 104.

  The protective film covering the upper surface of the probing evaluation circuit 104 only needs to prevent damage due to contact with the probe pin 107 of the probing evaluation circuit 104. For example, a metal film made of aluminum (Al), titanium nitride, silicon nitride, or oxide An insulating film such as silicon can be used.

  FIG. 2A shows a planar configuration of the probing evaluation circuit 104. As shown in FIG. 2A, the probing evaluation circuit 104 includes, for example, a plurality of evaluations in which the probing area 200 in contact with the probe pin of the probe card is composed of, for example, a transistor, and the value of the flowing current varies depending on the probe pin stress. The elements 201 are arranged in a matrix (array). Here, a field effect transistor or a bipolar transistor can be used as the transistor serving as the evaluation element.

  Around the probing region 200, each evaluation element 201 is connected to each evaluation element 201 via a row decoder wiring 202, and each evaluation element 201 is specified via a column decoder wiring 204 to specify an address in the Y direction. Connected to each evaluation element 201 via a column decoder circuit 205 for specifying an address in the X direction and a current / position detection circuit wiring 206, the current value flowing through each evaluation element 201 and the expansion or contraction of the probe pin And a current / position detection circuit 207 for detecting a change in the address position of the evaluation element 201 through which a current flows.

  FIG. 2B shows one evaluation element 201, and a 1-bit current value fluctuates due to the probe stress in the probing region 200. Current / position detection circuit terminals 201 a, column decoder terminals 201 b, and rows are used as terminals. It has a decoder terminal 201c.

  Here, in the probing evaluation circuit 104, experimental data in which the current value varies depending on the stress of the probe pin (probe stress) is shown. FIG. 3 schematically shows a state in which a plurality of probe pins 107 are in contact with a plurality of evaluation elements 201 arranged in an array.

  FIG. 4A shows a state in which one probe pin 107 is in contact with a plurality of evaluation elements 201 composed of transistors arranged in an array under the protective film 103. As a result, as shown in FIG. 4B, current fluctuation characteristics due to the probe stress are observed at the address indicating the evaluation element 201 to which the contact stress of the probe pin 107 is applied. From the current fluctuation characteristics shown in FIG. 4B, it can be seen that the fluctuation amount of the maximum current flowing in the evaluation element 201 at the corresponding address is increased by about 10%.

  FIG. 5A shows a case where an SRAM (Static Random Access Memory) cell 208 shown in FIG. 5B is used for each evaluation element 201. As shown in FIG. 5C, the current fluctuation characteristic due to the probe stress is observed at the address indicating the evaluation element 201 to which the contact stress of the probe pin 107 is applied. From the current fluctuation characteristics shown in FIG. 5C, it can be seen that the fluctuation amount of the maximum current of the current 209 flowing through the 1-bit SRAM cell 208 of the corresponding address is about 4% increase.

  Thus, according to the first embodiment, the saturation time of expansion or contraction of the probe pin 107 of the probe card 106 in the probe inspection at the high temperature or the low temperature and the appropriateness for the probe card 106 at the high temperature, normal temperature or low temperature The amount of overdrive can be determined.

  Further, the probe pin 107 of the probe card 106 can be handled without being limited by the terminal shape of the semiconductor device (semiconductor chip) and the size of the semiconductor device.

(One modification of the first embodiment)
FIG. 6A shows a schematic cross-sectional configuration of a probing evaluation circuit device 300 including a probing evaluation circuit 104 in the semiconductor device inspection apparatus according to the first embodiment of the present invention, and FIG. 6B shows probing evaluation. The planar configuration of the circuit device 300 is shown.

  As shown in FIGS. 6A and 6B, the probing evaluation circuit device 300 according to this modification includes a probing evaluation circuit 104 in which almost the entire upper surface is covered with a protective film 103. A structure separable from the cooling device 105 is adopted.

  Specifically, the probing evaluation circuit 104 is incorporated in the probing evaluation circuit board 301 so that the probing evaluation circuit board 301 is detachable on the probing evaluation board 302 provided on the probe pin heating / cooling device 105. It is held and electrically connected.

  The probing evaluation circuit 104 and the probing evaluation circuit board 301 are electrically connected by a probing evaluation circuit terminal 104 a of the probing evaluation circuit 104, a wiring 303 and a probing evaluation circuit board terminal 304 of the probing evaluation circuit board 301. The probing evaluation circuit board 301 and the probing evaluation board 302 are electrically connected by a probing evaluation circuit board pin 305 of the probing evaluation circuit board 301 and a probing evaluation board terminal 306 of the probing evaluation board 302.

  As described above, according to this modification, even if the performance degradation, failure, or specification change of the probing evaluation circuit board 301 incorporating the probing evaluation circuit 104 occurs, a new probing evaluation circuit board 301, that is, a new probing The evaluation circuit 104 can be easily replaced.

(Inspection method)
Hereinafter, an inspection method using the semiconductor device inspection apparatus configured as described above will be described with reference to the drawings.

  Here, overdrive is evaluated by evaluating the appropriate overdrive amount for the probe card at high temperature, normal temperature and low temperature, and the saturation time of probe pin expansion or contraction in probe inspection at high temperature or low temperature. A method for quantitatively determining the amount and the saturation time will be described.

  FIG. 7A shows the initial value of the current fluctuation characteristic when the probe pin 107 is not in contact with the protective film 103. The specific positional relationship between the probe pin 107 and the probing region 200 at this time is as shown in FIG.

  FIG. 8A shows current fluctuation characteristics due to probe stress when the probe pin 107 is in contact with the protective film 103. As shown in FIGS. 4B and 5C, the amount of current flowing through the probing region 200 increases due to the probe stress. In this state, the current fluctuation amount of the probe pin 107 on the protective film 103 is a reference value, that is, when the protective film 103 and the probe pin 107 are in sufficient contact under normal temperature, high temperature, and low temperature conditions. The amount of overdrive is determined by checking whether or not the fluctuation amount of the current to be reached has been reached. FIG. 8B shows a specific positional relationship between the probe pin 107 and the probing area 200 at this time.

  FIG. 9A shows current fluctuation characteristics due to probe stress when the probe pin 107 is expanded or contracted in a state where the probe pin 107 is in contact with the protective film 103. Here, the probe pin 107 in contact with the protective film 103 is expanded or contracted on the protective film 103. A specific positional relationship between the probe pin 107 and the probing region 200 at this time is shown in FIG. Here, for example, when the probe pin 107 expands, the height from the lower surface of the probe card increases, so that the fluctuation amount of the current value becomes larger than the reference value of the overdrive amount of the probe card. On the contrary, when the probe pin 107 is contracted, the height from the lower surface of the probe card becomes small, so that the fluctuation amount of the current value becomes smaller than the reference value of the overdrive amount. Accordingly, the time during which the current fluctuation characteristic due to the stress of the probe pin 107 in contact with the heated or cooled protective film 103 fluctuates before and after the expansion or contraction is confirmed, and the saturation time of the expansion or contraction of the probe pin 107 is determined. To do. Here, before and after expansion or contraction means before and after transition from a normal temperature state to a heating state or from a normal temperature state to a cooling state.

  As described above, according to the inspection method according to the present embodiment, an appropriate overdrive amount for the probe card 106 at high temperature, normal temperature, and low temperature, and the probe pin 107 of the probe card 106 in the probe inspection at high temperature or low temperature. It is possible to quantitatively determine the saturation time of expansion or contraction.

(Second Embodiment)
Hereinafter, a semiconductor device inspection apparatus according to a second embodiment of the present invention will be described with reference to the drawings.

  FIG. 10 schematically shows a planar configuration of the main part of the semiconductor device inspection apparatus according to the second embodiment of the present invention. Unlike the first embodiment, the semiconductor device inspection apparatus according to the second embodiment is incorporated in a semiconductor device formed on a wafer.

  As shown in FIG. 10, a wafer 310 is a chip internal area A in one semiconductor device (semiconductor chip) divided into chips, and pads that are areas where input / output terminals are provided in the periphery of the chip internal area A. The formation area B is partitioned by a chip boundary 311.

  In the pad forming region B, probing regions 200A, 200B, and 200C each having a plurality of evaluation elements arranged in an array are formed. Pad electrodes 313 that also serve as protective films are formed on the top surfaces of the probing regions 200A, 200B, and 200C, respectively. Here, as in each of the evaluation elements arranged in the probing regions 200A, 200B, and 200C, a transistor, an SRAM cell, or the like whose current value varies depending on the probe stress can be used as in the first embodiment. In the second embodiment, one probe pin contacts each probing region 200A, 200B, 200C.

  The chip internal area A is connected to each evaluation element in each of the probing areas 200A, 200B, and 200C via a wiring 317, and a row decoder circuit 314 that specifies an address in the Y direction, and each probing area 200A via a wiring 318. , 200B, and 200C, connected to each evaluation element in each probing region 200A, 200B, and 200C via a wiring 319 and a column decoder circuit 315 that specifies an address in the X direction. A current / position detection circuit 316 is formed for detecting a change in the address position of the evaluation element through which the current flows due to the value of the flowing current and the expansion or contraction of the probe pin. Here, each pad electrode 313 is connected to a current / position detection circuit 316 by a wiring 320.

  The current / position detection circuit 316 is connected to the row decoder circuit 314 by a wiring 321 and connected to the column decoder circuit 315 by a wiring 322.

(One Modification of Second Embodiment)
FIG. 11 shows a modification of the second embodiment of the present invention. In FIG. 11, the same components as those shown in FIG.

  As shown in FIG. 11, the inspection apparatus for a semiconductor device according to the present modification forms the probing regions 200A, 200B, and 200C in the chip internal region A instead of the pad formation region B.

  As described above, according to the second embodiment and one modification thereof, the semiconductor device inspection apparatus according to the present invention is formed on a product or a TEG (Test Element Group) which is a semiconductor device formed on the wafer 310. By doing this, the probe card probe pin expansion or contraction saturation time in the probe inspection at high temperature or low temperature and the appropriate overdrive amount for the probe card at high temperature, normal temperature and low temperature are directly evaluated. Therefore, data accuracy can be improved.

(Third embodiment)
Hereinafter, a semiconductor device inspection apparatus according to a third embodiment of the present invention will be described with reference to the drawings.

  FIG. 12 schematically shows a planar configuration of a main part of an inspection apparatus for a semiconductor device according to the third embodiment of the present invention. In the semiconductor device inspection apparatus according to the third embodiment, unlike the second embodiment, the evaluation elements arranged in the probing regions 200D, 200E, and 200F are each constituted by a single transistor.

  Specifically, as shown in FIG. 12, in the pad formation region B of the semiconductor chip, probing regions 200D, 200E, and 200F in which a single transistor as an evaluation element whose current value varies depending on the probe stress are formed. Has been. A pad electrode 313 also serving as a protective film is formed on the upper surface of each probing region 200D, 200E, 200F.

  In the third embodiment, one probe pin comes into contact with each probing region 200D, 200E, 200F.

  In the chip internal area A, a current detection circuit 326 is formed which is connected to the evaluation elements in the probing areas 200D, 200E, and 200F via the wiring 319 and detects fluctuations in the current value flowing through the evaluation elements. Each pad electrode 313 is connected to the current detection circuit 326 by a wiring 320.

(First Modification of Third Embodiment)
FIG. 13 shows a first modification of the third embodiment of the present invention. In FIG. 13, the same components as those shown in FIG.

  As shown in FIG. 13, the semiconductor device inspection apparatus according to the first modification forms the probing regions 200 </ b> D, 200 </ b> E, and 200 </ b> F not in the pad formation region B but in the chip internal region A.

(Second modification of the third embodiment)
FIG. 14 shows a second modification of the third embodiment of the present invention. 14, the same components as those shown in FIG. 12 are denoted by the same reference numerals.

  As shown in FIG. 14, the probing evaluation circuit 104 according to the second modified example divides the wafer 310 provided between the first semiconductor chip region 340A and the second semiconductor chip region 340B formed on the wafer 310. It is formed in a scribe area C which is an area (cutting area).

  Specifically, in the scribe region C of the wafer 310, probing regions 200D, 200E, and 200F in which a single transistor as an evaluation element is disposed are formed. A pad electrode 313 also serving as a protective film is formed on the upper surface of each probing region 200D, 200E, 200F.

  Further, in the scribe region C, a current detection circuit 326 that is connected to the evaluation elements of the probing regions 200D, 200E, and 200F via the wiring 319 and detects fluctuations in the current value flowing through the evaluation elements is formed. Each pad electrode 313 is connected to the current detection circuit 326 by a wiring 320.

  As described above, the third embodiment and the first modification can be applied to general semiconductor chips such as products or TEGs. Further, the second modification can be applied mainly to a product formed on the scribe region C of the wafer 310 or a semiconductor chip such as TEG.

  According to the third embodiment and the modification thereof, the expansion or contraction of the probe pin of the probe card in the probe inspection at a high temperature or a low temperature can be performed with a simple circuit configuration by using a semiconductor device or TEG as a product. Since the saturation time and the appropriate amount of overdrive for the probe card at high temperature, normal temperature, and low temperature can be directly evaluated, data accuracy can be improved. In the second modification, the scribe area can be effectively used.

(Inspection method)
Hereinafter, an inspection method using the semiconductor device inspection apparatus configured as described above will be described with reference to the drawings.

  Here, overdrive is evaluated by evaluating the appropriate overdrive amount for the probe card at high temperature, normal temperature and low temperature, and the saturation time of probe pin expansion or contraction in probe inspection at high temperature or low temperature. A method for quantitatively determining the amount and the saturation time will be described.

  FIG. 15A shows the initial value of the current fluctuation characteristic when the probe pin 107 is not in contact with the pad electrode 313. The specific positional relationship between the probe pin 107 and the probing region 200 at this time is as shown in FIG.

  FIG. 16A shows current fluctuation characteristics due to probe stress when the probe pin 107 is in contact with the pad electrode 313. Thus, the amount of current flowing through the evaluation element made up of a single transistor increases due to the probe stress. Here, when the fluctuation amount of the current of the probe pin 107 on each pad electrode 313 is a reference value under each temperature condition of normal temperature, high temperature, and low temperature, that is, when the pad electrode 313 and the probe pin 107 are sufficiently in contact with each other. The overdrive amount is determined by checking whether or not the observed current fluctuation amount has been reached. A specific positional relationship between the probe pin 107 and the probing region 200 at this time is shown in FIGS. 16 (b) and 16 (c).

  FIG. 16B shows the probe pin 107 at a high temperature, and the probe pin 107 is in contact with the pad electrode 313 in an expanded state. As shown in FIGS. 16A and 16B, when the probe pin 107 expands on the pad electrode 313 and comes close to the center of the evaluation element, the amount of fluctuation in current is larger than that at room temperature. It is increasing.

  In contrast, FIG. 16C shows the probe pin 107 at a low temperature, and the probe pin 107 is in contact with the pad electrode 313 in a contracted state. As shown in FIGS. 16 (a) and 16 (c), the probe pin 107 contracts on the pad electrode 313 and moves away from the center of the evaluation element, so that the amount of fluctuation in current is reduced compared with that at room temperature. is doing.

  In the third embodiment, the current fluctuation characteristics due to the stress of the probe pin 107 in contact with each pad electrode 313 confirm the time that the increase / decrease in the current fluctuation amount is stable before and after expansion or contraction, Determine the saturation time of expansion or contraction. As described above, before and after expansion or contraction means before and after transition from a normal temperature state to a heating state or from a normal temperature state to a cooling state.

  According to the third embodiment, the optimum overdrive amount for the probe card at high temperature, normal temperature, and low temperature, and the saturation time of expansion or contraction of the probe pin of the probe card in the probe inspection at high temperature or low temperature It can be obtained quantitatively.

(Fourth embodiment)
Hereinafter, a semiconductor device inspection apparatus according to a fourth embodiment of the present invention will be described with reference to the drawings.

  FIG. 17 shows an inspection apparatus for a semiconductor device according to the fourth embodiment of the present invention, in which signal lines of the inspection apparatus according to the second embodiment are omitted and only wiring of the power supply system is shown. In FIG. 17, the same components as those shown in FIG.

  As shown in FIG. 17, an IO pad electrode for inputting / outputting electrical signals, which is a power supply pad electrode 312 for supplying power, is formed on the wafer 310. From the power supply pad electrode 312, a plurality of evaluation elements are arrayed below each pad electrode 313 via the first power supply wiring 330, the fuse circuit 331, the second power supply wiring 332, and the third power supply wiring 333. The power supply voltage is supplied to the probing regions 200A, 200B, and 200C, the row decoder circuit 314, the column decoder circuit 315, and the current / position detection circuit 316, respectively. The power pad electrode 312 is directly connected to other circuits besides the probing evaluation circuit according to the present invention, and the power supply voltage can be supplied to other circuits.

  Note that the pad electrode 313 on each probing region 200A, 200B, and 200C can be configured to input / output various signals to / from other circuits.

  As a feature of the fourth embodiment, after the saturation time of the expansion or contraction of the probe pin of the probe card and the evaluation of the overdrive amount with respect to the probe card at high temperature, normal temperature and low temperature are completed, the fuse circuit 331 is By cutting, the supply of the power supply voltage to each evaluation element in the probing regions 200A, 200B, and 200C, the row decoder circuit 314, the column decoder circuit 315, and the current / position detection circuit 316 can be cut off. As a result, after the inspection is finished, when the semiconductor device or TEG as a product is used in a normal operation, the power supply voltage is not supplied to the probing evaluation circuit, so that excessive power consumption can be suppressed.

(One Modification of Fourth Embodiment)
FIG. 18 shows an inspection apparatus for a semiconductor device according to a modification of the fourth embodiment of the present invention, in which the signal lines of the inspection apparatus according to the third embodiment are omitted and only the power supply system is represented. Yes. In FIG. 18, the same components as those shown in FIG.

  As shown in FIG. 18, a power supply pad electrode 312 for supplying power is formed on the wafer 310. Probing regions 200D and 200E in which a single evaluation element is formed below each pad electrode 313 from the power supply pad electrode 312 via the first power supply wiring 330, the fuse circuit 331, and the second power supply wiring 332. , 200F and the current detection circuit 326 are supplied with power supply voltage. The power pad electrode 312 is directly connected to other circuits besides the probing evaluation circuit according to the present invention, and the power supply voltage can be supplied to other circuits. Also, the pad electrodes 313 on the probing areas 200D, 200E, and 200F can be configured to input / output various signals to / from other circuits.

  As described above, also in the first modified example, the power supply voltage is supplied to the probing evaluation circuit when the semiconductor device or TEG as a product is used in normal operation by cutting the fuse circuit 331 after the inspection is completed. This eliminates excess power consumption.

(Fifth embodiment)
Hereinafter, a semiconductor device inspection apparatus according to a fifth embodiment of the present invention will be described with reference to the drawings.

  FIG. 19 schematically shows a semiconductor device inspection apparatus according to the fifth embodiment of the present invention. In FIG. 19, the same components as those shown in FIG. 10 are denoted by the same reference numerals, and the description thereof is omitted.

  In the fifth embodiment, the pad electrode used in a normal semiconductor device or TEG has a wiring configuration that can be shared even when the probe pin expansion or contraction saturation time and the overdrive amount for the probe card are evaluated.

  As shown in FIG. 19, the wiring 320 from each pad electrode 313 is connected to the selector circuit 335, and is connected to the wiring 323 connected to the current / position detection circuit 316 or other circuits by the selector circuit 335. The wiring 324 to be selected is selected.

(One Modification of Fifth Embodiment)
FIG. 20 schematically shows an inspection apparatus for a semiconductor device according to a modification of the fifth embodiment of the present invention. In FIG. 20, the same components as those shown in FIG.

  As shown in FIG. 20, the wiring 320 from each pad electrode 313 is connected to the selector circuit 335, and the selector circuit 335 connects the wiring 323 connected to the current detection circuit 326 or another circuit. 324 is selected.

  As described above, according to the fifth embodiment and one modification thereof, the selector circuit 335 selects each wiring 323 to evaluate the saturation time of the probe pin expansion or contraction and the overdrive amount for the probe card. Can be implemented.

  Further, by selecting each wiring 324 by the selector circuit 335, a normal operation of a semiconductor device or TEG as a product can be executed. As a result, since the pad electrode 313 of the semiconductor device or the like can be used even during the probe inspection, the pad electrode for each function, such as a pad electrode for a semiconductor device as a product and a pad electrode for probe inspection, can be used. There is no need to provide it. That is, it is not necessary to add a pad electrode for the probe pin evaluation circuit.

(Sixth embodiment)
A semiconductor device inspection apparatus according to a sixth embodiment of the present invention will be described below with reference to the drawings.

  The sixth embodiment shows a specific example of the mounting method of the semiconductor device inspection apparatus according to the second to fifth embodiments. With these mounting methods, it is possible to easily increase the number of data of evaluation data of the probe pin expansion or contraction saturation time and the overdrive amount for the probe card.

  The configuration shown in FIG. 21A includes a plurality of wafers 310 including only the semiconductor device inspection apparatus according to the second embodiment of the present invention, a modification thereof, the fourth embodiment, or the fifth embodiment. The semiconductor chip region 350A is formed. Therefore, a plurality of evaluation elements are arranged in an array in the probing area of the probing evaluation circuit formed in each semiconductor chip area 350A.

  The configuration shown in FIG. 21B is a configuration in which a wafer 310 is mixed with at least two semiconductor chip regions 350A and a plurality of semiconductor chip regions 351 including a semiconductor device as a product.

  The configuration shown in FIG. 21C relates to a wafer 310 according to the third embodiment of the present invention, the first modification thereof, a modification of the fourth embodiment, or a modification of the fifth embodiment. A plurality of semiconductor chip regions 350B including only a semiconductor device inspection device are formed. Therefore, a single evaluation element is formed in the probing region of the probing evaluation circuit formed in each semiconductor chip region 350B.

  The configuration shown in FIG. 21D is a configuration in which at least two semiconductor chip regions 350B and a plurality of semiconductor chip regions 351 including a semiconductor device to be a product are mixedly mounted on the wafer 310.

  Next, in the configuration shown in FIG. 22A, the semiconductor device inspection apparatus according to the second embodiment of the present invention, a modification thereof, the fourth embodiment, or the fifth embodiment is applied to the wafer 310. The semiconductor device has a plurality of semiconductor chip regions 352A incorporated in a semiconductor device as a product. Therefore, a plurality of evaluation elements are arranged in an array in the probing area of the probing evaluation circuit formed in each semiconductor chip area 352A.

  The configuration shown in FIG. 22B relates to a wafer 310 according to the third embodiment of the present invention, its first modification, one modification of the fourth embodiment, or one modification of the fifth embodiment. The semiconductor device inspection apparatus includes a plurality of semiconductor chip regions 352B incorporated in a semiconductor device as a product. Therefore, a single evaluation element is formed in the probing region of the probing evaluation circuit formed in each semiconductor chip region 352B.

  In the configuration shown in FIG. 22C, the semiconductor device inspection apparatus 360 according to the second modification of the third embodiment of the present invention has a scribe region of a plurality of semiconductor chip regions 351 including a semiconductor device to be a product. It is the structure formed in part. Here, as shown in FIG. 22C, a process control module (PCM) 361 may be formed in the remaining portion of the scribe area instead of the inspection apparatus 360. Note that the semiconductor device inspection apparatus 360 may be formed over the entire scribe region.

  Thus, according to the sixth embodiment, at the wafer level, the saturation time of the expansion or contraction of the probe pins of the probe card in the probe inspection at the high temperature or low temperature, and the probe card at the high temperature, normal temperature and low temperature The appropriate overdrive amount can be directly evaluated, and the number of evaluation data for one wafer 310 can be increased. Thereby, data accuracy can be improved.

(Seventh embodiment)
The seventh embodiment of the present invention will be described below with reference to the drawings.

  FIG. 23A and FIG. 23B show an inspection flow of an inspection method using the semiconductor device inspection apparatus according to the seventh embodiment of the present invention.

  Here, in the inspection method using the semiconductor device inspection apparatus according to the first embodiment and the semiconductor device inspection apparatus according to the third embodiment, the saturation time of the expansion or contraction of the probe pin, or the over time with respect to the probe card By increasing the number of drive amount evaluation data, the probe pin expansion or contraction saturation time and the overdrive amount parameter are determined with high accuracy.

  First, FIG. 23A is a flow for determining the overdrive amount for the probe card.

  As shown in FIG. 23A, first, in step ST01, initial setting is performed by selecting a prober setting file including measurement conditions for each inspection item set for each type of semiconductor device to be measured.

  Next, in step ST02, an overdrive amount serving as a reference when pressing the probe pin against the protective film or pad electrode on the probing evaluation circuit is set.

  Next, in step ST03, the amount of change in the current value due to the probe stress of the probing evaluation circuit is measured.

  Next, in step ST04, the fluctuation amount of the current value is accumulated in the previous measurement, and the accumulated frequency is obtained.

  Next, in step ST05, the result of the cumulative frequency variation of the current value in the probing evaluation circuit is a reference current variation amount observed when the protective film or the pad electrode is sufficiently in contact with the probe pin. It is determined whether it is satisfied. Here, when the determination is true (OK), in the next step ST06, it is determined to use the set overdrive amount. On the other hand, if the determination is false (NG), the process from step ST02 to step ST05 is repeated again until the determination in step ST05 is OK.

  Next, a method of determining the saturation time of the expansion or contraction of the probe pin will be described with reference to FIG.

  First, in step ST11, initial setting is performed by selecting a prober setting file including measurement conditions for each inspection item set for each type of semiconductor device to be measured.

  Next, in step ST12, the time for the probe pin to expand or contract on the probing evaluation circuit is measured. At this time, the number N of semiconductor chip regions to be measured (where N is an integer equal to or greater than 2) is specified, and the probe pin expansion or contraction time is measured for N chip regions.

  Next, in step ST13, N times of expansion times or contraction times of the probe pins are accumulated to obtain the cumulative frequency.

  Next, in step ST14, the saturation time of the expansion or contraction of the probe pin is obtained from the obtained cumulative frequency.

  Thus, according to the seventh embodiment, the optimum overdrive amount for the probe card at high temperature, normal temperature, and low temperature, and the expansion or contraction of the probe pin of the probe card in the probe inspection at high temperature or low temperature The saturation time can be determined with high accuracy.

(Eighth embodiment)
A semiconductor device inspection apparatus according to an eighth embodiment of the present invention will be described below with reference to the drawings.

  FIG. 24 schematically shows the configuration of a semiconductor device inspection apparatus according to the eighth embodiment of the present invention.

  As shown in FIG. 24, a plurality of prober setting data 400 of each semiconductor chip obtained by the seventh embodiment is collected and stored in a database 401 for setting the prober of the semiconductor chip. The prober device 403 and the database 401 are connected online by a data line 404.

  Thus, according to the eighth embodiment, an appropriate overdrive amount for the probe card at high temperature, normal temperature and low temperature, and expansion or contraction of the probe pin of the probe card in the probe inspection at high temperature or low temperature. The saturation time is stored in the database 401. Thus, when the semiconductor device (semiconductor chip) to be inspected is inspected by the prober device 403 including the inspection device according to the present invention, the overdrive amount held in the database 401 and the saturation or expansion of the probe pin are saturated. Each data of time can be utilized. Therefore, after the database 401 is constructed, the inspection of the semiconductor device using the prober device 403 can improve the inspection accuracy by quantitative data and can greatly reduce the inspection time.

(Inspection method)
Hereinafter, an inspection method using the semiconductor device inspection apparatus configured as described above will be described with reference to the drawings.

  As shown in FIG. 25, first, in step ST21, start-up processing (initialization processing) between the prober device 403 and the database 401 is performed.

  Next, in step ST22, the prober device 403 selects information on the same or similar semiconductor chip as the semiconductor chip to be inspected.

  Next, in step ST23, the prober apparatus 403 utilizes a prober setting database 401 that is built in advance.

  Next, in step ST24, the probe pin overdrive amount and the expansion or contraction time are set in the prober device 403. At this time, if the probe inspection is performed at room temperature, only the overdrive amount is set.

  Next, in step ST25, in the case of a probe inspection at a high temperature, the probe pin is heated for a predetermined time. In the case of a probe inspection at a low temperature, the probe pin is cooled for a predetermined time. This step is performed only for probe inspection at high temperature or low temperature. The predetermined time for heating or cooling is set in the previous step ST24.

  Next, in step ST26, inspection of the semiconductor chip by the prober device 403 is started at high temperature, normal temperature, or low temperature.

  As described above, according to the eighth embodiment, by using the database 401 in which the prober setting data is stored in advance, the prober device 403 can have the desired amount of probe card overdrive and the saturation time of the probe pin expansion or contraction. Is set. As a result, preparation for inspection can be performed quickly, so that the efficiency of probe inspection can be greatly improved.

  The inspection apparatus for a semiconductor device and the inspection method using the same according to the present invention quantitatively determine the relationship between the overdrive amount and the saturation time of the expansion or contraction of the probe pin of the probe card in the probe inspection at high temperature or low temperature. It can be obtained and is particularly useful for an inspection apparatus and inspection method used for probe inspection at high temperature or low temperature.

1 is a schematic configuration diagram showing an inspection apparatus for a semiconductor device according to a first embodiment of the present invention. (A) is a typical top view which shows the probing evaluation circuit in the test | inspection apparatus of the semiconductor device which concerns on the 1st Embodiment of this invention. (B) is a schematic diagram showing one evaluation element constituting the probing evaluation circuit. It is a typical perspective view which shows a mode that a probe pin contacts the probing evaluation circuit in the test | inspection apparatus of the semiconductor device which concerns on the 1st Embodiment of this invention. (A) is a typical perspective view which shows the state which the probe pin contacted the probing evaluation circuit containing the some transistor in the test | inspection apparatus of the semiconductor device which concerns on the 1st Embodiment of this invention. (B) is a three-dimensional graph showing the amount of current fluctuation when the probe pin contacts the probing evaluation circuit shown in (a). (A) is a typical perspective view which shows the state which the probe pin contacted to the probing evaluation circuit containing the some SRAM cell in the test | inspection apparatus of the semiconductor device which concerns on the 1st Embodiment of this invention. (B) is a three-dimensional graph showing the amount of current fluctuation when the probe pin contacts the probing evaluation circuit shown in (a). (A) is typical sectional drawing which shows the probing evaluation circuit apparatus containing the probing evaluation circuit in the inspection apparatus of the semiconductor device which concerns on the 1st modification of the 1st Embodiment of this invention. (B) is a top view of (a). (A) And (b) shows the test | inspection method using the test | inspection apparatus of the semiconductor device based on the 1st Embodiment of this invention, (a) is the current fluctuation characteristic before a probe pin contacts a probing evaluation circuit. It is a graph which shows an initial value, (b) is a typical perspective view which shows the state before a probe pin contacts a probing evaluation circuit. (A) And (b) shows the test | inspection method using the test | inspection apparatus of the semiconductor device based on the 1st Embodiment of this invention, (a) shows the current fluctuation characteristic in the state where the probe pin contacted the probing evaluation circuit. It is a graph to show, (b) is a typical perspective view which shows the state in which the probe pin contacted the probing evaluation circuit. (A) And (b) shows the test | inspection method using the test | inspection apparatus of the semiconductor device based on the 1st Embodiment of this invention, (a) contacted the probing evaluation circuit in the state which the probe pin expanded or contracted. It is a graph which shows the current fluctuation characteristic in a case, (b) is a typical perspective view which shows a mode that the probe pin contacted the probing evaluation circuit in the state expanded or contracted. It is a typical top view which shows the principal part of the inspection apparatus of the semiconductor device which concerns on the 2nd Embodiment of this invention. It is a typical top view which shows the principal part of the inspection apparatus of the semiconductor device which concerns on the modification of the 2nd Embodiment of this invention. It is a typical top view which shows the principal part of the inspection apparatus of the semiconductor device which concerns on the 3rd Embodiment of this invention. It is a typical top view which shows the principal part of the test | inspection apparatus of the semiconductor device which concerns on the 1st modification of the 3rd Embodiment of this invention. It is a typical top view which shows the principal part of the inspection apparatus of the semiconductor device which concerns on the 2nd modification of the 3rd Embodiment of this invention. (A) And (b) shows the test | inspection method using the test | inspection apparatus of the semiconductor device which concerns on the 3rd Embodiment of this invention, (a) is the initial stage of the current fluctuation characteristic before a probe pin contacts a pad electrode. It is a graph which shows a value, (b) is a typical perspective view which shows the state before a probe pin contacts a pad electrode. (A)-(c) shows the test | inspection method using the test | inspection apparatus of the semiconductor device which concerns on the 3rd Embodiment of this invention, (a) is the case where a probe pin contacts the pad electrode in the expanded or contracted state FIG. 5B is a schematic perspective view showing a state in which the probe pin is in contact with the pad electrode in an expanded state, and FIG. 5C is a state in which the probe pin is contracted to the pad electrode. It is a typical perspective view which shows a mode that it contacted by. FIG. 10 is a schematic plan view showing only the power supply system of the inspection apparatus according to the second embodiment, which is an inspection apparatus for a semiconductor device according to the fourth embodiment of the present invention. It is a test | inspection apparatus of the semiconductor device which concerns on the modification of the 4th Embodiment of this invention, Comprising: It is a typical top view which shows only the power supply system of the inspection apparatus which concerns on 3rd Embodiment. It is a typical top view which shows the inspection apparatus of the semiconductor device which concerns on the 5th Embodiment of this invention. It is a typical top view which shows the inspection apparatus of the semiconductor device which concerns on the modification of the 5th Embodiment of this invention. (A)-(d) is a top view which shows the mounting example of the inspection apparatus of the semiconductor device which concerns on the 6th Embodiment of this invention. (A)-(c) is a top view which shows the example of mounting of the test | inspection apparatus of the semiconductor device which concerns on the 6th Embodiment of this invention. (A) And (b) shows the test | inspection method using the test | inspection apparatus of the semiconductor device based on the 7th Embodiment of this invention, (a) is a flowchart which determines the overdrive amount with respect to a probe card, ( b) is a flow chart for obtaining the saturation time of the expansion or contraction of the probe pin. It is a typical block diagram which shows the inspection apparatus of the semiconductor device which concerns on the 8th Embodiment of this invention. It is a flowchart which shows the inspection method using the inspection apparatus of the semiconductor device which concerns on the 8th Embodiment of this invention. It is a typical block diagram which shows the inspection apparatus of the semiconductor device which can investigate the expansion | swelling or shrinkage | contraction of the conventional probe pin.

Explanation of symbols

A Chip inner area B Pad forming area C Scribe area 100 Prober apparatus 101 Wafer stage 102 Overheating cooling apparatus 103 for wafer Protective film (probing evaluation section)
104 Probing evaluation circuit (probing evaluation unit)
104a Probing evaluation circuit terminal 105 Probe pin heating / cooling device (probe pin temperature control unit)
106 probe card 107 probe pin 108 wiring 109 probing evaluation device 200 probing area 200A probing area 200B probing area 200C probing area 200D probing area 200E probing area 200F probing area 201 evaluation element 201a current / position detection circuit terminal 201b column decoder terminal 201c Row decoder terminal 202 Row decoder wiring 203 Row decoder circuit 204 Column decoder wiring 205 Column decoder circuit 206 Current / position detection circuit wiring 207 Current / position detection circuit 208 SRAM cell 209 Current 300 Probing evaluation circuit device 301 Probing evaluation circuit Board 302 Probing evaluation board 303 Wiring 304 Probing evaluation circuit board terminal 305 Pro Bing evaluation circuit board pin 306 Probing evaluation board terminal 310 Wafer 311 Chip boundary 312 Power pad electrode 313 Pad electrode 314 Row decoder circuit 315 Column decoder circuit 316 Current / position detection circuit 317 Wiring 318 Wiring 319 Wiring 320 Wiring 321 Wiring 322 Wiring 323 Wiring 324 wiring 326 current detection circuit 330 first power supply wiring 331 fuse circuit 332 second power supply wiring 333 third power supply wiring 335 selector circuit 340A first semiconductor chip region 340B second semiconductor chip region 350A semiconductor chip region (inspection) Dedicated chip)
350B semiconductor chip area (chip for inspection)
351 Semiconductor chip area (product chip)
352A Semiconductor chip area (inspection circuit mixed chip)
352B Semiconductor chip area (inspection circuit mixed chip)
360 Semiconductor Device Inspection Device 361 Process Control Module 400 Semiconductor Chip Prober Setting Data 401 Database 403 Prober Device 404 Data Line

Claims (18)

A semiconductor device inspection apparatus for inspecting electrical characteristics of a semiconductor device formed on a substrate using a prober having a probe card,
A probe pin temperature controller for heating or cooling a probe pin provided on the probe card;
Provided in the probe pin temperature control unit, and a probing evaluation unit that contacts the probe pin;
A probing evaluation device for detecting and evaluating the electrical characteristics of the probing evaluation unit,
The probing evaluation apparatus is configured to detect the saturation time of expansion or contraction of the probe pin and the probe of the substrate based on the electrical characteristics in the probing evaluation unit that change due to stress due to contact with the probe pin in a high temperature state or a low temperature state. An inspection apparatus for a semiconductor device, characterized in that an overdrive amount for a card is obtained and output. The probing evaluation unit
An evaluation circuit in which a plurality of evaluation elements whose electrical characteristics change due to stress are integrated in a matrix;
A row decoder circuit and a column decoder circuit for specifying any of the plurality of evaluation elements;
2. The semiconductor device inspection apparatus according to claim 1, further comprising a current / position detection circuit that detects a current amount flowing through the evaluation element and a position of the evaluation element in which the current amount has changed.   The semiconductor device inspection apparatus according to claim 1, wherein the probing evaluation unit is separable from the probe pin temperature control unit. A semiconductor device inspection apparatus for inspecting electrical characteristics of a semiconductor device formed on a substrate using a prober having a probe card,
A substrate temperature controller for heating or cooling the substrate;
A probing evaluation unit provided on the lower side of the plurality of pad electrodes formed on the substrate;
A probing evaluation device for detecting and evaluating the electrical characteristics of the probing evaluation unit,
The probing evaluation apparatus is configured to detect the saturation time of expansion or contraction of the probe pin and the probe of the substrate based on the electrical characteristics in the probing evaluation unit that change due to stress due to contact with the probe pin in a high temperature state or a low temperature state. An inspection apparatus for a semiconductor device, characterized in that an overdrive amount for a card is obtained and output. The probing evaluation unit
An evaluation circuit in which a plurality of evaluation elements whose electrical characteristics change due to stress are integrated in a matrix;
A row decoder circuit and a column decoder circuit for specifying any of the plurality of evaluation elements;
5. The inspection apparatus for a semiconductor device according to claim 4, further comprising: a current / position detection circuit that detects a current amount flowing through the evaluation element and a position of the evaluation element in which the current amount has changed. The probing evaluation unit
A single evaluation element whose electrical characteristics change due to stress,
5. The semiconductor device inspection apparatus according to claim 4, further comprising a current detection circuit that detects an amount of current flowing through the evaluation element.   The inspection apparatus for a semiconductor device according to claim 4, wherein the probing evaluation apparatus is formed in the semiconductor device.   The inspection apparatus for a semiconductor device according to claim 4, wherein the probing evaluation apparatus is formed outside the semiconductor device. An IO pad electrode formed on the semiconductor substrate and applying an electrical signal to the semiconductor device;
7. The semiconductor device inspection apparatus according to claim 4, further comprising a fuse circuit that connects the IO pad electrode and the probing evaluation unit. 8. An IO pad electrode formed on the semiconductor substrate and applying an electrical signal to the semiconductor device;
The circuit further comprises a selector circuit that selectively connects between the IO pad electrode and the probing evaluation unit, and between the IO pad electrode and a circuit constituting the semiconductor device. The inspection apparatus for a semiconductor device according to any one of 4 to 6. A plurality of the semiconductor devices are formed across a scribe line formed on the substrate,
The probing evaluation unit and the probing evaluation device are formed on the scribe line,
The said probing evaluation part has a single evaluation element from which an electrical characteristic changes with stress, and the electric current detection circuit which detects the electric current amount which flows into the said evaluation element, The Claim 4 characterized by the above-mentioned. Inspection equipment for semiconductor devices. Data holding means for holding the output saturation time of the probe pin expansion or contraction and the value of the overdrive amount of the substrate with respect to the probe card;
Network means for connecting the data holding means and the prober;
5. The semiconductor device inspection apparatus according to claim 1, wherein the data held in the data holding means is used as an initial setting value in the inspection of another semiconductor device. A substrate temperature control unit for heating or cooling a substrate on which a semiconductor device is formed; a probe pin temperature control unit for heating or cooling a probe pin provided on a probe card; and the probe pin temperature control unit provided with the probe A method for inspecting a semiconductor device, comprising: a probing evaluation unit that contacts a pin; and a probing evaluation device that detects and evaluates electrical characteristics of the probing evaluation unit,
(A) heating or cooling the semiconductor device and the probe pin to a predetermined temperature by the substrate temperature control unit and the probe pin temperature control unit, respectively;
A step (b) of initially setting an overdrive amount corresponding to a probe stress when the probe pin is brought into contact with a pad electrode provided in the semiconductor device;
(C) bringing the probe pin into contact with the probing evaluation unit at the predetermined temperature at the initially set overdrive amount;
A step (d) of measuring and holding, every predetermined time, a fluctuation amount of a current value flowing through the probing evaluation unit due to expansion or contraction of the probe pin when the probe pin is brought into contact with the probing evaluation unit;
A step (e) of obtaining a cumulative frequency data by accumulating a plurality of fluctuation amounts of the held current value;
A step (f) of comparing the obtained cumulative frequency data with a reference value of a fluctuation amount of a current value when the protective film and the probe pin set in advance are in normal contact;
When the cumulative frequency data in the step (f) reaches the reference value, the overdrive amount is determined to be appropriate, while the cumulative frequency data in the step (f) reaches the reference value. If not, the step (g) of determining that the overdrive amount is inappropriate;
When it is determined that the overdrive amount is appropriate in the step (g), the semiconductor device inspection is started. On the other hand, when the overdrive amount is determined inappropriate in the step (g), And a step (h) of repeating the step (b) to the step (g) until the overdrive amount becomes an appropriate value. A substrate temperature control unit for heating or cooling a substrate on which a semiconductor device is formed, a probing evaluation unit provided below a plurality of pad electrodes formed on the substrate, and detecting electrical characteristics of the probing evaluation unit And an inspection method for a semiconductor device having a probing evaluation device for evaluating,
(A) heating or cooling the semiconductor device and the probe pin to a predetermined temperature by the substrate temperature control unit;
A step (b) of initially setting an overdrive amount corresponding to a probe stress when the probe pin is brought into contact with a pad electrode provided in the semiconductor device;
(C) bringing the probe pin into contact with the pad electrode on the probing evaluation unit at the predetermined temperature with the initially set overdrive amount;
A step of measuring and holding, every predetermined time, a fluctuation amount of a current value flowing through the probing evaluation unit due to expansion or contraction of the probe pin when the probe pin is brought into contact with the electrode pad of the probing evaluation unit ( d) and
A step (e) of obtaining a cumulative frequency data by accumulating a plurality of fluctuation amounts of the held current value;
A step (f) of comparing the obtained cumulative frequency data with a reference value of a fluctuation amount of a current value when the pad electrode and the probe pin set in advance are in normal contact;
When the cumulative frequency data in the step (f) reaches the reference value, the overdrive amount is determined to be appropriate, while the cumulative frequency data in the step (f) reaches the reference value. If not, the step (g) of determining that the overdrive amount is inappropriate;
When it is determined that the overdrive amount is appropriate in the step (g), the semiconductor device inspection is started. On the other hand, when the overdrive amount is determined inappropriate in the step (g), And a step (h) of repeating the step (b) to the step (g) until the overdrive amount becomes an appropriate value. The probing evaluation unit includes a plurality of evaluation elements,
In the step (d), the change over time in the amount of change in the current value flowing through each evaluation element in the probing evaluation unit is measured a plurality of times, thereby eliminating the change over time in the amount of change in the current value flowing through each evaluation element. Including the step of obtaining the saturation time until
15. The inspection method for a semiconductor inspection apparatus according to claim 13, wherein in the step (e), the cumulative frequency data is obtained from the saturation time obtained for each of the evaluation elements. The probing evaluation unit is provided with a plurality of each including a single evaluation element,
In the step (d), the amount of change in the current value flowing through the evaluation element of each probing evaluation unit is measured by measuring the change over time of the amount of change in the current value flowing through the evaluation element in each probing evaluation unit. Including a step of obtaining a saturation time until no change with time occurs,
15. The semiconductor inspection apparatus inspection method according to claim 13, wherein in the step (e), the cumulative frequency data is obtained from the saturation time obtained for each probing evaluation unit. After the step (h),
15. The method of inspecting a semiconductor device according to claim 13, further comprising a step (I) of using an appropriate value of the overdrive amount as an initial set value at the time of inspection of another semiconductor device. . After the step (h),
17. The semiconductor device inspection method according to claim 15, further comprising a step (I) of using the saturation time as an initial set value at the time of inspection of another semiconductor device.

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