JP2008198677A - Manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device having huge quantum dots removed therefrom, and formed in uniform density and shape of quantum dots. <P>SOLUTION: The semiconductor device 1 manufactured by the manufacturing method is a semiconductor device having a structure including quantum dots 20 laminated, and includes: the quantum dots 20 growing on a semiconductor layer 11; a semiconductor layer 12 coating the quantum dots 20 and not coating a huge quantum dot and formed on the semiconductor layer 11; and a semiconductor layer 13 formed on the semiconductor layer 12 and on a removal region 22 generated on the semiconductor layer 12 by removing the huge dot. Thus, the semiconductor device 1 having the quantum dots 20 formed in uniform density and shape is provided. As a result, characteristic failures of the semiconductor device 1 due to defects of the quantum dots 20 are reduced, thereby improving performance of the device 1 by characteristic improvement by the layered structure. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device using quantum dots.

  2. Description of the Related Art In recent years, quantum dot photodetectors have attracted attention as photodetectors that detect light by capturing a current that flows when incident light is absorbed. Conventionally, quantum well photodetectors could not absorb normal incident light, but quantum dot photodetectors can confine carriers in three dimensions and absorb normal incident light. A typical example is a quantum dot infrared detector.

FIG. 7 is a main part diagram for explaining the basic structure of a quantum dot infrared detector.
The quantum dot infrared detector 100 includes a plurality of intermediate layers 101 made of i-gallium arsenide (GaAs) and a plurality of intermediate layers 102 made of i-gallium arsenide made of the same material as the intermediate layer 101. A plurality of quantum dots 103 made of, for example, indium arsenic (InAs) are embedded in the intermediate layer 102. A plurality of intermediate layers 101 and 102 are stacked so that the upper and lower layers are sandwiched between contact layers 104 made of n-gallium arsenide.

  Thus, in the quantum dot infrared detector, a plurality of intermediate layers 102 in which the quantum dots 103 are embedded are stacked. The growth of the quantum dots 103 is known to grow on the intermediate layer 101 by self-organization.

However, quantum dots grown by self-organization sometimes grow as a large quantum dot by combining a plurality of quantum dots.
FIG. 8 is a main part diagram for explaining the structure of the intermediate layer when huge quantum dots are grown.

  This figure shows a state in which a huge quantum dot 105 is grown on the intermediate layer 101 and the normally grown quantum dot 103 and the huge quantum dot 105 are covered with the intermediate layer 102.

  As shown in the figure, it can be seen that when the huge quantum dots 105 exist inside the intermediate layer 102, the flatness of the intermediate layer 102 in which the huge quantum dots 105 are embedded deteriorates. In addition, defects 106a due to dislocations and the like are often formed inside the huge quantum dots 105 due to an increase in strain energy, and defects 106b due to dislocations or the like are also formed on the intermediate layer 102 on the huge quantum dots 105. Often propagates.

When quantum dots are grown on the intermediate layer 102 in such a state, the position of the defect 106b becomes a lattice strain variation point, and the growth of the quantum dots from that portion is likely to occur.
As a result, in the intermediate layer stacked on the intermediate layer 102, the density (quantity / cm ⁻² ) of the quantum dots formed inside decreases, and the quantum dots grow locally, so the size of the quantum dots The problem of non-uniformity occurred. Furthermore, if the huge quantum dots 105 remain in the intermediate layer 102, the defects 106a and 106b increase the dark current in the device, causing a problem that the quantum dot infrared detector does not operate normally. It was.

  As a method of preventing such quantum dots from growing, a method of growing quantum dots at a high temperature or growing a quantum dot by a slow growth process was tried so that the quantum dots would not easily merge with each other. . Alternatively, a method of growing quantum dots by limiting the supply amount of the quantum dot raw material has been tried. However, even with such a method, it is not possible to prevent the quantum dots from becoming large, and huge quantum dots are generated from the ground at a rate of several percent.

On the other hand, a method called a flushing method has recently been provided (see, for example, Patent Document 1).
FIG. 9 is a diagram for explaining the principle of the flushing method. In this method, as shown in FIG. 9A, first, on the intermediate layer 101 on which the normally grown quantum dots 103 and the giant quantum dots 105 are grown, the height of the quantum dots 103 and the giant quantum dots 105 is higher. The low intermediate layer 102 is once formed.

  Then, as shown in FIG. 9B, only the tip portions 103a and 105a of the quantum dots protruding from the surface of the intermediate layer 102 are dissociated by holding the temperature rise, and only the tip portions 103a and 105a are dissected from the surface of the intermediate layer 102. Is to be removed from.

According to such a method, even if huge quantum dots are generated in part, the flatness of the intermediate layer 102 is maintained by the heat treatment, and the quantum dot infrared detector in which such an intermediate layer 102 is laminated is used. Productivity can be expected to improve.
Special table 2004-528705 gazette

  However, in the above-described flushing method, the volume of the quantum dot 103 and the giant quantum dot 105 is different, so the time for dissociation to the position of the surface of the intermediate layer 102 is different between the quantum dot 103 and the giant quantum dot 105. Therefore, it is difficult to control the flatness of the intermediate layer 102.

  In addition, when the defect 106 a as shown in FIG. 8 exists in the huge quantum dot 105, the defect 106 a remains inside the huge quantum dot 105 even if the tip 105 a is evaporated. When an intermediate layer is laminated on the upper layer in such a state, as described above, huge quantum dots are likely to be generated from a position where a defect exists. Therefore, in the intermediate layer, the problem that the density of the quantum dots decreases and the size of the quantum dots themselves cannot be solved. Further, the generation of dark current could not be sufficiently suppressed, and the performance of the quantum dot infrared detector could not be improved.

  Furthermore, although the above-mentioned flushing method can make the heights of the quantum dots uniform, it is difficult to make the shape of the quantum dots uniform, so there is a problem that the performance of the quantum dot infrared detectors varies. there were.

  The present invention has been made in view of the above points, and relates to a method of manufacturing a semiconductor device using quantum dots. A semiconductor device in which huge quantum dots are removed and the density and shape of the quantum dots are uniformly formed. It aims at providing the manufacturing method of.

  In the present invention, in order to solve the above problems, in a method of manufacturing a semiconductor device having a structure in which quantum dots are stacked, a step of supplying a raw material of quantum dots on a first semiconductor layer, and the supplied first A second semiconductor layer having a film thickness higher than the height of quantum dots grown on one semiconductor layer and lower than the height of giant quantum dots generated in a part of the quantum dots is formed on the first semiconductor layer. A step of removing the giant quantum dots from the formed second semiconductor layer by thermal dissociation, and removing the giant quantum dots on the second semiconductor layer and the second semiconductor layer. And a step of forming a third semiconductor layer at a removed portion generated in the semiconductor layer. A method of manufacturing a semiconductor device is provided.

  Such a method for manufacturing a semiconductor device is a method for manufacturing a semiconductor device having a structure in which quantum dots are stacked. The first semiconductor layer is supplied with a raw material of the quantum dots on the first semiconductor layer. A second semiconductor layer having a film thickness higher than the height of the quantum dots grown on the layer and lower than the height of the giant quantum dots generated in a part of the quantum dots is formed on the first semiconductor layer. The giant quantum dots are removed from the formed second semiconductor layer by thermal dissociation, and the third semiconductor layer is formed on the second semiconductor layer and on the removed portion generated in the second semiconductor layer by removing the giant quantum dots. Is formed.

  In the present invention, in a method for manufacturing a semiconductor device having a structure in which quantum dots are stacked, a quantum dot raw material is supplied onto a first semiconductor layer, and the quantum dots grown on the supplied first semiconductor layer A second semiconductor layer formed on the first semiconductor layer, the second semiconductor layer having a film thickness that is higher than the height of the quantum dots and lower than the height of the giant quantum dots generated in a part of the quantum dots. The giant quantum dots were removed from the first semiconductor layer by thermal dissociation, and a third semiconductor layer was formed on the second semiconductor layer and on the removed portion where the giant quantum dots were removed and generated in the second semiconductor layer.

  Thereby, a huge quantum dot is removed, and a method for manufacturing a semiconductor device in which the density and shape of the quantum dots are uniformly formed is realized. As a result, the defect in characteristics of the semiconductor device caused by the quantum dot defect is reduced, and the performance of the semiconductor device is further improved by the improvement in characteristics due to the stacked structure.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In this embodiment, as a semiconductor device having a structure in which quantum dots are stacked, a quantum dot infrared detector that generates a photocurrent according to the amount of incident infrared rays will be described as an example.

First, the configuration of a quantum dot infrared detector manufactured by the method for manufacturing a semiconductor device of this embodiment will be described.
FIG. 1 is a schematic cross-sectional view of a main part of a semiconductor device.

The semiconductor device 1 illustrated in FIG. 1 is a quantum dot infrared detector as an example, and a lower contact layer 10 having a thickness of about 1 μm is formed in a lower layer of the quantum dot infrared detector. The material of the lower contact layer 10 is, for example, n-gallium arsenide. Further, the carrier concentration of the lower contact layer 10 is, for example, 1 × 10 ¹⁸ cm ⁻³ .

  On the lower contact layer 10, a semiconductor layer 11 (first semiconductor layer), which is an intermediate layer, is formed. Here, the film thickness of the semiconductor layer 11 is about 30 nm, and the material thereof is, for example, i-gallium arsenide.

  A plurality of conical quantum dots 20 are formed on the semiconductor layer 11. A semiconductor layer 12 (second semiconductor layer) that is an intermediate layer is formed on the semiconductor layer 11 so as to completely cover the quantum dots 20. Furthermore, a semiconductor layer 13 (third semiconductor layer), which is an intermediate layer, is formed on the semiconductor layer 12. The semiconductor layer 13 is also formed inside a removed portion 22 generated in the semiconductor layer 12 by removing a huge quantum dot described later. As shown in the drawing, the flatness of the interface between the semiconductor layer 12 and the semiconductor layer 13 is ensured.

  Then, the semiconductor layer 12 and the semiconductor layer 13 form a set, and are laminated on the semiconductor layer 11 as an intermediate layer of, for example, 10 sets (20 layers in total). The material of the semiconductor layer 12 and the semiconductor layer 13 is, for example, i-gallium arsenide. The film thickness of the semiconductor layer 12 is 4 nm, and the film thickness of the semiconductor layer 13 is 26 nm. That is, the total thickness of the semiconductor layer 12 and the semiconductor layer 13 is the same as that of the semiconductor layer 11.

The material of the quantum dots 20 existing inside the semiconductor layer 12 is, for example, indium arsenic. The density is, for example, 5 × 10 ¹⁰ (pieces / cm ⁻² ), and the quantum dots 20 having the same density are formed in each semiconductor layer 12 stacked. The average height of the quantum dots 20 is 3 nm, and the average diameter is 25 nm. Here, the diameter means the outer diameter of the quantum dot 20 at a position directly above the semiconductor layer 11 when the quantum dot 20 is viewed from above in FIG. And in this quantum dot type | mold infrared detector, the huge quantum dot mentioned above does not exist in the inside of the semiconductor layer 12, as shown in the figure. In particular, the height and diameter of the quantum dots 20 are in the range of 1.2 times or less of the average value of the height and diameter. A manufacturing method in which the heights and diameters of such quantum dots are uniformly arranged will be described later.

An upper contact layer 14 is formed on the intermediate layer. The material and carrier concentration of the upper contact layer 14 are the same as those of the lower contact layer 10.
Furthermore, although not shown in FIG. 1, the upper contact layer 14 and the lower contact layer 10 are provided with electrodes made of, for example, gold germanium (AuGe) / gold (Au), and the surface of the element other than the electrodes is nitrided. It is covered with a protective film of silicon (SiN) or silicon oxynitride (SiON).

  In the above description, indium arsenide is used as the material of the quantum dots 20 and i-gallium arsenide is used as the material of the semiconductor layer 11, the semiconductor layer 12, and the semiconductor layer 13. Arsenic, gallium arsenide, aluminum arsenic (AlAs), indium phosphide (InP), gallium phosphide (GaP), aluminum phosphide (AlP), indium antimony (InSb), gallium antimony (GaSb), aluminum antimony (AlSb), indium nitride (AlSb) Any of InN), gallium nitride (GaN), and aluminum nitride (AlN) may be used, and a material in which a plurality of these are mixed crystals may be used. The material of the quantum dots 20 and the material covering the quantum dots 20 are selected from different materials.

Furthermore, the semiconductor layer 12 may have a laminated structure in which these materials are combined (described later).
Further, the upper contact layer 14 and the lower contact layer 10, and the quantum dots 20, the semiconductor layer 11, the semiconductor layer 12, and the semiconductor layer 13 in which the polarity of the conductivity type (p / n type) is reversed may be used. Good.

Furthermore, the above-described stacked structure of quantum dots may be used not only for quantum dot infrared detectors but also for quantum dot layers (active layers) of quantum dot lasers.
Next, a method for manufacturing such a quantum dot infrared detector will be described. In particular, in the following description, a manufacturing method in which the height and diameter are uniform even when quantum dots are grown by self-organization will be described in detail.

  FIG. 2 is a schematic cross-sectional view of the main part of the quantum dot forming step. In this step, the quantum dots 20 are formed on the GaAs substrate 15 by, for example, the MBE (Molecular Beam Epitaxy) method on the base on which the lower contact layer 10 and the semiconductor layer 11 are formed via the GaAs buffer layer 16. The process of making it show is shown. The materials and film thicknesses of the lower contact layer 10 and the semiconductor layer 11 are the same as those described with reference to FIG.

  Specifically, quantum dots 20 made of indium arsenic are grown on the semiconductor layer 11 by self-organization. The growth conditions of the quantum dots 20 are as follows: the temperature of the underlying semiconductor layer 11 is 480 to 490 ° C., the growth rate is 0.1 (ML (Mono Layer) / sec), and the raw material supply amount of indium and arsenic is 2. It is 0-2.3 (ML).

Under such conditions, quantum dots 20 having a density of 5 × 10 ¹⁰ cm ⁻² (pieces / cm ⁻² ), an average height of 3 nm, and an average diameter of 25 nm grow.
However, under this growth condition, huge quantum dots 21 are generated at a rate of about 1% in the normally grown quantum dots 20. For example, huge quantum dots 21 having a height of 4.5 nm or more and a diameter of 37.5 nm or more are mixed and grown in the normally grown quantum dots 20.

Here, the shapes of the normally grown quantum dots (quantum dots other than the giant quantum dots) 20 and the giant quantum dots 21 will be described.
FIG. 3 is a comparative diagram of the height and diameter of the quantum dots. In this comparative diagram, quantum dots at arbitrary positions grown on the semiconductor layer 11 are measured with an atomic force microscope, and the correlation between the height and the diameter is plotted.

  The horizontal axis of the figure represents the height of the quantum dot, and shows the relative value of the height when the average value (3 nm) of the normally grown quantum dots 20 is 1. The vertical axis represents the diameter of the quantum dot, and the relative value of the diameter when the average value (25 nm) of the diameter of the normally grown quantum dot 20 is 1 is shown.

  Also from this result, a group of normally grown quantum dots 20 whose height and diameter are concentrated in the vicinity of 1, and a huge quantum dot 21 whose height and diameter are 1.5 times or more that of the normally grown quantum dots 20. It can be seen that the quantum dots grow on the base by being divided into two groups.

  The height of the normally grown quantum dots 20 whose height and diameter are concentrated in the vicinity of 1 is in the range of 0.6 (1.8 nm) to 1.2 (3.6 nm), and the diameter is It was found to be 0.8 (20 nm) or more and 1.2 (30 nm) or less.

Although the quantum dots 20 are grown by the MBE method, they may be grown by the MOCVD (Metal Organic Chemical Vapor Deposition) method instead.
FIG. 4 is a schematic cross-sectional view of the relevant part in the intermediate layer forming step.

  On the semiconductor layer 11 on which the normally grown quantum dots 20 and the huge quantum dots 21 are grown, the semiconductor layer 12 having a film thickness higher than the height of the normally grown quantum dots 20 and lower than the height of the huge quantum dots 21 is formed. Form. For example, the semiconductor layer 12 having a thickness of 4 nm, which is 1.3 times as high as the normally grown quantum dots 20 is formed. The material of the semiconductor layer 12 is, for example, i-gallium arsenide.

  In this state, the tip of the huge quantum dot 21 protrudes from the surface of the semiconductor layer 12, and the periphery of the normally grown quantum dot 20 is completely covered by the semiconductor layer 12. That is, the semiconductor layer 12 in which only the quantum dots 20 are embedded is formed on the semiconductor layer 11.

FIG. 5 is a schematic cross-sectional view of the main part of the heating process.
Only the giant quantum dots 21 grown in the previous step are dissociated by heating, and only the giant quantum dots 21 are selectively removed from the semiconductor layer 12 to form removed portions 22 in the semiconductor layer 12.

Here, the dissociation rate R (ML / sec) of indium arsenide, which is the material of the huge quantum dot 21, can be obtained in advance by a preliminary experiment (for example, RHEED observation) or a simulation. For example, the calculation is performed on the assumption that the supply amount of indium arsenic in which the indium arsenic layer transitions to quantum dots is constant regardless of the temperature. Specifically, in the saturation region of arsenic (As) (when arsenic is supplied in a sufficient amount), for example, R = 2 × 10 ³⁰ × exp (−60716 / T). Here, T (K) is temperature.

Based on this equation, the temperature and time at which the huge quantum dots 21 are completely removed from the semiconductor layer 12 are controlled in consideration of the thickness of the semiconductor layer 12 and the area of the entrance of the removed portion 22.
For example, in an atmosphere at a temperature of 600 ° C., R = 1.26 (ML / sec). Therefore, if held for 20 seconds, indium arsenic of about 6 nm (1 ML: 0.303 nm) is dissociated.

Therefore, in this step, if the atmospheric temperature is set to 600 ° C. and held for 20 seconds or more, only the huge quantum dots 21 can be selectively removed from the semiconductor layer 12.
As described above, in the process of removing the giant quantum dots 21, the giant quantum dots 21 are selectively removed from the semiconductor layer 12 by controlling the thermal dissociation speed and the heating time of the giant quantum dots 21. Can do.

  In addition, when the amount of arsenic is insufficient, the dissociation rate R further increases. However, by incorporating such factors into the database, only the huge quantum dots 21 can be reliably removed from the semiconductor layer 12.

  In the above example, the atmospheric temperature is set to 600 ° C. However, under a temperature condition where dissociation of the semiconductor layer 12 can be ignored, the heating time for removing the huge quantum dots 21 is sufficiently longer than the above holding time. You can do it.

  Further, during heating, in order to prevent the semiconductor layer 12 from evaporating simultaneously with the giant quantum dots 21, heating is performed while irradiating one of the elements constituting the semiconductor layer 12 and an element having a high equilibrium vapor pressure. May be. For example, in the example shown in FIG. 5, since the material of the semiconductor layer 12 is i-gallium arsenide, the semiconductor layer 12 may be heated while being irradiated. Thereby, it is possible to prevent the semiconductor layer 12 from evaporating simultaneously with the huge quantum dots 21, and it is possible to selectively remove only the huge quantum dots 21 from the semiconductor layer 12 more reliably.

  Moreover, the equation of the dissociation rate R shown above is an example, and the temperature and time are not determined only by this equation. For example, the relationship between the temperature and time at which the giant quantum dots 21 are thermally dissociated is databased for semiconductors and compound semiconductors of other materials. From these data, the thermal dissociation rate of the giant quantum dots 21 of various materials can be calculated. The time for complete removal from the semiconductor layer 12 is controlled.

FIG. 6 is a schematic cross-sectional view of the relevant part in the intermediate layer forming step.
The huge quantum dots 21 are removed, and the semiconductor layer 13 having a film thickness of 26 nm is formed on the semiconductor layer 12 on which the removed portions 22 are formed. Here, by promoting the growth of the semiconductor layer 13 in the in-plane direction (left and right direction as viewed in the figure), the material constituting the semiconductor layer 13 is sufficiently embedded up to the inside of the removed portion 22, and the surface is not flat. The semiconductor layer 13 is formed.

  Here, as a method of promoting the growth in the in-plane direction of the semiconductor layer 13, the growth rate of the semiconductor layer 13 is made smaller than the growth rate of the semiconductor layer 12. Specifically, the growth rate of the semiconductor layer 13 is set to ½ or less of the growth rate of the semiconductor layer 12.

  As a result, the migration effect when the semiconductor layer 13 is grown is promoted, the semiconductor layer 13 is embedded up to the inside of the removed portion 22, and the flat semiconductor layer 13 without surface irregularities is formed.

  As an example, when the growth rate of the semiconductor layer 12 is 1 μm / hr and the growth rate of the semiconductor layer 13 is 0.2 μm / hr, the flat semiconductor layer 13 is formed. Note that the formation time of the semiconductor layer 13 may be shortened by increasing the growth rate (for example, 1 μm / hr) when the semiconductor layer 13 becomes flat.

  Further, if the material of the semiconductor layer 13 is the same material as that of the semiconductor layer 12, growth in the in-plane direction is promoted, the semiconductor layer 13 is embedded up to the inside of the removed portion 22, and the flat semiconductor layer 13 without surface irregularities. Can be formed.

  In the above description, indium arsenide is used as the material of the quantum dots 20 and i-gallium arsenide is used as the material of the semiconductor layer 11, the semiconductor layer 12, and the semiconductor layer 13. Arsenic, gallium arsenide, aluminum arsenic, indium phosphide, gallium phosphide, aluminum phosphide, indium antimony, gallium antimony, aluminum antimony, indium nitride, gallium nitride, aluminum nitride may be used. A mixed crystal material may be used. The material of the quantum dots 20 and the material covering the quantum dots 20 are selected from different materials.

Furthermore, the semiconductor layer 12 may have a laminated structure in which these materials are combined.
For example, when aluminum arsenic is selected as the material of the semiconductor layer 12, a gallium arsenide layer is provided on the aluminum arsenic layer, and the semiconductor layer 12 has a two-layer structure including, for example, an aluminum arsenic layer / gallium arsenide layer. The material of the layer 13 may be gallium arsenide.

  With such a structure, the material of the semiconductor layer 12 immediately below the semiconductor layer 13 is the same as the material of the semiconductor layer 13, the growth in the in-plane direction is promoted, and the semiconductor layer 13 is embedded up to the inside of the removed portion 22. Thus, a flat semiconductor layer 13 without surface irregularities is formed.

  In addition, in the semiconductor layer 12, when an indium gallium arsenide (InGaAs) layer is inserted to adjust the response wavelength, the semiconductor layer 12 has a two-layer structure of indium gallium arsenide layer / gallium arsenide layer, and the semiconductor layer 13 is It may be a gallium arsenide layer or an aluminum gallium arsenide layer.

  Subsequently, although not shown, the semiconductor layer 12 and the semiconductor layer 13 are combined, and, for example, an intermediate layer composed of ten semiconductor layers 12 and the semiconductor layer 13 is formed on the semiconductor layer 11. The upper contact layer 14 shown in FIG. 1 is formed on the laminated intermediate layer.

  Then, other than the element pattern is removed by etching to expose the lower contact layer 10, and then an electrode made of, for example, gold germanium / gold is provided on the upper contact layer 14 and the lower contact layer 10. The device surface other than is covered with a silicon nitride or silicon oxynitride protective film. With this method, the quantum dot infrared detector shown in FIG. 1 is manufactured.

  As described above, according to the above manufacturing method, even if the huge quantum dots 21 are reliably removed from the intermediate layer, and the intermediate layers containing the quantum dots are stacked, the shape and density of the quantum dots in each intermediate layer are uniform. It is possible to manufacture a semiconductor device maintained in the above-described manner. In particular, in the quantum dot infrared detector, dark current generated due to a huge quantum dot defect can be reduced.

Further, the photocurrent is increased by the stacked structure of the quantum dots, and the characteristics as the quantum dot infrared detector can be improved.
The semiconductor device manufacturing method is not limited to the quantum dot infrared detector manufacturing method, but can be easily transferred to a quantum dot laser manufacturing method.

(Supplementary Note 1) In a method for manufacturing a semiconductor device having a structure in which quantum dots are stacked,
Supplying a raw material of quantum dots on the first semiconductor layer;
A second semiconductor layer having a thickness higher than the height of the quantum dots grown on the supplied first semiconductor layer and lower than the height of the giant quantum dots generated in a part of the quantum dots; Forming on one semiconductor layer;
Removing the giant quantum dots from the formed second semiconductor layer by thermal dissociation;
Forming a third semiconductor layer on the second semiconductor layer and on the removed portion generated in the second semiconductor layer after the giant quantum dots are removed;
A method for manufacturing a semiconductor device, comprising:

  (Supplementary Note 2) In the step of removing the giant quantum dots, the giant quantum dots are removed from the second semiconductor layer by controlling a thermal dissociation rate and a heating time of the giant quantum dots. A method for manufacturing a semiconductor device according to appendix 1.

  (Supplementary Note 3) In the step of removing the giant quantum dots, the giant quantum dots are irradiated from the second semiconductor layer while irradiating the second semiconductor layer with at least one of the elements constituting the second semiconductor layer. The method of manufacturing a semiconductor device according to appendix 1 or 2, wherein the dot is removed.

(Additional remark 4) The manufacturing method of the semiconductor device of Additional remark 1 characterized by the film-forming speed | rate of said 3rd semiconductor layer being 1/2 or less of the film-forming speed | rate of said 2nd semiconductor layer.
(Additional remark 5) The manufacturing method of the semiconductor device of Additional remark 1 or 4 characterized by the material of the said 3rd semiconductor layer and the material of the said 2nd semiconductor layer being the same material.

(Supplementary Note 6) The method for manufacturing a semiconductor device according to any one of Supplementary notes 1 to 5, wherein the second semiconductor layer has a structure in which a plurality of semiconductors are stacked.
(Supplementary note 7) The material of the quantum dots and the giant quantum dots is indium arsenide (InAs), gallium arsenide (GaAs), aluminum arsenic (AlAs), indium phosphide (InP), gallium phosphide (GaP), aluminum phosphide (AlP) , Indium antimony (InSb), gallium antimony (GaSb), aluminum antimony (AlSb), indium nitride (InN), gallium nitride (GaN), aluminum nitride (AlN), or a material in which a plurality of these are mixed crystals The method of manufacturing a semiconductor device according to any one of appendices 1 to 3, wherein:

  (Supplementary Note 8) The material of the first semiconductor layer, the second semiconductor layer, or the third semiconductor layer is indium arsenide (InAs), gallium arsenide (GaAs), aluminum arsenic (AlAs), or indium phosphide (InP). Gallium phosphide (GaP), aluminum phosphide (AlP), indium antimony (InSb), gallium antimony (GaSb), aluminum antimony (AlSb), indium nitride (InN), gallium nitride (GaN), aluminum nitride (AlN) Or a semiconductor device manufacturing method according to any one of appendices 1 to 6, wherein a plurality of these materials are mixed crystals.

It is a principal part cross-sectional schematic diagram of a semiconductor device. It is a principal part cross-sectional schematic diagram of a quantum dot formation process. It is a comparison figure of the height and diameter of a quantum dot. It is a principal part cross-sectional schematic diagram of an intermediate | middle layer formation process (the 1). It is a principal part cross-sectional schematic diagram of a heating process. It is a principal part cross-sectional schematic diagram of an intermediate | middle layer formation process (the 2). It is a principal part figure explaining the basic structure of a quantum dot type infrared detector. It is a principal part figure explaining the structure of an intermediate | middle layer when a huge quantum dot grows. It is a figure explaining the principle of the flushing method.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor device 10 Lower contact layer 11, 12, 13 Semiconductor layer 14 Upper contact layer 15 GaAs substrate 16 GaAs buffer layer 20 Quantum dot 21 Giant quantum dot 22 Removal part

Claims (4)

In a method for manufacturing a semiconductor device having a structure in which quantum dots are stacked,
Supplying a raw material of quantum dots on the first semiconductor layer;
A second semiconductor layer having a thickness higher than the height of the quantum dots grown on the supplied first semiconductor layer and lower than the height of the giant quantum dots generated in a part of the quantum dots; Forming on one semiconductor layer;
Removing the giant quantum dots from the formed second semiconductor layer by thermal dissociation;
Forming a third semiconductor layer on the second semiconductor layer and on the removed portion generated in the second semiconductor layer after the giant quantum dots are removed;
A method for manufacturing a semiconductor device, comprising:   2. The step of removing the giant quantum dots includes removing the giant quantum dots from the second semiconductor layer by controlling a thermal dissociation speed and a heating time of the giant quantum dots. Semiconductor device manufacturing method.   In the step of removing the giant quantum dots, the giant quantum dots are removed from the second semiconductor layer while irradiating the second semiconductor layer with at least one of the elements constituting the second semiconductor layer. 3. A method of manufacturing a semiconductor device according to claim 1, wherein:   The method for manufacturing a semiconductor device according to claim 1, wherein a deposition rate of the third semiconductor layer is ½ or less of a deposition rate of the second semiconductor layer.

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