JP2008191451A - Electro-optical device, electronic device, and driving method of electro-optical device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To control an electro-optical element to a desired gradation, with a high degree of precision. <P>SOLUTION: A drive transistor TDR generates a driving current IDR, according to the potential VG of the gate. An electro-optical element E assumes gradation that is according to a drive current IDR. A drive control transistor TEL controls the propriety of supplying to the drive current IDR with respect to the electro-optical element E. A selection transistor TSL sets the potential VG of the gate of the drive transistor TDR, according to the potential VDATA of a signal line 16 by conducting at the selection of a selection line 12 by a selection circuit 22. A drive control circuit 24 makes the drive control transistor TEL conduct, prior to the time when the potential VG of the gate of the drive transistor TDR starts to be set, according to the potential VDATA. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a technique for controlling an electro-optical element such as a light-emitting element.

2. Description of the Related Art Conventionally, a pixel circuit that controls a driving current supplied to an electro-optical element in accordance with a gate potential of a transistor (hereinafter referred to as “driving transistor”) has been proposed. Patent Document 1 discloses a configuration in which a transistor (hereinafter referred to as “drive control transistor”) is interposed between the source of an N-channel type drive transistor and the anode of an electro-optic element. The gate of the driving transistor is set to a potential corresponding to the gradation data in the writing period, and the driving control transistor is turned on in the driving period after the writing period, so that the driving current corresponding to the gradation data is electrically Supplied to the optical element.
JP 2004-191932 A

  By the way, the gate and the source of the driving transistor are coupled via a gate capacitance. Therefore, when the gate potential is changed to a potential corresponding to the gradation data in the writing period in which the drive control transistor is non-conductive, the source potential is also changed in accordance with the amount of change in the gate potential. Since the drive current is controlled to an amount of current according to the voltage between the gate and the source of the drive transistor, in the conventional configuration in which the source potential of the drive transistor depends on the amount of fluctuation of the gate potential, There is a problem that it is difficult to control gradation with high accuracy. For example, even when the same gradation is specified for a plurality of pixel circuits, each of the pixel circuits depends on the potential of the gate of the driving transistor of each pixel circuit in the immediately preceding frame (that is, the gradation specified in the immediately preceding frame). There is a problem in that the actual gradation of the electro-optic element in the pixel circuit is different and the user perceives that the gradation is uneven. In view of the above circumstances, an object of the present invention is to solve the problem of controlling an electro-optic element to a desired gradation with high accuracy.

  In order to solve the above problems, an electro-optical device according to a first aspect of the present invention includes a pixel circuit arranged corresponding to an intersection of a selection line and a signal line, and a selection line in a writing period. An electro-optical device comprising: a selection circuit to select; a data supply circuit that supplies a data potential corresponding to gradation data to a signal line within a writing period; and a drive control circuit that controls the operation of the pixel circuit. The pixel circuit includes a driving transistor that generates a driving signal according to the gate potential, an electro-optical element having a gradation according to the driving signal, and drive control switching that controls whether the driving signal is supplied to the electro-optical element. And a selection switching element that sets the potential of the gate of the drive transistor in accordance with the data potential of the signal line by conducting when the selection line is selected by the selection circuit, and the drive control circuit includes the drive transistor The potential of the gate of the data is to conduct the drive control switching element by the driving period from the previous time that begins to be set according to the data potential to after a writing period. In the above embodiment, since the drive control switching element is turned on when the gate potential of the drive transistor is set according to the data potential, the amount of variation in the gate potential during the writing period does not affect the source potential. . Therefore, for example, the electro-optic element can be controlled to a desired gradation with high accuracy regardless of the gradation in the immediately preceding frame period.

  The electro-optical device according to the second aspect of the invention includes a plurality of pixel circuits arranged corresponding to the intersection of the selection line and each of the plurality of signal lines, and a selection for selecting the selection line in the writing period. An electro-optic comprising: a circuit; a data supply circuit for sequentially supplying a data potential corresponding to gradation data to each of a plurality of signal lines within a writing period; and a drive control circuit for controlling the operation of each pixel circuit Each of the plurality of pixel circuits includes a driving transistor that generates a driving signal corresponding to a gate potential, an electro-optical element having a gradation corresponding to the driving signal, and supply of the driving signal to the electro-optical element. The drive control switching element that controls whether or not the selection circuit is selected and a selection switch that sets the potential of the gate of the drive transistor in accordance with the data potential of the signal line corresponding to the pixel circuit by being turned on when the selection line is selected by the selection circuit. The drive control circuit includes a driving period from a time point before the gate potential of any one of the plurality of pixel circuits starts to be set in accordance with the data potential to after a lapse of the writing period. The drive control switching element is turned on. In the above embodiment, since the drive control switching element is turned on when the gate potential of the drive transistor is set according to the data potential, the amount of variation in the gate potential during the writing period does not affect the source potential. . Therefore, similarly to the first aspect, for example, the electro-optic element can be controlled to a desired gradation with high accuracy regardless of the gradation in the immediately preceding frame period.

  The drive signal in each of the above embodiments is a current signal (for example, the drive current IDR in FIG. 3) in an electro-optical device using a current-driven electro-optical element such as an organic light-emitting diode element. In an electro-optical device that employs an electro-optical element driven by, a voltage signal is used.

In the electro-optical device according to the second aspect exemplified above, for example, the potential of the gate of any of the drive transistors of the plurality of pixel circuits is data from the time when the drive control circuit starts to conduct the drive control switching element. An initialization circuit is provided that supplies a predetermined potential to each of the plurality of signal lines within a period up to a point of time when the setting starts according to the potential. According to this aspect, since the gate potential of each driving transistor is set to a predetermined potential prior to the supply of the data potential to each pixel circuit, each difference due to the difference in timing of supplying the data potential to each pixel circuit. It is possible to suppress gradation imbalance of the pixel circuit.
In addition, if the predetermined potential is set to a potential at which the electro-optical element is turned off when supplied to the gate of the driving transistor, the influence of erroneous light emission of the electro-optical element can be particularly effectively suppressed. Note that in a configuration in which the display colors of the plurality of pixel circuits are different, display color imbalance (color unevenness) becomes noticeable due to a difference in timing of supplying a data potential to each pixel circuit. Therefore, the above aspect capable of suppressing the gray level imbalance of each pixel circuit is particularly suitable in a configuration in which the display colors of the plurality of pixel circuits are different.

  The electro-optical device according to the invention is used in various electronic apparatuses. A typical example of an electronic device is a device that uses an electro-optical device as a display device. Examples of the electronic apparatus according to the present invention include a personal computer and a mobile phone. However, the use of the electro-optical device according to the present invention is not limited to image display. For example, the electro-optical device of the present invention can also be applied as an exposure device (exposure head) for forming a latent image on an image carrier such as a photosensitive drum by irradiation of light.

  The present invention is also specified as a method of driving an electro-optical device. A driving method according to a first aspect is a method of driving an electro-optical device in which a pixel circuit is arranged corresponding to an intersection of a selection line and a signal line, and the selection line is selected in an address period, The data potential corresponding to the adjustment data is supplied to the signal line within the writing period, and the driving period from the time before the gate potential of the driving transistor starts to be set according to the data potential until after the writing period has elapsed. The drive control switching element is turned on. According to the above driving method, the same operation and effect as the electro-optical device according to the first aspect are exhibited.

  A driving method according to a second aspect of the present invention is a method for driving an electro-optical device in which a plurality of pixel circuits are arranged corresponding to intersections of a selection line and each of a plurality of signal lines. A selection line is selected in the period, and a data potential corresponding to the gradation data is sequentially supplied to each of the plurality of signal lines in the writing period, and the gate of any of the drive transistors in the plurality of pixel circuits is supplied. The drive control switching element is turned on in the drive period from the time before the potential starts to be set according to the data potential until after the writing period has elapsed. According to the above driving method, the same operation and effect as the electro-optical device according to the second aspect are exhibited. In a more preferred aspect, within a period from the time when the drive control switching element is turned on to the time when the gate potential of any one of the plurality of pixel circuits starts to be set according to the data potential, A predetermined potential is supplied to each of the plurality of signal lines.

<A: First Embodiment>
FIG. 1 is a block diagram showing a configuration of an electro-optical device (display device) according to a first embodiment of the present invention. As shown in the figure, the electro-optical device 100 includes an element array unit 10 in which a plurality of pixel circuits P are arranged, and peripheral circuits (selection circuit 22, drive control circuit 24, data for driving each pixel circuit P). Supply circuit 26).

  The element array unit 10 intersects the X direction with M selection lines 12 extending in the X direction and M drive control lines 14 extending in the X direction in pairs with the selection lines 12. N signal lines 16 extending in the Y direction are formed (each of M and N is a natural number of 2 or more). Each pixel circuit P is arranged corresponding to each intersection of the selection line 12 and the signal line 16. Therefore, in the entire element array unit 10, the pixel circuits P are arranged in a matrix of M rows × N columns across the X direction and the Y direction.

  The selection circuit 22 generates and outputs selection signals Y [1] to Y [M] for sequentially selecting each of the M selection lines 12 (pixel circuits P in each row) to each selection line 12. (For example, an M-bit shift register). As shown in FIG. 2, the selection signal Y [i] supplied to the selection line 12 in the i-th row (i = 1 to M) is i-th in one frame period F (F1, F2,...). It becomes high level in the first writing period (horizontal scanning period) H, and low level is maintained in other periods.

  The drive control circuit 24 of FIG. 1 generates drive control signals Z [1] to Z [M] and outputs them to the drive control lines 14. As shown in FIG. 2, the drive control signal Z [i] supplied to the drive control line 14 in the i-th row is the write period from the start point of the write period H when the selection signal Y [i] becomes high level. A high level is maintained in HDR for a predetermined time length (hereinafter referred to as “driving period”) until after H elapses (before the start of the next writing period H), and becomes a low level in other periods. .

  The data supply circuit 26 in FIG. 1 generates data signals X [1] to X [N] based on the gradation data GD that specifies the gradation of each pixel circuit P and outputs the data signals X to each signal line 16. The data supply circuit 26 includes N signal generation units 261 each corresponding to a separate signal line 16. The output control signal LP is supplied to the N signal generation units 261. As shown in FIG. 2, the output control signal LP becomes a high level within the writing period H defined by each of the selection signals Y [1] to Y [M].

  As shown in FIG. 2, the signal generation unit 261 at the j-th stage (j = 1 to N) sets the output control signal LP to the high level during the writing period H in which the selection signal Y [i] is at the high level. When the transition is made, the data signal X [j] is set to the potential VDATA corresponding to the gradation data GD of the pixel circuit P in the j-th column belonging to the i-th row, and then the output control signal LP transits to a high level. Until the potential VDATA is maintained. That is, at the end point of the writing period H of the i-th row (when the selection signal Y [i] transitions to the low level), the data signal X [j] is the pixel circuit P of the j-th column belonging to the i-th row. Becomes the potential VDATA corresponding to the gradation data GD.

  Next, a specific configuration of each pixel circuit P will be described with reference to FIG. In the figure, only one pixel circuit P in the j-th column belonging to the i-th row is representatively shown.

  As shown in FIG. 3, the pixel circuit P includes an electro-optical element E. The electro-optic element E of this embodiment is an organic light-emitting diode element in which a light-emitting layer of an organic EL (Electroluminescence) material is interposed between an anode and a cathode that face each other. The electro-optical element E emits light with an intensity corresponding to the amount of drive current IDR supplied to the light emitting layer. The cathode of the electro-optic element E is electrically connected to a lower power supply (ground potential) VCT.

  An N-channel type drive transistor TDR is disposed on the path of the drive current IDR (between the higher power supply VEL and the anode of the electro-optic element E). The drive transistor TDR is means for controlling the amount of drive current IDR in accordance with the gate-source voltage. The drain (D) of the driving transistor TDR is connected to the higher-level power supply VEL.

  A capacitive element C is interposed between the gate and drain (power supply VEL) of the drive transistor TDR. An N-channel type select transistor TSL is disposed between the gate of the drive transistor TDR and the signal line 16. The selection transistor TSL is a switching element that controls electrical connection (conduction / non-conduction) between the gate of the drive transistor TDR and the signal line 16. The gates of the selection transistors TSL of the pixel circuits P belonging to the i-th row are commonly connected to the i-th selection line 12.

  An N-channel drive control transistor TEL is disposed between the source (S) of the drive transistor TDR and the anode of the electro-optical element E (that is, on the path of the drive current IDR). The drive control transistor TEL is a switching element that controls electrical connection between the source of the drive transistor TDR and the anode of the electro-optical element E. Since the path of the drive current IDR is established when the drive control transistor TEL becomes conductive, the drive control transistor TEL functions as a means for controlling whether or not the drive current IDR can be supplied to the electro-optical element E. The gates of the drive control transistors TEL of the pixel circuits P belonging to the i-th row are commonly connected to the i-th row drive control line 14.

  In the above configuration, when the selection signal Y [i] transits to a high level in the writing period H as shown in FIG. 2 (that is, when the selection line 12 in the i-th row is selected), the selection transistor TSL becomes conductive. To do. Therefore, when the output control signal LP transits to a high level during the writing period H, the potential VDATA of the data signal X [j] is supplied to the gate of the driving transistor TDR via the selection transistor TSL, and is set to the potential VDATA. The corresponding charge is accumulated in the capacitive element C. That is, the potential VG of the gate of the driving transistor TDR is set to the potential VDATA corresponding to the gradation data GD.

  When the selection signal Y [i] transitions to a low level at the end point of the writing period H, the selection transistor TSL becomes non-conductive and the gate of the driving transistor TDR is electrically insulated from the signal line 16. The gate potential VG of the drive transistor TDR is maintained at the potential VDATA by the capacitive element C even after the writing period H has elapsed.

  On the other hand, the drive control transistor TEL becomes conductive from the start point of the writing period H when the drive control signal Z [i] transitions to a high level. Therefore, in the drive period HDR including the write period H, the drive current IDR having a current amount corresponding to the gate potential VG (potential VDATA) of the drive transistor TDR passes through the drive transistor TDR and the drive control transistor TEL from the power supply VEL. And supplied to the electro-optical element E. The electro-optical element E emits light with an intensity corresponding to the amount of the drive current IDR (that is, an intensity corresponding to the potential VDATA).

  Next, as shown in FIG. 4, the drive control signal Z [i] transitions to the high level after the writing period H in which the selection signal Y [i] is at the high level (hereinafter referred to as “comparative 1”). ) For comparison with this embodiment. That is, the proportionality 1 is a configuration in which the writing period H and the driving period HDR do not overlap. In contrast 1, the drive control transistor TEL is in a non-conductive state in the writing period H in which the potential VDATA is supplied to the gate of the drive transistor TDR. Since the source of the driving transistor TDR is capacitively coupled to the gate through the gate capacitance, the output control signal LP changes to high level within the writing period H, and the potential VG of the gate of the driving transistor TDR becomes the potential VDATA. Is changed, the source potential VS of the drive transistor TDR changes in conjunction with the potential VG. That is, the potential VS in each frame period F is affected by the potential VG in the immediately preceding frame period F.

  For example, now, for one pixel circuit P belonging to the first row, a high gradation GH is designated in the frame period F1 and a low gradation GM is designated in the immediately following frame period F2 (FIG. 4). (A) in the case (a), and when the minimum gradation GL (GL <GM) is designated in the frame period F1 and the gradation GM is designated in the frame period F2 (part (FIG. 4)). Assume case B) in b). The difference between the gradation GH and the gradation GM is larger than the difference between the gradation GM and the gradation GL.

  The potential VDATA in case A is set to a high potential corresponding to the gradation GH in the frame period F1, and is set to a low potential corresponding to the gradation GM in the frame period F2. On the other hand, the potential VDATA in case B is set to the lowest potential corresponding to the gradation GL in the frame period F1, and is set to a low potential corresponding to the gradation GM in the frame period F2. That is, the change direction and the change amount of the potential VG in the writing period H of the frame period F2 are different between the case A and the case B. Accordingly, the potential VS in the frame period F2 in the case A is lower than the potential VS in the frame period F2 in the case B. Since the potential VG in the frame period F2 is the same in case A and case B, the voltage VGS_A between the gate and source of the driving transistor TDR in case A is larger than the voltage VGS_B in case B (VGS_A> VGS_B). . Accordingly, in the case A, the drive current IDR having a larger current amount than that in the case B is supplied to the electro-optical element E.

  As described above, in the comparative 1, the current amount of the drive current IDR in each frame period F (and the gradation of the electro-optic element E) is affected by the gradation in the immediately preceding frame period F. That is, there is a problem that it is difficult to faithfully control the electro-optic element E to the intended gradation according to the gradation data GD. In the above description, it has been described that the gradation of the electro-optical element E in one pixel circuit P is different between the case A and the case B. However, the gradation is different from the case of the single pixel circuit P as in the case A. When the gradation is specified as in Case B for the other pixel circuit P, the gradation of the electro-optic element E in the frame period F2 is different in each pixel circuit P (that is, the gradation). Inconsistencies).

  On the other hand, in the present embodiment, the drive control transistor TEL becomes conductive in the write period H when the drive control signal Z [i] transitions to a high level from the start point of the write period H. Therefore, the potential VS of the source of the drive transistor TDR is not changed even if the potential VG is changed to the potential VDATA within the writing period H, and the electrical characteristics (for example, the potential VDATA) after the change (for example, Resistance) and is not dependent on the amount of change from the immediately preceding frame period F. That is, as shown in FIG. 2, in both case A (part (a)) in which the gradation GH is designated in the frame period F1 and case B (part (b)) in which the gradation GL is designated, As long as the gradations specified for the pixel circuits P in the frame period F2 are the same (gradation GM), the potential VS in the frame period F2 is the same in case A and case B. Accordingly, the voltage between the gate and source of the drive transistor TDR (VGS_A = VGS_B), the current amount of the drive current IDR, and the gradation of the electro-optical element E are the same in case A and case B. That is, the gradation of the electro-optic element E in each frame period F is not affected by the gradation in the immediately preceding frame period F.

  As described above, according to this embodiment, each electro-optic element E can be faithfully controlled to a desired gradation regardless of the gradation designated in the immediately preceding frame period F. Therefore, for example, even if separate gradations are designated for the plurality of pixel circuits P in the frame period F1, if the same gradation is designated for each of the frame periods F2, each pixel circuit P The electro-optical element E is effectively uniformized. That is, it is possible to effectively suppress gradation unevenness in the element array unit 10.

<B: Second Embodiment>
Next, a second embodiment of the present invention will be described. In addition, about the element which an effect | action and function are common in 1st Embodiment in this form, the same code | symbol as the above is attached | subjected and each detailed description is abbreviate | omitted suitably.

  FIG. 5 is a block diagram illustrating a configuration of the electro-optical device 100. As shown in the figure, the element array unit 10 is composed of a plurality of pixels PX arranged in vertical M rows and horizontal n columns across the X and Y directions (n = N / 3). The pixel PX includes three pixel circuits P (PR, PG, PB) arranged in the X direction. A separate display color is assigned to each of the three pixel circuits P belonging to one pixel PX. That is, the pixel circuit PR includes an electro-optical element E that emits red light, the pixel circuit PG includes an electro-optical element E that emits green light, and the pixel circuit PB includes an electro-optical element E that emits blue light. The configuration in which each pixel circuit P is arranged at each intersection of the M selection lines 12 and the N signal lines 16 is the same as in the first embodiment.

  As shown in FIG. 5, the electro-optical device 100 includes an initialization circuit 32. The initialization circuit 32 includes N switching elements 321 (for example, thin film transistors). The j-th switching element 321 is interposed between the signal line 16 and the power supply line 18 in the j-th column. A predetermined potential VRS is supplied to the power supply line 18 from a power supply circuit (not shown). The N switching elements 321 are controlled by an initialization signal R supplied from the drive control circuit 24. When the initialization signal R transitions to a high level, the N switching elements 321 are turned on all at once. Therefore, the potential VRS is supplied to the N signal lines 16. A configuration in which a circuit separate from the drive control circuit 24 generates the initialization signal R is also employed. 5 illustrates a configuration in which each switching element 321 is arranged outside the element array unit 10, but a configuration in which each switching element 321 is arranged inside the element array unit 10 is also employed.

  The data supply circuit 26 of the present embodiment generates n system image signals V [1] to V [n] based on the gradation data GD and outputs them in parallel. The image signal V [k] (k = 1 to n) is the three pixels of the pixel PX in the k-th column belonging to the i-th row within the writing period H in which the selection signal Y [i] is at a high level. The voltage signal is sequentially set to a potential corresponding to each gradation of the circuit P.

  Further, as shown in FIG. 5, the data supply circuit 26 includes a sampling circuit 34. The sampling circuit 34 includes n unit circuits U1 to Un each corresponding to each column of the pixels PX. One unit circuit Uk includes three output units (OR, OG, OB) each corresponding to the pixel circuit P of each display color belonging to the pixel PX in the kth column. A common output control signal LPR is supplied to each output section OR of the unit circuits U1 to Un. Similarly, an output control signal LPG is supplied to each output unit OG, and an output control signal LPB is supplied to each output unit OB. The output section OR of the unit circuit Uk outputs the image signal V [k] at the time when the output control signal LPR transits to the high level as the data signal X [j] (potential VDATA), and the output control signal LPR is output next time. This output is maintained until it changes to high level. The output units OG and OB operate similarly based on each of the output control signals LPG and LPB.

  FIG. 6 is a timing chart for explaining an operation related to each pixel PX in the i-th row. As shown in the figure, the three output control signals (LPR, LPG, LPB) are mutually connected within each writing period H in which each of the selection signals Y [1] to Y [M] is at a high level. It becomes high level in order so as not to overlap. In this embodiment, the output control signal LPG transitions to a high level following the output control signal LPR, and the output control signal LPB transitions to a high level following the output control signal LPG. The data signal X [j] supplied to each pixel circuit P (PR, PG, PB) of one pixel PX is sequentially imaged at each time point when each of the output control signals LPR, LPG, and LPB transitions to a high level. The potential VDATA is set according to the signal V [k].

  As shown in FIG. 6, the drive control signal Z [i] generated by the drive control circuit 24 is set to a high level from the start point of the writing period H, as in the first embodiment. That is, the drive control transistor TEL is conductive at the time when the gate potential VG of the drive transistor TDR is set to the potential VDATA in the writing period H. Therefore, also in this embodiment, the same operation and effect as the first embodiment are exhibited.

  Further, as shown in FIG. 6, the drive control circuit 24 detects when the output control signal LPR transitions to the high level from the start point of the writing period H in which the selection signal Y [i] maintains the high level (that is, the i-th row). The initialization signal R is maintained at the high level within a period Δ until the potential VDATA starts to be supplied to the pixel circuit PR. That is, before the potential VDATA is first supplied to any pixel circuit P (pixel circuit PR) of each pixel PX belonging to the i-th row selected by the selection circuit 22, all of the i-th row belong to the i-th row. The potential VRS is supplied to the gate of each drive transistor TDR in the pixel circuit P through the signal line 16.

  Now, a configuration in which the potential VRS is not supplied to each signal line 16 immediately after the start of the writing period H (hereinafter referred to as “Comparison 2”) will be considered for comparison with this embodiment. As the drive control signal Z [i] transitions to a high level as the writing period H starts, the drive control transistor TEL becomes conductive. Therefore, in the configuration of the proportional 2, each pixel circuit is started from the start point of the drive period HDR. In the period (AR, AG, AB) until the potential VDATA starts to be supplied to P, the electro-optic element E of each pixel circuit P is controlled to a gradation corresponding to the potential VDATA supplied in the immediately preceding frame period F. The Since the time point at which the potential VDATA starts to be supplied to each pixel circuit P (the time point when the output control signals LPR, LPG, and LPB transition to the high level) differs for each display color, the time length of each of the periods AR, AG, and AB is Is different. For example, as shown in FIG. 6, the period AG is longer than the period AR, and the period AB is longer than the period AG. Therefore, in contrast 2, the gradation of each display color is uneven for one pixel PX. That is, it becomes difficult to control each pixel PX to a desired gradation with high accuracy.

  On the other hand, in the present embodiment, the potential VG of the gate of the driving transistor TDR in each pixel circuit P is equal to the potential VRS with the start of the writing period H (driving period HDR) regardless of the potential VDATA in the immediately preceding frame period F. It is initialized to. Therefore, it is possible to suppress the gray level imbalance of each display color due to the difference in the supply timing of the potential VDATA for each display color compared to the proportional 2.

  Although the gate potential VG of the driving transistor TDR in each pixel circuit P of each display color is equalized to the potential VRS, if the potential VRS is too high, the electro-optic element in the period Δ The emission of E may become noticeable and may cause deterioration in display quality. Therefore, it is desirable to set the potential VRS so that the electro-optical element E is turned off when the potential VRS is supplied to the gate of the drive transistor TDR. For example, the potential VRS is set to the same potential as the cathode potential (VCT) of the electro-optic element E. More specifically, a configuration in which each switching element 321 of the initialization circuit 32 is interposed between the signal line 16 and the lower power supply VCT (or ground potential) is preferably employed.

<C: Modification>
Various modifications can be made to each of the above embodiments. An example of a specific modification is as follows. In addition, you may combine each following aspect suitably.

(1) Modification 1
In each of the above embodiments, the configuration in which the drive control transistor TEL is turned on simultaneously with the start of the writing period H is exemplified. However, the timing for turning on the drive control transistor TEL (that is, the drive control signal Z [i] is set to a high level). The timing is changed as appropriate. For example, the drive control transistor TEL may be turned on before or after the writing period H starts. Note that, in the configuration of proportionality 1, the gradation of the electro-optic element E is influenced by the potential VDATA in the immediately preceding frame period F when the gate potential VG of the drive transistor TDR is set to the potential VDATA. This is because the transistor TEL is not conducting. Therefore, in order to obtain the effect of faithfully controlling the electro-optic element E to the desired gradation regardless of the potential VDATA in the immediately preceding frame period F, the potential VG of the gate of the driving transistor TDR is set to the potential VDATA. A configuration in which the drive control transistor TEL is turned on before the start is preferable.

(2) Modification 2
The conductivity type of each transistor constituting the pixel circuit P is appropriately changed. For example, the driving transistor TDR may be a P-channel type. That is, as illustrated in FIG. 7, a configuration in which the drive control transistor TEL is interposed between the source (S) of the P-channel type drive transistor TDR and the cathode of the electro-optic element E can be employed. Also in the configuration of FIG. 7, by making the drive control transistor TEL conductive prior to the supply of the potential VDATA to the gate of the drive transistor TDR, the source potential VS of the drive transistor TDR can be obtained regardless of the potential VG in the immediately preceding frame period F. Set to the desired potential. Accordingly, the same effects as those of the above embodiments can be obtained.

(3) Modification 3
A configuration in which the potential VDATA corresponding to the gradation data GD is directly supplied from the signal line 16 to the gate of the drive transistor TDR via the selection transistor TSL (that is, the gate potential VG is the same potential as the potential VDATA of the signal line 16). Is not necessarily required. For example, as disclosed in Japanese Patent Laid-Open No. 2005-99773, in a configuration in which a capacitive element is interposed between the selection transistor TSL and the gate of the driving transistor TDR, a signal line is connected to the electrode on the selection transistor TSL side of the capacitive element. The potential of the electrode on the drive transistor TDR side (that is, the potential VG of the gate of the drive transistor TDR) may be set by supplying the potential VDATA from 16. That is, the potential VG of the gate of the drive transistor TDR according to a preferred aspect of the present invention is set according to the potential VDATA of the signal line 16 in the writing period H.

(4) Modification 4
The organic light emitting diode element is merely an example of an electro-optical element. The electro-optic element applied to the present invention is distinguished from a self-light-emitting type that emits light itself and a non-light-emitting type (for example, a liquid crystal element) that changes the transmittance of external light, or a current-driven type that is driven by supplying current And the voltage driven type driven by voltage application are unquestionable. For example, inorganic EL elements, field emission (FE) elements, surface-conduction electron (SE) elements, ballistic electron surface emitting (BS) elements, and light emitting diode (LED) elements Various electro-optical elements such as liquid crystal elements and electrophoretic elements can be used in the present invention.

<D: Application example>
Next, electronic equipment using the electro-optical device according to the invention will be described. 8 to 10 show forms of electronic devices that employ the electro-optical device 100 according to any one of the forms described above as a display device.

  FIG. 8 is a perspective view illustrating a configuration of a mobile personal computer that employs the electro-optical device 100. The personal computer 2000 includes an electro-optical device 100 that displays various images, and a main body 2010 on which a power switch 2001 and a keyboard 2002 are installed. Since the electro-optical device 100 uses an organic light-emitting diode element as the electro-optical element E, it is possible to display an easy-to-see screen with a wide viewing angle.

  FIG. 9 is a perspective view illustrating a configuration of a mobile phone to which the electro-optical device 100 is applied. The cellular phone 3000 includes a plurality of operation buttons 3001 and scroll buttons 3002, and the electro-optical device 100 that displays various images. By operating the scroll button 3002, the screen displayed on the electro-optical device 100 is scrolled.

  FIG. 10 is a perspective view illustrating a configuration of a personal digital assistant (PDA) to which the electro-optical device 100 is applied. The portable information terminal 4000 includes a plurality of operation buttons 4001, a power switch 4002, and the electro-optical device 100 that displays various images. When the power switch 4002 is operated, various information such as an address book and a schedule book are displayed on the electro-optical device 100.

  The electronic apparatus to which the electro-optical device according to the present invention is applied includes the digital still camera, the television, the video camera, the car navigation device, the pager, the electronic notebook, and the electronic paper in addition to the apparatuses illustrated in FIGS. Calculators, word processors, workstations, videophones, POS terminals, printers, scanners, copiers, video players, devices with touch panels, and the like. The use of the electro-optical device according to the invention is not limited to image display. For example, the electro-optical device of the present invention is also used as an exposure device that forms a latent image on a photosensitive drum by exposure in an electrophotographic image forming device.

1 is a block diagram illustrating a configuration of an electro-optical device according to a first embodiment. 6 is a timing chart for explaining the operation of the electro-optical device. It is a circuit diagram which shows the structure of a pixel circuit. 6 is a timing chart for explaining the operation of the electro-optical device according to the comparative example. FIG. 6 is a block diagram illustrating a configuration of an electro-optical device according to a second embodiment. 6 is a timing chart for explaining the operation of the electro-optical device. It is a circuit diagram which shows partially the structure of the pixel circuit which concerns on a modification. It is a perspective view which shows the form (personal computer) of the electronic device which concerns on this invention. It is a perspective view which shows the form (cellular phone) of the electronic device which concerns on this invention. It is a perspective view which shows the form (mobile information terminal) of the electronic device which concerns on this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... Electro-optical device, P ... Pixel circuit, PX ... Pixel, 10 ... Element array part, 12 ... Selection line, 14 ... Drive control line, 16 ... Signal line, 22 ... Selection circuit, 24 …… Drive control circuit, 26 …… Data supply circuit, 32 …… Initialization circuit, 321 …… Switching element, 34 …… Sampling circuit, U1 to Un …… Unit circuit, OR, OG, OB …… Output unit , E: electro-optic element, TDR: drive transistor, TSL: selection transistor, TEL: drive control transistor,

Claims (9)

A pixel circuit arranged corresponding to the intersection of the selection line and the signal line, a selection circuit for selecting the selection line in the writing period, and a data potential corresponding to gradation data in the writing period An electro-optical device comprising: a data supply circuit that supplies a signal line; and a drive control circuit that controls the operation of the pixel circuit,
The pixel circuit includes:
A drive transistor for generating a drive signal in accordance with the gate potential;
An electro-optical element having gradation according to the drive signal;
A drive control switching element that controls whether or not to supply the drive signal to the electro-optic element;
A selection switching element that sets the potential of the gate of the drive transistor in accordance with the data potential of the signal line by conducting when the selection line is selected by the selection circuit;
The drive control circuit conducts the drive control switching element in a drive period from a time before the gate potential of the drive transistor starts to be set according to the data potential to a time after the writing period has elapsed. apparatus. A plurality of pixel circuits arranged corresponding to the intersections of the selection line and each of the plurality of signal lines; a selection circuit for selecting the selection line in a writing period; and a data potential corresponding to gradation data An electro-optical device comprising: a data supply circuit that sequentially supplies each of the plurality of signal lines within a writing period; and a drive control circuit that controls the operation of each pixel circuit,
Each of the plurality of pixel circuits is
A drive transistor for generating a drive signal in accordance with the gate potential;
An electro-optical element having gradation according to the drive signal;
A drive control switching element that controls whether or not to supply the drive signal to the electro-optic element;
A selection switching element that conducts when the selection line is selected by the selection circuit to set the potential of the gate of the driving transistor according to the data potential of the signal line corresponding to the pixel circuit;
The drive control circuit includes a drive period from a time before the gate potential of any one of the plurality of pixel circuits starts to be set according to the data potential to a time after the writing period. An electro-optical device for conducting the drive control switching element. Within a period from the time when the drive control circuit starts to turn on the drive control switching element to the time when the gate potential of any one of the plurality of pixel circuits starts to be set according to the data potential. The electro-optical device according to claim 2, further comprising: an initialization circuit that supplies a predetermined potential to each of the plurality of signal lines. The electro-optical device according to claim 3, wherein the predetermined potential is a potential that turns off the electro-optical element when supplied to the gate of the driving transistor. The electro-optical device according to claim 3, wherein each of the plurality of pixel circuits has a different display color.   An electronic apparatus comprising the electro-optical device according to claim 1. A method of driving an electro-optical device in which a pixel circuit is arranged corresponding to an intersection of a selection line and a signal line,
The pixel circuit includes:
A drive transistor for generating a drive signal in accordance with the gate potential;
An electro-optical element having gradation according to the drive signal;
A drive control switching element that controls whether or not to supply the drive signal to the electro-optic element;
A selection switching element that sets the potential of the gate of the driving transistor in accordance with the data potential of the signal line by conducting when selecting the selection line;
Select the selection line in the writing period,
Supplying a data potential corresponding to gradation data to the signal line within the writing period;
A method for driving an electro-optical device, wherein the drive control switching element is turned on in a drive period from a time before the gate potential of the drive transistor starts to be set according to the data potential to after the writing period. A method of driving an electro-optical device in which a plurality of pixel circuits are arranged corresponding to the intersection of a selection line and each of a plurality of signal lines,
Each of the plurality of pixel circuits is
A drive transistor for generating a drive signal in accordance with the gate potential;
An electro-optical element having gradation according to the drive signal;
A drive control switching element that controls whether or not to supply the drive signal to the electro-optic element;
A selection switching element that sets the potential of the gate of the driving transistor in accordance with the data potential of the signal line by conducting when selecting the selection line;
Select the selection line in the writing period,
A data potential corresponding to gradation data is sequentially supplied to each of the plurality of signal lines within the writing period,
The drive control switching element is operated in a drive period from a time before the gate potential of any one of the plurality of pixel circuits starts to be set according to the data potential to after a lapse of the writing period. Driving method of electro-optical device to be conducted. The plurality of signals within a period from when the drive control switching element is turned on to when the gate potential of any one of the plurality of pixel circuits starts to be set according to the data potential. The driving method of the electro-optical device according to claim 8, wherein a predetermined potential is supplied to each of the lines.

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