JP2008186978A - Method of manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device which prevents variations in film thicknesses of the peripheral nitride films of the trench from being generated by etching in digging deeply a trench up to a depth for complete separation so that variations in film thicknesses of the element separating films are suppressed. <P>SOLUTION: The method of manufacturing the semiconductor device includes (a) a process for forming a plurality of trenches 17 having a depth for partial separation in an SOI substrate 11 with a nitride film 13 formed on top surface, (b) a process for oxidizing the inside wall of each trench 17 to form an ultra-thin-film-form inside-wall oxide film 19 thereon, (c) a process for forming a resist 21 on the SOI substrate 11 to expose a specific trench 17a of the respective trenches 17 to the outside and to bury residual trenches 17b, and (d) a process for etching the bottom portion of the specific trench 17a by using the resist 21 as a mask as to dig deeply the specific trench 17a up to the depth for complete separation. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a process for forming an element isolation film of an SOI device including two types of element isolation films, a partial isolation film and a complete isolation film.

  An SOI device to which hybrid trench isolation is applied is known for many excellent characteristics such as high-speed, low power consumption operation and latch-up free. For example, Patent Document 1 reports the hybrid trench isolation SOI. .

  In this report, a trench having a depth of partial isolation is formed on an SOI substrate, and the bottom of the trench is partially etched to partially dig deep to a depth of full isolation. A process of forming an oxide film is shown (FIGS. 4-6 of Patent Document 1).

  In this report, the nitride film around the complete isolation side of the trench and the nitride film around the partial isolation side are made different in thickness, and the element isolation film formed in the trench is flattened by CMP using the nitride films as stoppers. Therefore, the thickness of the element isolation film differs between the complete isolation side and the partial isolation side, and this is used to increase the thickness of the edge of the gate insulating film where voltage is likely to concentrate. It has been shown to prevent dielectric breakdown of the film (FIGS. 30 and 31 of Patent Document 1).

  However, when the technique of this report is applied to an SRAM portion or the like that uses a lot of complete isolation, the variation in the thickness of the element isolation film after planarization by CMP becomes remarkable, and the yield decreases.

  By the way, the element isolation film of the conventional RAM part (SRAM part formed by SOI structure) was formed as follows. That is, a plurality of trenches having a partial isolation depth are formed on an SOI substrate having a nitride film formed on the upper surface. Then, the inner wall of each of these trenches is oxidized to form an inner wall oxide film, and a specific trench (a trench for complete isolation) among these trenches is exposed and the remaining trench (a trench for partial isolation) A resist is formed on the SOI substrate so as to be buried. Then, using the resist as a mask, the bottom of a specific trench is etched to dig the specific trench to a complete isolation depth.

  During the etching, the inner wall oxide film on the bottom of the specific trench and the SOI layer immediately below the bottom are removed, and an unmasked portion of the nitride film (portion around the specific trench) ) Is also sharpened.

  Then, after the etching, the resist is removed, an HDP oxide film (element isolation film) is formed on the SOI substrate so as to fill each trench, and the HDP oxide film is formed using the nitride film on the SOI substrate as a stopper. Is planarized by CMP to form an element isolation film (that is, a partial isolation film is formed in the trench for partial isolation, and a complete isolation film is formed in the trench for complete isolation).

JP 2001-230315 A

  In the conventional process for forming the element isolation film of the RAM portion, as described above, the etching of the bottom of the trench removes the inner wall oxide film on the bottom and the SOI layer directly below the bottom and masks the periphery of the trench. The nitride film that has not been removed is also considerably removed (that is, the film thickness of the nitride film around the trench has a considerably large variation (step)). Therefore, when the HDP oxide film (element isolation film) formed in the trench is planarized by CMP using the nitride film around the trench as a stopper, the surface of the film thickness of the element isolation film is not horizontal and tilts. There was a problem that the thickness varied.

  Accordingly, an object of the present invention is to suppress variation in the film thickness of the nitride film around the trench due to etching when the trench is deeply excavated to a complete isolation depth, and thereby the film thickness of the element isolation film A method for manufacturing a semiconductor device is provided.

  In order to solve the above-mentioned problems, the invention described in claim 1 includes: (a) a step of forming a plurality of trenches having a partial isolation depth in an SOI substrate having a nitride film formed on the upper surface; and b) each of the above Forming a very thin inner wall oxide film by oxidizing the inner wall of the trench; and (c) exposing a specific trench among the trenches and filling the remaining trenches on the SOI substrate. Forming a resist; and (d) etching the bottom of the specific trench using the resist as a mask to dig the specific trench to a complete isolation depth.

  According to the first aspect of the present invention, since the inner wall oxide film of each trench is formed in an extremely thin film shape, it can be quickly removed by etching. Therefore, when the bottom of a specific trench is etched by using a resist as a mask as in this embodiment to deepen the specific trench to a complete isolation depth, the inner wall on the bottom of the specific trench is etched. Even if the oxide film is removed together, the specific trench can be deepened to the depth of complete isolation quickly, so that the nitride film around the specific trench is scraped by the etching (that is, variations in the film thickness of the nitride film). ), And thereby variation in the thickness of the element isolation film can be suppressed.

Embodiment 1 FIG.
The method of manufacturing a semiconductor device according to this embodiment relates to a process for forming an element isolation film of an SOI device including two types of element isolation films, a partial isolation film and a complete isolation film.

  Here, for example, a case where an element isolation film of an SOI device having the structure of FIGS. 17 to 20 is formed will be described. That is, in this SOI device, as shown in FIGS. 17 to 20, the buried oxide film 3 is formed on the semiconductor substrate 1, and the SOI layer 5 and the complete isolation film 23 a are formed so as to surround the SOI layer 5. (FIGS. 18 and 19). A partial separation film 23b is formed on a part of the SOI layer 5 so as to be connected to the complete separation film 23a (FIGS. 18 and 20). A source s and a drain d are formed on the surface layer of the SOI layer 5, a gate g is formed on the SOI layer 5 via a gate oxide film gm, and a sidewall 6 is formed on the side surfaces of the gate g and the gate oxide film gm. (FIGS. 18 and 19). Then, an insulating film 8 is formed so as to cover each part, and wiring layers 10a, 10b, 10c, 10d (FIGS. 18 and 19) are formed on the insulating film 8, and the wiring layers 10a, 10b, 10c, Contacts ca, cb, cc, and cd that electrically connect 10d and the respective portions 5, g, s, and d are formed in the insulating film 8.

  A method for manufacturing the semiconductor device of this embodiment will be described below.

  First, as shown in FIG. 1, an SOI substrate 11 is prepared in which a buried oxide film 3, an SOI layer 5, an oxide film (here SiO2 film) 7, and a polysilicon layer 9 are formed in this order on a semiconductor substrate (here, a silicon substrate) 1. To do. Then, a nitride film (here, SiN film) 13 is formed on the SOI substrate 11, and a resist 15 is formed thereon by patterning so as to expose a region for forming a trench.

  Then, as shown in FIG. 2, the SOI substrate 11 is etched using the resist 15 as a mask to form a plurality of trenches 17 having a partial isolation depth (that is, a depth up to the middle of the SOI layer 5). After removing the resist 15, the inner wall of each trench 17 (more specifically, the exposed surface of the SOI layer 5) is heat-treated at a low temperature (100 to 700 ° C.) for a short time (several seconds (for example, 5 to 120 seconds)). As a result, the inner wall oxide film 19 having an extremely thin film shape (for example, 5 to 50 nm) is formed on the inner wall of each trench 17.

  As a method for forming the inner wall oxide film 19, the inner wall oxide film 19 may be formed by wet treatment using an oxidizing chemical solution (for example, hydrogen peroxide solution) or plasma oxidation by a plasma process in addition to the above heat treatment. When removing the resist 15 by, for example, a plasma process, the removal of the resist 15 and the formation of the inner wall oxide film 19 can be simultaneously performed by the plasma process.

  Then, as shown in FIG. 3, the SOI substrate 11 is formed such that a specific trench (trench for complete isolation) 17a of each trench 17 is exposed and the remaining trench (trench for partial isolation) 17b is filled. A resist 21 is formed thereon.

  Then, as shown in FIG. 4, using the resist 21 as a mask, the bottom of the specific trench 17a (that is, the inner wall oxide film 19 on the bottom and the SOI layer 5 directly below the bottom) is etched to completely isolate the specific trench 17a. Deep digging is performed to a depth (that is, a depth reaching the buried oxide film 3).

  In this etching, the inner wall oxide film 19 on the bottom of the specific trench 17a and the SOI layer 5 just below the bottom are removed, and an unmasked portion of the nitride film 13 (in the periphery of the specific trench 17a). The existing portion) 13a (FIG. 3) is also cut to some extent. However, in this embodiment, since the inner wall oxide film 19 is formed in an extremely thin film shape, the specific trench 17a is quickly deepened to the depth of complete isolation, and as a result, the portion 13a of the nitride film 13 is Compared with the conventional manufacturing method, the etching is not so much shaved. Therefore, the variation D (FIG. 4) of the nitride film 13 around the specific trench 17a is suppressed as compared with the conventional manufacturing method.

  Thereafter, as in the prior art, the resist 21 is removed and the HDP oxide film (element isolation film) 23 is formed on the SOI substrate 11 so as to fill the trenches 17 as shown in FIG. Then, as shown in FIG. 6, the HDP oxide film 23 is planarized by, for example, CMP using the nitride film 13 on the SOI substrate 11 as a stopper to form an element isolation film 23 (that is, the trench 17b used for partial isolation has a partial The isolation film 23b is formed, and the complete isolation film 23a is formed in the trench 17a for complete isolation).

  In the complete separation film 23a formed in this way, the film thickness variation D of the nitride film 13 around the specific trench 17a is suppressed as described above. Variation is suppressed. The partial isolation film 23b does not vary in film thickness since the nitride film 13 around the remaining trench 17b does not vary in thickness.

  According to the manufacturing method of the semiconductor device described above, the inner wall oxide film 19 of each trench 17 is formed in an extremely thin film shape (for example, 5 to 50 nm) and can be quickly removed by etching. Therefore, when the bottom of the specific trench 17a is etched by using the resist 21 as a mask as in this embodiment and the specific trench 17a is dug to a complete isolation depth, the etching of the specific trench 17a Even if the inner wall oxide film 19 on the bottom is removed together, the specific trench 17a can be quickly deepened to the depth of complete isolation, so that the nitride film 13 around the specific trench 17a is scraped by the etching ( That is, the variation D (FIG. 4) in the film thickness of the nitride film 13 can be suppressed, and thereby the variation in the film thickness of the element isolation film 23 can be suppressed.

  Further, since the inner wall oxide film 19 is formed on the inner wall of each trench 17, it is possible to prevent the impurities in the resist 21 from diffusing into the SOI layer 5 and to prevent the device reliability from deteriorating.

  Further, since the inner wall oxide film 19 is formed in each trench 17 by heat treatment, plasma oxidation by a plasma process, or wet processing using an oxidizing chemical solution, the inner wall oxide film 19 can be formed in each trench 17 by a simple method.

Embodiment 2. FIG.
In the first embodiment, the inner wall oxide film 19 is formed into an extremely thin film shape so that the specific trench 17a can be quickly deepened to the depth of complete separation during etching (therefore, the nitride film 13 is formed). In this embodiment, the inner wall oxide film 19 is removed before the etching, instead of making the inner wall oxide film 19 into an extremely thin film. Then, the specific trench 17a is quickly deepened to the depth of complete isolation (so that the nitride film 13 is not greatly etched by etching). Hereinafter, a method for manufacturing the semiconductor device of this embodiment will be described in detail.

  First, as shown in FIG. 3, a nitride film 13 is formed on the SOI substrate 11 and a plurality of trenches 17 having a partial isolation depth are formed on the SOI substrate 11 as in the case of the first embodiment. Then, an inner wall oxide film 19 is formed, and a resist 21 is formed on the SOI substrate 11 so as to expose a specific trench 17a and fill the remaining trench 17b. Here, the inner wall oxide film 19 does not necessarily need to be an extremely thin film, and is formed to have a conventional film thickness, for example.

  Then, as shown in FIG. 7, the inner wall oxide film 19 of the specific trench 17a is removed by wet processing using a hydrogen fluoride chemical solution (for example, hydrogen fluoride water) using the resist 21 as a mask.

  Then, as shown in FIG. 8, using the resist 21 as a mask, the bottom of the specific trench 17a (that is, the SOI layer 5 directly below the bottom) is etched (here, etched by anisotropic dry etching) to form the specific trench 17a. Deep digging is performed to the depth of complete separation (that is, the depth reaching the buried oxide film 3).

  In this etching, the bottom portion of the specific trench 17a (that is, the SOI layer 5 immediately below the bottom portion) is removed, and the non-masked portion of the nitride film 13 (the portion around the specific trench 17a) ) 13a is also cut to some extent. However, in this embodiment, since the inner wall oxide film 19 is removed before the etching, the specific trench 17a is immediately deepened to the depth of complete isolation, and as a result, the portion 13a of the nitride film 13 is obtained. Compared with the conventional manufacturing method, it is not much shaved by etching. Therefore, the variation D (FIG. 8) of the nitride film 13 around the specific trench 17a is suppressed as compared with the conventional manufacturing method.

  Then, as in the case of the first embodiment, the resist 21 is removed, and an HDP oxide film (element isolation film) 23 is formed on the SOI substrate 11 so as to fill each trench 17 (FIG. 5). The HDP oxide film 23 is planarized by CMP using the nitride film 13 on the SOI substrate 11 as a stopper to form an element isolation film 23 (FIG. 6).

  In the complete separation film 23a formed in this way, the film thickness variation D of the nitride film 13 around the specific trench 17a is suppressed as described above. Variation is suppressed. The partial isolation film 23b does not vary in film thickness since the nitride film 13 around the remaining trench 17b does not vary in thickness.

  According to the semiconductor device manufacturing method described above, at least a portion of the inner wall oxide film 19 on the bottom portion is removed before etching the bottom portion of the specific trench 17a. It is possible to dig deeply to the depth of complete separation, so that even if the bottom of the specific trench 17a is etched using the resist 21 as a mask and deepened to the depth of complete separation as in this embodiment, Scraping due to etching of the nitride film 13 around the trench 17a (that is, variation in film thickness D of the nitride film 13) can be suppressed, and thereby variation in film thickness of the element isolation film 23 can be suppressed.

  Further, since the inner wall oxide film 19 of the specific trench 17a is removed by wet processing using a hydrogen fluoride chemical solution, the inner wall oxide film 19 of the specific trench 17a can be removed by a simple method.

  Further, since the anisotropic dry etching is used for the etching of the bottom of the specific trench 17a, the entire inner wall oxide film 19 of the specific trench 17a (that is, the inner wall oxide film 19 on the bottom of the trench) is used as in this embodiment. In addition to the removal of the inner wall oxide film 19 on the inner surface of the trench, the specific trench 17a can be deepened to a complete isolation depth without increasing the lateral width.

  In this embodiment, anisotropic dry etching is used to etch the bottom of the specific trench 17a. However, when the lateral width of the specific trench 17a may be expanded by etching, wet etching is performed. You may use.

Embodiment 3 FIG.
In the second embodiment, when the bottom portion of the specific trench 17a is etched, anisotropic dry etching is used so that the bottom portion of the specific trench 17a can be completely separated without increasing the lateral width of the trench 17a. In this embodiment, the bottom of the specific trench 17a can be deepened to a complete isolation depth without increasing the lateral width of the trench 17a by using isotropic wet etching. To do.

  In the second embodiment, when the bottom portion of the specific trench 17a is etched, the remaining trench 17b is covered with the resist 21 so that the bottom portion of the remaining trench 17b is not etched. The resist 21 is not required by using the one that selectively etches the silicon layer as the isotropic wet etching. Hereinafter, a method for manufacturing the semiconductor device of this embodiment will be described in detail.

  First, as shown in FIG. 9, the nitride film 13 is formed on the SOI substrate 11 and a plurality of trenches 17 having a partial isolation depth are formed on the SOI substrate 11 in the same manner as in the second embodiment, and the inner wall of each trench 17 is formed. Is oxidized to form an inner wall oxide film 19. Then, an oxide film (here, SiO 2 film) 25 is formed on the SOI substrate 11 by, for example, a CVD method so as to cover the inner wall of each trench 17 and the nitride film 13, and a specific one of the trenches 17 is formed thereon. A resist 27 is formed so as to expose the trench 17a and fill the remaining trench 17b.

  Then, as shown in FIG. 10, the oxide film 25 is etched using the resist 27 as a mask (for example, wet etching using a hydrogen fluoride chemical such as hydrogen fluoride water). The portion on the bottom of the specific trench 17a is removed, leaving the masked portion 25t and the portion 25s on the inner surface of the specific trench 17a. Then, the resist 27 is removed.

  Then, as shown in FIG. 11, the SOI substrate 11 is wet-treated using, for example, a hydrogen fluoride chemical solution (for example, hydrogen fluoride water). By this wet treatment, the inner wall oxide film 19 of each trench 17 is etched using the oxide films 25s and 25t as a mask, and the entire inner wall oxide film 19 of the remaining trench 17b and the inner wall oxide film 19 of the specific trench 17a The portion of the inner wall oxide film 19 of the specific trench 17b is removed while the portion 19s on the inner surface of the trench is left, and the oxide films 25s and 25t are all removed.

  Then, as shown in FIG. 12, the SOI substrate 11 is wet-treated using an alkaline chemical solution (for example, potassium hydroxide). By this wet treatment, each trench 17 is etched with the inner wall oxide film 19 as a mask, and only the bottom of the specific trench 17a (that is, the exposed SOI layer 5) is etched away, and only the specific trench 17a is completely separated. Deep digging to the depth.

  In this wet process (etching), the bottom of the specific trench 17a (exposed SOI layer 5) is removed by etching, and the nitride film 13 is also cut to some extent. However, in this embodiment, since the resist 21 is not formed on the SOI substrate 11 as in the first embodiment during the wet process, the entire nitride film 13 is evenly cut by the wet process. . Therefore, the thickness of the nitride film 13 does not vary.

  Then, as in the conventional case, an HDP oxide film (element isolation film) 23 is formed on the SOI substrate 11 so as to fill each trench 17 (FIG. 5), and the nitride film 13 on the SOI substrate 11 is stoppered. Then, the HDP oxide film 23 is planarized by CMP to form the element isolation film 23 (FIG. 6).

  In the element isolation film 23 formed in this way, since the film thickness of the nitride film 13 is not varied as described above, the film thickness is not varied (that is, the film thickness variation is compared with the conventional manufacturing method). Is suppressed).

  According to the semiconductor device manufacturing method described above, of the inner wall oxide film 19 of each trench 17, the inner wall oxide film 19 on the inner side surface of the specific trench 17 a and the entire inner wall oxide film 19 of the remaining trench 17 b are combined. Only the inner wall oxide film 19 on the bottom of the specific trench 17a is removed, and each trench 17 is etched with the remaining inner wall oxide film as a mask to deepen only the specific trench 17a to a complete isolation depth. Therefore, when etching the bottom of the specific trench 17, only the specific trench 17a can be deeply deepened without using the resist 21 of the second embodiment. Therefore, since the resist 21 is not used, it is possible to suppress variation in the thickness of the nitride film 13 around the specific trench 17a due to the etching of the bottom of the specific trench 17a. The variation of can be suppressed.

  Further, in the specific trench 17a, the inner wall oxide film 19 on the inner side surface is left and only the inner wall oxide film 19 on the bottom is removed, so that the specific trench 17a can be formed even if isotropic wet etching is used. It is possible to dig deep to the depth of complete separation without expanding the width.

  Further, since wet etching using an alkaline chemical is used as silicon etching, silicon etching can be performed appropriately.

Embodiment 4 FIG.
In the first embodiment, the inner wall oxide film 19 is formed into an extremely thin film shape so that the specific trench 17a can be quickly deepened to the depth of complete separation during etching (therefore, the nitride film 13 is formed). However, in this embodiment, instead of making the inner wall oxide film 19 extremely thin, impurity ions are implanted into the inner wall oxide film 19 to increase the etching rate. During the etching, the specific trench 17a is quickly deepened to the depth of complete isolation (thus preventing the nitride film 13 from being etched much). Hereinafter, a method for manufacturing the semiconductor device of this embodiment will be described in detail.

  First, as shown in FIG. 13, the nitride film 13 is formed on the SOI substrate 11 and a plurality of trenches 17 having a partial isolation depth are formed on the SOI substrate 11 in the same manner as in the first embodiment, and the inner wall of each trench 17 is formed. Then, an inner wall oxide film 19 is formed, and a resist 21 is formed on the SOI substrate 11 so as to expose a specific trench 17a and fill the remaining trench 17b. Here, the inner wall oxide film 19 does not need to be an extremely thin film, and is formed to have a conventional film thickness, for example.

  Then, impurity ions are selectively implanted into the inner wall oxide film 19 of the specific trench 17a so that the etching rate of the inner wall oxide film 19 is increased. The ions at this time may be B, P, As, In or the like, or inert ions such as N or Si. Further, the dose amount at the time of this implantation may be 1 × 10 14 / cm or more.

  Then, using the resist 21 as a mask, the bottom portion of the specific trench 17a (that is, the inner wall oxide film 19 on the bottom portion and the SOI layer 5 directly below the bottom portion) is etched (for example, etched by anisotropic dry etching). The trench 17a is dug to the depth of complete separation.

  In this etching, the inner wall oxide film 19 on the bottom of the specific trench 17a and the SOI layer 5 just below the bottom are removed, and an unmasked portion of the nitride film 13 (in the periphery of the specific trench 17a). The existing part) 13a is also cut to some extent. However, in this embodiment, since the etching rate of the inner wall oxide film 19 of the specific trench 17a is increased, the specific trench 17a is immediately deepened to the depth of complete isolation, and as a result, the nitride film 13 The portion 13a is not sharpened as compared with the conventional manufacturing method. Therefore, the variation of the nitride film 13 around the specific trench 17a is suppressed as compared with the conventional manufacturing method.

  Then, as in the case of the first embodiment, the resist 21 is removed, and an HDP oxide film (element isolation film) 23 is formed on the SOI substrate 11 so as to fill each trench 17 (FIG. 5). The HDP oxide film 23 is planarized by CMP using the nitride film 13 on the SOI substrate 11 as a stopper to form an element isolation film 23 (FIG. 6).

  According to the manufacturing method of the semiconductor device described above, the inner wall oxide film 19 of the specific trench 17a can be quickly removed by etching because impurity ions are selectively implanted and the etching rate is increased. Therefore, when the bottom of the specific trench 17a is etched by using the resist 21 as a mask as in this embodiment and the specific trench 17a is deepened to a complete isolation depth, the bottom of the specific trench 17a is etched by the etching. Even if the upper inner wall oxide film 19 is removed together, the specific trench 17a can be quickly deepened to the depth of complete isolation, so that the nitride film 13 around the specific trench 17a is etched away (that is, nitrided). Variation in film thickness of the film 13), and thereby variation in film thickness of the element isolation film 23 can be suppressed.

  In this embodiment, the inner wall oxide film 19 is etched by dry etching, but the inner wall oxide film 19 may be etched by wet etching. In the case of wet etching, as in the case of dry etching, variations in the film thickness of the element isolation film 23 can be suppressed.

Embodiment 5. FIG.
In the second embodiment, the inner wall oxide film 19 of the specific trench 17a is completely removed. However, in this embodiment, the inner wall oxide film 19 of the specific trench 17a is left on the inner side surface of the trench. The part on the bottom of the trench is removed.

  Hereinafter, a method for manufacturing the semiconductor device of this embodiment will be described in detail.

  First, as shown in FIG. 14, the nitride film 13 is formed on the SOI substrate 11 in the same manner as in the first embodiment, and a plurality of trenches 17 having a partial isolation depth are formed. Is oxidized to form an inner wall oxide film 19. Then, a nitride film (here, SiN film) 29 is formed on the SOI substrate 11 so as to cover the inner wall of each trench 17 and the nitride film 13.

  Then, as shown in FIG. 15, the SOI substrate 11 is etched by anisotropic etching to form a sidewall 29 a made of the nitride film 29 on the inner wall of each trench 17 and the inner wall oxide film 19 on the bottom of each trench 17. The portion not covered with the side wall 29a is removed. Then, a resist 21 is formed on the SOI substrate 11 so that a specific trench 17a of each trench 17 is exposed and the remaining trenches 17b are filled.

  Then, as shown in FIG. 16, the bottom of the specific trench 17a is etched using the resist 21 as a mask, and the specific trench 17a is deeply digged to a complete isolation depth.

  In this etching, the bottom portion of the specific trench 17a (that is, the SOI layer 5 immediately below the bottom portion) is removed, and the non-masked portion of the nitride film 13 (the portion around the specific trench 17a) ) 13a is also cut to some extent. However, in this embodiment, since the inner wall oxide film 19 on the bottom of the trench is removed before the etching, the specific trench 17a is quickly deepened to the depth of complete isolation, and as a result, the nitride film The portion 13a of 13 is not much etched by etching as compared with the conventional manufacturing method. Therefore, the variation D (FIG. 16) of the nitride film 13 around the specific trench 17a is suppressed as compared with the conventional manufacturing method.

  Then, in the same manner as in the first embodiment, the resist 21 is removed, and the HDP oxide film (element isolation film) 23 is formed on the SOI substrate 11 so as to fill the trenches 17. The HDP oxide film 23 is planarized by CMP using the nitride film 13 on the stopper 11 as a stopper to form an element isolation film 23.

  According to the semiconductor device manufacturing method described above, the portion of the inner wall oxide film 19 of the specific trench 17a on the bottom of the trench is removed before the etching of the bottom of the specific trench 17a. The specific trench 17a can be quickly deepened to the depth of complete isolation, and as a result, the bottom of the specific trench 17a is etched to the depth of complete isolation by using the resist 21 as a mask as in this embodiment. Even in this case, etching due to the etching of the nitride film 13 around the specific trench 17a (that is, variation in the thickness D of the nitride film 13) can be suppressed, and thereby variation in the thickness of the element isolation film 23 can be suppressed.

  Further, by forming a sidewall 29a on the inner side surface of each trench 17 after the inner wall oxide film 19 is formed, a portion of the inner wall oxide film 19 of each trench 17 (and hence the specific trench 17a) on the inner side surface of the trench is formed. Since the portion on the bottom of the trench is removed, the portion on the inner surface of the trench in the inner wall oxide film 19 of each trench 17 (and thus the specific trench 17a) can be easily obtained using the formation process of the sidewall 29a. The part on the bottom of the trench can be removed.

  In this manufacturing method, not only the inner wall oxide film 19 on the bottom of a specific trench (ie, a trench for complete isolation) 17a but also the inner wall oxide film on the bottom of the remaining trench (ie, a trench for partial isolation) 17b. 19 is also removed, but the inner wall oxide film 19 remains on the corners of the bottom of each trench 17 (remaining trench 17b) by forming the sidewall 29a on the inner surface of each trench 17. Therefore, even if the source s / drain d of the transistor is arranged near the corner of the partial isolation film 23b as shown in FIG. 21, the inner wall oxide film 19 remains at the corner as described above. Even if the inner wall oxide film 19 is not present in the portion other than the corner of the bottom of the partial isolation film 23b (and hence the bottom of the remaining trench 17b) as in this embodiment, the transistor characteristics are not deteriorated.

  FIG. 21 is an example of a cross-sectional view of an SOI device when the semiconductor device manufacturing method of this embodiment is used. Reference numeral 3 in FIG. 21 denotes a buried oxide film, reference numeral 5 denotes an SOI layer, and reference numeral gm. Is a gate oxide film, symbol g is a gate, symbol 6 is a sidewall, symbol 8 is an insulating film 8, symbols 10c and 10d are wiring layers, and symbols cc and cd are contacts.

FIG. 6 is a diagram showing an example of a state in which a resist is formed by patterning on a nitride film in the method for manufacturing a semiconductor device according to the first embodiment. FIG. 6 is an example of a state in which a plurality of trenches having a partial isolation depth are formed on an SOI substrate in the method of manufacturing a semiconductor device according to the first embodiment; In the method of manufacturing the semiconductor device according to the first embodiment, an inner wall oxide film is formed on the inner wall of each trench, and a resist is formed on the SOI substrate so as to expose the specific trench and cover the remaining trench. It is an example figure. FIG. 6 is an example of a state in which the bottom of a specific trench is etched using a resist as a mask and the specific trench is deepened to a complete isolation depth in the method of manufacturing a semiconductor device according to the first embodiment. FIG. 6 is an example of a state in which an HDP oxide film is deposited on an SOI substrate so as to fill each trench in the method of manufacturing a semiconductor device according to the first embodiment; 6 is an example of a state in which the HDP oxide film is flattened using the nitride film as a stopper in the semiconductor device manufacturing method of the first embodiment; FIG. FIG. 10 is an example of a state where an inner wall oxide film of a specific transistor is removed using a resist as a mask in the method of manufacturing a semiconductor device according to the second embodiment; In the manufacturing method of the semiconductor device of Embodiment 2, it is an example figure of the state which etched the bottom part of the specific transistor using the resist as a mask, and was dug to the depth of perfect isolation. In the manufacturing method of the semiconductor device of Embodiment 3, it is an example figure in which the resist was formed on the oxide film so that the specific trench was exposed and the remaining trench was covered. An example of a state in which a part on the bottom of a specific trench is removed while leaving a part masked with a resist and a part on the inner side surface of the specific trench in the method of manufacturing a semiconductor device of the third embodiment FIG. In the manufacturing method of the semiconductor device of Embodiment 3, it is an example figure in which the oxide film was removed while it was etched using the oxide film as a mask to remove the inner wall oxide film on the bottom of the specific trench. In the method of manufacturing a semiconductor device according to the third embodiment, an example of a state in which the bottom of a specific trench is silicon etched using an inner wall oxide film as a mask to deepen the specific trench to a complete isolation depth. In the manufacturing method of the semiconductor device of Embodiment 4, it is an example figure in the state which has ion-implanted the impurity ion selectively to the inner wall oxide film of a specific trench. FIG. 16 is an example of a state in which a nitride film is formed on an SOI substrate so as to cover each trench in the method of manufacturing a semiconductor device according to the fifth embodiment. In the method of manufacturing the semiconductor device of the fifth embodiment, a sidewall of the nitride film is formed on the inner side surface of each trench by etching, and is not masked by the side wall of the inner wall oxide film on the bottom of each trench It is an example figure in which the resist was formed so that a part was removed, a specific trench was exposed, and the remaining trench was covered. In the method for manufacturing a semiconductor device of the fifth embodiment, an example of a state in which the bottom of a specific trench is etched using a resist as a mask to deepen the specific trench to a complete isolation depth. 1 is an example of a plan view of an SOI device manufactured by applying the method for manufacturing a semiconductor device of Embodiments 1 to 4. FIG. It is AA sectional drawing of FIG. It is BB sectional drawing of FIG. It is CC sectional drawing of FIG. FIG. 16 is an example of a cross-sectional view of an SOI device manufactured by applying the method for manufacturing a semiconductor device of Embodiment 5;

Explanation of symbols

  1 semiconductor substrate, 3 buried oxide film, 5 SOI layer, 6 sidewall, 7 oxide film, 9 polysilicon layer, 11 SOI substrate, 13 nitride film, 15 resist, 17 trench, 17a specific trench (for a complete isolation film) , 17b remaining trench (trench for partial isolation film), 19 inner wall oxide film, 21 resist, 23 HDP oxide film (element isolation film), 23a complete isolation film, 23b partial isolation film, 25 oxide film ( CVD oxide film), part of 25s oxide film on inner side of trench, part of 25t oxide film masked with first resist, 27 resist, 29 nitride film, 29a sidewall.

Claims (10)

(A) forming a plurality of trenches having a partial isolation depth on an SOI substrate having a nitride film formed on the upper surface;
(B) oxidizing the inner wall of each of the trenches to form an extremely thin inner wall oxide film;
(C) forming a resist on the SOI substrate so as to expose a specific one of the trenches and fill the remaining trenches;
(D) etching the bottom of the specific trench using the resist as a mask to dig the specific trench to a depth of complete isolation;
A method for manufacturing a semiconductor device, comprising:   2. The method of manufacturing a semiconductor device according to claim 1, wherein in the step (b), the inner wall oxide film is formed on the inner wall of each trench by a heat treatment at a temperature of 100 to 700 ° C. 3.   2. The method of manufacturing a semiconductor device according to claim 1, wherein in the step (b), the inner wall oxide film is formed on the inner wall of each trench by a plasma process.   2. The method of manufacturing a semiconductor device according to claim 1, wherein, in the step (b), the inner wall oxide film is formed on the inner wall of each trench by a wet process using an oxidizing chemical solution. (A) forming a plurality of trenches having a partial isolation depth on an SOI substrate having a nitride film formed on the upper surface;
(B) oxidizing the inner wall of each trench to form an inner wall oxide film;
(C) forming a resist on the SOI substrate so as to expose a specific one of the trenches and fill the remaining trenches;
(D) after the step (c), removing at least a portion of the inner wall oxide film of the specific trench on the bottom of the trench;
(E) After the step (d), etching the bottom of the specific trench using the resist as a mask to dig the specific trench to a complete isolation depth;
A method for manufacturing a semiconductor device, comprising:   6. The method of manufacturing a semiconductor device according to claim 5, wherein in the step (d), the inner wall oxide film of the specific trench is removed by wet treatment using a hydrogen fluoride chemical solution.   6. The method of manufacturing a semiconductor device according to claim 5, wherein, in the step (e), the specific trench is deepened to a complete isolation depth by anisotropic dry etching. (A) forming a plurality of trenches having a partial isolation depth on an SOI substrate having a nitride film formed on the upper surface;
(B) oxidizing the inner wall of each trench to form an inner wall oxide film;
(C) after the step (b), forming an oxide film on the SOI substrate so as to cover the inner wall of each trench and the nitride film;
(D) forming a resist on the oxide film so as to expose a specific one of the trenches and fill the remaining trenches;
(E) Etching the oxide film using the resist as a mask to leave a portion of the oxide film masked with the resist and a portion on the inner side surface of the specific trench on the bottom of the specific trench Removing the portion of
(F) after the step (e), removing the resist;
(G) After the step (f), the inner wall oxide film of each of the trenches is etched using the oxide film as a mask, and the entire inner wall oxide film of the remaining trench and the inner wall oxidation of the specific trench are Removing a portion on the trench bottom of the inner wall oxide film of the specific trench leaving a portion on the inner surface of the trench in the film, and removing the oxide film;
(H) After the step (g), etching each of the trenches using the inner wall oxide film as a mask to dig only the specific trench to a depth of complete isolation; and
A method for manufacturing a semiconductor device, comprising: (A) forming a plurality of trenches having a partial isolation depth on an SOI substrate having a nitride film formed on the upper surface;
(B) oxidizing the inner wall of each trench to form an inner wall oxide film;
(C) forming a resist on the SOI substrate so as to expose a specific one of the trenches and fill the remaining trenches;
(D) selectively implanting impurity ions into the inner wall oxide film of the specific trench so as to increase the etching rate of the inner wall oxide film;
(E) After the step (d), etching the bottom of the specific trench using the resist as a mask to dig the specific trench to a complete isolation depth;
A method for manufacturing a semiconductor device, comprising: (A) forming a plurality of trenches having a partial isolation depth in an SOI substrate having a first nitride film formed on the upper surface;
(B) oxidizing the inner wall of each trench to form an inner wall oxide film;
(C) depositing a second nitride film on the SOI substrate so as to cover the inner wall of each trench and the first nitride film;
(D) Etching forms a side wall of the second nitride film on the inner side surface of each trench and removes a portion of the inner wall oxide film on the bottom of each trench that is not covered with the side wall. And a process of
(E) forming a resist on the SOI substrate so as to expose a specific one of the trenches and fill the remaining trenches;
(F) etching the bottom of the specific trench using the resist as a mask to dig the specific trench to a depth of complete separation;
A method for manufacturing a semiconductor device, comprising:

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