JP2008172663A - Wireless receiver and wireless reception method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve a problem where electric power is wasted before stabilizing generation of an oscillation signal. <P>SOLUTION: A wireless receiver includes: a designation circuit which designates the frequency of an oscillation signal for processing a signal to be wirelessly received; a PLL circuit which generates the oscillation signal having the designated frequency; an operation switching circuit for selectively switching to a first operation to be performed while the oscillation signal is stabilized, and a second operation which may be performed while the oscillation signal is not stabilized, the second operation consuming lower power smaller than that of the first operation; and a control circuit which sets the operation switching circuit to the second operation during a period of time from the designation of the frequency of the oscillation signal received at the PLL circuit to the stabilization in the generation of the relevant oscillation signal by the PLL circuit, and sets the operation switching circuit to the first operation after stabilizing the generation of the oscillation signal by the PLL circuit. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a mobile phone and a mobile terminal that receive a signal including time information representing the current time transmitted from a base station by spread spectrum communication using a code division multiple access (CDMA) system. The present invention relates to a radio reception apparatus and radio reception method that are various mobile stations.

  In the conventional radio receiving apparatus, a local oscillation signal used for down-conversion is used to frequency-convert the RF band (Radio Frequency) signal received from the base station from the RF band to the base band, that is, down-convert. A PLL (Phase Locked Loop) circuit is generated. When the power of the wireless receiving device is turned on and the generation of the local oscillation signal is started, the PLL circuit replaces the one local oscillation signal having the one frequency currently generated with another frequency. When the generation of another local oscillation signal is started, it takes time until the generation of the local oscillation signal is stabilized.

JP-A-6-85856 JP 2000-175238 A

  However, in the conventional radio receiving apparatus, circuits such as a mixer, a demodulating circuit, and a decoding circuit that can perform their original functions only after the local oscillation signal is stabilized cannot generate the local oscillation signal described above. Although it is sufficient that the power is turned on for the first time or after the stabilization, the power is already turned on before the generation of the local oscillation signal is stabilized. In contrast to the problem of “reducing power consumption”, there is a problem that unnecessary power is consumed during that time.

In order to solve the above-described problems, a wireless reception device and a wireless reception method according to the present invention basically include:
Specify the frequency of the oscillation signal for processing the signal to be received wirelessly,
Generating the oscillating signal having the specified frequency;
The first operation to be performed when the oscillation signal is stable, and the second operation that can be performed when the oscillation signal is not stable, and the power consumption is smaller than the first operation. For the second operation, the second operation is performed during a period from when the designation of the frequency of the oscillation signal is received until the generation of the oscillation signal is stabilized, and after the generation of the oscillation signal is stabilized, the second operation is performed. It is characterized by taking 1 operation.

  According to the radio reception apparatus and radio reception method of the present invention described above, the second operation that consumes less power than the first operation to be performed after the oscillation signal is stabilized before the oscillation signal is stabilized. By taking this, it becomes possible to reduce the power consumption before the oscillation signal is stabilized, as compared to the conventional case where the first operation has already been performed before the oscillation signal is stabilized.

In the above-described radio reception apparatus and radio reception method according to the present invention,
The first operation is any one of low-noise amplification, mixing, variable amplification, band-pass filtering, A / D conversion, demodulation, and decoding performed in cooperation with processing of the wirelessly received signal. Features.

In the above-described radio reception apparatus and radio reception method according to the present invention,
In the second operation, there is no power consumption.

  Embodiments of a wireless reception apparatus according to the present invention will be described with reference to the drawings.

"Constitution"
FIG. 1 illustrates a configuration of a wireless reception apparatus according to an embodiment. The radio receiving apparatus R of the embodiment is a mobile station such as a mobile phone, a mobile terminal, and a wristwatch, for example, and a signal transmitted by a base station (not shown) by a CDMA system under spread spectrum, for example, a base station The pilot signal PI for synchronization between the station and the mobile station and the sync signal SY including time information indicating the current time, in other words, superimposed on the same frequency band by spreading with different spreading codes (not shown). In order to receive the pilot signal PI and the sync signal SY, the antenna 1, the amplifier circuit 2, the mixer 3, the bandpass filter 4 (BPF: Band Pass Filter), and the variable, as shown in FIG. An amplifier circuit 5, an A / D converter 6, a baseband processing circuit 7, a control circuit 8, and a PLL circuit 9 are included.

  The antenna 1 is composed of a passive element such as an inverted F antenna, for example, and receives a pilot signal PI and a sync signal SY transmitted from the base station.

  The amplifier circuit 2 is provided at the subsequent stage of the antenna 1 and is a low noise amplifier circuit made of an active element such as a field effect transistor (FET), for example, and the pilot signal PI and the sink signal SY received by the antenna 1. Is amplified with a predetermined gain (fixed gain).

  The mixer 3 is provided in the subsequent stage of the amplifier circuit 2, and is composed of, for example, active elements such as a diode and a transistor, receives the input of the amplified pilot signal PI and the sink signal SY from the amplifier circuit 2, and The local oscillation signal LO generated by the PLL circuit 9 is input from the PLL circuit 9, and the pilot signal PI and the sync signal SY are multiplied by the pilot signal PI and the sync signal SY and the local oscillation signal LO to generate the RF signal in the RF band. To frequency conversion from baseband to baseband, that is, down-conversion.

  The bandpass filter 4 is provided in the subsequent stage of the mixer 3 and is, for example, an active filter using an operational amplifier or the like. The baseband band pilot signal PI and the sink signal are within the passband of the bandpass filter 4. The SY is passed, and noise outside the passband is not passed, i.e., is blocked.

  The variable amplifier circuit 5 is provided in the subsequent stage of the bandpass filter 4 and is composed of an active element such as a field effect transistor as in the above-described amplifier circuit 2, and the antenna 1 receives the pilot signal PI and the sink signal SY. Regardless of the reception level of the pilot signal PI and the sync signal SY at this time, the pilot signal PI and the sync signal SY are matched with a certain level defined by the specifications of the A / D converter 6 at the subsequent stage. Accordingly, the pilot signal PI and the sync signal SY are amplified with a gain that is appropriately determined by the negative feedback under a negative feedback (not shown).

  The A / D converter 6 is provided in the subsequent stage of the variable amplifier circuit 5 and is composed of active elements such as an operational amplifier and an encoder IC, for example, and performs A / D conversion on the input pilot signal PI and sink signal SY. That is, both the signals PI and SY are converted from an analog format to a digital format.

  The baseband processing circuit 7 is provided at the subsequent stage of the A / D converter 6, and is composed of, for example, an integrated circuit such as an ASIC (Application Specific Integrated Circuit), and the pilot signal PI input to the baseband processing circuit 7. And synchronization signal SY is demodulated by a demodulation circuit (not shown) and decoded by a decoding circuit (not shown), thereby establishing synchronization between the base station and the mobile station as described above. In addition, time information representing the current time is extracted.

  The amplifying circuit 2 to the baseband processing circuit 7 described above are “operation switching circuits”. When the local oscillation signal LO is stable (after being stabilized), each circuit is referred to as a “first operation”. Performs “normal operation” (amplification, mixing, filtering, A / D conversion, baseband processing), and on the other hand, when the local oscillation signal LO is not stable (before stabilization), As the “operation 2”, “low power consumption operation” that consumes less power than the first operation (waiting operation, standby operation, operation under low power consumption similar to the first operation (for example, at low gain) Amplification, filtering with slow band characteristics, A / D conversion at low resolution, baseband processing at low speed), and complete stop of normal operation without power consumption).

  The control circuit 8 that functions as a “designating circuit” and a “control circuit” is provided in the subsequent stage of the baseband processing circuit 7, and includes, for example, a computer circuit including a CPU, a ROM, a RAM, a program, and the like. Control and monitor the overall operation of the receiving device R. For example, prior to establishment of synchronization by the pilot signal PI, the control circuit 8 instructs the PLL circuit 9 to determine the frequency division number N for designating the frequency of the local oscillation signal LO. On the other hand, after establishment of synchronization, From the PLL circuit 9, the fact that the PLL circuit 9 is locked, that is, the fact that the frequency of the local oscillation signal LO is stabilized at a frequency determined by the frequency division number N designated by the control circuit 8 (hereinafter simply referred to as “lock”). In response to the lock detection signal SL, the amplification circuit 2 to the baseband processing circuit 7 are transferred from the “low power consumption operation” to the “amplification circuit 2 to the baseband processing circuit 7”. A control signal SC for switching to “normal operation” is output. On the other hand, the control circuit 8 extracts time information indicating the current time from the sync signal SY received from the baseband processing circuit 7, and causes a clock circuit (not shown) to perform time adjustment based on the time information.

  The PLL circuit 9 functioning as a “PLL circuit” includes a frequency divider 9A, a reference oscillator 9B, a phase comparator 9C, a low pass filter (LPF) 9D, and a voltage controlled oscillator (VCO: Voltage). Controlled Oscillator) 9E. The frequency divider 9A divides the local oscillation signal LO generated by the voltage controlled oscillator 9E based on the frequency division number N specified by the control circuit 8. The phase comparator 9C performs phase comparison between the frequency-divided signal SD output from the frequency divider 9A and the reference oscillation signal SR generated by the reference oscillator 9B, and as a result, a phase difference signal representing the phase difference. SP is output. The low-pass filter 9D integrates (smooths) the phase difference signal SP to output an integrated phase difference signal SI that is an integrated phase difference signal SP. The voltage controlled oscillator 9E generates a local oscillation signal LO corresponding to the integral phase difference signal SI, and outputs the local oscillation signal LO to the mixer 3 and the frequency divider 9A. Thereafter, the frequency division by the frequency divider 9A, the smoothing by the phase comparator 9C and the low-pass filter 9D, and the generation of the local oscillation signal LO by the voltage controlled oscillator 9E are cyclically performed as described above.

<Operation>
FIG. 2 is a flowchart illustrating the operation of the wireless reception device according to the embodiment. FIG. 3 is a graph illustrating the operation of the wireless reception device according to the embodiment. Hereinafter, the operation of the wireless reception apparatus according to the embodiment will be described with reference to the flowchart of FIG. 2 and the graph of FIG.

  Step S1: At time t1 shown in FIG. 3, the power of the wireless receiver R as a whole is not turned on, and the amplifier 2 to the baseband processing circuit 7 are in “low power consumption operation”. When power is turned on and a new generation of the local oscillation signal LO having the frequency f1 is started, or the radio receiver R as a whole is turned on, the amplifier circuit 2 to the baseband processing circuit 7 When the radio receiving device R in the “low power consumption operation” tries to start generating the local oscillation signal LO having the frequency f1 again instead of generating the local oscillation signal LO having the frequency f0, the control circuit 8 notifies the PLL circuit 9 of the frequency division number N1 corresponding to the frequency f1 in order to newly or newly set the frequency of the local oscillation signal LO, for example, to set the frequency f1. , That is, to specify the frequency division number N1.

  Step S2: In the PLL circuit 9, upon receiving the frequency division number N1 from the control circuit 8, the frequency divider 9A divides the local oscillation signal LO output from the voltage controlled oscillator 9E by the frequency division number N1. The frequency-divided signal SD that is 1 / N1 of the local oscillation signal LO is output.

  Step S3: The phase comparator 9C performs phase comparison between the frequency-divided signal SD output from the frequency divider 9A and the reference oscillation signal SR generated by the reference oscillator 9B, and outputs a phase difference signal SP indicating the phase difference. .

  Step S4: As shown in FIG. 3, the phase comparator 9C determines whether the frequency shift of the local oscillation signal LO has converged within a predetermined range, that is, whether the frequency of the local oscillation signal LO has been stabilized. Judging.

  Step S5: Regardless of whether or not the generation of the local oscillation signal LO is stable, the low-pass filter 9D performs integration on the phase difference signal SP to output an integrated phase difference signal SI.

  Step S6: Upon receiving the integral phase difference signal SI, the voltage controlled oscillator 9E generates a local oscillation signal LO according to the integral phase difference signal SI. When receiving the input of the local oscillation signal LO, the frequency divider 9A newly outputs the frequency-divided signal SD in the same manner as in step S2. Thereafter, regardless of whether or not the PLL circuit 9 is locked, the steps S2 to S6 are sequentially repeated, thereby trying to stabilize the frequency of the local oscillation signal LO little by little as shown in FIG. To do.

  Step S7: When the frequency of the local oscillation signal LO is stabilized, at time t2 shown in FIG. 3, the phase comparator 9C indicates that the generation of the local oscillation signal LO is stable, that is, the PLL circuit 9 is “locked”. A lock detection signal SL indicating that is output to the control circuit 8.

  Step S8: Upon receiving the lock detection signal SL indicating “lock”, the control circuit 8 instructs the amplifier circuit 2 to the baseband processing circuit 7 to switch from “low power consumption operation” to “normal operation”. By outputting the control signal SC to be performed, the “normal operation” is started in the amplifier circuit 2 to the baseband processing circuit 7. As a result, the amplification circuit 2 to the baseband processing circuit 7 should each perform instead of “low power consumption operation” (waiting operation, standby operation, operation similar to the first operation under low power consumption). Start “normal operation” (amplification, mixing, filtering, A / D conversion, baseband processing).

"effect"
As described above, in the wireless reception device R according to the embodiment, the control circuit 8 should perform after the generation of the local oscillation signal LO is stabilized before the generation of the local oscillation signal LO by the PLL circuit 9 is stabilized. Since the “low power consumption operation”, which consumes less power than the “normal operation”, is performed, the amplifier circuit 2 to the base can be used even before the generation of the local oscillation signal LO is stabilized, as in the case of a conventional wireless receiver. As compared with the case where the band processing circuit 7 performs the “normal operation”, the power consumption can be reduced.

The figure which shows the structure of the radio | wireless receiving apparatus of an Example. The flowchart which shows operation | movement of the radio | wireless receiver of an Example. The graph which shows operation | movement of the radio | wireless receiver of an Example.

Explanation of symbols

  R: wireless receiver, 1 ... antenna, 2 ... amplifier circuit, 3 ... mixer, 4 ... band filter, 5 ... variable amplifier circuit, 6 ... A / D converter, 7 ... baseband processing circuit, 8 ... control circuit, 9: PLL circuit.

Claims (6)

A designating circuit for designating a frequency of an oscillation signal for processing a signal to be wirelessly received;
A PLL circuit for generating the oscillation signal having the designated frequency;
The first operation to be performed when the oscillation signal is stable, and the second operation that can be performed when the oscillation signal is not stable, and the power consumption is smaller than the first operation. An operation switching circuit that selectively switches to the operation of 2.
The operation switching circuit is set to the second operation for a period from when the PLL circuit receives the designation of the frequency of the oscillation signal until the generation of the oscillation signal by the PLL circuit is stabilized, and the PLL circuit And a control circuit that sets the operation switching circuit to the first operation after the generation of the oscillation signal by is stabilized.   The operation switching circuit is one of a low-noise amplifier circuit, a mixer, a variable amplifier circuit, a bandpass filter, an A / D converter, a demodulator circuit, and a decoder circuit, which performs the processing of the wirelessly received signal in cooperation. The wireless receiver according to claim 1, wherein   The radio reception apparatus according to claim 1, wherein the operation switching circuit does not have the power consumption in the second operation. A designation step for designating a frequency of an oscillation signal for processing a signal to be wirelessly received;
Generating the oscillation signal having the designated frequency;
The first operation to be performed when the oscillation signal is stable, and the second operation that can be performed when the oscillation signal is not stable, and the power consumption is smaller than the first operation. An operation switching step of selectively switching to the operation of 2;
In a period from when the designation of the frequency of the oscillation signal is received until the generation of the oscillation signal is stabilized, the operation switching step is set to the second operation, and after the generation of the oscillation signal is stabilized, And a control step of setting an operation switching step to the first operation.   The operation switching step includes a low noise amplification step, a mixing step, a variable amplification step, a band filtering step, an A / D conversion step, a demodulation step, and a decoding step, which are performed in cooperation with the processing of the signal to be wirelessly received. The wireless reception method according to claim 4, wherein the wireless reception method is any one.   5. The wireless reception method according to claim 4, wherein the operation switching step has no power consumption in the second operation.

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