JP2008153330A - Nitride semiconductor high electron mobility transistor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an HEMT of embedded-gate type enhanced mode which does not accompany degradation in source resistance and drain current. <P>SOLUTION: A GaN-HEMT comprises a GaN channel layer 22; an AlGaN barrier layer 24 which is hetero-jointed on the GaN channel layer 22; a recess 26 of specified depth that is formed in a gate region on the upper surface of the AlGaN barrier layer 24; an i-GaN selecting regrown layer 27, which is selectively re-grown to the recess 26 and fitted to the inside wall surface of the recess 26; a gate electrode 40 for filling the recess 26 via the i-GaN selecting re-grown layer 27; and a source electrode 41 and a drain electrode 42 formed on both the sides of the gate electrode, at a specified interval. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to gallium nitride (GaN) among high electron mobility transistors (hereinafter referred to as “HEMT”), which is one of field effect transistors (hereinafter referred to as “FET”). In a nitride semiconductor HEMT such as a GaN-based HEMT (hereinafter referred to as “GaN-HEMT”) using a nitride semiconductor such as, for example, even if a drain voltage is applied when the gate voltage is zero, a source electrode / drain electrode The present invention relates to an enhancement mode (normally off type) nitride semiconductor HEMT in which no current flows between them.

  Among FETs, for example, GaN-HEMTs in which gallium aluminum nitride (AlGaN) and GaN are heterojunction are difficult to be normally off. A cross-sectional structure of a normal GaN-HEMT is shown in FIG.

  2A and 2B are views showing a typical schematic cross-sectional structure of a conventional GaN-HEMT. FIG. 2A is an overall cross-sectional view, and FIG. It is an expanded sectional view of H section in figure (a).

This GaN-HEMT is an element formed on a GaN channel layer 2 that is an electron transit layer separated by an insulating element isolation region 1. On the GaN channel layer 2, an AlGaN barrier layer 4, which is an electron supply layer, is heterojunction via a hetero interface 3. AlGaN barrier layer 4, for _example, Al _X Ga ₁ - is formed by X N (X = 0.25), a thickness of 250 Å (= 25 nm) approximately. A silicon nitride (SiN) dielectric film 5 is formed on the AlGaN barrier layer 4, and an opening 5 a having a width Lg is formed in the gate formation region of the SiN dielectric film 5.

  On the AlGaN barrier layer 4 exposed in the opening 5a, a gate electrode 7 of a nickel (Ni) / gold (Au) alloy is Schottky bonded via a Schottky bonded surface 6. A source electrode 8 and a drain electrode 9 are formed on both sides of the gate electrode 7 at a predetermined interval, and the source electrode 8 and the drain electrode 9 are in ohmic contact with the AlGaN barrier layer 4. The gate electrode 7, the source electrode 8, and the drain electrode 9 constitute a GaN-HEMT.

  In the GaN-HEMT, when a predetermined voltage is applied to the gate electrode 7, a high-concentration two-dimensional electron gas (hereinafter referred to as “2DEG”) 10 is controlled at the heterointerface 3 by an electric field generated at the lower part of the gate electrode 7. A predetermined current flows between the electrode 8 and the drain electrode 9. The gate current rising voltage Vf of the Schottky forward current voltage characteristic is about 1.3V.

  FIG. 3 is a schematic diagram showing a conduction band (conduction band) when viewed in a cross section taken along line I1-I2 in FIG. 2B, and the horizontal axis represents the depth (Depth) (μm) and the vertical axis. The axis is the potential (V).

In a normal GaN-HEMT, 2DEG 10 formed at the heterointerface 3 between the AlGaN barrier layer 4 and the GaN channel layer 2 has a high concentration (about 1.0E13 cm ⁻² ), so the gate electrode 7 and the AlGaN barrier layer 4 is not pinch-off (pinch-off, drain current is cut off) in a normally-off state, so that normally-off is difficult.

  However, switching power supply circuits for AC / DC (AC / DC) conversion power supplies used in various electric devices and inverter power supply circuits for motor drives used in electric vehicles, etc., have large currents when the power is turned off. From the viewpoint of safety so that current does not flow, there is an extremely strong demand for normally-off in which no current flows when the power is turned off.

  Conventionally, a gate recess technique and a p-type gate technique are known as techniques capable of realizing normally-off in GaN-HEMT. For example, the gate recess technology is described in Non-Patent Document 1 below, and the p-type gate technology is described in Patent Document 1 and Non-Patent Document 2 below.

JP 2005-244072 A IEICE Technical Report of IEICE, ED99-287 (2000-1) The Institute of Electronics, Information and Communication Engineers p. 47-52 Journal of Applied Electronic Properties, Volume 12 [1] (2006) p. 20-25

  FIG. 4 is a diagram showing a schematic cross-sectional structure of a gate region of a GaN-HEMT having a conventional gate recess structure described in Non-Patent Document 1 and the like. Further, FIG. 5 is a schematic diagram showing a conduction band when viewed in a cross section taken along line I11-I12 in FIG. 4. The horizontal axis represents depth (Depth) (μm), and the vertical axis represents potential (Potential). ) (V).

In this GaN-HEMT, for example, the AlGaN buffer layer 4 is etched by dry etching using chlorine (Cl ₂ ) or boron trichloride (BCl ₃ ) to form a recessed portion 4 a of the gate. The lower part of the gate electrode 7 extends downward and is inserted into the recess 4a. The thickness D between the bottom surface of the recess 4a and the heterointerface 3 is about 10 nm. By such a recess 4a, the threshold voltage Vth is adjusted, and the operation in the enhancement mode becomes possible.

  6A and 6B are diagrams showing a schematic cross-sectional structure of a gate region of a GaN-HEMT having a conventional p-type GaN gate structure described in Patent Document 1, Non-Patent Document 2, and the like. FIG. 6A is a cross-sectional view showing a p-GaN layer forming step, and FIG. 5B is a cross-sectional view of the entire gate region.

An n-type AlGaN barrier layer 4 is formed on the GaN channel layer 2 by epitaxial growth. The AlGaN barrier layer 4, for _example, Al _x Ga ₁ - is formed by x N (x = 0.07), it is about 15nm thick. Furthermore, a p-GaN layer 11 is formed on the AlGaN barrier layer 4 by epitaxial growth, and a Ni / Au alloy gate electrode 7 is selectively formed thereon, and then the p-GaN layer 11 other than the gate region is formed. Are removed by dry etching.

  If the p-GaN layer 11 is provided under the gate electrode 7, the enhancement mode operation is enabled by the diffusion potential effect of the p-GaN layer 11.

  However, the GaN-HEMT having the conventional gate recess structure and the GaN-HEMT having the p-type GaN gate structure have the following problems (A) and (B).

(A) Issues of GaN-HEMT having a conventional gate recess structure The conventional recess gate technology has the following problems (1) and (2).

  (1) In the gate recess structure of FIG. 4, the enhancement mode is set by adjusting the threshold voltage Vth by the recess 4a. However, when the AlGaN barrier layer 4 is dry-etched to form the recessed portion 4a, it is difficult to control the thickness D of the AlGaN barrier layer 4 between the bottom surface of the recessed portion 4a and the heterointerface 3. Therefore, it is difficult to control the threshold voltage Vth by the recess portion 4a.

  (2) Since the thickness D of the AlGaN barrier layer 4 is reduced by forming the recess 4a, the electric field between the gate electrode 7 and the 2DEG 10 increases. Therefore, as shown in FIG. 5, the gate current rising voltage Vf of the Schottky forward current voltage characteristic is lowered to about 0.7 V due to the mirror image effect that the triangular potential is lowered. When the voltage Vf decreases, the voltage that can be applied to the gate electrode 7 is limited, and the maximum drain current Idsmax decreases. That is, in the Schottky gate electrode 7 manufactured in the recess structure, the gate current rising voltage Vf is low and the gate bias range is narrow, so the maximum drain current Idsmax is small.

The problems (1) and (2) will be described more specifically. As shown in FIG. 4, in order to form the recess portion 4a, the AlGaN barrier layer 4 is formed by dry etching using Cl ₂ or BCl _3. Is etched. At this time, in order to enter the enhancement mode, the thickness D of the AlGaN barrier layer 4 must be 10 nm or less, and controllability, particularly in-plane uniformity, becomes a problem. Further, damage damage during etching is unavoidable, the drain current is degraded, and the thickness V of the AlGaN barrier layer 4 is thin, so that the voltage Vf of the Schottky gate electrode 7 formed on the semiconductor surface decreases. Problems arise. When the gate voltage Vg is applied positively and Vg> Vf, the gate current starts to flow, and therefore the drain current satisfying Vg = Vf is set to the maximum drain current Idsmax. Therefore, when the voltage Vf of the gate electrode 7 formed on the semiconductor surface is lowered, there arises a problem that the maximum drain current Idsmax is also lowered. The definition of the voltage Vf is a gate voltage Vg that generally gives a gate current of 1 mA / mm.

(B) Problems of GaN-HEMT having a conventional p-type GaN gate structure The conventional p-type gate technology has the following problems (1) and (2).

  (1) As shown in FIG. 6A, when the p-GaN layer 11 which is the uppermost epitaxial growth layer outside the gate region is removed by etching, GaN-HEMT characteristics are deteriorated due to etching damage. The drain current of the actually fabricated GaN-HEMT is very low.

  That is, in the GaN-HEMT having the p-type GaN gate structure shown in FIG. 6B, in the region where the p-GaN layer 11 is present, the channel electrons are depleted due to the pn junction depletion. ), It is necessary to leave the p-GaN layer 11 only in the gate region. Therefore, the uppermost p-GaN layer 11 other than the gate region must be removed by etching, and dry etching outside the gate region is essential. The resistance between the source electrode 8 and the gate electrode 7 and between the drain electrode 9 and the gate electrode 7 is increased due to damage caused by dry etching, resulting in an increase in the source resistance and an increase in the drain resistance, thereby deteriorating the GaN-HEMT characteristics Let

  (2) In Patent Document 1, it is proposed to selectively re-grow a p-GaN layer in the gate region after gate recessing (FIGS. 13 to 15 of Patent Document 1). However, since there is no description of numerical values such as the recess depth, the p-layer concentration, and the p-layer thickness, these are not feasible. Furthermore, the gate electrode is not embedded in the recess, and the source resistance increases in the illustrated structure, so it is unclear whether or not it operates as a GaN-HEMT characteristic.

  In order to solve the above-described problems, the present invention provides a nitride semiconductor HEMT such as a buried gate type enhanced mode GaN-HEMT which has a sufficiently large voltage Vf and is not accompanied by deterioration of source resistance or drain current. The purpose is to provide.

  In the nitride semiconductor HEMT of the present invention, a nitride semiconductor channel layer, a nitride semiconductor barrier layer heterojunctioned on the channel layer, and a predetermined depth formed in the gate region on the upper surface of the barrier layer Formed on the thin film GaN layer, a selective regrowth layer that is selectively regrowth with respect to the recess part, is deposited on the inner wall surface of the recess part, and has a thin film GaN layer as an uppermost layer. A gate electrode embedded in the recess, and a source electrode and a drain electrode formed on both sides of the gate electrode at a predetermined distance and electrically connected to the barrier layer.

  According to the present invention, the selective regrowth layer having the thin GaN layer as the uppermost layer is formed in the recess portion, and the gate electrode is embedded in the recess portion through the selective regrowth layer. The strong electric field applied to the barrier layer is relaxed. This is because the thickness of the AlGaN barrier layer between the gate electrode and 2DEG is spatially increased. By reducing the electric field, the mirror image effect is relaxed, and the gate current rising voltage Vf at the Schottky junction between the lower portion of the gate electrode and the barrier layer is substantially improved. Therefore, the maximum drain current can be improved by improving the voltage Vf.

  A nitride semiconductor HEMT (for example, GaN-HEMT) is formed in a GaN-based semiconductor channel layer, a GaN-based semiconductor barrier layer heterojunctioned on the channel layer, and a gate region on the upper surface of the barrier layer. A recess portion having a predetermined depth, and selectively regrown with respect to the recess portion and deposited on the inner wall surface of the recess portion, and a thin-film GaN layer (for example, undoped with minimal impurity contamination) A selective regrowth layer having a GaN (hereinafter referred to as “i-GaN” layer), a gate electrode formed on the thin film GaN layer and embedding the recess, and spaced apart from each other by a predetermined distance on both sides of the gate electrode. A source electrode and a drain electrode are formed and electrically connected to the barrier layer.

(Configuration of Example 1)
FIGS. 1A and 1B are diagrams showing a schematic cross-sectional structure of a GaN-HEMT in Example 1 of the present invention. FIG. 1A is an overall cross-sectional view, and FIG. ) Is an enlarged cross-sectional view of a portion J in FIG.

This GaN-HEMT is an element formed on the GaN channel layer 22 separated by the insulating element isolation region 21. An AlGaN barrier layer 24 is heterojunctioned on the GaN channel layer 22 via a heterointerface 23. AlGaN barrier layer 24 is, for _example, Al _X Ga ₁ - is formed by X N (X = 0.25), a thickness of about 25 nm. A SiN dielectric film 25 is formed on the AlGaN barrier layer 24, and a part of a gate formation region in the SiN dielectric film 25 and the AlGaN barrier layer 24 is opened to form a recess 26 having a predetermined depth. Has been. The depth D of the AlGaN barrier layer 24 between the bottom surface of the recess 26 and the heterointerface 23 is about 10 nm.

  In the recess portion 26, the i-GaN layer is selectively regrown to form an i-GaN selective regrown layer 27 having a thickness of about 10 nm. A gate electrode 40 of Ni / Au alloy or the like is formed on the recess portion 26, and the bottom convex portion 40 a of the gate electrode 40 is embedded in the i-GaN selective regrowth layer 27 of the recess portion 26. Yes.

  A source electrode 41 and a drain electrode 42 are formed on both sides of the gate electrode 40 at a predetermined interval, and the source electrode 41 and the drain electrode 42 are in ohmic contact with the AlGaN barrier layer 24. The gate electrode 40, the source electrode 41, and the drain electrode 42 constitute a buried gate type enhanced mode (normally off type) GaN-HEMT.

  In this GaN-HEMT, for example, even when a predetermined drain voltage is applied to the drain electrode 42 when the source-gate voltage applied to the gate electrode 40 is zero, a depletion layer generated below the gate electrode 40 causes a heterointerface. The high-concentration 2DEG 50 generated at 23 is blocked, and no drain current flows between the source electrode 41 and the drain electrode 42.

(Example of production method of Example 1)
First, a substrate on which a SiN dielectric film 25 is formed on a heterostructure of a GaN channel layer 22 and an AlGaN barrier layer 24 is prepared. The SiN dielectric film 25 is etched by using an inductively coupled high-density plasma etching (ICP-RIE) apparatus with the resist subjected to gate opening patterning as a mask. As the etching gas, sulfur hexafluoride (SF ₆ ) gas is used. Further, the SiN dielectric film 25 and the AlGaN barrier layer 24 are continuously recess-etched to form a recess portion 26. For example, when the etching conditions are an etching gas BCl ₃ , an atmospheric pressure of 30 mTorr, and an applied radio frequency (RF) power of 50 W, Al _0.25 Ga _0.75 N forming the AlGaN barrier layer 24 can be gate-recessed at an etching rate of 5 nm / min or less. . In order to enter the enhancement mode, the Al _0.25 Ga _0.75 N thickness is set to about 100 nm (15 nm gate recess etching), and the resist is removed.

Next, using an organometallic chemical vapor deposition (MOCVD) apparatus, the i-GaN selective regrowth layer 27 is selectively regrown to about 10 nm using the SiN dielectric film 25 as a mask. At this time, i-GaN also grows on the inner wall surface of the recess portion 26. The MOCVD conditions for the i-GaN selective growth are, for example, a film forming temperature of 1070 ° C., an atmospheric pressure of 760 Torr, and a raw material gas of ammonia (NH ₃ ) gas and trimethylgallium ((CH ₃ ) ₃ Ga) gas. The flow rate ratio (V / III ratio) is 2500. After selective regrowth of i-GaN, a gate metal (Ni / Au) is buried in the recess portion 26 by a lift-off method to form the gate electrode 40. Then, when the source electrode 41, the drain electrode 42, and the like are formed, the manufacturing is completed.

(Effect of Example 1)
FIG. 7 is a schematic diagram showing a conduction band when viewed in a section taken along the line I31-I32 in FIG. 1B. The horizontal axis represents depth (Depth) (μm), and the vertical axis represents potential ( Potential) (V).

  According to the first embodiment, since the i-GaN selective regrowth layer 27 having a thickness of about 10 nm is formed in the recess portion 26, the AlGaN barrier layer 24 between the gate electrode 40 and the 2DEG 50 is formed as shown in FIG. The applied strong electric field is relaxed. This is because the thickness D (= about 10 nm) of the AlGaN barrier layer 24 between the gate electrode 40 and the 2DEG 50 is spatially increased. As the electric field is relaxed, the mirror image effect is relaxed, and the Schottky junction voltage Vf between the gate electrode lower portion 40a and the AlGaN barrier layer 24 is substantially increased by about 0.25V. On the other hand, if the selectively regrown i-GaN selective regrowth layer 27 is 10 nm or less, the threshold voltage Vth of the GaN-HEMT hardly changes, so that the enhanced mode can be maintained. Therefore, the maximum drain current Idsmax is improved from 300 mA / mm to 350 mA / mm by improving the voltage Vf.

(Configuration / Example of Manufacturing Method of Example 2)
FIG. 8 is a schematic enlarged cross-sectional view of a GaN-HEMT according to the second embodiment of the present invention. Elements common to the elements in FIG. Yes.

  In the GaN-HEMT of Example 2, instead of the i-GaN selective regrowth layer 27 of Example 1, p-GaN having an impurity concentration of 3.0E18 cm −3 and a film thickness of about 10 nm in the recess 26. A selective regrowth layer 28 is stacked as a Schottky layer. The i-GaN selective regrowth layer 29 is desirably grown on the p-GaN selective regrowth layer 28 to a thickness of about 1 nm. Other configurations are the same as those of the first embodiment.

The manufacturing method in the GaN-HEMT of the second embodiment is substantially the same as that of the first embodiment, for example, forming the recess portion 26 by gate recess, forming the p-GaN selective regrowth layer 28, and selecting i-GaN as necessary. The regrowth layer 29 and the gate electrode 40 are formed. In the p-GaN layer forming the p-GaN selective regrowth layer 28, for example, the impurity (dopant) to be added is magnesium (Mg), the impurity concentration is 3E18 cm ⁻³ , and the film thickness is about 10 nm. In order to prevent surface oxidation of the p-GaN selective regrowth layer 28 containing Mg dopant, an i-GaN selective regrowth layer 29 having a thickness of about 1 nm is grown as a prevention film on the p-GaN selective regrowth layer 28. It is desirable to make it.

(Effect of Example 2)
FIG. 9 is a schematic diagram showing a conduction band when viewed in a section taken along line I41-I42 in FIG. 8. The horizontal axis represents depth (Depth) (μm), and the vertical axis represents potential (Potential) ( V).

  According to the second embodiment, since the p-GaN selective regrowth layer 28 is formed by selectively re-growing the p-GaN layer in the recess portion 26, a pseudo pn is formed in the gate Schottky portion. A junction (p-GaN / AlGaN) is formed, resulting in a depletion layer. Therefore, as shown in FIG. 9, the potential of the conduction band on the Schottky gate electrode side is raised, and as a result, the voltage Vf is further improved by about 0.5V. By improving the voltage Vf, the maximum drain current Idsmax is improved from 200 mA / mm to 500 mA / mm.

  When the i-GaN selective regrowth layer 29 having a thickness of about 1 nm is formed on the p-GaN selective regrowth layer 28, in addition to the above-mentioned effects, the p-GaN selective regrowth layer 29 can be obtained. Since the surface oxidation of 28 can be prevented, stable enhancement mode GaN-HEMT characteristics can be obtained.

(Example of configuration / manufacturing method of Example 3)
FIG. 10 is a schematic enlarged cross-sectional view of a GaN-HEMT in Example 3 of the present invention, and is the same element as that in FIG. 1A showing Example 1 and the element in FIG. Are denoted by common reference numerals.

  In the GaN-HEMT of the third embodiment, the impurity concentration is 3 in the recess 26 instead of the i-GaN selective regrowth layer 27 of the first embodiment and the p-GaN selective regrowth layer 28 of the second embodiment. A p-AlGaN selective regrowth layer 30 having a thickness of about 0.0E18 cm−3 and a thickness of about 10 nm is stacked as a Schottky layer. The i-GaN selective regrowth layer 31 is desirably grown on the p-AlGaN selective regrowth layer 30 to a thickness of about 1 nm. Other configurations are the same as those of the first and second embodiments.

The manufacturing method in the GaN-HEMT of the third embodiment is substantially the same as in the first and second embodiments. For example, the recess 26 is formed by gate recess, the p-AlGaN selective regrowth layer 30 is formed, and the gate electrode 40 is formed. Form. p-AlGaN selectively regrown layer 30 is, for _{example, p-Al} x _Ga 1 _- is formed by x selective regrowth of N (0 ≦ x ≦ 1) . _P-Al x Ga ₁ to grow during selective regrown - _x N layer thickness is different depending on the composition ratio x, where surface flatness (e.g., 3 nm or less in mean square roughness (rms)) is up to good thickness . For example, at this time, if the Al composition is 25%, which is the same as that of the Al _0.25 Ga _0.75 N barrier layer, selective regrowth of about 20 nm is possible.

_P-Al x Ga ₁ employed in this embodiment 3 - _x N selectively regrown layer, for example, the dopant is at Mg, this impurity concentration 3E18 cm ^-3, thickness of about 10 nm. In order to prevent surface oxidation of the p-AlGaN selective regrowth layer 30, an i-GaN selective regrowth layer 31 having a thickness of about 1 nm may be grown as a prevention film on the p-AlGaN selective regrowth layer 30. desirable.

(Effect of Example 3)
The third embodiment has the following effects (1) and (2).

  (1) FIG. 11 is a schematic diagram showing a conduction band when viewed in a cross section taken along line I51-I52 in FIG. 10. The horizontal axis represents depth (Depth) (μm), and the vertical axis represents potential ( Potential) (V).

  According to the third embodiment, the p-AlGaN selective regrowth layer 30 is formed by selectively re-growing the p-AlGaN layer in the recess 26, so that the pseudo pn as in the second embodiment is used. The discontinuous interface of the junction (p-GaN / AlGaN) is eliminated. For this reason, as shown in FIG. 11, the potential of the conduction band on the Schottky gate electrode side is further raised, and as a result, the voltage Vf is further improved by about 0.3 V compared to the second embodiment. By increasing the voltage Vf, the maximum drain current Idsmax is improved to 600 mA / mm.

  (2) In the case where the i-GaN selective regrowth layer 31 having a thickness of about 1 nm is formed on the p-AlGaN selective regrowth layer 30, in addition to the above-described effects, the following effects are further obtained. The effect can also be expected.

  When the p-AlGaN selective regrowth layer 30 is grown, the higher the Al composition, the more surface oxidation proceeds by the oxidizing power of Al. The AlGaN Schottky characteristic that has undergone surface oxidation deteriorates the GaN-HEMT characteristic, such as increasing gate leakage. Therefore, it is desirable to cover the uppermost layer of the epitaxial layer in contact with the gate electrode with the i-GaN selective regrowth layer 31 even in selective regrowth so as not to deteriorate the GaN-HEMT characteristics. If such an i-GaN selective regrowth layer 31 is grown, the p-AlGaN selective regrowth layer 30 is not exposed on the surface during gate metal deposition after the selective regrowth process. Deterioration of GaN-HEMT characteristics such as an increase in gate leakage current due to surface oxidation of the layer 30 can be prevented.

(Example of configuration and production method of Example 4)
FIG. 12 is a schematic enlarged cross-sectional view of a GaN-HEMT in Example 4 of the present invention, which is common to the elements in FIGS. 1 (a), 8, and 10 showing Examples 1, 2, and 3, respectively. These elements are denoted by common reference numerals.

In the GaN-HEMT of the fourth embodiment, the i-GaN selective regrowth layer 27 of the first embodiment, the p-GaN selective regrowth layer 28 and the i-GaN selective regrowth layer 29 of the second embodiment, or the third embodiment. In place of the p-AlGaN selective regrowth layer 30 and the i-GaN selective regrowth layer 31, an i-AlN selective regrowth layer 32 having a film thickness of about 1 nm, p-Al _x Ga _{1− x N (0 ≦ x ≦ 1} ) of the p-AlGaN selectively regrown layer 33, and the film thickness as required is i-GaN selectively regrown layer 34 of about 1 nm, it is laminated as the Schottky layer.

  The thickness of the p-AlGaN selective regrowth layer 33 that grows during selective regrowth differs depending on the composition ratio x, so here the surface flatness (for example, the mean square roughness (rms) is 3 nm or less) is set to a thickness that is good. . By inserting the i-AlN selective regrowth layer 32 in the lower layer, this AlN functions as a barrier layer, and diffusion of Mg dopant into the AlGaN barrier layer 24 during epitaxial growth for forming the p-AlGaN selective regrowth layer 33 Can be suppressed.

  In addition, in order to prevent oxidation of the p-AlGaN selective regrowth layer 33, the i-GaN selective regrowth layer 33 is preferably grown on the p-AlGaN selective regrowth layer 33 to a thickness of about 1 nm. Other configurations are the same as those in the first, second, and third embodiments.

  The manufacturing method in the GaN-HEMT of the fourth embodiment is substantially the same as in the first, second, and third embodiments, for example, forming the recessed portion 26 by gate recess, forming the i-AlN selective regrowth layer 32, and selecting p-AlGaN. The regrowth layer 33 is formed, the i-GaN selective regrowth layer 34 is formed, and the gate electrode 40 is formed as necessary.

(Effect of Example 4)
The fourth embodiment has the following effects (1) to (3).

  (1) Since the p-AlGaN selective regrowth layer 33 is formed by selectively regrowing the p-AlGaN layer in the recess portion 26, the same effect as the effect (1) of the third embodiment is obtained.

  (2) Since the i-AlN selective regrowth layer 32 is inserted between the AlGaN barrier layer 24 and the p-AlGaN selective regrowth layer 33, the Mg dopant is transferred to the AlGaN barrier layer 24 during the selective regrowth of p-AlGaN. Therefore, even if the p-AlGaN selective regrowth layer 33 is made thinner than that of the third embodiment, the same effect of increasing the voltage Vf can be obtained. . As the GaN-HEMT characteristics, the mutual conductance (gm) characteristics are improved as the distance between the 2DEG 50 and the gate electrode 40 is shorter, so that an enhancement mode GaN-HEMT having higher gm characteristics can be realized.

  (3) When the i-GaN selective regrowth layer 34 having a thickness of about 1 nm is formed on the p-AlGaN selective regrowth layer 33, the same effect as the effect (2) of the third embodiment is obtained.

(Modification)
The present invention is not limited to the illustrated first to fourth embodiments. For example, the channel layer (22) and the barrier layer (24) may be formed of a nitride semiconductor other than a GaN-based semiconductor, or may have dimensions and materials other than those illustrated. Various modifications and forms of use are possible, such as forming or changing the shape and structure of the recess 26 to something other than that illustrated.

It is a figure which shows the typical cross-section of GaN-HEMT in Example 1 of this invention. It is a figure which shows the normal typical cross-section of the conventional GaN-HEMT. It is a schematic diagram which shows a conduction band when it sees in the I1-I2 line cross section in FIG.2 (b). It is a figure which shows the typical cross-section of the gate area | region of GaN-HEMT with a conventional gate recess structure. It is a schematic diagram which shows a conduction band when it sees in the I11-I12 line cross section in FIG. It is a figure which shows the typical cross-section of the gate area | region of GaN-HEMT with a conventional p-type GaN gate structure. It is a schematic diagram which shows a conduction band when it sees in the I31-I32 line cross section in FIG.1 (b). It is a typical expanded sectional view of GaN-HEMT in Example 2 of the present invention. It is a schematic diagram which shows a conduction band when it sees in the I41-I42 line cross section in FIG. It is a typical expanded sectional view of GaN-HEMT in Example 3 of the present invention. It is a schematic diagram which shows a conduction band when it sees in the I51-I52 line cross section in FIG. It is a typical expanded sectional view of GaN-HEMT in Example 4 of the present invention.

Explanation of symbols

22 GaN channel layer 23 2DEG
24 AlGaN barrier layer 25 Dielectric film 26 Recessed portion 27, 29, 31, 34 i-GaN selective regrowth layer 28 p-GaN selective regrowth layer 30, 33 p-AlGaN selective regrowth layer 32 i-AlN selective regrowth layer

Claims (5)

A nitride semiconductor channel layer;
A nitride semiconductor barrier layer heterojunctioned to the channel layer;
A recess having a predetermined depth formed in the gate region on the upper surface of the barrier layer;
A selective regrowth layer that is selectively regrown with respect to the recess portion and is deposited on the inner wall surface of the recess portion, and has a thin-film GaN layer as an uppermost layer;
A gate electrode formed on the thin film GaN layer and burying the recess;
A source electrode and a drain electrode formed on both sides of the gate electrode at a predetermined distance and electrically connected to the barrier layer;
A nitride semiconductor high electron mobility transistor comprising:   The nitride semiconductor high electron mobility transistor according to claim 1, wherein the selective regrowth layer includes an undoped GaN layer. Wherein selectively regrown _{layer, p-Al x Ga l -} X N (0 ≦ x ≦ 1) layer nitride semiconductor high electron mobility transistor according to claim 1, wherein a. Wherein selectively regrown layer has a thickness T is 0 nm <T ≦ 1 nm undoped AlN layer and the _p-Al x _Ga l of _- according to claim 1, characterized in that it has a X N (0 ≦ x ≦ 1 ) layer Nitride semiconductor high electron mobility transistor.   The nitride semiconductor high electron mobility transistor according to any one of claims 1 to 4, wherein the nitride semiconductor is a GaN-based semiconductor.

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