JP2008145850A - Verification method for photomask drawing layout - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an easy and high accuracy layout verification method for verifying the accuracy of a layout in converted drawing data when original drawing data for a photomask is converted into drawing data for other drawing machines. <P>SOLUTION: The method includes: a first step of creating drawing data of a simplified pattern having the same properties as those of original drawing data and an obvious pattern orientation; a second step of converting the drawing data of the simplified pattern into drawing data for other drawing machines; a third step of creating original smashed data from the drawing data of the simplified pattern and the original arrangement information; a fourth step of creating smashed data for the other drawing machine from the drawing data for other drawing machines and the arrangement information for other drawing machines; and processing an exclusive OR operation of the original smashed data and the smashed data for other drawing machines. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method for verifying the layout of drawing data used in a drawing machine when producing a photomask with an electron beam or laser light, and in particular, the layout when original drawing data is converted into drawing data for another drawing machine. The present invention relates to a simple and highly accurate layout verification method for verifying accuracy.

  In a photomask used for manufacturing a semiconductor integrated circuit, first, a layout of the semiconductor integrated circuit is designed, and layout data (CAD data) is formed. Next, the layout data is converted, and drawing data used in an electron beam drawing machine or a laser drawing machine is generated.

  By the way, in photomask production, there are various drawing machines using electron beams and laser beams, and even electron beam drawing machines have raster scanning and vector scanning, and drawing data handled by each drawing machine manufacturer. The specifications are different. In photomask production, the most suitable drawing machine for drawing is determined according to the specifications of the photomask, etc., and the original drawing data is frequently converted into drawing data for other drawing machines. .

To produce a photomask, drawing data, which is a set of pattern figures to be drawn, and array information that defines how to place the drawing data on the photomask are required. It is described in a control data file called (jobdeck). The job deck file describing the drawing data and the arrangement information has different specifications depending on the manufacturer of the drawing machine. Therefore, when the drawing machine needs to be changed, the drawing data and the arrangement information need to be converted. At the time of conversion, the drawing data is subjected to various processes such as mirroring, rotation, scaling, and smashing in order to adapt to the drawing machine used. The array information is corrected manually or by a program so that the processed data has the same layout as the original state.

In the conversion of drawing data, it is necessary to verify the certainty of the layout after conversion. Whether or not the drawing data is different from the design data (CAD data) has been conventionally confirmed by comparing the drawing data and the design data (see, for example, Patent Document 1).
However, with the miniaturization and high integration of semiconductor integrated circuits, the amount of data to be compared has become enormous, and verification using actual drawing data is not performed because it places a heavy burden on the data processing system. In general, only the main pattern portion of the mask is guaranteed by an appearance inspection of a die to database.

  In the case of the above-described die-to-database inspection, it is necessary to prepare design data (CAD data) and convert the design data into image data for inspection. This data conversion requires a great amount of conversion time and causes a reduction in work efficiency. In addition, the above inspection requires accurate comparison of pattern images, and a mechanically highly accurate dedicated inspection device is required. It was necessary. Furthermore, with the high integration of semiconductor integrated circuits, the data volume has become enormous, and the above-described die-to-database visual inspection cannot be inspected.

  In addition, the actual pattern on the chip has rounded corners and cannot be directly compared with the pattern when the design data is converted into image data, and rounding processing or the like is required. However, complete rounding processing is very difficult, and there is a problem that many pseudo defects are generated that erroneously detect a portion having no defect. Therefore, it is necessary to check the defect information including the pseudo defects one by one to remove the pseudo defects, which requires a lot of time and lowers the reliability of the inspection.

As described above, due to miniaturization and high integration of semiconductor integrated circuits, when the data volume is large and cannot be inspected in the appearance inspection of die-to-database, or when it is impossible to inspect due to frequent occurrence of pseudo defects However, there has been a problem that a very dangerous situation occurs in which it is impossible to verify the accuracy of the layout after drawing data conversion.
JP 2001-344302 A

  The present invention has been made in view of the above problems. That is, when the original drawing data for photomask is converted into drawing data for other drawing machines, the data volume is enormous and inspection is impossible, or inspection is impossible due to frequent occurrence of pseudo defects. The present invention provides a simple and highly accurate layout verification method for verifying the accuracy of the layout of converted drawing data.

  In order to solve the above-described problem, the layout verification method according to the invention of claim 1 verifies the probability of the layout when the original drawing data for photomask production is converted into drawing data for another drawing machine. A first step of creating original simple pattern drawing data having the same properties as the original drawing data and having a clear pattern orientation, and drawing the original simple pattern A second step of converting data into drawing data of a simple pattern for the other drawing machine; a third step of creating original smash data from the drawing data of the original simple pattern and original arrangement information; Others based on the drawing data of the simple pattern for the other drawing machine and the arrangement information for the other drawing machine A fourth step of creating smash data for a drawing machine, and a fifth step of verifying the accuracy of the layout by performing exclusive OR processing of the original smash data and the smash data for the other drawing machine It is characterized by including these.

  A layout verification method according to a second aspect of the present invention is the layout verification method according to the first aspect, wherein the order of the second step and the third step is changed.

  A layout verification method according to a third aspect of the present invention is the layout verification method according to the first aspect, wherein the order of the third step and the fourth step is changed.

  A layout verification method according to a fourth aspect of the present invention is the layout verification method according to any one of the first to third aspects, wherein the properties are a data format, a data area, and an address unit. To do.

  The layout verification method according to the invention of claim 5 is the layout verification method according to any one of claims 1 to 4, wherein the drawing data of the original simple pattern is arranged according to the original arrangement information. The original simple pattern is arranged so as not to overlap with the simple pattern of other data as much as possible.

  The layout verification method according to the invention of claim 6 is the layout verification method according to any one of claims 1 to 5, wherein the data in which data inversion is specified in the original array information is: When the original simple pattern drawing data is created, the data is inverted in advance.

  A layout verification method according to a seventh aspect of the present invention is the layout verification method according to any one of the first to sixth aspects, wherein rotation and sizing are set in the drawing data of the simple pattern for the other drawing machine. In the case where it is performed, before the exclusive OR processing, rotation and sizing reverse correction for eliminating the setting is performed on the smash data for the other drawing machine.

According to the layout verification method of the present invention, the burden of data conversion is greatly reduced by simplifying the pattern to be verified, and layout verification on data that has been difficult until now has become possible. Furthermore, even for complex jobs with tens to hundreds of patterns, it is easy to verify the execution results of conversion area specification, mirroring, rotation, scaling, and placement coordinate specification for all data with accuracy in nm units. This is a simple and highly accurate layout verification method.

The best mode for carrying out the present invention will be described below with reference to the drawings.
FIG. 1 is a flowchart showing an example of an embodiment of the present invention, and FIGS. 2 to 5 are explanatory diagrams based on schematic diagrams for explaining the flowchart shown in FIG. 1 in more detail.

  First, as shown in the upper left of FIG. 1, original drawing data 11 (data o) is prepared. The original drawing data 11 is created from design data (CAD data) and, for example, based on cells that are design units as illustrated in o-1 to o-3 in FIG. The data is designed and has a hierarchical structure, and is arranged like the composite image O in FIG. 2 in accordance with the instruction of the arrangement information described in the job deck file.

  Next, as shown in FIG. 1, an original simple pattern having the same characteristics (referred to as a property in the present invention) as the original drawing data 11 (data o) and having a clear pattern orientation by processing A as shown in FIG. Drawing data 12 (data a) is created (first step: process A).

  In the present invention, the same property must be the same data format, the same data area, and the same address unit (minimum unit grid: AU). If the above properties are different, unexpected scaling will result in a layout different from the original, reducing the reliability of layout verification.

  FIG. 2A is a schematic diagram in which a simple pattern whose direction is known is created with the same property as the original drawing data 11. 2A, a-1 to a-3 specify rectangular information related to CAD data, and each of a-1 to a-3 is the same data as FIG. 2O, which is the original data. The format is the same data area as each of o-1 to o-3 in FIG. 2 (O), the same address unit, and only the pattern is replaced with a simple pattern. In FIG. 2A, only the figure F is shown as an example of a simple pattern whose direction is known.

  Next, as shown in FIG. 1, the original simple pattern drawing data 12 (data a) is converted into simple pattern drawing data 13 (data b) for other drawing machines by the process B (second step: Process B). At this time, processing such as mirroring, rotation, and sizing is performed as necessary.

  FIG. 2B is a schematic diagram of a pattern when the original simple pattern drawing data 12 is converted into the simple pattern drawing data 13 for another drawing machine. A drawing machine for producing a photomask may require a pattern to be rotated at the time of data conversion because the position of a nail for supporting the photomask may differ depending on the model. In the case of FIG. 2B, as an example, as shown by b-1 in FIG. 2B, the data shown in FIG. 2A is rotated 270 degrees, reversed left and right, and FIG. A case where the hierarchical structure of the cells a-1 and a-2 shown in A) is broken and smashed into flat data is shown.

Next, as shown in FIG. 1, by processing C, data synthesis is performed using the original simple pattern drawing data 12 (data a) and the original arrangement information 14 described in the job deck file, and the original smash data 15 (data c) is created (third step: process C).
The smash data used in the present invention means data obtained by combining a plurality of photomask pattern data as one data (drawing data) according to the arrangement information.

  A layout schematic diagram of original smash data 15 (data c) obtained by synthesizing data with composite image C of FIG. 2A using original simple pattern drawing data 12 and original arrangement information 14 described in the job deck file. Indicates.

  Next, as shown in FIG. 1, by processing D, data synthesis is performed by using the converted simple pattern drawing data 13 (data b) for the other drawing machine and the array information 16 for the other drawing machine. Machine smash data 17 (data d) is created (fourth step: process D).

  For the other drawing machine in which the synthesized image D of FIG. 2B is synthesized with the converted simple pattern drawing data 13 for the other drawing machine and the new job deck describing the array information 16 for the other drawing machine. The layout schematic diagram of the smash data 17 (data d) is shown.

  Next, as shown in FIG. 1, by the process E, the above-described original smash data 15 (data c) and the smash data 17 (data d) for other drawing machines are also expressed as exclusive OR (XOR). ) Process is performed to verify the certainty of the layout (fifth step: process E). If there is no output graphic data as a result of the operation by exclusive OR processing (Y), there is no error when the original drawing data is converted to drawing data for other drawing machines, and the original drawing data is converted correctly. It is judged that there is nothing. On the other hand, if there is output graphic data (N), it is determined that an error has occurred in the original drawing data during conversion, and it is necessary to confirm the difference.

  In the layout verification method of the present invention, the order of the process B of the second step and the process C of the third step in the process steps of the first step (process A) to the fifth step (process E). Can be exchanged, and even if the order is changed, there is no problem in layout verification. The processing procedure in this case is the order of the above processing A, processing C, processing B, processing D, and processing E.

  In the layout verification method of the present invention, the process C of the third step and the process D of the fourth step are performed in the process steps of the first step (process A) to the fifth step (process E). It is possible to change the order, and even if the order is changed, there is no problem in layout verification. The processing procedure in this case is the order of processing A, processing B, processing D, processing C, and processing E.

  In the present invention, the exclusive OR processing of the original smash data 15 (data c) and the smash data 17 (data d) for other drawing machines is a comparison on a computer, so that the drawing data is in units of several nm. Verification is possible, and drawing data of a photomask having a fine pattern can be verified with high accuracy.

  In the layout verification method of the present invention, it is preferable that the original simple pattern drawing data 12 is arranged so as not to overlap as much as possible after the layout. This is because, if they overlap completely, the layout verification of the overlapped portion cannot be performed.

  After the arrangement according to the arrangement information, if the simple patterns between the cells completely overlap, it is impossible to verify the layout of both the overlapping cells (there is no difference even if one of the cells does not exist). When data of different data areas are arranged at different coordinates, the probability that small simple patterns completely overlap is very low. It is most conceivable that the simple patterns completely overlap with each other in mask production when the data in the same data area is arranged at the same coordinates. FIG. 3, which is a simplified layout diagram, is an example showing the arrangement of the pattern figure F inside the cell. FIG. 3A shows a certain cell based on the original simple pattern drawing data 12, and FIG. 3B shows another cell. In order to avoid overlapping as much as possible, that is, to avoid overlapping FIG. 3B with FIG. 3A, the pattern figure F inside the cell of the drawing data FIG. It is something to keep.

  In the layout verification method of the present invention, the data in which data inversion is specified in the original array information 14 is generated when the original simple pattern drawing data 12 is generated in the process A of the first step. It is preferable to invert the data in advance. Hereinafter, the reason will be described with reference to the schematic diagrams of the cells shown in FIGS.

  FIG. 4 is an explanatory diagram showing a case where the data is not inverted in advance when the original simple pattern drawing data 12 is created. The cell in which data inversion is designated FIG. 4A and the upper cell FIG. 4B are designated by the data inversion in FIG. In the case of the cell diagram 4 (c), the cell diagram 4 (a) is inverted and the pattern of the upper cell diagram 4 (b) is crushed, and the verification of the cell diagram 4 (b) becomes impossible.

  On the other hand, as shown in FIG. 5, when the original simplified pattern drawing data 12 is created, the cell data is pre-inverted to obtain an inverted cell diagram 5 (a), so that a smash with the upper cell diagram 5 (b) is obtained. Then, in the case of one synthesized cell diagram 5 (c), the upper cell diagram 5 (b) in the job image is not collapsed to the cell diagram 5 (a), but can be verified as shown in the cell diagram 5 (c). It becomes.

In the layout verification method of the present invention, when rotation and sizing are set for the drawing data 13 of the simple pattern for the other drawing machine described above, this setting is canceled before the exclusive OR process. It is necessary to apply reverse correction of rotation and sizing to the smash data 17 (data d) for other drawing machines. For example, when drawing data conversion for another drawing machine is applied with rotation = 270 degrees and sizing = -50 nm, the values to cancel this setting are rotation = 90 degrees, sizing = + 50 nm, and this reverse correction is exclusive. This is performed before the logical OR process.
Next, the layout verification method of the present invention will be described in more detail based on examples.

  First, original drawing data was prepared. FIG. 6 shows a schematic diagram of four types of original drawing data patterns and an original composite image created based on the arrangement information in the embodiment of the present invention (data portion = white). In this embodiment, the following data array information is used for original drawing data for MEBES based on the format for the electron beam drawing machine MEBES.

SLICE 1,17
RETICLE
OPTION M ← Y-axis mirror for all patterns and coordinates
*
CHIP F1,
$ (1, TESTDAT-00-03, AD = 0.004, SF = 1.0) ← Scaling × 1
ROWS 101200/101200
*
CHIP F2,
$ (1, TESTDAT-00-04, AD = 0.004, SF = 0.9) ← Scaling × 0.9
ROWS 101200/51200
*
CHIP F3,
$ (1M, TESTDAT-00-05, AD = 0.004, SF = 0.8) ← Scaling × 0.8 and pattern Y-axis mirror (M of 1M)
ROWS 51200/51200 OPTION M is offset and the original orientation
*
CHIP F4,
$ (1, TESTDAT-00-60, AD = 0.004, SF = 0.7) ← Scaling × 0.7
ROWS 51200/101200
*
CHIP F5,
$ (1R, TESTDAT-00-AA, AD = 0.25, SF = 1.0) ← Scaling × 1 data inversion (R of 1R)
ROWS 76200/76200
END

  Next, as shown in FIG. 7, the original drawing data was converted into original simple pattern drawing data having the same properties as the original drawing data. The same property includes the same data format, the same data area, and the same address unit.

  In FIG. 7, simple data indicated by the graphic F is created for four types of graphic data (TESTDAT-00-03, TESTDAT-00-04, TESTDAT-00-05, and TESTDAT-00-60). As shown, the outer periphery of the data is enlarged and displayed. Also, the pattern position is shifted for each data so that the patterns do not overlap. In addition, since the data has the data inversion designation in the array information, the simplified pattern is inverted so as not to crush other data when the actual layout image is obtained.

  Next, data synthesis was performed using the original sequence information and the original simple pattern drawing data to create original smash data. FIG. 8 is a composite image (reticle) of the original smash data. In FIG. 8, the outer periphery of the data is enlarged and displayed for easy understanding. Although the data is inverted according to the array information, since the original pattern is a solid pattern, there is almost no pattern here and other patterns are not crushed.

  Next, the original simple pattern drawing data was converted into drawing data for an electron beam drawing machine JEOL manufactured by JEOL Ltd. as another drawing machine. FIG. 9 shows conversion of a simple pattern for JEOL into drawing data. At this time, the original sequence information was converted to JEOL format sequence information by 270 ° rotation. The data of TESTDAT-00-AA was also inverted. The created sequence information for JEOL is shown below.

JOB 'JBX', 6.0
; *************************************
PATH
ARRAY (25000.000, 1, 0.000) / (25000.000, 1, 0.000)
ASSIGN P (1)-> (*, *)
AEND
ARRAY (25000.000, 1, 0.000) / (-25000.000, 1, 0.000)
ASSIGN P (2)-> (*, *)
AEND
ARRAY (-25000.000, 1, 0.000) / (-25000.000, 1, 0.000)
ASSIGN P (3)-> (*, *)
AEND
ARRAY (-25000.000, 1, 0.000) / (25000.000, 1, 0.000)
ASSIGN P (4)-> (*, *)
AEND
ARRAY (0.000, 1, 0.000) / (0.000, 1, 0.000)
ASSIGN P (5)-> (*, *)
AEND
PEND
; *************************************
; 1-> LAYER 1
; *************************************
LAYER 1
MIRROR, Y
P (1) 'TESTDAT00.03.J52'
P (2) 'TESTDAT00.04.J52'
P (3) 'TESTDAT00.05.J52'
P (4) 'TESTDAT00.60.J52'
P (5) 'TESTDAT00.AA.J52'
END

  Next, data synthesis was performed using the above-described simple pattern drawing data for JEOL and sequence information for JEOL, and JEOL smash data was created. FIG. 10 is a composite image (reticle) of smash data for JEOL. In FIG. 10, the outer periphery of the data is enlarged and displayed for easy understanding.

  Next, exclusive OR (XOR) processing of the original MEBES smash data shown in FIG. 8 and the JEOL smash data shown in FIG. 10 was performed. At this time, the smash data for JEOL was rotated 90 ° counterclockwise so that the direction coincided with the original.

  As a result of the XOR processing, there was no graphic output data, no error occurred when the MEBES drawing data was converted to JEOL drawing data, and it was determined that the MEBES drawing data was correctly converted to JEOL drawing data.

It is a flowchart which shows an example of embodiment of this invention. It is explanatory drawing for demonstrating in more detail the flowchart of embodiment of this invention shown in FIG. It is explanatory drawing for making it not overlap even if it arrange | positions the data of the same data area to the same coordinate. It is explanatory drawing which shows the case where data is not reversed beforehand at the time of the drawing data creation of the original simple pattern. It is explanatory drawing which shows the case where data are reversed beforehand at the time of creation of the drawing data of an original simple pattern. It is a schematic diagram of the pattern and the composite image of the original drawing data in the Example of this invention. It is explanatory drawing of drawing data creation of the original simple pattern in the Example of this invention. It is the synthetic image (reticle) of the original smash data in the Example of this invention. It is explanatory drawing of conversion to the drawing data of the simple pattern for other drawing machines in the Example of this invention. 6 is a composite image (reticle) of smash data for another drawing machine according to an embodiment of the present invention.

Explanation of symbols

11 Original drawing data 12 Original simple pattern drawing data 13 Simple pattern drawing data for other drawing machines 14 Original arrangement information 15 Original smash data 16 Other drawing machine arrangement information 17 Smash data for other drawing machines

Claims (7)

A layout verification method for verifying the accuracy of a layout when converting original drawing data for photomask production into drawing data for another drawing machine,
A first step of creating original simple pattern drawing data having the same properties as the original drawing data and having a clear pattern orientation;
A second step of converting the original simple pattern drawing data into simple pattern drawing data for the other drawing machine;
A third step of creating original smash data from the original simple pattern drawing data and original arrangement information;
A fourth step of creating smash data for another drawing machine from the drawing data of the simple pattern for the other drawing machine and the arrangement information for the other drawing machine;
A fifth step of verifying the accuracy of the layout by performing an exclusive OR process between the original smash data and the smash data for the other drawing machine;
A layout verification method comprising:   2. The layout verification method according to claim 1, wherein the order of the second step and the third step is switched.   2. The layout verification method according to claim 1, wherein the order of the third step and the fourth step is switched.   The layout verification method according to any one of claims 1 to 3, wherein the property is a data format, a data area, and an address unit.   The original simple pattern is arranged so that it does not overlap with a simple pattern of other data as much as possible in a state where drawing data of the original simple pattern is arranged according to the original arrangement information. The layout verification method according to any one of claims 1 to 4.   6. The data in which data inversion is designated in the original arrangement information is pre-inverted when creating the original simple pattern drawing data. 2. The layout verification method according to item 1.   When rotation and sizing are set for the drawing data of the simple pattern for the other drawing machine, the rotation and sizing reverse correction for eliminating the setting is performed before the exclusive OR processing. The layout verification method according to claim 1, wherein the layout verification method is applied to smash data for a drawing machine.

Images