JP2008124448A5 - - Google Patents

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Publication number
JP2008124448A5
JP2008124448A5 JP2007268777A JP2007268777A JP2008124448A5 JP 2008124448 A5 JP2008124448 A5 JP 2008124448A5 JP 2007268777 A JP2007268777 A JP 2007268777A JP 2007268777 A JP2007268777 A JP 2007268777A JP 2008124448 A5 JP2008124448 A5 JP 2008124448A5
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JP
Japan
Prior art keywords
layer
substrate
manufacturing
semiconductor device
electrode layer
Prior art date
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Granted
Application number
JP2007268777A
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Japanese (ja)
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JP5354884B2 (en
JP2008124448A (en
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Application filed filed Critical
Priority to JP2007268777A priority Critical patent/JP5354884B2/en
Priority claimed from JP2007268777A external-priority patent/JP5354884B2/en
Publication of JP2008124448A publication Critical patent/JP2008124448A/en
Publication of JP2008124448A5 publication Critical patent/JP2008124448A5/ja
Application granted granted Critical
Publication of JP5354884B2 publication Critical patent/JP5354884B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Claims (6)

第1の基板上に剥離層を形成し、
前記剥離層上に第1の電極層と、前記第1の電極層上有機化合物を含む層と、前記有機化合物を含む層上ヤング率7.5×1010N/m以下の第2の電極層とを有する素子層を形成し、
前記素子層を第2の基板へ固定した後、前記素子層前記第1の基板から剥離することを特徴とする半導体装置の作製方法。
Forming a release layer on the first substrate;
On the release layer, a first electrode layer, a layer containing an organic compound on the first electrode layer, and a Young's modulus of 7.5 × 10 10 N / m 2 or less on the layer containing the organic compound forming a device layer and a second electrode layer,
A method for manufacturing a semiconductor device, comprising: fixing an element layer to a second substrate; and then peeling the element layer from the first substrate.
請求項において、
記第2の電極層膜厚10nm以上200nm以下とすることを特徴とする半導体装置の作製方法。
In claim 1 ,
The method for manufacturing a semiconductor device which is characterized in that the thickness of the pre-Symbol second electrode layer and 10nm or 200nm or less.
請求項又は請求項において、
前記素子層前記第1の基板から剥離した後、前記素子層に可撓性を有する第3の基板を固定することを特徴とする半導体装置の作製方法。
In claim 1 or claim 2 ,
After separating the element layer from the first substrate, the method for manufacturing a semiconductor device, characterized in that to fix the third substrate having flexibility to the element layer.
請求項乃至のいずれか一において、
前記第2の基板として、可撓性を有する基板を用いることを特徴とする半導体装置の作製方法。
In any one of Claims 1 thru | or 3 ,
Wherein as the second substrate, the method for manufacturing a semiconductor device which is characterized by using a flexible substrate.
請求項乃至のいずれか一において、
前記第2の電極層を、インジウム(In)、バリウム(Ba)、鉛(Pb)、カルシウム(Ca)、ビスマス(Bi)、マグネシウム(Mg)、錫(Sn)、又はアルミニウム(Al)のうち少なくとも1つを含む材料を用いて形成することを特徴とする半導体装置の作製方法。
In any one of Claims 1 thru | or 4 ,
The second electrode layer is made of indium (In), barium (Ba), lead (Pb), calcium (Ca), bismuth (Bi), magnesium (Mg), tin (Sn), or aluminum (Al). A method for manufacturing a semiconductor device, characterized by forming using a material including at least one.
請求項乃至のいずれか一において、
前記素子層には、記憶素子、発光素子、圧電素子、又は有機トランジスタが形成されていることを特徴とする半導体装置の作製方法。
In any one of Claims 1 thru | or 5 ,
In the element layer, the memory element, the light-emitting element, a method for manufacturing a semiconductor device, characterized in that the piezoelectric element, or an organic transistor capacitor is formed.
JP2007268777A 2006-10-19 2007-10-16 Method for manufacturing semiconductor device Expired - Fee Related JP5354884B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007268777A JP5354884B2 (en) 2006-10-19 2007-10-16 Method for manufacturing semiconductor device

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2006285378 2006-10-19
JP2006285378 2006-10-19
JP2007268777A JP5354884B2 (en) 2006-10-19 2007-10-16 Method for manufacturing semiconductor device

Publications (3)

Publication Number Publication Date
JP2008124448A JP2008124448A (en) 2008-05-29
JP2008124448A5 true JP2008124448A5 (en) 2010-09-30
JP5354884B2 JP5354884B2 (en) 2013-11-27

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007268777A Expired - Fee Related JP5354884B2 (en) 2006-10-19 2007-10-16 Method for manufacturing semiconductor device

Country Status (1)

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JP (1) JP5354884B2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5042163B2 (en) * 2008-08-20 2012-10-03 株式会社半導体エネルギー研究所 Method for manufacturing light emitting device
EP2178133B1 (en) * 2008-10-16 2019-09-18 Semiconductor Energy Laboratory Co., Ltd. Flexible Light-Emitting Device, Electronic Device, and Method for Manufacturing Flexible-Light Emitting Device
TWI607670B (en) 2009-01-08 2017-12-01 半導體能源研究所股份有限公司 Light emitting device and electronic device
JP5523510B2 (en) * 2012-07-10 2014-06-18 株式会社半導体エネルギー研究所 Method for manufacturing light emitting device
JP5802302B2 (en) * 2014-04-08 2015-10-28 株式会社半導体エネルギー研究所 Method for manufacturing light emitting device
KR20210075141A (en) * 2018-10-10 2021-06-22 요하노이움 리서치 포르슝스게젤샤프트 엠베하 piezoelectric sensor

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3253740B2 (en) * 1993-04-05 2002-02-04 パイオニア株式会社 Organic electroluminescence device
JP3674973B2 (en) * 1995-02-08 2005-07-27 住友化学株式会社 Organic electroluminescence device
JPH0935871A (en) * 1995-07-24 1997-02-07 Sumitomo Chem Co Ltd Organic electroluminescence element
JP4345278B2 (en) * 2001-09-14 2009-10-14 セイコーエプソン株式会社 PATTERNING METHOD, FILM FORMING METHOD, PATTERNING APPARATUS, ORGANIC ELECTROLUMINESCENCE ELEMENT MANUFACTURING METHOD, COLOR FILTER MANUFACTURING METHOD, ELECTRO-OPTICAL DEVICE MANUFACTURING METHOD, AND ELECTRONIC DEVICE MANUFACTURING METHOD
JP2004349543A (en) * 2003-05-23 2004-12-09 Seiko Epson Corp Method of peeling laminate, method of manufacturing thin film device, thin film device, and electronic equipment
JP2005085705A (en) * 2003-09-10 2005-03-31 Seiko Epson Corp Electric device, its manufacturing method, electronic apparatus
JP2005136324A (en) * 2003-10-31 2005-05-26 Osaka Kyoiku Univ Nonvolatile memory and erasing method
US7199394B2 (en) * 2004-08-17 2007-04-03 Spansion Llc Polymer memory device with variable period of retention time
JP2006165535A (en) * 2004-11-11 2006-06-22 Semiconductor Energy Lab Co Ltd Semiconductor device
KR100990291B1 (en) * 2004-12-28 2010-10-26 삼성전자주식회사 Memory devices employing dendrimers

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