JP2008117934A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a structure which restrains characteristic dispersion after mounting by reducing electrical characteristic variation by reducing stress newly applied when a semiconductor element is mounted on a package in a semiconductor field effect transistor for supplying electron by piezo polarization. <P>SOLUTION: In a semiconductor device having a semiconductor element 10 of a semiconductor field effect transistor for supplying carrier by piezo charge and a package for mounting the semiconductor element 10, thermal conductivity satisfies a relation of k<SB>X</SB><k<SB>Y</SB>≤k<SB>Z</SB>when the thermal conductivities of the package are k<SB>X</SB>, k<SB>Y</SB>, k<SB>Z</SB>each to an orientation X parallel to a longitudinal direction of the semiconductor element 10 which is a heat generation source, a vertical orientation Y and an orientation Z parallel to a thickness direction of the package. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor device that supplies carrier electrons in a semiconductor crystal by piezoelectric polarization.

 Semiconductor devices using semiconductors such as silicon (Si) and gallium arsenide (GaAs) are widely used for digital, analog signal processing, wireless communication, optical communication, and the like. In semiconductors using such Si or GaAs based crystals, carrier electrons in the semiconductor are generally supplied by impurities such as ion implantation or doping performed during crystal growth. In particular, in semiconductors that handle high power, such as high-power amplifiers and switching elements, heat conduction is used as a package base material (material for semiconductor mounting parts) to reduce temperature rise due to power consumed by the semiconductor. A high rate metal material is used.

 As a metal material with good thermal conductivity, copper (Cu) is widely used as a relatively inexpensive material. However, Cu and a semiconductor substrate such as Si and GaAs have a thermal expansion coefficient of about 3 to 6 times. Due to the difference, thermal stress is applied to the semiconductor substrate during the assembly process, and the long-term reliability is impaired. In order to solve this problem, the thermal expansion coefficient is adjusted to a value close to that of a semiconductor substrate by mixing materials with small thermal expansion coefficients such as tungsten (W) and molybdenum (Mo) into Cu or making them into a multi-layer structure. The method of doing is taken. This achieves both a relatively high thermal conductivity and a thermal expansion coefficient close to that of a semiconductor substrate (see, for example, Patent Document 1).

Recently, field effect transistors (FETs) based on gallium nitride (GaN) have been developed as semiconductors for wireless communication front-end high-power amplifiers and semiconductors for switching elements. This is because a semiconductor based on GaN has a large band gap and can operate at a high voltage compared to conventional Si or GaAs based semiconductors. In addition, in a GaN-based FET, in addition to a large Young's modulus difference (ΔEc) between GaN and AlGaN, a high concentration of carrier electrons is not a method such as ion implantation or doping, but a crystal of GaN and AlGaN. It can be supplied by piezopolarization caused by strain, and it is easy to increase the current density. In such a GaN-based FET, the power consumption density is about 2 to 10 times larger than that of a conventional Si or GaAs-based FET with high voltage and large current density. Therefore, from the viewpoint of reducing the channel temperature of the FET during operation, it is desirable to use a material having high thermal conductivity as the package material.
JP 2001-267441 A

  However, the prior art described in the document has room for improvement in the following points.

 First, when a GaN-based FET chip is mounted on the Cu package, a stress is newly applied to the FET chip from the outside at the time of mounting, and the carrier electron concentration generated by piezoelectric polarization changes. End up. As a result, the drain current-voltage characteristic, which is a basic characteristic of the FET, greatly changes before and after the FET chip is mounted on the package.

 Secondly, in the case of CuMo or CuW whose thermal expansion coefficient is adjusted to a value close to that of the semiconductor substrate, the drain current-voltage characteristics are slightly reduced but not sufficient.

 Furthermore, in the first and second cases, drains before and after mounting on the FET chip package are affected by differences in the amount of solder used in the mounting process and differences in temperature profile in the cooling process from the mounting temperature. Changes in current-voltage characteristics varied greatly between the elements, and were difficult to control.

 Thus, in FETs that supply carrier electrons by piezo-polarization, the characteristics of conventional metal packages change due to the new stress applied to the FET when mounted on the chip, making it difficult to control the characteristics. It became clear that a new problem arises.

 The present invention has been made in view of the above circumstances, and is a problem peculiar to a semiconductor field effect transistor that supplies carrier electrons by piezo-polarization, reducing characteristic fluctuations that occur when a semiconductor element is mounted on a package, And it is providing the semiconductor device which has the outstanding heat dissipation performance.

According to the present invention, in a semiconductor device including a semiconductor element of a semiconductor field effect transistor that supplies carriers by piezoelectric charges and a package that mounts the semiconductor element, an orientation X parallel to the longitudinal direction of the semiconductor element that becomes a heat generation source, When the thermal conductivity of the package is k _X , k _Y , and k _Z with respect to the vertical direction Y and the direction Z parallel to the thickness direction of the package, the thermal conductivity is k _X <k _Y ≦ k _{Z, respectively.} A semiconductor device characterized by satisfying the relationship is provided.

 By increasing the thermal conductivity of the package in the thickness direction of the package, the semiconductor element has high heat dissipation in the stacking direction, and the increase in the channel temperature of the semiconductor field effect transistor can be reduced uniformly and efficiently. It becomes possible.

   The semiconductor device may be a semiconductor device including the package containing carbon fiber. Furthermore, the semiconductor device may be a semiconductor device including the package having a composite material including carbon particles in whole or in part. Carbon fibers and mixed materials containing carbon particles are materials having anisotropy in thermal conductivity and a small thermal expansion coefficient or Young's modulus. Therefore, when a semiconductor element that supplies carrier electrons by piezo polarization is mounted on the package, it is possible to reduce the stress applied to the semiconductor element, reduce the change in electrical characteristics before and after mounting the semiconductor element, Variations in electrical characteristics can be suppressed.

Further, the semiconductor device is composed of a part of a semiconductor crystal of the semiconductor field-effect transistor for supplying a carrier by piezoelectric charge, or all GaN layer and _{Al X Ga 1-X} N layer (0 <X ≦ 1) It can also be done.

Further, the semiconductor device includes a thermal expansion coefficient (αc) in a surface direction on which the semiconductor element of the package is mounted, a thermal expansion coefficient (αs) in a connection surface of the semiconductor substrate with the package, Relational expression between Young's modulus (Ec) in the surface direction on which the semiconductor element is mounted G = | αc−αs | * 270 * Ec
The semiconductor device can be characterized in that G is 0.1 GPa or less.

  According to the present invention, in a semiconductor field effect transistor that supplies electrons by piezo-polarization, a change in electrical characteristics is reduced by reducing a stress newly applied by mounting a semiconductor element on a package, and a variation in characteristics after mounting. A semiconductor device that can suppress the above is provided.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In all the drawings, the same reference numerals are given to the same components, and the description will be omitted as appropriate. Further, in the drawings, details of each part are omitted, and only the portions necessary for explanation are extracted and shown.

FIG. 1 is a schematic perspective view of a semiconductor device showing a first embodiment of the present invention.
FIG. 2 is a schematic cross-sectional view cut in the y direction at the center of the semiconductor element. In this drawing, the details of each part are omitted, and only the portions necessary for explanation are extracted and shown. 1 and 2, reference numeral 10 denotes a semiconductor element, 11 denotes a heat generation region of the semiconductor element, 12 denotes a matching circuit board, 13 denotes a package lid, 14 denotes a gold wire, and 15 denotes a package heat sink. Note that the configurations of the semiconductor element 10 and the matching circuit substrate 12 are the same as those of a known technique, and thus description thereof is omitted.

 The semiconductor device in this embodiment is manufactured as follows. First, in the semiconductor process pre-process, for example, one of Si, SiC, and sapphire is used as a semiconductor substrate for supplying carriers by piezo polarization, and the (111) plane of the Si substrate, the (0001) plane of the SiC substrate, and the sapphire are used. Surface processes such as electrodes and wiring are performed on a semiconductor device such as an FET formed of a wurtzite crystal epitaxially grown on the (0001) plane of the substrate.

 Subsequently, in the back surface process, a plated heat sink (PHS) process is performed on the back surface of the wafer, etching and the like are performed, and then individual chips are formed by dicing, whereby the semiconductor element 10 is manufactured. These pre-processes are similar to known techniques.

 Subsequently, a post-process for mounting the manufactured semiconductor element 10 on a package is performed. The semiconductor element 10 and the matching circuit substrate 12 are fused with AuSn solder (containing 20% Sn) on a package held on a mounting device maintained at 300 ° C. Subsequently, the wire bonding apparatus is used to electrically connect the input side pad electrode of the semiconductor element 10 and the pad electrode of the matching circuit 12 and further the input terminal 18 of the package using the gold wire 14. Similarly, on the output side, the output side electrode pad of the semiconductor element and the output terminal 19 of the package are electrically connected by a gold wire. Finally, the package 13 is covered with a lid 13 and sealed.

Here, a material having anisotropy in thermal conductivity is used as the material of the package heat sink portion 15. A material having anisotropy in thermal conductivity has a direction with high thermal conductivity, but also has a low direction. Therefore, the heat dissipation performance depends on the shape of the semiconductor element 10 that is a heat generation source and the direction in which the semiconductor element 10 is arranged. It is expected to change. Therefore, when the package heat sink 15 has X parallel to the longitudinal direction of the heat generation source, Y in the vertical direction, and Z in the thickness direction of the package, the thermal conductivity is high in the Z direction, or in the Y and Z directions. To be low. By doing so, the thermal conductivity of the package is set to k _X and k with respect to the azimuth X parallel to the longitudinal direction of the semiconductor element 10 serving as a heat generation source, the vertical azimuth Y, and the azimuth Z parallel to the thickness direction of the package, respectively. _{When Y 1} and k _Z are set, the thermal conductivity of the package satisfies the relationship k _X <k _Y ≦ k _Z. Therefore, a semiconductor device having excellent heat dissipation can be realized.

The package heat sink 15 can also be arranged so that the difference (Δα) between the thermal expansion coefficient of the semiconductor substrate and the thermal expansion coefficient of the package heat sink 15 is reduced in the Z direction, or in the Y direction and the Z direction. Thus, when the thermal expansion coefficients of the package heat sink 15 are α _CX , α _CY , and α _CZ and the thermal expansion coefficient of the semiconductor substrate is α _S , | α _CZ −α _S | ≦ | α _CY − α _S | <| α _CX −α _S | Therefore, the amount of distortion between the package and the semiconductor element can be reduced. In addition, the stress applied to the semiconductor element can be reduced.

Moreover, the package heat sink part 15 can also be arrange | positioned so that Young's modulus may become small in a Z direction or a Y direction and a Z direction. By doing so, when the Young's modulus of the package is set to E _CX , E _CY and E _CZ , the relationship of E _CZ ≦ E _CY <E _CX is satisfied. Therefore, the stress applied to the semiconductor element 10 can be reduced.

 As the material of the package heat sink portion 15, for example, a material containing carbon fiber can be used. A composite material containing carbon particles can also be used. Furthermore, a composite material in which a composite material made of carbon fiber and carbon particles is impregnated with a metal such as Cu or Al can be used. Such a material is a material having a low coefficient of thermal expansion and a low Young's modulus. Therefore, even when the temperature rises in the assembly process, the thermal stress applied to the semiconductor element can be reduced, and a highly reliable semiconductor device can be realized.

 In general, the thermal expansion coefficient of a composite material obtained by impregnating a composite material composed of carbon fibers and carbon particles with Cu or Al is 10 ppm / ° C. or less, and the thermal expansion coefficient (αcu) of Cu is 17 ppm / ° C. or the heat of Cu / W. The expansion coefficient is smaller than 190 ppm / ° C. (when the W content is 90%). On the other hand, the thermal expansion coefficients of Si and SiC used as a GaN / AlGaN-based substrate that supplies carrier electrons by piezoelectric polarization are 4 ppm / ° C., respectively. Therefore, the thermal expansion coefficients of the composite material and Si and SiC are approximate.

 The Young's modulus (Ecu) of Cu is 125 GPa, and the Young's modulus of Cu / W is 255 GPa (when the W content is 90%). On the other hand, the Young's modulus of a composite material obtained by impregnating a composite material composed of carbon fibers and carbon particles with Cu or Al is 1 to 30 GPa (some of which have anisotropy), such as the Young's modulus of Cu or Cu / W, etc. Small compared to

 Therefore, by using a composite material in which Cu or Al is impregnated into a composite material composed of carbon fibers and carbon particles as a package material, when a semiconductor element that supplies carrier electrons by piezoelectric polarization is mounted on the package, the semiconductor The stress applied to the element can be reduced, and the characteristic variation of the semiconductor element before and after mounting the semiconductor element and the characteristic variation between the semiconductor elements can be reduced.

(Example 1)
In FIG. 2, the semiconductor element 10 is an FET chip composed of an AlGaN / GaN layer formed on a Si substrate, for example. The carrier electrons of this FET chip are supplied mainly by piezo polarization. In the pre-process, the semiconductor device is subjected to surface processes such as electrodes and wiring. Subsequent polishing of the backside of the wafer in the backside process reduces the thickness of the substrate to 100 μm, then PHS plating, etching, etc., and then dicing into individual chips to produce FET chips To do. These pre-processes are similar to known techniques.

The heat sink portion 15 is a composite material obtained by impregnating a carbon-based composite material made of carbon fibers and carbon particles with Cu, and Young's modulus (Ec) and thermal expansion coefficient (αc) in X, Y, and Z directions are Ecx = 10 GPa, Ecy = Ecz = 25 GPa, αcx = 10 ppm / ° C., αcy = αcz = 0.1 ppm / ° C. The thermal expansion coefficient (αs) of Si is αs = 2.6 ppm / ° C. ΔT is set to 270 ° C. from the difference between room temperature (30 ° C.) and the maximum temperature in the assembly process is 300 ° C. When cooled to room temperature (30 ° C.) from the package held on the mounting device maintained at 300 ° C., the amount of strain (ε) between the composite material and the FET chip is
εx = | αcx−αs | * ΔT = 2.0e ⁻³ ,
εy = | αcy−αs | * ΔT = 0.7e ⁻³ ,
εz = | αcz−αs | * ΔT = 0.7e ⁻³
It is. On the other hand, the amount of strain when Cu is used as the package base material is
εcu = | αcu−αs | * ΔT = 3.9e ⁻³
It is. Thus, when the composite material is used as the package base material, the strain amount can be reduced to about half or less compared to the Cu base material.

When using a composite material, the stress (fc) experienced by Si is
fcx = εx * Ecx = 0.02 GPa,
fcy = εy * Ecy = 0.018 GPa,
fcz = εz * Ecz = 0.018 GPa
It is. On the other hand, when Cu is used as the package base material, the stress (fcu) that Si receives is:
fcu = εcu * Ecu = 0.5 GPa
It is 20 times larger than the case where a composite material is used.

 Further, when an anisotropic composite material is used as the arrangement in the above-described direction, the thermal conductivity in the z direction is as extremely high as about 500 W / m ° C., and the thermal conductivity in the x direction is as low as about 150 W / m ° C. Therefore, it has excellent heat dissipation performance. The thermal conductivity of the package is about 400 W / m ° C., which is a value that does not cause a problem even when compared with the thermal conductivity of Cu, 390 W / m ° C.

 Thus, by using the composite material as the package material, it is possible to maintain high thermal conductivity while reducing the stress applied to the Si substrate.

 An FET chip composed of an AlGaN / GaN layer formed on a Si substrate is mounted on a package produced by arranging the composite material in the above-described direction, and the drain current fluctuation before and after mounting the FET chip is shown in a graph ( FIG. 3). For comparison, the drain current fluctuation in the case of a copper-based package is also plotted.

 In the case of a copper-based package, the drain current decreases by about 10% after the FET chip is mounted, but hardly changes when a composite material is used. In the case of a copper-based package, the difference in variation between FET chips differs by about 10%, but in the case of a composite material, it is extremely small. This is because, in the case of a copper-based package, the stress applied to the FET chip in the process of mounting the FET chip is large. Therefore, due to the subtle amount of Au / Sn solder and the temperature variation process after mounting, This is because the characteristics are greatly changed. On the other hand, when a composite material is used, since the stress is small in the first place, it is difficult to be affected by these variations.

 In Example 1, although the case where Si was used as a semiconductor substrate for supplying carriers by piezo-polarization was described, the same effect is obtained because the Young's modulus of the composite material is small even when other SiC or sapphire is used. be able to.

 In Example 1, the case where the thickness of the semiconductor substrate was reduced to 100 μm was described, but in general, a high effect was obtained in the range of the semiconductor substrate thickness used from 20 μm to 200 μm. However, when the substrate is thin, the stress between the semiconductor element and the package increases on the semiconductor operating layer, so that the characteristic fluctuation and characteristic variation when using a Cu-based package increase, and the composite material The effect when using is relatively prominent. Conversely, when the substrate is thick, the characteristic variation and characteristic variation when using a Cu-based package are reduced, but the composite material is still superior in terms of characteristic variation and characteristic variation. It was.

(Example 2)
The characteristics of the composite material vary greatly depending on the type and amount of metal to be impregnated. For example, if the proportion of metal is increased, the coefficient of thermal expansion becomes larger so as to approach the coefficient of thermal expansion of the metal, and if the proportion of carbon or carbon fiber is increased, the coefficient of thermal expansion becomes closer to the coefficient of thermal expansion of carbon. It becomes so small. Therefore, a composite material having different Young's modulus and thermal expansion coefficient is prepared by changing the amount of copper to be impregnated, and this is used as a package material. When the FET chip manufactured in Example 1 is mounted on a package, the FET chip The relationship between the stress and the characteristic change was investigated.

FIG. 4 shows the relationship between the thermal expansion coefficient (αc) and Young's modulus (Ec) in the surface direction on which the FET chip of the package is mounted, and the thermal expansion coefficient (αs) in the connection surface with the Si substrate package (Formula 1). ) Is a graph plotting the stress (G) applied to the semiconductor and the characteristic variation when the FET chip is mounted on the package. However, ΔT was 270 ° C. When G> 0.1 GPa, the drain current changes abruptly and the variation increases. From this result, it can be said that it is desirable to satisfy G ≦ 0.1 GPa in all directions even in an anisotropic composite material.
(Formula 1) G = | αc−αs | * ΔT * Ec

 In the second embodiment, the case where Si is used as the semiconductor substrate for supplying carriers by piezo-polarization is described. However, even when other SiC or sapphire is used, the composite material has a small Young's modulus, so the same effect can be obtained. Obtainable.

 In the second embodiment, the thickness of the semiconductor substrate is reduced to 100 μm. However, generally, in the range of 20 μm to 200 μm of the used semiconductor substrate, G <0.1 GPa may be used. In other words, it was confirmed that the amount of variation in characteristics and the variation in characteristics when a chip is mounted on a carbon-based composite package can be sufficiently suppressed.

As mentioned above, although explained according to the embodiment of the present invention, the present invention is not limited only to the above-mentioned mode, and of course includes various modes according to the principle of the present invention. For example, in the above embodiment, a carbon-based composite material in which Cu is impregnated with a composite material made of carbon and carbon fiber is used as a material having anisotropic thermal conductivity, but another metal such as Al is impregnated. A carbon-based composite material may be used. The semiconductor element includes a semiconductor crystal composed of an AlGaN / GaN layer. However, the semiconductor element is composed of a GaN layer and an Al _X Ga _1-X N layer (0 <X ≦ 1). You can also. Further, although the embodiments of the present invention have been described with reference to the drawings, these are exemplifications of the present invention, and various configurations other than those described above can be adopted.

It is a typical perspective view in which the semiconductor element which consists of a rectangular heat source in a first embodiment of the present invention was mounted on a package. It is sectional drawing of the semiconductor device by which the semiconductor element which consists of a rectangular heat source in 1st embodiment of this invention was mounted on the package. It is a figure explaining Example 1 of this invention. It is a figure explaining Example 2 of this invention.

Explanation of symbols

10 Semiconductor element 11 Heat generation area (active area)
12 Matching circuit board 13 Package lid 14 Gold wire 15 Heat sink 18 Input terminal 19 Output terminal

Claims (7)

In a semiconductor device including a semiconductor element of a semiconductor field effect transistor that supplies carriers by piezoelectric charges and a package that mounts the semiconductor element,
The thermal conductivity of the package is expressed as k _X , k _Y , and k _Z with respect to an azimuth X that is parallel to the longitudinal direction of the semiconductor element that is a heat source, a vertical azimuth Y, and an azimuth Z that is parallel to the thickness direction of the package. The semiconductor device is characterized in that the thermal conductivity satisfies the relationship k _X <k _Y ≦ k _Z.  The semiconductor device according to claim 1, comprising the package containing carbon fiber.  3. The semiconductor device according to claim 1, comprising the package having a composite material including carbon particles in whole or in part. 4. The semiconductor device according to claim 1, wherein thermal expansion coefficients of the package are α _CX , α _CY , and α _CZ , respectively, and a thermal expansion coefficient of a semiconductor substrate included in the semiconductor element is α _S. A semiconductor device, wherein the thermal expansion coefficient satisfies a relationship of | α _CZ −α _S | ≦ | α _CY −α _S | <| α _CX −α _S |. 5. The semiconductor device according to claim 1, wherein when the Young's modulus of the package is set to E _CX , E _CY , and E _CZ , the Young's modulus satisfies a relationship of E _CZ ≦ E _CY <E _CX. A semiconductor device characterized by the above. 6. The semiconductor device according to claim 1, wherein a part or all of the semiconductor crystal included in the semiconductor element includes a GaN layer and an Al _X Ga _1-X N layer (0 <X ≦ 1). A semiconductor device characterized by that. 7. The semiconductor device according to claim 1, wherein a thermal expansion coefficient (αc) in a surface direction on which the semiconductor element of the package is mounted, and a thermal expansion coefficient in a connection surface of the semiconductor substrate with the package ( αs) and the Young's modulus (Ec) in the surface direction on which the semiconductor element of the package is mounted G = | αc−αs | * 270 * Ec
And G is 0.1 GPa or less.

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