JP2008109727A - Inverter unit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a motor controller capable of actually satisfactorily reducing a noise due to an inverter switching in individually PWM-driving a plurality of AC motors, especially, reducing a common mode noise. <P>SOLUTION: The inverter has a PWM control signal generating section 5 for giving a PWM control signal to an inverter 3 for PWM-driving and controlling a three-phase AC motor 1; a PWM control signal generating section 6 for giving a PWM control signal to an inverter 4 for PWM-driving and controlling a three-phase AC motor 2; and a carrier signal generating section for generating a carrier signal having the same frequency and a phase deviated by 180 degrees. With this configuration, a very excellent common mode noise canceling effects in an ON-duty ratio of approximate 50%. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an inverter device, and more particularly to reduction of the switching noise.

  High frequency switching noise (hereinafter also referred to as inverter noise) is generated in an inverter device that is formed by PWM control or the like and mainly forms an AC voltage for driving an AC motor. This inverter noise needs to be reduced as much as possible because it adversely affects the DC power supply system through the power supply line and radiates electromagnetic noise to the surroundings.

Patent Document 1 discloses that a first motor drive is realized by sharing a PWM signal generator that controls the drive of a first inverter for driving a first motor and a second inverter for driving a second motor, each of which is a three-phase inverter. ON of the upper arm element of the first inverter for driving and the ON of the lower arm element of the second inverter for driving the second motor are synchronized, turning on the lower arm element of the first inverter for driving the first motor; It is claimed that the switching noise can be reduced by synchronizing the turning on of the upper arm element of the second inverter for driving the second motor. More specifically, in this technique, the first inverter has upper arm elements U1, V1, W1, and lower arm elements X1, Y1, Z1, and the second inverter has upper arm elements U2, V2, W2, and lower arm element X2. , Y2 and Z2. A pair of switching elements U1 and X2, a pair of switching elements V1 and Y2, a pair of switching elements W1 and Z2, a pair of switching elements Y1 and V2, and a pair of switching elements Z1 and W2 are turned on and off in synchronization with each pair. Let
Japanese Patent Application No. 11-117749

  However, with the above-described switching noise canceling technology of the prior art, the two motors are always operated simultaneously, and the outputs of both motors, that is, the PWM duty ratio is fixed in a complementary relationship. there were. Furthermore, if the stray capacitances between the windings of the two motors and the ground are different, a difference occurs in the common mode noise current that flows to the outside through the stray capacitance, and the canceling effect is reduced.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a motor control device capable of substantially satisfactorily reducing noise caused by inverter switching when a plurality of motors are individually PWM-driven. It is said.

  In order to solve the above problems, the present invention comprises a half bridge formed by connecting an upper arm element and a lower arm element, which are switching elements, in series, connected in parallel for the number of phases and fed from a common DC power source. A plurality of inverter groups each including at least one inverter, and a plurality of PWM controls each including at least one PWM control signal generator for outputting a PWM control signal and individually outputting the PWM control signal to the plurality of inverter groups In a plurality of motor control devices comprising a signal generator group and a carrier signal generator that outputs a carrier signal for generating the PWM control signal to the plurality of PWM control signal generator groups, the plurality of PWM control signal generations The PWM is based on carrier signals having the same frequency and different phases It is characterized by outputting individually control signal to said inverter group. Hereinafter, in order to simplify the description, a case where each inverter group is composed of one inverter will be described as an example.

  That is, according to the present invention, the frequencies of the PWM control signals applied to the plurality of inverters are made equal to shift the phase. Preferably, the phase that minimizes the switching noise power of each inverter is selected. The phase of the PWM control signal applied to the switching elements on the same homologous arm side of the two three-phase inverters is the switching of the switching elements on the same homologous arm side of each inverter. The phase is shifted so that the noise power is preferably minimized. As a result, the ON period of the switching element on the same homologous arm side of each inverter is shifted by this phase, so that the amplitude of the resultant switching noise can be reduced. As a result, the influence of switching noise output to the outside through the power line or as electromagnetic waves can be reduced with a simple circuit configuration. In addition, since the frequency of the combined switching noise increases equivalently, for example, the effect of absorbing the switching noise current by a smoothing capacitor connected in parallel with the DC power supply can be improved.

  In a preferred aspect, the carrier signal generator individually outputs a plurality of carrier signals having different phases and equal frequencies to the plurality of PWM control signal generator groups. Thereby, the phase of the some PWM control signal output to each inverter group can be simply shifted relatively. As another aspect of the phase shift between the PWM control signals, the phase of the carrier signal or the PWM control formed is formed in each PWM control signal generator that forms the PWM control signal from the carrier signal having the same period and the same phase. It is also possible to incorporate a circuit for shifting the phase of the signal individually.

In a preferred aspect, the plurality of inverter groups include a first inverter group and a second inverter group,
The plurality of PWM control signal generator groups include a first PWM control signal generator group that outputs the PWM control signal to the first inverter group, and a second PWM control signal that outputs the PWM control signal to the second inverter group. The carrier signal generator has a phase of about 180 with respect to the carrier signal output to the first PWM control signal generator group with respect to the carrier signal output to the second PWM control signal generator group. Shift the degree. In this way, the length, that is, the amplitude of the vector indicating the above-described combined switching noise can be reduced most. For example, when the PWM on-duty ratio (hereinafter also simply referred to as duty) is in the vicinity of 50%, the switching elements of the same phase and the same arm of the first and second inverters are alternately turned on continuously. Thus, the off transition period of the other switching element overlaps the on transition period of one switching element, and an excellent common mode noise canceling effect is obtained.

  In a preferred aspect, the carrier signal generator inverts the carrier signal output to the first PWM control signal generator group to be a carrier signal output to the second PWM control signal generator group. In this way, the above 180 degree phase shift can be executed with a simple circuit.

  In a preferred aspect, the plurality of inverter groups include a first inverter group, a second inverter group, and a third inverter group, and the plurality of PWM control signal generator groups are connected to the first inverter group by the PWM. A first PWM control signal generator group that outputs a control signal; a second PWM control signal generator group that outputs the PWM control signal to the second inverter group; and a second PWM control signal that outputs the PWM control signal to the third inverter group. 3 PWM control signal generator group, and the carrier signal generator outputs a carrier signal output to the first PWM control signal generator group, a carrier signal output to the second PWM control signal generator group, and the first The phase of the carrier signal output to the 3PWM control signal generator group is shifted by approximately 120 degrees. In this way, compared with outputting these three PWM control signals with the same phase, the combined switching noise can be significantly reduced. For example, when the PWM on-duty ratio (hereinafter also simply referred to as duty) is around 33%, the switching elements of the same phase and the same arm of the first to third inverters are alternately turned on continuously, and as a result. Thus, the off transition period of another switching element overlaps the on transition period of one switching element, and an excellent common mode noise canceling effect can be obtained. Moreover, even if the above-described on-transition period and off-transition period of each switching element do not overlap, the above-described effects due to the reduction in amplitude and increase in the frequency of the combined switching noise power due to the temporal dispersion of the switching elements Can be realized.

  In a preferred aspect, a capacitor for reducing a difference in ground parasitic capacitance between the output terminals of the plurality of inverter groups and the ground is provided between the output terminals of the plurality of inverter groups having a small ground parasitic capacity and the ground. By adding, the difference in the ground parasitic capacitance of the plurality of inverter groups is reduced. Here, the ground parasitic capacitance between the inverter group or the output terminal of the inverter and the ground includes an electric load fed from the inverter, for example, a ground parasitic capacitance of a motor. In this way, it is possible to satisfactorily average the current (hereinafter also referred to as common mode noise current) flowing through the ground capacitance to the ground insulation type inverter formed by switching of the inverter and the electric load. . For example, when the PWM on-duty ratio (hereinafter also simply referred to as duty) is in the vicinity of 50%, the switching elements of the same phase and the same arm of the first and second inverters are alternately turned on continuously. Thus, the off transition period of the other switching element overlaps the on transition period of one switching element, and an excellent common mode noise canceling effect is obtained.

  In a preferred aspect, the electric loads fed from the plurality of inverter groups are combined so that the difference in ground parasitic capacitance between the plurality of inverter groups viewed from the input terminals of the plurality of inverter groups is minimized. In this way, it is possible to satisfactorily average the common mode noise current flowing through the ground capacitance to the ground insulation type inverter formed by switching of the inverter and the electric load. For example, when the PWM on-duty ratio (hereinafter also simply referred to as duty) is in the vicinity of 50%, the switching elements of the same phase and the same arm of the first and second inverters are alternately turned on continuously. Thus, the off transition period of the other switching element overlaps the on transition period of one switching element, and an excellent common mode noise canceling effect is obtained.

  Preferred embodiments of the present invention will be described below with reference to the drawings. However, the technical idea of the present invention described above should not be construed as being limited to the following embodiments, and may naturally be implemented in combination with other known techniques.

(Embodiment 1)
The multiple motor control apparatus of Embodiment 1 will be described below with reference to FIG.

(Circuit configuration)
The multiple motor control apparatus of Embodiment 1 will be described with reference to the block circuit diagram shown in FIG. This embodiment is applied to two inverter groups each consisting of one inverter.

  In FIG. 1, 1 and 2 are three-phase AC motors, 3 and 4 are inverters composed of three-phase inverters, 5 and 6 are PWM control signal generators (PWM control signal generators referred to in the present invention), and 7 is a carrier signal generator. (A part of the carrier signal generator in the present invention), 8 is an inverting circuit for inverting the signal voltage (the remainder of the carrier signal generator in the present invention), and 9 is a ground parasitic capacitance (floating capacitance) of a pair of power supply lines. ) 10 is a grounded DC power source, 11 is ground, 12 and 13 are ground capacitances (floating capacitances) of the respective phase stator coils of the three-phase AC motors 1 and 2, and 14 is connected in parallel with the DC power source 10. The stray capacitors 12 and 13 include parasitic capacitances of the AC wiring from the inverters 3 and 4 to the three-phase AC motors 1 and 2, respectively. Each of the circuit portions except for the three-phase AC motors 1 and 2 constitutes a multiple motor control device referred to in the present invention.

  The three-phase AC motors 1 and 2 are constituted by, for example, a three-phase synchronous motor or a three-phase AC motor. Of course, the number of phases is not limited to this. Each of the inverters 3 and 4 has three upper arm elements and three lower arm elements each composed of a semiconductor switching element. One upper arm element and one lower arm element are connected in series to form one half bridge circuit. Is configured. The inverters 3 and 4 are supplied with DC power from the DC power supply 10. The inverter 3 applies the formed three-phase AC voltage to the stator coil of each phase of the three-phase AC motor 1. The inverter 4 supplies the formed three-phase AC voltage to the stator coils of each phase of the three-phase AC motor 2.

  The carrier signal generation unit 7 generates, for example, a triangular wave voltage having a frequency of several tens of KHz as the first carrier signal and outputs the first carrier signal to the PWM control signal generation unit 5. Further, the inverting circuit 8 inverts the inputted triangular wave voltage and outputs it as a second carrier signal to the PWM control signal generator 6. The PWM control signal generator 5 forms a first PWM control signal composed of six PWM phase control signals based on the input first carrier signal, and individually applies it to the control electrode of each arm element of the inverter 3. The PWM control signal generator 6 generates a second PWM control signal composed of six PWM phase control signals based on the input second carrier signal, and individually applies it to the control electrode of each arm element of the inverter 4.

  The waveforms of the first PWM control signal and the second PWM control signal are different in the PWM control method. As the PWM control method, various methods such as a 120-degree conduction method, a 180-degree conduction method, and a two-phase modulation method are known. Typically, the PWM phase control signals for controlling the three upper arm elements of the first PWM phase control signal are 120 degrees out of phase. The details of the various PWM control methods described above and the formation of the PWM control signal corresponding to the details are well known and are not the gist of this embodiment, and thus further explanation is omitted.

(Description of operation)
Hereinafter, the operation of the multiple motor control device will be described. As is well known, the PWM control signal generation unit 5 includes a comparator that compares the input triangular wave voltage as the first carrier signal with a predetermined threshold voltage, and outputs a pulse signal from the comparator. Six pulse signals formed based on this are distributed to each arm element of the inverter 3 as the PWM phase control signal. Similarly, the PWM control signal generation unit 6 includes a comparator that compares the triangular wave voltage as the input second carrier signal with a predetermined threshold voltage, and is formed based on the pulse signal output from the comparator or 6 One pulse signal is distributed to each arm element of the inverter 4 as the PWM phase control signal. As a result, by modulating the threshold voltage based on a predetermined waveform, a PWM control signal corresponding to the modulation can be obtained.

  In this embodiment, the second carrier signal input to the PWM control signal generation unit 6 is 180 degrees out of phase with the first carrier signal input to the PWM control signal generation unit 5 and has the same period. For example, the phases of the PWM phase control signals that are pulse signals applied to the switching elements on the same homologous arm side of the inverter 3 and the inverter 4 are opposite to each other. This means that the temporal overlap between the switching noise power of the inverter 3 and the switching noise power of the inverter 4 is minimized, and the combined switching noise power obtained by combining them is reduced, and the combined switching frequency is doubled. Means. As a result, this means that the effect of the combined switching noise on the DC power supply 10, the motors 1 and 2, and even the nearby electrical equipment can be greatly reduced.

  This switching noise reduction effect is particularly effective when the PWM on-duty ratio is about 50%. For example, in a motor operating condition in which two inverters 3 and 4 are operated with a duty of 50%, the on transition period of the inverter 3 overlaps with the off transition period of the switching elements of the same homogenous arm of the inverter 4 and the off transition period of the inverter 3 Will overlap the on-transition period of the switching element of the same homologous arm of the inverter 4. Therefore, switching mode noise, in particular, common mode noise current flowing through the ground parasitic capacitances (stray capacitances) 9, 12, 13 and the ground 11 due to switching of the inverters 3 and 4 can be largely canceled. Even when the operation is not performed in the vicinity of the duty of 50%, the above effect is particularly remarkable because the duty is in the vicinity of 50% during the period when the threshold voltage (instantaneous value of the AC voltage) is in the vicinity of 0 value. Become.

(Modification)
In the above embodiment, the phase of the second carrier signal input to the PWM control signal generation unit 6 by the inverting circuit 8 is shifted by 180 degrees. However, the relative shift of the phase may be performed in the PWM control signal generation unit 6. .

(Modification)
In the above embodiment, the inverters 3 and 4 supply power to the three-phase AC motors 1 and 2, but instead, the inverters 3 and 4 may supply power to a three-phase AC generator motor that performs switching between electric operation and power generation operation as appropriate.

(Embodiment 2)
The multiple motor control apparatus of Embodiment 2 will be described below with reference to FIG.

  This embodiment is characterized in that a balance capacitor 15 is connected between the three-phase output terminal of the inverter 4 and the ground in the circuit of FIG. However, the stray capacitance 12 of each phase of the three-phase AC motor 1 is substantially equal to the sum of the stray capacitance 13 of each phase of the three-phase AC motor 2 and the capacitance of the balance capacitor 15. In this way, the noise current (referred to as common mode noise current) that flows to the ground through the stray capacitance (more accurately, the stray capacitance on the inverter output side) due to switching of the inverters 3 and 4 is the on-duty ratio of both the inverters 3 and 4. Are substantially equal to each other, and as described above, the on-duty ratio is in an antiphase in the vicinity of 50%.

(Embodiment 3)
A multi-motor control apparatus according to Embodiment 3 will be described below with reference to FIG.

  This embodiment is characterized in that a PWM control signal generation unit (PWM control signal generator referred to in the present invention) 16, an inverter 17, and a three-phase AC motor 18 are added to the circuit of FIG. More specifically, the PWM control signal generator 16 receives the first carrier signal from the carrier signal generator 7. The inverter 17 applies a three-phase AC voltage formed based on the input PWM control signal generator 16 to the three-phase AC motor 18. Reference numeral 19 denotes stray capacitance of each phase of the three-phase AC motor 18.

  However, in this embodiment, the stray capacitance 13 of the three-phase AC motor 2 is substantially equal to the sum of the stray capacitance 12 of the three-phase AC motor 1 and the stray capacitance 19 of the three-phase AC motor 18. In this way, even if the balance capacitor 15 described in FIG. 2 is omitted or greatly reduced in size, the common mode noise current accompanying the switching of the inverters 3 and 17 and the common mode noise current accompanying the switching of the inverter 4 can be reduced. The sizes can be approximately equal and out of phase.

(Embodiment 4)
A multi-motor control apparatus according to Embodiment 4 will be described below with reference to FIG.

  In this embodiment, instead of omitting the inverting circuit 8 in the circuit of FIG. 3, the phase of the first carrier signal output from the carrier signal generation unit 7 is shifted by π / 3 to be the second carrier signal. A circuit 81 and a phase shift circuit 82 that shifts the phase of the first carrier signal output from the carrier signal generator 7 by 2π / 3 to obtain a third carrier signal are provided. In this embodiment, it is assumed that the stray capacitances 12, 13, and 19 of the three-phase AC motors 1, 2, and 18 are substantially equal.

  The second carrier signal is input to the PWM control signal generation unit 16, and the third carrier signal is input to the PWM control signal generation unit 6. As a result, the PWM control signals output from the PWM control signal generators 5, 6, and 16 are shifted in phase by about 120 degrees at the same frequency. In this way, the switching noise output from the three inverters 3, 4, and 17 is uniformly dispersed in time, so that the combined switching noise reduction effect and the common mode noise described above can be satisfactorily reduced. In particular, these effects become significant when the on-duty ratio is about 33%.

(Experimental example)
FIG. 5 shows a common mode noise current waveform according to the second embodiment, and FIG. 6 shows a common mode noise current waveform when the phases of the first and second carrier signals are matched in the second embodiment. The on-duty ratio of the PWM control signal is 50%, the two stray capacitances 9 are each 40 nF, the stray capacitance 12 of the three-phase AC motor 1 is 12 nF, the stray capacitance 13 of the three-phase AC motor 2 is 4 nF, and the balance capacitor capacitance 15 is one. 2.7 nF per phase. 5 and 6 that the common mode noise current can be significantly reduced.

1 is a circuit diagram illustrating a multiple motor control device according to a first embodiment. FIG. 6 is a circuit diagram illustrating a multiple motor control device according to a second embodiment. FIG. 6 is a circuit diagram illustrating a multiple motor control device according to a third embodiment. FIG. 6 is a circuit diagram illustrating a multiple motor control device according to a fourth embodiment. FIG. 2 is a common mode noise current waveform diagram according to the first embodiment. It is a common mode noise current waveform figure of a comparative example.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Three-phase AC motor 2 Three-phase AC motor 3 Inverter 4 Inverter 5 PWM control signal generation part 6 PWM control signal generation part 7 Carrier signal generation part 8 Inversion circuit 9 Floating capacity 10 DC power supply 11 Ground 12 Floating capacity 13 Floating capacity 15 Balance Capacitor 16 PWM control signal generator 17 Inverter 18 Three-phase AC motor 19 Floating capacitance 81 Phase shift circuit 82 Phase shift circuit

Claims (7)

A plurality of inverters each including at least one inverter fed from a common DC power source and configured by parallelly connecting half bridges, each of which is a switching element, connected in series to each other in number of phases. Group,
A plurality of PWM control signal generator groups each including at least one PWM control signal generator for outputting a PWM control signal and individually outputting the PWM control signal to the plurality of inverter groups;
A carrier signal generator for outputting a carrier signal for generating the PWM control signal to the plurality of PWM control signal generator groups;
In a multiple motor control device comprising:
The plurality of PWM control signal generator groups are:
A multi-motor control device that individually outputs the PWM control signals based on carrier signals having the same frequency and different phases to each other to the inverter group. The multiple motor control device according to claim 1,
The carrier signal generator is
A plurality of motor control devices, wherein a plurality of carrier signals having different phases and equal frequencies are individually output to the plurality of PWM control signal generator groups. The multiple motor control device according to claim 2,
The plurality of inverter groups include a first inverter group and a second inverter group,
The plurality of PWM control signal generator groups include a first PWM control signal generator group that outputs the PWM control signal to the first inverter group, and a second PWM control signal that outputs the PWM control signal to the second inverter group. A generator group,
The carrier signal generator is configured to shift a phase of a carrier signal output to the first PWM control signal generator group to about 180 degrees with respect to a carrier signal output to the second PWM control signal generator group. . In the multiple motor control device according to claim 3,
The multi-motor control device, wherein the carrier signal generator inverts a carrier signal output to the first PWM control signal generator group to be a carrier signal output to the second PWM control signal generator group. The multiple motor control device according to claim 2,
The plurality of inverter groups include a first inverter group, a second inverter group, and a third inverter group,
The plurality of PWM control signal generator groups include a first PWM control signal generator group that outputs the PWM control signal to the first inverter group, and a second PWM control signal that outputs the PWM control signal to the second inverter group. A generator group, and a third PWM control signal generator group that outputs the PWM control signal to the third inverter group,
The carrier signal generator includes a carrier signal output to the first PWM control signal generator group, a carrier signal output to the second PWM control signal generator group, and a carrier signal output to the third PWM control signal generator group. Motor control device that shifts the phase between and approximately 120 degrees. The multiple motor control device according to claim 1,
By adding a capacitor for reducing the difference in ground parasitic capacitance between the output terminal of the plurality of inverter groups and the ground, between the output terminal of the plurality of inverter groups having a small ground parasitic capacitance and the ground, A multi-motor control device that reduces a difference in the ground parasitic capacitance of the plurality of inverter groups. The multiple motor control device according to claim 1,
A multi-motor control device that combines electric loads fed from the plurality of inverter groups so that a difference in ground parasitic capacitance between the plurality of inverter groups viewed from an input terminal of the plurality of inverter groups is minimized.

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