JP2008109039A - Microfabricated structure and its microfabrication method, and electronic device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a microfabrication method that prevents the occurrence of deterioration in device characteristics due to etching damage while reducing the number of steps since the lift-off method is used for the microfabrication method, and a microfabricated structure. <P>SOLUTION: The microfabrication method is composed so as to successively execute the following steps, that is, a step for forming a first film 2 in a prescribed area on a transparent substrate 1, a step for forming a resist film 3 on the substrate 1 and the first film 2 respectively, a step for forming a non-exposure resist area 5 and an exposure resist area 4 by emitting light to the resist film 3 in a slant direction from the rear face of the substrate 1 while using the first film 2 as a mask, a step for forming a second film 7 on the resist film, and a step for removing the non-exposure resist area 5 and the second film on the non-exposure resist area 5 by the lift-off method. By this, it is possible to achieve microstructure processing by self-alignment. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a microfabrication method using lift-off and a method for manufacturing an electronic device.

JP 2005-32978 A

(Electronic device manufacturing method)
As a method for manufacturing a fine electronic device on a substrate, a method combining photolithography and etching is generally used. For example, Patent Document 1 has a description that a region constituting a device such as a source and a drain can be patterned into a desired shape by photolithography and etching.
7A to 7C are cross-sectional views in order of steps of a conventional method for manufacturing an electronic device. On the substrate 101, a gate electrode 102, a gate insulating film 103, a semiconductor film 104, and an electrode film 105 are formed in this order from the bottom. Further, a resist pattern 106 is formed on the electrode film 105 by a photolithography method (FIG. 7A). Next, using a processing method such as dry etching or wet etching, the electrode film 105 is etched using the resist pattern 106 as a mask to form the source electrode 107 and the drain electrode 108 (FIG. 7B). Finally, the resist pattern 106 is removed, and the source contact 109 and the drain contact 110 are attached to complete the transistor (FIG. 7C).
In the conventional processing method of fine devices, the processing accuracy of the line width such as the channel length indicated by L in FIG. 7C depends on the resolution of photolithography and etching. In addition, since it is necessary to design with a margin for errors due to mask alignment, sufficiently fine processing cannot be performed. Further, since the film or the substrate constituting the device is damaged in the etching process, there is a problem that the device characteristics are deteriorated.

(Conventional lift-off method)
A lift-off method is known as one of the methods for solving the problems of the fine processing method by etching. 8A to 8E are cross-sectional views in order of steps of a conventional microfabrication method using lift-off.
In the lift-off method shown in FIG. 8, after a resist film 122 is formed on a substrate 121 (FIG. 8A), a reversal pattern portion of a required pattern is exposed (FIG. 8B), and an unexposed resist is formed. 123 is removed with a developing solution (FIG. 8C). Next, the thin film 126 to be processed is deposited on the entire surface, and after performing the light etching (FIG. 8D), the exposed resist 124 is dissolved by immersing in a solvent, and the thin film attached on the exposed resist 124 is removed. The desired thin film patterns 127a and 127b are formed on the substrate 121 (FIG. 8E).
When this lift-off method is used, desired thin film patterns 127a and 127b can be formed on the substrate 121 without damaging the substrate 121 by etching or the like. However, this lift-off method has the following problems.
A development process (FIG. 8C) and a slite etching process (FIG. 8D) are indispensable. That is, there are problems that there are many process steps and the manufacturing cost becomes high. Further, there is a problem that the adhesion between the thin film patterns 127a and 127b and the substrate 1 is poor. Further, since the projections 128a and 128b are formed at the end portions of the thin film patterns 127a and 127b, there is a problem that the wiring is likely to be disconnected when the wiring is formed on the projection.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a fine processing method and an electronic device manufacturing method capable of performing fine processing with a higher number of processes, less etching damage, and higher accuracy than the conventional technology.

The invention according to claim 1 includes a step of forming a first film in a predetermined region on the transparent substrate;
Forming a negative resist film on the substrate and the first film;
Irradiating light obliquely to the back surface from the back surface of the substrate with the first film as a mask, forming a non-exposed resist region and an exposed resist region;
Forming a second film on the resist film;
Removing the non-exposed resist region and the second film on the non-exposed resist region by lift-off;
Are sequentially performed.

The invention according to claim 2 is a step of forming a first film on a substrate;
Forming a resist film on the first film;
Irradiating light to the resist film selectively from the surface of the substrate, forming a non-exposed resist region and an exposed resist region on the substrate;
A step of forming a second thin film on the non-exposed resist region and the exposed resist region, and removing the second thin film on the non-exposed resist region and the non-exposed region by lift-off; And a step of forming a second region comprising the second thin film sequentially.

The invention according to claim 3 is a step of forming a first film in a predetermined region on the transparent substrate;
Forming a resist film on the substrate and the first film;
Irradiating light in a direction perpendicular to the back surface using the first film as a mask from the back surface of the substrate, and forming a non-exposed resist region and an exposed resist region;
Forming a second film on the resist film;
Removing the non-exposed resist region and the second film on the non-exposed resist region by lift-off;
Are sequentially performed.

  The invention according to claim 4 is the microfabrication method according to any one of claims 1 to 3, wherein the resist has a thickness of 3 nm or more.

The invention according to claim 5 is a substrate,
A first region formed on the substrate;
An end surface on the first region side is inclined and an insulating region made of a resist pattern formed on the substrate;
A second region formed on the resist pattern;
It is a microfabricated structure characterized by having.

  The invention according to claim 6 is the microfabricated structure according to claim 5, wherein the resist pattern is made of an organic material having a disulfide group or a thiol group.

  The invention according to claim 7 is the microfabricated structure according to claims 5 and 6, wherein the first region or the second region is made of gold.

  The invention according to claim 8 is the microfabricated structure according to any one of claims 5 to 7, characterized in that the end face of the first region or the end face of the second region is a (111) plane. It is.

  The invention according to claim 9 is characterized in that the distance between the end surface of the first region and the end surface of the second region is 30 nm or less, and the microfabrication according to any one of claims 5 to 8 Structure.

The invention according to claim 10 is a substrate;
A first region formed on the substrate;
An insulating region made of a resist pattern formed on the substrate in contact with the end face of the first region; and
Formed on the insulating region, the end surface of which is a second region directly above the end surface of the first region;
It is a microfabricated structure characterized by having.

  An invention according to an eleventh aspect is an electronic device having the microfabricated structure according to any one of the fifth to tenth aspects.

(Claim 1, Claim 5)
1. By combining oblique exposure with respect to the resist film and lift-off, a fine region can be formed in the stepped portion with high processing accuracy and reproducibility. In particular, it is useful for fine processing of an organic semiconductor device or an inorganic semiconductor device.
2. Since the device region is formed not by etching but by lift-off, etching damage to the substrate or the thin film is not formed, and deterioration of device characteristics can be prevented.
3. Since a new lift-off method is used, the number of steps can be reduced, and the manufacturing cost can be reduced. Further, the adhesion between the thin film and the base film does not deteriorate. Furthermore, since no protrusion is formed at the end of the processed pattern, problems such as disconnection of wiring can be prevented.
4). In the backside exposure using the electrode pattern as a mask, the source and the drain can be formed with a small distance apart by self-alignment. Since the mask process is unnecessary, the number of processes can be further reduced. In addition, since there is no overlap between the electrodes, it is effective in reducing parasitic capacitance. Since the parasitic capacitance can be reduced, it is particularly effective for improving the characteristics of the organic transistor.
5. The exposed resist region can be used as an insulating region of the device, and is effective in improving the adhesion between the substrate and the thin film formed on the resist.
6). An environmentally friendly developer such as ethanol can be used for processing.

(Claim 2)
In addition to the effect described in claim 1, the distance between the first region (for example, the source flow region) and the second region (for example, the drain region) is extremely fine not only by irradiation from the back surface but also by irradiation from the front surface. Can be processed.

(Claims 3 and 10)
In addition to the effect described in the first aspect, a device having a channel in a direction perpendicular to the substrate can be easily formed.

(Claim 4)
A device with extremely little leakage current can be formed.

(Claim 6)
The formation of the SAM is easy, and as a result, a device having excellent mobility can be obtained.

(Claims 7, 8, 9)
It is possible to obtain a device having much better mobility in which SAM is formed much better.

(Claim 11)
A device with a short channel length and a high response speed can be obtained.

  The best mode of the present invention will be described below.

<First embodiment>
(First example of electronic device manufacturing)
FIG. 1 shows a first embodiment of the present invention.
In this embodiment, a step of forming a first film 2 in a predetermined region on the transparent substrate 1, a step of forming a resist film 3 on the substrates 1 and 1, and a back surface of the substrate 1 Using the first film 2 as a mask, the resist 3 is irradiated with light in an oblique direction to form an unexposed resist region 5 and an exposed resist region 4, and a second film 7 is formed on the resist film. The step and the step of removing the non-exposed resist region 5 and the second film on the non-exposed resist region 5 by lift-off are sequentially performed.
The microfabrication structure is composed of a substrate 1, a first region 2 formed on the substrate 1, and a resist pattern formed on the substrate 1 with the end surface 4a on the first region 2 side inclined. The insulating region 4 and the second region 8 formed on the insulating region 4 are included.
Hereinafter, this embodiment will be described in more detail.
The method of manufacturing an electronic device according to the present invention is characterized in that a lift-off method is used, and a fine region having a narrow line width is formed in a step portion of the electrode pattern by obliquely exposing from the back surface of the substrate using the electrode pattern as a mask. To do.
1A to 1E are cross-sectional views showing the steps of a first specific example of the method for manufacturing an electronic device of the present invention in order of steps.
First, the source electrode 2 is formed on the substrate 1, and the negative resist film 3 is further formed (FIG. 1A).
The substrate 1 is made of a material that transmits the irradiation light in the exposure process. For example, in the case of ultraviolet exposure, a material such as glass that transmits ultraviolet rays is used. The substrate material need not necessarily be transparent to visible light. For example, when X-ray exposure is used, an X-ray transmissive material may be used even if the material is opaque to visible light.
As the material of the source electrode 2, a material having high electrical conductivity and opaque to the irradiation light in the exposure process is used. The source electrode 2 may be formed, for example, by depositing an electrode film by a method such as vapor deposition or sputtering, and then patterning by photolithography or etching, or by a printing method.
Next, light is irradiated from the back surface of the substrate 1 to expose a region of the resist film 3 that is not masked by the source electrode 2, thereby forming an exposed resist pattern 4. The resist film deposited on the source electrode 2 is not irradiated with light, and becomes a non-exposed resist pattern 5 (FIG. 1B).
A non-exposed resist region is formed on the source electrode 2 by setting the light irradiation direction to the substrate from an oblique direction as shown in the figure. The lateral length of the non-exposed resist region on the substrate 1 can be controlled with high accuracy and reproducibility by controlling the thickness of the resist film 3 and the irradiation direction of the irradiation light.
Next, the drain film 7 is deposited on the resist film without developing the resist film (FIG. 1C).
Next, the non-exposed resist 5 and the drain film thereon are peeled and removed by a lift-off method to form the drain electrode 8 (FIG. 1D). Even if mask alignment is not performed, the drain electrode 8 is patterned in a self-aligned manner with respect to the source electrode 2. The drain electrode 8 is formed on the resist 4, and a space is formed through a step between the source electrode 2 and the resist 4 formed on the substrate 1, and this space can be controlled with high accuracy.
Finally, a semiconductor film 9, a gate insulating film 10, and a gate electrode 11 are formed in this order on the source electrode 2 and the drain electrode 8. Further, the source contact 12, the gate contact 13, and the drain contact 14 are formed on the source electrode 2, the gate electrode 11, and the drain electrode 8, respectively, thereby completing the field effect transistor (FIG. 1E). The channel length L of the transistor corresponds to the distance between the source electrode 2 and the drain electrode 8, and can be processed to a very fine dimension with high accuracy.
In the device structure shown in FIG. 1, even when an electronic device is manufactured using the source electrode as the drain electrode and the drain electrode as the source electrode, the channel length is set with high accuracy as in the case of the device structure shown in FIG. Effects such as miniaturization can be obtained.
The microfabrication method of the present invention can be applied not only to the production of field effect transistors but also to other devices such as bipolar transistors. Furthermore, it is useful mainly for the production of fine metal wiring in fine processing of inorganic / organic thin film devices, organic thin film transistors (O-TFTs) for driving liquid crystals and organic EL panels. In particular, application to inexpensive multifunctional organic sensor devices can be expected.
Note that the microfabrication method of the present invention using the lift-off method and the oblique exposure enables high-precision processing of a minute region not only when manufacturing an electronic device but also when processing a general microstructure. Needless to say.

(substrate)
In the present invention, the substrate is made of any solid material such as metal, ceramics, semiconductor, wood, paper, and resin. Moreover, the base material used as a support body may be formed with these materials, and the layer which consists of other materials chosen from these materials may be formed in the surface. More specifically, iron, cast iron, stainless steel, permalloy, copper, brass, phosphor bronze, nickel, cubronickel, tin, lead, cobalt, solder, titanium, aluminum, chromium, gold, silver, platinum, palladium, zinc Metal oxide, metal nitride, metal carbide, phosphate-treated metal, chromate-treated metal, silicon, carbon, compound semiconductor, alumina oxide ceramics, earthenware, glass, quartz glass, superconductor ceramics, wood, paper Examples thereof include plastics, engineering plastics, and thermosetting resins.
The material is selected depending on the device to be manufactured by performing microfabrication.
For example, when manufacturing a TFT, a highly doped semiconductor may be used as the base material of the substrate. As the semiconductor, silicon, a compound semiconductor, an organic semiconductor, or the like can be used. Then, for example, an insulating layer such as SiO 2 may be formed on the surface of the base material to form a substrate.

(First film)
The first film formed in the predetermined region is formed of, for example, a conductive material when the region is a drain or source region. As the conductive material, a metal material or a polymer conductive material is used. Gold is particularly preferable as the metal material. Gold tends to form SAM with triazine thiol (DA).
The thickness of the first film is preferably 100 nm or less, more preferably 50 nm or less, and further preferably 30 nm or less.

(Lift-off method)
Hereinafter, the lift-off method will be described in detail.

[Resist film deposition]
First, a resist film is formed on the substrate.

Ｒは、例えば、−ＳＨ，−Ｎ（Ｃ４ Ｈ９ ）２ ，−Ｎ（Ｃ８Ｈ１７）２ ，−ＮＨＣ６Ｈ５ ，−Ｎ（ＣＨ２ −ＣＨ＝ＣＨ）２である。また、Ｍは、例えば、Ｈ，Ｌｉ，Ｎａ，Ｋ，Ｎ（Ｃ４ Ｈ９ ）４ 等である。これにより、活性化された樹脂の表面にトリアジンチオールの皮膜が形成される。また、トリアジンチオール化合物としては、例えば、［化２］に示されるものが用いられる。

これらは、有機溶媒に溶解して使用される。上記有機溶媒としては、例えば、メタノール、エチレングリコールモノエチルエーテル、プロピレングリコール、メチルエチルケトン等が使用される。
皮膜の形成は、トリアジンチオールの水溶液または有機溶媒に溶解したトリアジンチオールの溶液に金属核が付与された非導電性物質を浸漬して行なう。処理温度は６０℃以下で処理時間は数十秒〜数十分程度が望ましい。また、一般式［化３］で示されるトリアジンチオール誘導体の１種又は２種以上を用いてもよい。

（式中、Ｒ１ ，Ｒ２ は、夫々Ｈ，ＣＨ３，Ｃ２Ｈ５，Ｃ４Ｈ９，Ｃ６ Ｈ１３，Ｃ８ Ｈ１７，Ｃ１０Ｈ２１，Ｃ１２Ｈ２５，Ｃ１８Ｈ３７，Ｃ２０Ｈ４１，Ｃ２２Ｈ４５，Ｃ２４Ｈ４９，ＣＦ３Ｃ６Ｈ４，Ｃ４Ｆ９Ｃ６Ｈ４，Ｃ６Ｆ１３Ｃ６Ｈ４，Ｃ８Ｆ１７Ｃ６Ｈ４，Ｃ１０Ｆ２１Ｃ６Ｈ４，Ｃ６Ｆ１３Ｃ６Ｈ４，Ｃ９Ｆ１９ＣＨ２，Ｃ１０Ｆ２１ＣＨ２，Ｃ４Ｆ９ＣＨ２，Ｃ６Ｆ１３ＣＨ２ＣＨ２，Ｃ８Ｆ１７ＣＨ２ＣＨ２，Ｃ１０Ｆ２１ＣＨ２ＣＨ２，ＣＨ２＝ＣＨＣＨ２，ＣＨ２＝ＣＨ（ＣＨ２）８，ＣＨ２＝ＣＨ（ＣＨ２）９，Ｃ８Ｈ１７ＣＨ＝Ｃ８Ｈ１６，Ｃ６Ｈ１１，Ｃ６Ｈ５ＣＨ２，Ｃ６Ｈ５ＣＨ２ＣＨ２，ＣＨ２＝ＣＨ（ＣＨ２）４ＣＯＯＣＨ２ＣＨ２，ＣＨ２＝ＣＨ（ＣＨ２）８ＣＯＯＣＨ２ＣＨ２，ＣＨ２＝ＣＨ（ＣＨ２）９ＣＯＯＣＨ２ＣＨ２，Ｃ４Ｆ９ＣＨ＝ＣＨＣＨ２，Ｃ６Ｆ１３ＣＨ＝ＣＨＣＨ２，Ｃ８Ｆ１７ＣＨ＝ＣＨＣＨ２，Ｃ１０Ｆ２１ＣＨ＝ＣＨＣＨ２，Ｃ４Ｆ９ＣＨ２ＣＨ（ＯＨ）ＣＨ２ ，Ｃ６Ｆ１３ＣＨ２ＣＨ（ＯＨ）ＣＨ２，Ｃ８Ｆ１７ＣＨ２ＣＨ（ＯＨ）ＣＨ２，Ｃ１０Ｆ２１ＣＨ２ＣＨ（ＯＨ）ＣＨ２，ＣＨ２＝ＣＨ（ＣＨ２）４ＣＯＯ（ＣＨ２ ＣＨ２）２，ＣＨ２＝ＣＨ（ＣＨ２）８ＣＯＯ（ＣＨ２ＣＨ２）２，ＣＨ２＝ＣＨ（ＣＨ２）９ＣＯＯ（ＣＨ２ＣＨ２）２，Ｃ４Ｆ９ＣＯＯＣＨ２ＣＨ２，Ｃ６Ｆ１３ＣＯＯＣＨ２ＣＨ２，Ｃ８Ｆ１７ＣＯＯＣＨ２ＣＨ２，Ｃ１０Ｆ２１ＣＯＯＣＨ２ＣＨ２を示し、同じでも異なってもよい。Ｍは、Ｈまたはアルカリ金属を示す。）
このトリアジンチオール誘導体は、基板表面に設けるためには真空蒸着して形成してもよい。 (Resist)
In the present invention, a resist conventionally used for lift-off can be used. In particular, a resist containing a thiol group (SH) is preferable. Of the resists containing a thiol group, triazine thiol or its derivatives and triazine thiol compounds are particularly preferred. Triazine thiol is represented by the general formula (RTDM) as shown in [Chemical Formula 1].

R is, for example, —SH, —N (C 4 H 9) 2, —N (C 8 H 17) 2, —NHC 6 H 5, —N (CH 2 —CH═CH) 2. M is, for example, H, Li, Na, K, N (C4H9) 4, or the like. Thereby, a film of triazine thiol is formed on the surface of the activated resin. In addition, as the triazine thiol compound, for example, those represented by [Chemical Formula 2] are used.

These are used by dissolving in an organic solvent. Examples of the organic solvent include methanol, ethylene glycol monoethyl ether, propylene glycol, methyl ethyl ketone, and the like.
The film is formed by immersing a non-conductive substance provided with a metal nucleus in an aqueous solution of triazine thiol or a solution of triazine thiol dissolved in an organic solvent. The treatment temperature is preferably 60 ° C. or less, and the treatment time is preferably about several tens of seconds to several tens of minutes. Moreover, you may use 1 type, or 2 or more types of the triazine thiol derivative shown by general formula [Chemical Formula 3].

(In the formula, R1 and R2 are H, CH3, C2H5, C4H9, C6 H13, C8 H17, C10H21, C12H25, C18H37, C20H41, C22H45, C24H49, CF3C6H4, C4F9C6H4, C6F13C6H4, C8F17F6C4 C10F21CH2, C4F9CH2, C6F13CH2CH2, C8F17CH2CH2, C10F21CH2CH2, CH2 = CHCH2, CH2 = CH (CH2) 8, CH2 = CH (CH2) 9, C8H17CH = C8H16, C6H11, C6H5CH2, C6H5CH2CH2, CH2 = CH2CH2, CH2 = CH2 CH (CH2) 8COOCH2CH2, CH2 = CH (C H2) 9COOCH2CH2, C4F9CH = CHCH2, C6F13CH = CHCH2, C8F17CH = CHCH2, C10F21CH = CHCH2, C4F9CH2CH (OH) CH2, CH6F13CH2CH (OH) CH2, C8F17CH2CH (OH) CH2, C10F21CH2CH (OH) CH2CH (OH) CH2CH (OH) CH2CH2CH (OH) CH2 4COO (CH2CH2) 2, CH2 = CH (CH2) 8COO (CH2CH2) 2, CH2 = CH (CH2) 9COO (CH2CH2) 2, C4F9COOCH2CH2, C6F13COOCH2CH2, C8F17COOCH2CH2, C10F21COOCH2CH2 may be the same or different. , H or an alkali metal.)
The triazine thiol derivative may be formed by vacuum deposition in order to be provided on the substrate surface.

(Formation of resist layer)
A resist layer is formed by immersing a non-conductive substance provided with metal nuclei in a solution of triazine thiol dissolved in an aqueous solution or an organic solvent. The treatment temperature is preferably 60 ° C. or less, and the treatment time is preferably about several tens of seconds to several tens of minutes.
On the other hand, in the case of the vapor deposition method, the inside of the vacuum vapor deposition apparatus is adjusted to a certain degree of vacuum, and then the triazine thiol derivative as the vapor deposition source is vaporized or sublimated. After confirming that the deposition source is vaporized or sublimated, the deposition rate is adjusted to a predetermined value and deposition is started. When a film having a desired film thickness is formed, heating of the vapor deposition source is stopped. When the inside of the vacuum deposition apparatus is sufficiently cooled, the atmosphere is vented to take out the substrate on which the thin film is formed. Specific vapor deposition conditions are as follows, for example. The degree of vacuum in the vacuum evaporation apparatus is generally 1.0 Pa to 1.0 × 10 −6 Pa, preferably 1.0 × 10 −1 Pa to 1.0 × 10 −4 Pa. The temperature of the crucible heater is room temperature to 250 ° C., preferably 50 ° C. to 200 ° C., but it is uniquely determined because the optimum temperature range is determined in consideration of the molecular weight of the triazine thiol derivative and the degree of vacuum in the vapor deposition apparatus. It is not possible. A magnet may apply a magnetic field to the substrate 2 during vacuum deposition. The application condition of the magnetic field is 0.05 T (Tesla) or more, and is appropriately selected according to the type of the magnetic field forming unit 7. In the case where two or more kinds of triazine thiol derivatives are deposited simultaneously or separately, a plurality of crucibles containing different triazine thiol derivatives are used.
The resist thickness is preferably 3 nm to 100 nm. 5 nm-50 nm are more preferable, and 10-30 nm is still more preferable. In the case of forming a resist film by vapor deposition, if the thickness is less than 3 nm, the resist film may not be formed with a sufficient thickness on the side end face of the first film. In that case, there is a possibility that a short circuit occurs between the side end face of the first film and the side end face of the second film.
In order to make the end face of the first film and the end face of the second film face each other in the horizontal direction, the resist is made thinner than the thickness of the first film. On the other hand, in order to sufficiently remove the second film by lift-off, it is preferable to make it thicker than the second film. As a whole, 1/3 to 2/3 of the thickness of the first film is preferable.
If the sum of the thickness of the resist film and the thickness of the second film is equal to the thickness of the first film, the entire device becomes a device with flat electrons.

[Exposure process]
After forming the resist film, pattern exposure is performed.
Photopolymerization is performed by irradiating the thin film formed on the surface of the substrate with light. In photopolymerization, a magnetic field can be applied in the same manner as in the vapor deposition step. X-rays, ultraviolet rays, infrared rays, and the like can be used as the light rays used in the photopolymerization. Among them, ultraviolet rays having a wavelength of 200 nm to 450 nm are preferable, and ultraviolet rays of 280 nm to 450 nm are particularly preferable. As a light source, a xenon lamp or a mercury lamp can be used. The irradiation time of the light beam is preferably 0.01 seconds to 180 minutes. If it is less than 0.01 seconds, the polymerization rate becomes insufficient, and if it exceeds 180 minutes, the polymerization rate becomes slow and it takes time to form a thin film, which is not practical. The polymerization atmosphere of the photopolymerization is not limited as long as the functional group on the surface of the thin film can be oxidized, and may be in a place where air or oxygen can be supplied. The polymerization temperature condition is preferably 10 ° C to 50 ° C. If it is less than 10 ° C. or more than 50 ° C., the polymerization rate becomes slow and it takes time to form a thin film, which is not practical. The application conditions of the magnetic field are the same as when the magnetic field is applied in the vapor deposition process.
The irradiation angle θ (θ is an angle formed with a line perpendicular to the substrate) is appropriately selected within the range of 0 <θ <90 °. The inclination of the end face 4a of the exposed resist region is determined by θ. In general, 0 <θ ≦ 45 °. The distance between the end surface of the first region and the end surface of the second region can be selected by appropriately selecting the values of the resist thickness and θ. d / cos θ is preferably 5 μm or less.

[Formation of thin film to be processed (second film)]
In the present invention, a thin film to be processed is formed on the surface of the resist film after pattern exposure. Note that exposure may be performed after the second film is formed. This thin film to be processed is the second film. After pattern exposure, a thin film to be processed is formed without developing the resist.
Since the development process is not performed, the resist surface is in a smooth solid film state, and the thin film to be processed formed thereon can form a thin film to be processed with excellent flatness over the entire surface.
The material of the thin film to be processed is appropriately selected according to the target element structure.
In electronic devices, conductive materials are generally used. Metals, alloys, and conductive polymers are used. In particular, gold (Au) is preferable. It is preferable to use gold as a single crystal so that the end face of the second region in the microstructure is a (111) plane. In this case, the SAM is formed better.
The thickness of the thin film to be processed is preferably 1 nm to 200 nm. By making the thickness within this range, the advantage of high resolution occurs. In order to sufficiently perform the lift-off, the thickness of the second film is preferably thinner than the thickness of the resist. From such a viewpoint, it is preferable to set it to 1/2 or less.

[Lift-off patterning]
Lift-off is performed after forming the thin film to be processed.
In conventional lift-off, the exposed resist and the thin film to be processed are removed. In contrast, in the present invention, the unexposed resist and the unprocessed thin film thereon are removed. Therefore, it is not necessary to use an acidic solution or an alkaline solution as the lift-off chemical solution. Examples of the lift-off solution include alcohols such as methanol and ethanol, ketones such as methyl ethyl ketone, and esters such as ethyl acetate. It is also possible to use pure water or ultrapure water to which pressure is applied. A combination of water and methanol, ethanol, ethylene glycol, diethylene glycol, diethylene glycol, ethylene glycol monoethyl ether, dimethylformamide, or methylpyrrolidone is also effective.
The lift-off is performed by immersing the substrate in a lift-off solution or applying the solution to the substrate. In the case of immersion in a solution, the temperature or immersion time of the aqueous solution or solution is not particularly limited. Usually, the solution temperature is adjusted to 10 to 40 ° C., and the immersion time is 1 to 30 minutes, preferably It is preferable to set 5 to 10 minutes.

(Microfabricated structure)
After the lift-off, the thin film pattern 4a is formed on the substrate 1 through the exposure resist 2a. Conventionally, after the lift-off, the thin film pattern 4a is directly formed on the substrate 1, and therefore the adhesion between the thin film pattern 4a and the substrate 1 is not good. On the other hand, in this embodiment, the exposure resist 2a is interposed between the substrate 1 and the thin film pattern 4a. The exposure resist 2a plays a role of improving the adhesion between the substrate 1 and the thin film pattern 4a.
In addition, in order to improve adhesiveness, it is preferable to perform post-baking after lift-off. The post-baking temperature is preferably 50 ° C. to 150 ° C., and the time is preferably 5 min to 30 min. By setting the temperature and time within this range, the effect of increasing the adhesive force can be obtained.
When the lift-off is performed, the non-exposed resist 2b is dissolved by the solution. The monomer constituting the dissolved resist modifies the entire periphery of the patterned non-processed thin film pattern 4a to form a SAM (self-assembled film). In particular, when an organic molecule having a disulfide group (SS) or a thiol group (SH) is used as a resist and gold (Au) is used as a material of a thin film to be processed, a SAM is easily formed.
Thus, when the microfabrication method of the present invention is used, a thin film pattern in which the SAM is formed over the entire circumference can be easily obtained. When a semiconductor device is formed by forming a semiconductor layer on a thin film pattern due to the action of SAM, a semiconductor device having excellent mobility can be obtained.
In particular, in the present invention, the distance between the end surface of the first region (for example, the source) and the end surface of the second region (for example, the drain) can be extremely small. The end face of each region is connected by SAM. In particular, the SAM is automatically formed at the lift-off time without needing to form the SAM. That is, when the non-exposed resist is dissolved by a solution, the monomer constituting the dissolved resist modifies the entire periphery of the first region and the second region to form a SAM. Naturally, it is also formed on the end surface of the first region and the end surface of the second region. If the distance between both end faces is small, the both end faces are coupled by SAM. From this viewpoint, the distance between the end face of the first region and the end face of the second region is preferably 30 nm or less, more preferably 10 nm or less, and further preferably 5 nm or less. From the viewpoint of difficulty in controlling the irradiation angle of exposure, the lower limit is preferably 0.1 nm or more. When the end face of the first region and the end face of the second region are coupled by SAM, another layer (for example, a gate insulating film) may be directly formed thereon. Alternatively, a semiconductor layer may be once formed, and a gate insulating film may be formed thereon.
Even when the end face of the first area and the end face of the second area are not directly coupled by the SAM, the SAM is formed on the entire surface of the first area and the second area. Therefore, if a semiconductor layer (especially an organic semiconductor layer) is formed thereon, the adhesion is extremely good.

[Electronic device]
For example, when processing an electronic device having the structure shown in FIG. 4F, an active layer or an active layer may be formed after lift-off.
The active layer or the active layer is formed of, for example, a semiconductor material, a ferroelectric material, or a biomaterial.
An electronic device having excellent characteristics can be obtained by depositing an active layer on the thin film pattern 4a in which the SAM is formed over the entire circumference.
A semiconductor material inorganic semiconductor (silicon, germanium, zinc oxide, compound semiconductor), an organic semiconductor, or other semiconductors can be used. In particular, an organic semiconductor is preferable.
An example of the organic semiconductor is a π-conjugated material. Examples of the π-conjugated material include polypyrrole, polythiophene, polybenzothiophene, polyisothianaphthene, polychenylene vinylene, poly (p-phenylene vinylene), polyaniline, polyacetylene, polydiacetylene, polyazulene, polypyrene, polycarbazole, and polyseleno. Fene, polyfuran, poly (p-phenylene), polyindole, polypyridazine, naphthacene, pentacene, hexacene, heptacene, dibenzopentacene, tetrabenzopentacene, pyrene, dibenzopyrene, chrysene, perylene, coronene, terylene, obalene, quaterylene, circum Anthracene etc. are mentioned. In addition, various derivatives obtained by substituting some of these with atoms such as N, S, and O and functional groups such as a carbonyl group can also be used. Furthermore, the polycyclic condensate described in JP-A-11-195790 can be exemplified.
In addition, α-sexual thiophene α, ω-dihexyl-α-sexual thiophene, α, ω-dihexyl-α-kinkethiophene, α, ω-bis (α, which is a thiophene hexamer having the same repeating unit as these polymers. And oligomers such as 3-butoxypropyl) -α-sexithiophene and styrylbenzene derivatives.
Furthermore, metal phthalocyanines such as copper phthalocyanine and fluorine-substituted copper phthalocyanine described in JP-A-11-251601, naphthalene 1,4,5,8-tetracarboxylic acid diimide, N, N′-bis (4-trifluoromethyl) Benzyl) naphthalene 1,4,5,8-tetracarboxylic acid diimide, N, N′-bis (1H, 1H-perfluorooctyl), N, N′-bis (1H, 1H-perfluorobutyl) and N, N '-Dioctylnaphthalene 1,4,5,8-tetracarboxylic acid diimide derivative, naphthalene 2,3,6,7 tetracarboxylic acid diimide and other naphthalene tetracarboxylic acid diimides, and anthracene 2,3,6,7-tetra Condensed ring tetracals such as anthracene tetracarboxylic acid diimides such as carboxylic acid diimides Examples thereof include boronic acid diimides, fullerenes such as C60, C70, C76, C78, and C84, carbon nanotubes such as SWNT, dyes such as merocyanine dyes, and hemicyanine dyes.
Among these π-conjugated materials, thiophene, chelenylene vinylene, phenylene vinylene, p-phenylene, and at least one of these substituents are used as repeating units, and the number n of the repeating units is 4 to 10. At least one selected from the group consisting of oligomers and polymers in which the number n of repeating units is 20 or more; condensed polycyclic aromatic compounds such as pentacene; fullerenes; condensed ring tetracarboxylic acid diimides; and metal phthalocyanines preferable.
Other organic semiconductor materials include tetrathiafulvalene (TTF) -tetracyanoquinodimethane (TCNQ) complex, bisethylenetetrathiafulvalene (BEDTTTTF) -perchloric acid complex, BEDTTTTF-iodine complex, TCNQ-iodine complex. , And the like. Further examples include σ conjugated polymers such as polysilane and polygermane, and organic / inorganic hybrid materials described in Japanese Patent Application Laid-Open No. 2000-260999.
According to the above-described embodiment of the present invention, it is possible to form a pattern thin film having excellent substrate adhesion and flatness as compared with the conventional method at a low cost with a small number of processes. Since the adhesiveness with the substrate is excellent, the adhesiveness is ensured even when a flexible substrate is used.
Furthermore, the thickness of the resist and the thickness of the thin film to be processed can be made thinner than before. The SAM can be easily formed on the patterned thin film, and a semiconductor device having excellent characteristics can be produced.

<Second Embodiment>
The electronic device manufacturing method of the present invention can form a fine region with a narrow line width in a stepped portion by performing oblique exposure using the lift-off method even when exposure is performed from the substrate surface using a mask. is there.
2A to 2E are cross-sectional views in order of steps of a second specific example of the method for manufacturing an electronic device of the present invention.
In the microfabrication method according to this example, a source electrode 22 and a resist film 23 are sequentially formed on a substrate 21 (FIG. 2A). Next, oblique exposure is performed from the substrate surface using the mask 26 (FIG. 2B). An exposed resist pattern 24 and a non-exposed resist pattern 25 are formed on the resist film. Next, the drain film 28 is deposited on the resist film without developing the resist (FIG. 2C). Next, lift-off is performed, the non-exposed resist pattern 25 and the drain film thereon are removed, and a drain electrode 29 is formed on the exposed resist pattern 24 (FIG. 2D). Finally, a semiconductor film 30, a gate insulating film 31, and a gate electrode 32 are formed in this order on the source electrode 22 and the drain electrode 29. Further, the source contact 35, the gate contact 34, and the drain contact 33 are formed on the source electrode 22, the gate electrode 32, and the drain electrode 29, respectively, to complete the field effect transistor (FIG. 2E). The channel length L of the transistor corresponds to the distance between the source electrode 22 and the drain electrode 29, and can be processed to an extremely fine dimension with high accuracy.
As for the substrate and other points, those described in the first embodiment can be used as appropriate. The same applies to the following embodiments.

<Third embodiment>
Another specific example of exposure from the substrate surface using a mask will be described. 4A to 4E are cross-sectional views in order of steps of a third specific example of the method for manufacturing an electronic device of the present invention. There are two differences between the third example and the second example.
One is that the mask 46 is in close contact with the resist 45 in the exposure step shown in FIG. By bringing the mask into close contact with the resist, it is possible to minimize errors in processing accuracy due to light entering from the gaps in FIG.
The other is patterning of the source electrode. The transistor having the structure shown in FIG. 2E has a drawback in that the parasitic capacitance increases because the overlap between the source electrode 22 and the drain electrode 29 increases. In the third specific example, by patterning the source electrode 42 in advance, the overlap between the source electrode 42 and the drain electrode 48 can be reduced, which is effective in reducing parasitic capacitance.

<Fourth embodiment>
FIG. 4 shows a microfabrication method and a microfabrication structure according to this embodiment.
In the microfabrication method according to this example, a step of forming the first film 2 in a predetermined region on the transparent substrate 1;
A step (a) of forming a resist film 3 on the substrate 1 and the first film 2;
(B) forming a non-exposed resist region 5 and an exposed resist region 4 by irradiating light in a direction perpendicular to the back surface from the back surface of the substrate 1 using the first film 2 as a mask;
A step (c) of forming a second film 7 on the resist films 4 and 5;
The non-exposed resist region 5 and the step (d) of removing the second film 7 on the non-exposed resist region 5 by lift-off are sequentially performed.
The microfabricated structure according to this example includes a substrate 1, a first region 2 formed on the substrate 1, and a resist formed on the substrate 1 where the end surface 2 a and the end surface 4 a of the first region 2 are in contact with each other. An insulating region 4 made of a pattern is formed on the insulating region 4, and its end surface 8 a is directly above the end surface 2 a of the first region 2.
The steps in this example are as shown in FIGS. The only difference between the process shown in FIG. 1 and this process is that the light irradiation direction is perpendicular to the substrate in the exposure process (FIG. 4B).
However, since light is incident perpendicularly, the end face of the exposure resist 4 comes into contact with the end face of the first region 2. That is, oblique irradiation is performed in the first embodiment. In the case of oblique irradiation, as shown in FIG. 1, the end surface 4a of the exposure resist region 4 is inclined and only touches the end surface of the first region 2 at a point at one end of the inclination. Accordingly, in FIG. 1, only the semiconductor layer 9 exists between the end face 4a and the end face 2a, and leakage between the two does not cause a problem.
On the other hand, in this example, as shown in FIG. 4F, the end face 2a and the second film 9 are in contact with each other through the exposure resist region 4. Therefore, the insulation between the two becomes a problem. The insulating property between the two affects the thickness of the exposed resist region 4 and consequently the thickness of the resist film 3 to be formed. The inventor has found that if the thickness of the resist film 3 is 3 nm or more, the leakage between the two decreases. In particular, 5 nm or more is preferable and 10 nm or more is more preferable.
It has also been found that the ratio between the thickness t1 of the first film and the thickness t2 of the exposed resist region also affects the insulation characteristics. When the ratio between the two increases, t2 / t1 is preferably 1/5 or more, more preferably 1/3, and even more preferably 1/2 or more. The reason for the influence of the ratio between the two is that when the ratio between the two is small, the second film approaches the substrate side, and the area of the second film facing the end face 2a of the first film across the exposure resist region is large. It is thought to be.
4F, the end surface 2a of the source region 2 and the end surface 8a of the drain region 8 are on the same plane in the vertical direction. The channel is formed in a direction perpendicular to the substrate. The channel length is the height of the end face 4 a of the resist region 4. Therefore, it is preferable that the height of the end face 4a is as short as possible. In particular, the thickness is preferably 100 nm or less.

EXAMPLES Hereinafter, although an Example is given and this invention is demonstrated in detail, this invention is not limited to a following example.
Using the process shown in FIG. 1, the nanoelectrode shown in FIG. 1 (d) was produced under the conditions described below.

(1) Base substrate A transparent plastic substrate (PET) was used.

(2) First film formation (Au film deposition)
Film thickness: ~ 40 nm
Substrate temperature: room temperature Vacuum degree: <2 × 10−2 Pa

(3) Resist film (DA deposition)
Triazine thiol (DA) was vacuum deposited on the substrate under the following conditions.
Film thickness: ~ 20 nm
Substrate temperature: room temperature, degree of vacuum: <2 x 10-3 Pa
Growth rate: 0.2 Å / s

(4) Exposure After exposure DA deposition, exposure was performed.
UV irradiation
UV Spot Light Source: Photocure 200 (manufactured by Hamamatsu Photonics))
Illuminance: ~ 8fc
Time: ~ 15 min

(5) Second film formation (Au film deposition)
Film thickness: ~ 20 nm
Substrate temperature: room temperature Vacuum degree: <2 × 10−2 Pa
(6) Lift-off Lift-off solution: Ethanol
Ultrasonic cleaning: 1 min

The nanostructure electrode shown in FIG. 5 was prepared by the above process. The electrical characteristics of the prepared nanoelectrode were evaluated by measuring a current-voltage curve. The result is shown in FIG. The measuring apparatus used was R6425 2 Channel Current-Voltage Source / Monitor.

(A) thru | or (e) are process order sectional drawings of the manufacturing method of the electronic device which concerns on the example of 1st embodiment. (A) thru | or (e) are process order sectional drawings of the manufacturing method of the electronic device which concerns on 2nd embodiment. (A) thru | or (e) are process order sectional drawings of the manufacturing method of the electronic device which concerns on 3rd embodiment. (A) thru | or (f) is process order sectional drawing of the manufacturing method of the electronic device which concerns on 4th embodiment. It is a micro optical image of the electrode of the nano structure created in the Example. It is the electric current-voltage characteristic of the electrode of the nano structure created in the Example. (A) thru | or (c) are process order sectional drawings of the manufacturing method of the conventional electronic device. (A) thru | or (e) are process order sectional drawings of the microfabrication method by the conventional lift-off.

Explanation of symbols

1, 21, 41, 101, 121 Substrate 2, 22, 42, 107 First film (first region, source electrode)
2a End face 4a of first film End face 3, 23, 43, 122 of exposed resist pattern Resist film 4, 24, 44, 123 Exposed resist pattern (insulating region)
5, 25, 45, 124 Non-exposed resist pattern 6, 27, 55, 129 Irradiation light 7, 28, 47 Drain film 8, 29, 48, 108 Second film (second region: drain electrode)
8a End face of second film 9, 30, 49, 104 Semiconductor film 10, 31, 50, 103 Gate insulating film 11, 32, 51, 102 Gate electrode 12, 35, 54, 109 Source contact 13, 34, 53 Gate Contacts 14, 33, 52, 110 Drain contacts 26, 46, 129 Mask 105 Electrode film 106 Resist pattern 126 Thin film to be processed 127a, 127b Thin film pattern 128a, 128b Projection

Claims (11)

Forming a first film in a predetermined region on the transparent substrate;
Forming a negative resist film on the substrate and the first film;
Irradiating light obliquely to the back surface from the back surface of the substrate with the first film as a mask, forming a non-exposed resist region and an exposed resist region;
Forming a second film on the resist film;
Removing the non-exposed resist region and the second film on the non-exposed resist region by lift-off;
Are sequentially performed. Forming a first film on the substrate;
Forming a resist film on the first film;
Irradiating light to the resist film selectively from the surface of the substrate, forming a non-exposed resist region and an exposed resist region on the substrate;
A step of forming a second thin film on the non-exposed resist region and the exposed resist region, and removing the second thin film on the non-exposed resist region and the non-exposed region by lift-off; And sequentially forming the second region of the second thin film. Forming a first film in a predetermined region on the transparent substrate;
Forming a resist film on the substrate and the first film;
Irradiating light in a direction perpendicular to the back surface using the first film as a mask from the back surface of the substrate, and forming a non-exposed resist region and an exposed resist region;
Forming a second film on the resist film;
Removing the non-exposed resist region and the second film on the non-exposed resist region by lift-off;
Are sequentially performed. 4. The microfabrication method according to claim 1, wherein the resist has a thickness of 3 nm or more. A substrate,
A first region formed on the substrate;
An end surface on the first region side is inclined and an insulating region made of a resist pattern formed on the substrate;
A second region formed on the resist pattern;
A microfabricated structure characterized by comprising: 6. The microfabricated structure according to claim 5, wherein the resist pattern is made of an organic material having a disulfide group or a thiol group. 7. The microfabricated structure according to claim 5, wherein the first region or the second region is made of gold. The microfabricated structure according to any one of claims 5 to 7, wherein an end surface of the first region or an end surface of the second region is a (111) plane. The microfabricated structure according to any one of claims 5 to 8, wherein a distance between an end face of the first region and an end face of the second region is 30 nm or less. A substrate,
A first region formed on the substrate;
An insulating region made of a resist pattern formed on the substrate in contact with the end face of the first region; and
Formed on the insulating region, the end surface of which is a second region directly above the end surface of the first region;
A microfabricated structure characterized by comprising: The electronic device which has the microfabrication structure of any one of Claims 5-10.

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