JP2008103548A5 - - Google Patents

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Publication number
JP2008103548A5
JP2008103548A5 JP2006285140A JP2006285140A JP2008103548A5 JP 2008103548 A5 JP2008103548 A5 JP 2008103548A5 JP 2006285140 A JP2006285140 A JP 2006285140A JP 2006285140 A JP2006285140 A JP 2006285140A JP 2008103548 A5 JP2008103548 A5 JP 2008103548A5
Authority
JP
Japan
Prior art keywords
conductive layer
conductive paste
via hole
wiring board
blind via
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2006285140A
Other languages
Japanese (ja)
Other versions
JP2008103548A (en
Filing date
Publication date
Application filed filed Critical
Priority to JP2006285140A priority Critical patent/JP2008103548A/en
Priority claimed from JP2006285140A external-priority patent/JP2008103548A/en
Priority to CNA2007800389997A priority patent/CN101530014A/en
Priority to KR1020097006805A priority patent/KR20090068227A/en
Priority to PCT/JP2007/069976 priority patent/WO2008047718A1/en
Priority to TW096138824A priority patent/TWI406619B/en
Publication of JP2008103548A publication Critical patent/JP2008103548A/en
Publication of JP2008103548A5 publication Critical patent/JP2008103548A5/ja
Pending legal-status Critical Current

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Claims (5)

基材、前記基材の一方の表面上に設けられた第一の導電層、及び前記基材の他方の表面上に設けられた第二の導電層を有する両面基板を準備する工程、
前記第一の導電層及び前記第二の導電層を選択的に除去して配線形成する工程、
前記基材を選択的に除去することにより、前記第二の導電層を底面とし、前記基材及び前記第一の導電層を壁面とするブラインドビアホールを形成する工程、
前記ブラインドビアホールの外周である第一の導電層表面と前記ブラインドビアホールの底面とに連続するように導電性ペーストを塗布する工程、
前記塗布する工程の後に、塗布した前記導電性ペーストを１．３ｋＰａ以下の減圧下で予備乾燥する工程、
を有し、
前記導電性ペーストの塗布は、前記ブラインドビアホールの外周全体を被覆するように塗布し、
前記導電性ペーストの塗布径をＡとし、前記ブラインドビアホールの径をＢとしたとき、ＡとＢの差が２０μｍ以上２００μｍ以下であり、
前記導電性ペーストが前記第一の導電層と前記第二の導電層を電気的に接続する
ことを特徴とする、多層プリント配線板の製造方法。 Preparing a double-sided substrate having a base material, a first conductive layer provided on one surface of the base material, and a second conductive layer provided on the other surface of the base material;
A step of selectively removing the first conductive layer and the second conductive layer to form a wiring;
Selectively removing the base material to form a blind via hole having the second conductive layer as a bottom surface and the base material and the first conductive layer as a wall surface;
Applying a conductive paste so as to be continuous with the surface of the first conductive layer that is the outer periphery of the blind via hole and the bottom surface of the blind via hole;
A step of pre-drying the applied conductive paste under a reduced pressure of 1.3 kPa or less after the applying step;
Have
Application of the conductive paste is applied so as to cover the entire outer periphery of the blind via hole,
When the application diameter of the conductive paste is A and the diameter of the blind via hole is B, the difference between A and B is 20 μm or more and 200 μm or less,
The method for producing a multilayer printed wiring board, wherein the conductive paste electrically connects the first conductive layer and the second conductive layer. 前記ブラインドビアホールの径が３０μｍ以上２００μｍ以下であることを特徴とする、請求項１に記載の多層プリント配線板の製造方法。   2. The method of manufacturing a multilayer printed wiring board according to claim 1, wherein a diameter of the blind via hole is 30 μm or more and 200 μm or less. さらに、前記予備乾燥する工程の後に、プレスしながら前記導電性ペーストを硬化する工程を有する、請求項１または２に記載の多層プリント配線板の製造方法。Furthermore, the manufacturing method of the multilayer printed wiring board of Claim 1 or 2 which has the process of hardening | curing the said electrically conductive paste, pressing after the said preliminary drying process. さらに、前記両面基板の少なくとも一方の表面を被覆する絶縁層を積層する工程を含み、前記導電性ペーストを予備乾燥する工程の後、前記絶縁層を積層し、その後プレスし、前記絶縁層を前記両面配線基板に接着させるとともに、前記導電性ペーストを硬化させることを特徴とする、請求項１または２に記載の多層プリント配線板の製造方法。 Furthermore, the method includes a step of laminating an insulating layer covering at least one surface of the double-sided substrate, and after the step of predrying the conductive paste, laminating the insulating layer, and then pressing the insulating layer, together it is adhered to the double-sided wiring board, characterized in that curing the conductive paste, a method for manufacturing a multilayer printed wiring board according to claim 1 or 2. 前記プレスは、真空状態で加熱下で行うことを特徴とする、請求項３または４に記載の多層プリント配線板の製造方法。The method for producing a multilayer printed wiring board according to claim 3 or 4, wherein the pressing is performed under heating in a vacuum state.
JP2006285140A 2006-10-19 2006-10-19 Multilayer printed wiring board, and its manufacturing method Pending JP2008103548A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2006285140A JP2008103548A (en) 2006-10-19 2006-10-19 Multilayer printed wiring board, and its manufacturing method
CNA2007800389997A CN101530014A (en) 2006-10-19 2007-10-12 Multilayer printed wiring board and method for manufacturing the same
KR1020097006805A KR20090068227A (en) 2006-10-19 2007-10-12 Multilayer printed wiring board and method for manufacturing the same
PCT/JP2007/069976 WO2008047718A1 (en) 2006-10-19 2007-10-12 Multilayer printed wiring board and method for manufacturing the same
TW096138824A TWI406619B (en) 2006-10-19 2007-10-17 Multilayer print wire board and the method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006285140A JP2008103548A (en) 2006-10-19 2006-10-19 Multilayer printed wiring board, and its manufacturing method

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2011031759A Division JP5429646B2 (en) 2011-02-17 2011-02-17 Method for manufacturing double-sided printed wiring board

Publications (2)

Publication Number Publication Date
JP2008103548A JP2008103548A (en) 2008-05-01
JP2008103548A5 true JP2008103548A5 (en) 2010-09-02

Family

ID=39313949

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006285140A Pending JP2008103548A (en) 2006-10-19 2006-10-19 Multilayer printed wiring board, and its manufacturing method

Country Status (5)

Country Link
JP (1) JP2008103548A (en)
KR (1) KR20090068227A (en)
CN (1) CN101530014A (en)
TW (1) TWI406619B (en)
WO (1) WO2008047718A1 (en)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4763813B2 (en) * 2009-03-03 2011-08-31 住友電気工業株式会社 Multilayer printed wiring board and manufacturing method thereof
KR20130140618A (en) * 2010-07-20 2013-12-24 스미토모 덴키 고교 가부시키가이샤 Multilayer printed circuit board and manufacturing method therefor
KR101895416B1 (en) 2011-12-23 2018-09-06 엘지이노텍 주식회사 Print circuit board substrate and method ofmanufacturing the same
JP5793113B2 (en) * 2012-06-08 2015-10-14 住友電気工業株式会社 Flexible printed wiring board
CN103002673B (en) * 2012-12-21 2015-11-04 景旺电子科技(龙川)有限公司 A kind of manufacture method of aluminium base and line layer conduction panel
CN105307405A (en) * 2014-05-29 2016-02-03 景硕科技股份有限公司 Method for fabricating circuit board etched by polyimide
JP2018500770A (en) * 2014-12-23 2018-01-11 サンミナ コーポレーションＳａｎｍｉｎａ Ｃｏｒｐｏｒａｔｉｏｎ Hole plug for thin laminate
US10237983B2 (en) * 2014-12-23 2019-03-19 Sanmina Corporation Method for forming hole plug
JP6416093B2 (en) * 2015-02-16 2018-10-31 日本メクトロン株式会社 Manufacturing method of flexible printed wiring board
CN109803490A (en) * 2019-03-13 2019-05-24 盐城维信电子有限公司 A kind of double-faced flexible wiring board and preparation method thereof of conductive silver paste connection upper and lower level
JP7004921B2 (en) * 2019-04-26 2022-01-21 日亜化学工業株式会社 Light emitting module manufacturing method and light emitting module
CN114980521A (en) * 2022-06-06 2022-08-30 北京梦之墨科技有限公司 Electronic structure and manufacturing method thereof

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04199782A (en) * 1990-11-29 1992-07-20 Sharp Corp Forming method for through hole of flexible board
JP2001024323A (en) * 1999-07-12 2001-01-26 Ibiden Co Ltd Method for filling conductive paste and manufacture of single sided circuit board for multilayer printed wiring board
JP3892209B2 (en) * 2000-06-22 2007-03-14 大日本印刷株式会社 Printed wiring board and manufacturing method thereof
US7059044B2 (en) * 2001-07-18 2006-06-13 Matsushita Electric Industrial Co., Ltd. Method and material for manufacturing circuit-formed substrate
JP2003031917A (en) * 2001-07-19 2003-01-31 Fujikura Ltd Structure for embedding conductive paste in blind hole of circuit board
JP4468081B2 (en) * 2004-06-10 2010-05-26 三菱樹脂株式会社 Conductive paste composition for multilayer wiring board
JP2006287019A (en) * 2005-04-01 2006-10-19 Hitachi Metals Ltd Substrate with through-electrode and its manufacturing method

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