JP2008091628A5 - - Google Patents
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上記の課題を解決するために、本発明の半導体装置は、基板の一方の面に設けられた第一絶縁膜と、前記第一絶縁膜上に設けられた電極パッドとを有する半導体装置であって、前記基板の一方の面の反対側の面である基板の裏面側から前記電極パッドに達し、前記基板と前記第一絶縁膜とを貫通する孔と、前記電極パッドの裏面を除き前記孔の少なくとも側面に設けられた第二絶縁膜と、前記第二絶縁膜と前記電極パッドとを覆うように設けられた下地膜と、前記下地膜の内側で、前記孔に埋め込まれた導電材料からなる貫通電極とを有し、前記孔の側面と前記電極パッドとの角部に、前記第二絶縁膜がフィレット状に形成されていることを特徴とする。
In order to solve the above problems, a semiconductor device of the present invention is a semiconductor device having a first insulating film provided on one surface of a substrate and an electrode pad provided on the first insulating film. Te reaches from the back side of the substrate is a surface opposite to the one surface of the substrate to the electrode pad, and the hole penetrating the said substrate and said first insulating film, the holes except for the rear surface of the electrode pad A second insulating film provided on at least a side surface of the substrate, a base film provided so as to cover the second insulating film and the electrode pad, and a conductive material embedded in the hole inside the base film. The second insulating film is formed in a fillet shape at a corner between the side surface of the hole and the electrode pad .
また、本発明の半導体装置の製造方法は、基板の一方の面に第一絶縁膜を略全面に亘って形成し、前記第一絶縁膜上の所定の位置に電極パッドを形成した半導体基板に、前記基板の裏面側から、前記基板と前記第一絶縁膜との界面まで孔を形成する工程と、前記孔の底部に露出し、前記電極パッドを覆う前記第一絶縁膜を除去する工程と、前記基板の裏面上および前記孔の側面および底面に第二絶縁膜を形成する工程と、前記基板の裏面側に前記孔を覆うレジスト層を設ける工程と、前記レジスト層に加熱処理を行い、前記孔を覆う前記レジスト層の中央部を盛り上がったドーム形状とする工程と、前記孔を覆うドーム形状のレジスト層に、フォトリソグラフィにより前記孔の開口径よりも小さい開口部をパターニングする工程と、前記開口部が形成された前記レジスト層をマスクとして、前記孔の底面に露出し、前記電極パッドを覆う前記第二絶縁膜の中央部を除去する工程と、前記レジスト層を剥離する除去する工程と、前記露出した電極パッドの裏面と、残された前記第二絶縁膜の表面とに、下地膜を形成する工程と、前記孔内にメッキ処理により導電材料を埋め込み貫通電極を形成する工程と、を備えたことを特徴とする。
According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor device, comprising: forming a first insulating film over substantially the entire surface of a substrate; and forming an electrode pad at a predetermined position on the first insulating film. A step of forming a hole from the back surface side of the substrate to an interface between the substrate and the first insulating film; a step of removing the first insulating film exposed to the bottom of the hole and covering the electrode pad; A step of forming a second insulating film on the back surface of the substrate and on the side surface and bottom surface of the hole ; a step of providing a resist layer covering the hole on the back surface side of the substrate; and a heat treatment to the resist layer. A step of forming a raised dome-shaped central portion of the resist layer covering the hole , and a step of patterning an opening smaller than the opening diameter of the hole by photolithography on the dome-shaped resist layer covering the hole ; The opening As a mask the resist layer but formed, exposed on the bottom of the hole, and removing a central portion of the second insulating film covering the electrode pad, removing peeling the resist layer, wherein with a rear surface of the exposed electrode pads, on the remaining the surface of the second insulating film, forming a base film, and forming the through electrodes embedded conductive material by plating on the hole It is characterized by that.
次に、本発明の半導体装置は、基板の一方の面に設けられた第一絶縁膜と、前記第一絶縁膜上に設けられた電極パッドとを有する半導体装置であって、前記基板の一方の面の反対側の面である基板の裏面側から前記電極パッドに達し、前記基板と前記第一絶縁膜とを貫通する孔と、前記電極パッドの裏面を除き前記孔の少なくとも側面に設けられた第二絶縁膜と、前記第二絶縁膜と前記電極パッドとを覆うように設けられた下地膜と、前記下地膜の内側で、前記孔に埋め込まれた導電材料からなる貫通電極とを有し、前記孔の側面と前記第一絶縁膜の裏面との角部に、前記基板がフィレット状に張り出し形成されていることを特徴とする。
Next, a semiconductor device of the present invention is a semiconductor device having a first insulating film provided on one surface of a substrate and an electrode pad provided on the first insulating film, wherein one of the substrates The hole is provided on at least a side surface of the hole except for a hole that reaches the electrode pad from a back surface side of the substrate that is a surface opposite to the surface of the substrate and penetrates the substrate and the first insulating film, and a back surface of the electrode pad. A second insulating film, a base film provided so as to cover the second insulating film and the electrode pad, and a through electrode made of a conductive material embedded in the hole inside the base film. And the said board | substrate is extended and formed in the fillet shape in the corner | angular part of the side surface of the said hole , and the back surface of a said 1st insulating film.
次に、本発明の半導体装置の製造方法は、基板の一方の面に第一絶縁膜を略全面に亘って形成し、前記第一絶縁膜上の所定の位置に電極パッドを形成した半導体基板に、前記基板の裏面側から、孔の側面と前記第一絶縁膜の裏面との角部に前記基板をフィレット状に残しつつ、前記基板の裏面側から前記第一絶縁膜の裏面まで前記孔を形成する工程と、前記孔の底部に露出し、前記電極パッドを覆う前記第一絶縁膜を除去する工程と、前記基板の裏面上および前記孔の側面および底面に第二絶縁膜を形成する工程と、前記基板の裏面側に前記孔を覆うレジスト層を設ける工程と、前記レジスト層に加熱処理を行い、前記孔を覆う前記レジスト層の中央部を盛り上がったドーム形状とする工程と、前記孔を覆うドーム形状のレジスト層に、フォトリソグラフィにより前記孔の開口径よりも小さい開口部をパターニングする工程と、前記開口部が形成された前記レジスト層をマスクとして、前記孔の底面に露出し、前記電極パッドを覆う前記第二絶縁膜の中央部を除去する工程と、前記レジスト層を剥離する除去する工程と、前記露出した電極パッドの裏面と、残された前記第二絶縁膜の表面とに、下地膜を形成する工程と、前記孔内にメッキ処理により導電材料を埋め込み貫通電極を形成する工程と、を備えたことを特徴とする。 Next, in the method for manufacturing a semiconductor device according to the present invention, a first insulating film is formed over substantially the entire surface of one side of the substrate, and an electrode pad is formed at a predetermined position on the first insulating film. The hole from the back side of the substrate to the back side of the first insulating film while leaving the substrate in a fillet shape at the corner between the side surface of the hole and the back side of the first insulating film A step of removing the first insulating film exposed at the bottom of the hole and covering the electrode pad; and forming a second insulating film on the back surface of the substrate and on the side and bottom surfaces of the hole A step, a step of providing a resist layer covering the hole on the back side of the substrate, a step of performing heat treatment on the resist layer, and forming a raised dome shape at the center of the resist layer covering the hole , the resist layer dome shape to cover the hole, follower A step of patterning the opening smaller than the opening diameter of the hole by lithography as a mask the resist layer in which the opening is formed, exposed on the bottom of the hole, the second insulating film covering the electrode pads A step of removing the central portion of the substrate, a step of removing the resist layer, a step of forming a base film on the back surface of the exposed electrode pad and the remaining surface of the second insulating film, And a step of burying a conductive material in the hole by plating to form a through electrode.
Claims (8)
前記基板の一方の面の反対側の面である基板の裏面側から前記電極パッドに達し、前記基板と前記第一絶縁膜とを貫通する孔と、前記電極パッドの裏面を除き前記孔の少なくとも側面に設けられた第二絶縁膜と、
前記第二絶縁膜と前記電極パッドとを覆うように設けられた下地膜と、
前記下地膜の内側で、前記孔に埋め込まれた導電材料からなる貫通電極とを有し、
前記孔の側面と前記電極パッドとの角部に、前記第二絶縁膜がフィレット状に形成されていることを特徴とする半導体装置。 A semiconductor device having a first insulating film provided on one surface of a substrate and an electrode pad provided on the first insulating film,
The electrode pad is reached from the back side of the substrate, which is the surface opposite to the one surface of the substrate, passes through the substrate and the first insulating film, and at least of the holes excluding the back surface of the electrode pad A second insulating film provided on the side surface;
A base film provided to cover the second insulating film and the electrode pad;
A through electrode made of a conductive material embedded in the hole inside the base film;
2. The semiconductor device according to claim 1, wherein the second insulating film is formed in a fillet shape at a corner between the side surface of the hole and the electrode pad.
前記基板の裏面側から、前記基板と前記第一絶縁膜との界面まで孔を形成する工程と、
前記孔の底部に露出し、前記電極パッドを覆う前記第一絶縁膜を除去する工程と、
前記基板の裏面上および前記孔の側面および底面に第二絶縁膜を形成する工程と、
前記基板の裏面側に前記孔を覆うレジスト層を設ける工程と、
前記レジスト層に加熱処理を行い、前記孔を覆う前記レジスト層の中央部を盛り上がったドーム形状とする工程と、
前記孔を覆うドーム形状のレジスト層に、フォトリソグラフィにより前記孔の開口径よりも小さい開口部をパターニングする工程と、
前記開口部が形成された前記レジスト層をマスクとして、前記孔の底面に露出し、
前記電極パッドを覆う前記第二絶縁膜の中央部を除去する工程と、
前記レジスト層を剥離する除去する工程と、
前記露出した電極パッドの裏面と、残された前記第二絶縁膜の表面とに、下地膜を形成する工程と、
前記孔内にメッキ処理により導電材料を埋め込み貫通電極を形成する工程と、を備えたことを特徴とする半導体装置の製造方法。 A semiconductor substrate in which a first insulating film is formed over substantially the entire surface of one of the substrates, and electrode pads are formed at predetermined positions on the first insulating film.
Forming a hole from the back side of the substrate to the interface between the substrate and the first insulating film;
Removing the first insulating film exposed at the bottom of the hole and covering the electrode pad;
Forming a second insulating film on the back surface of the substrate and on the side surface and bottom surface of the hole ;
Providing a resist layer covering the hole on the back side of the substrate;
Heat-treating the resist layer, and forming a raised dome shape at the center of the resist layer covering the hole ;
Patterning an opening smaller than the opening diameter of the hole by photolithography in a dome-shaped resist layer covering the hole ;
Using the resist layer in which the opening is formed as a mask, exposed on the bottom surface of the hole ,
Removing a central portion of the second insulating film covering the electrode pad;
Removing the resist layer by stripping;
Forming a base film on the exposed back surface of the electrode pad and the remaining surface of the second insulating film;
And a step of embedding a conductive material in the hole by plating to form a through electrode.
前記第一絶縁膜上に設けられた電極パッドとを有する半導体装置であって、
前記基板の一方の面の反対側の面である基板の裏面側から前記電極パッドに達し、前記基板と前記第一絶縁膜とを貫通する孔と、前記電極パッドの裏面を除き前記孔の少なくとも側面に設けられた第二絶縁膜と、
前記第二絶縁膜と前記電極パッドとを覆うように設けられた下地膜と、
前記下地膜の内側で、前記孔に埋め込まれた導電材料からなる貫通電極とを有し、
前記孔の側面と前記第一絶縁膜の裏面との角部に、前記基板がフィレット状に張り出し形成されていることを特徴とする半導体装置。 A first insulating film provided on one surface of the substrate;
A semiconductor device having an electrode pad provided on the first insulating film,
The electrode pad is reached from the back side of the substrate, which is the surface opposite to the one surface of the substrate, passes through the substrate and the first insulating film, and at least of the holes excluding the back surface of the electrode pad A second insulating film provided on the side surface;
A base film provided to cover the second insulating film and the electrode pad;
A through electrode made of a conductive material embedded in the hole inside the base film;
2. A semiconductor device according to claim 1, wherein the substrate is formed in a fillet shape at corners between the side surface of the hole and the back surface of the first insulating film.
前記基板の裏面側から、孔の側面と前記第一絶縁膜の裏面との角部に前記基板をフィレット状に残しつつ、前記基板の裏面側から前記第一絶縁膜の裏面まで前記孔を形成する工程と、
前記孔の底部に露出し、前記電極パッドを覆う前記第一絶縁膜を除去する工程と、
前記基板の裏面上および前記孔の側面および底面に第二絶縁膜を形成する工程と、
前記基板の裏面側に前記孔を覆うレジスト層を設ける工程と、
前記レジスト層に加熱処理を行い、前記孔を覆う前記レジスト層の中央部を盛り上がったドーム形状とする工程と、
前記孔を覆うドーム形状のレジスト層に、フォトリソグラフィにより前記孔の開口径よりも小さい開口部をパターニングする工程と、
前記開口部が形成された前記レジスト層をマスクとして、前記孔の底面に露出し、
前記電極パッドを覆う前記第二絶縁膜の中央部を除去する工程と、
前記レジスト層を剥離する除去する工程と、
前記露出した電極パッドの裏面と、残された前記第二絶縁膜の表面とに、下地膜を形成する工程と、
前記孔内にメッキ処理により導電材料を埋め込み貫通電極を形成する工程と、を備えたことを特徴とする半導体装置の製造方法。 A semiconductor substrate in which a first insulating film is formed over substantially the entire surface of one of the substrates, and electrode pads are formed at predetermined positions on the first insulating film.
From the back side of the substrate, while leaving the substrate to fillet the corner between the back surface of the the side of the hole first insulating film, forming the hole from the back side of the substrate to the back surface of the first insulating film And a process of
Removing the first insulating film exposed at the bottom of the hole and covering the electrode pad;
Forming a second insulating film on the back surface of the substrate and on the side surface and bottom surface of the hole ;
Providing a resist layer covering the hole on the back side of the substrate;
Heat-treating the resist layer, and forming a raised dome shape at the center of the resist layer covering the hole ;
Patterning an opening smaller than the opening diameter of the hole by photolithography on a dome-shaped resist layer covering the hole ;
Using the resist layer in which the opening is formed as a mask, exposed on the bottom surface of the hole ,
Removing a central portion of the second insulating film covering the electrode pad;
Removing the resist layer by stripping;
Forming a base film on the exposed back surface of the electrode pad and the remaining surface of the second insulating film;
And a step of embedding a conductive material in the hole by plating to form a through electrode.
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JP2006270986A JP5103854B2 (en) | 2006-10-02 | 2006-10-02 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, CIRCUIT BOARD AND ELECTRONIC DEVICE |
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WO2010035379A1 (en) | 2008-09-26 | 2010-04-01 | パナソニック株式会社 | Semiconductor device and a method of fabricating the same |
EP2338171B1 (en) | 2008-10-15 | 2015-09-23 | ÅAC Microtec AB | Method for making an interconnection via |
JP5596919B2 (en) * | 2008-11-26 | 2014-09-24 | キヤノン株式会社 | Manufacturing method of semiconductor device |
US8399354B2 (en) * | 2009-01-13 | 2013-03-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Through-silicon via with low-K dielectric liner |
JP5532394B2 (en) | 2009-10-15 | 2014-06-25 | セイコーエプソン株式会社 | Semiconductor device, circuit board, and electronic equipment |
JP5703556B2 (en) * | 2009-10-19 | 2015-04-22 | セイコーエプソン株式会社 | Semiconductor device, semiconductor device manufacturing method, circuit board, and electronic apparatus |
US8384225B2 (en) * | 2010-11-12 | 2013-02-26 | Xilinx, Inc. | Through silicon via with improved reliability |
JP5598420B2 (en) * | 2011-05-24 | 2014-10-01 | 株式会社デンソー | Manufacturing method of electronic device |
SG10201710532WA (en) * | 2013-06-17 | 2018-02-27 | Applied Materials Inc | Method for copper plating through silicon vias using wet wafer back contact |
JP5765546B2 (en) * | 2014-03-07 | 2015-08-19 | セイコーエプソン株式会社 | Semiconductor device, circuit board, and electronic equipment |
JP2016225471A (en) | 2015-05-29 | 2016-12-28 | 株式会社東芝 | Semiconductor device and method of manufacturing the same |
US10874426B2 (en) | 2017-02-10 | 2020-12-29 | Covidien Lp | Seal assembly with integral filter and evacuation port |
US11357542B2 (en) | 2019-06-21 | 2022-06-14 | Covidien Lp | Valve assembly and retainer for surgical access assembly |
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