JP2008085605A - Bias voltage generating circuit and radar device using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a bias voltage generating circuit capable of narrowing down the occupied frequency bandwidth of microwave pulses outputted from power amplification to a desired range. <P>SOLUTION: The bias voltage generating circuit 12 for generating the bias voltage to be supplied to a power amplifier 11 for amplifying the power of inputted microwave pulses is provided with a drive circuit 21 for generating a drive signal on the basis of an inputted control signal; a clamping circuit 22 for clamping the drive signal generated by the drive circuit so that it does not to become predetermined voltage or smaller; a time constant circuit 23 for controlling the rise time and the fall time of the signal clamped by the clamping circuit to shape a waveform; and a transistor 24 for controlling voltage supplied from a voltage source, according to the signal subjected to waveform shaping by the time constant circuit and supplying the voltage as bias voltage to the power amplifier. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a bias voltage generation circuit for controlling a bias voltage of a power amplifier that amplifies a microwave pulse used in a phased array radar and the like, and a radar apparatus using the bias voltage generation circuit. The present invention relates to a technology for suppressing the spread of the frequency spectrum of microwave pulses.

  Conventionally, in a phased array radar or the like, a microwave pulse obtained by pulse-modulating a microwave is used as a transmission signal. When such a microwave pulse is used, it is required to reduce the spread of the frequency spectrum of the microwave pulse and to narrow the occupied frequency bandwidth because it is necessary to suppress interference with other devices. As a method of narrowing the occupied frequency bandwidth, for example, a method of band limiting by a band pass filter (BPF), a method of relaxing the rising and falling envelopes of the microwave pulse, and the like are known.

  When the band limiting method using the band pass filter is applied to, for example, an array antenna transmission / reception module used in a phased array radar, a plurality of power amplifiers AMP1 for driving a plurality of antenna elements ANT1 to ANTn, respectively, as shown in FIG. It is necessary to provide band-pass filters BPF1 to BPFn to AMPn, respectively, and there is a disadvantage that the transmission / reception module is increased in size and weight and is expensive.

  On the other hand, in the method of gradually reducing the rising and falling envelopes of the microwave pulse, a pulse-modulated microwave pulse as shown in FIG. 11 (a) is raised as shown in FIG. 11 (b). The waveform is shaped so that the falling envelope becomes gentle. Thereby, the frequency spectrum of the microwave pulse having a spread as shown in FIG. 12A can be made a frequency spectrum with a reduced spread as shown in FIG. 12B, and the occupied frequency bandwidth can be reduced. The band can be narrowed.

  The phased array radar is desired to be small and light in weight because of its application, and reduction of the number of parts and cost reduction are desired. Therefore, in the conventional phased array radar, as a method of narrowing the occupied frequency bandwidth, a method of relaxing the rising and falling envelopes of the microwave pulse is adopted. FIG. 13 is a diagram showing a configuration of a part of a transmission / reception module (hereinafter referred to as “microwave power amplification unit” for convenience) used in a conventional phased array radar using this method. The microwave power amplification unit includes a power amplifier 11, a bias voltage generation circuit 12, and a voltage source 13.

  The power amplifier 11 amplifies the microwave pulse input from the input terminal IN, shapes the waveform, and outputs the waveform from the output terminal OUT. The power amplifier 11 is generally composed of a field effect transistor or a bipolar transistor that operates in class A or class AB. When field effect transistors and bipolar transistors are generically referred to, they are simply referred to as “transistors”.

  When a field effect transistor is used as the power amplifier 11, the power amplifier 11 operates by applying a drain bias voltage from the bias voltage generation circuit 12 when a modulated microwave pulse is input, and the microwave pulse is operated. When no is input, the application of the drain bias voltage is stopped and the operation is controlled to stop.

  When a bipolar transistor is used as the power amplifier 11, the power amplifier 11 operates with a collector current supplied from the bias voltage generation circuit 12 when a modulated microwave pulse is input, and the microwave pulse is operated. When no is input, the collector current supply is stopped and the operation is controlled to stop. In this specification, a case where a field effect transistor is used as the power amplifier 11 will be described. However, when a bipolar transistor is used, the configuration and operation are almost the same as when a field effect transistor is used.

  The bias voltage generation circuit 12 includes a drive circuit 21, a time constant circuit 23, and a MOSFET 24. The drive circuit 21 boosts the input TTL or CMOS level (0-5V) control signal so that a drain bias voltage large enough to drive the power amplifier 11 is obtained, and the drive signal is sent to the time constant circuit 23 as a drive signal. send. The time constant circuit 23 includes a gate resistance Rg and a gate capacitance of the MOSFET 24.

  A capacitor may be added as necessary, and the capacitance of the time constant circuit 23 may be obtained by adding the capacitance of the capacitor to the gate capacitance of the MOSFET 24. The time constant circuit 23 controls the slope of the rising edge and the falling edge of the drive signal sent from the drive circuit 21 and applies it to the gate of the MOSFET 24 as the gate voltage of the MOSFET 24. The MOSFET 24 controls the voltage supplied from the voltage source 13 in accordance with the gate voltage supplied from the time constant circuit 23 and supplies it to the power amplifier 11 as a drain bias voltage.

  Next, the operation of the microwave power amplifying unit of the transceiver module configured as described above will be described with reference to the timing chart shown in FIG.

  First, as shown in FIG. 14A, when the control signal rises at time t0, the control signal passes through the drive circuit 21 and the time constant circuit 23, and as shown in FIG. The gate voltage of the MOSFET 24 gradually decreases from the time t0 and is applied to the gate of the MOSFET 24. When the gate voltage of the MOSFET 24 becomes smaller than the threshold voltage Vth of the MOSFET 24 at time t1, as shown in FIG. 14C, the drain voltage of the MOSFET 24 gradually increases and becomes constant at time t2. The drain voltage of the MOSFET 24 is supplied to the power amplifier 11 as a drain bias voltage.

  On the other hand, as shown in FIG. 14 (d), a modulated microwave pulse having a predetermined amplitude is input to the power amplifier 11 used in the saturated state at time t0 when the control signal rises. When the drain bias voltage starts increasing at time t1, the power amplifier 11 outputs a microwave pulse whose amplitude gradually increases from zero as shown in FIG. 14E, and at time t2, the drain bias voltage. When becomes constant, a microwave pulse with power amplified to a specified amplitude is output.

  When the state changes in this state and the control signal falls at time t3, the control signal passes through the drive circuit 21 and the time constant circuit 23, and as shown in FIG. 14B, gradually from time t3. The gate voltage of the MOSFET 24 that rises is applied to the gate of the MOSFET 24. When the gate voltage of the MOSFET 24 becomes higher than the threshold voltage Vth of the MOSFET 24 at time t4, the drain bias voltage gradually decreases as shown in FIG.

  On the other hand, the input of the microwave pulse to the power amplifier 11 is stopped at time t5 as shown in FIG. When the drain bias voltage starts decreasing at time t4, as shown in FIG. 14E, the power amplifier 11 outputs a microwave pulse that gradually decreases from the specified amplitude, and at time t5, the microwave pulse is input. When is stopped, the output of the microwave pulse is also stopped.

  In this way, the drain bias voltage is gradually raised after the microwave pulse is input, and the drain bias voltage is gently lowered before the microwave pulse is cut off. The envelope of the rising and falling of the wave pulse becomes gentle, and the spread of the frequency spectrum can be suppressed.

As a related technique, Patent Document 1 discloses a microwave pulse amplifier that can sufficiently moderate the rise and fall of a microwave pulse. This microwave pulse amplifier is a microwave pulse power amplifier in which a first stage amplifier circuit and a last stage amplifier circuit for amplifying a microwave pulse are connected to a plurality of stages. The operation time for amplifying the input microwave pulse is controlled to be longer than that of the connected final stage amplifier circuit.
JP 2005-294894 A

  In the conventional bias voltage generation circuit described above, as shown in FIG. 14 (b), after the gate voltage of the MOSFET 24 starts to rise at time t3, the drain bias voltage rises as shown in FIG. 14 (c). A fall delay time td (off) occurs before the fall starts. As a result, if the input of the microwave pulse is stopped at time t5 as shown in FIG. 14 (d) before the supply of the drain bias voltage is completely stopped, as shown in FIG. 14 (e), The power amplifier 11 stops the output at time t5 before the amplitude of the microwave pulse reaches zero. In this case, since the falling envelope of the microwave pulse output from the power amplifier 11 does not become gentle, the ideal trapezoidal shape of the microwave pulse collapses, and the spread of the frequency spectrum cannot be made sufficiently small. There is a problem that the occupied frequency bandwidth cannot be narrowed to a desired range.

  An object of the present invention is to provide a bias voltage generation circuit capable of narrowing an occupied frequency bandwidth of a microwave pulse output from power amplification to a desired range, and a radar apparatus using the bias voltage generation circuit.

  In order to solve the above-described problem, a bias voltage generation circuit according to the first aspect of the present invention is a bias voltage generation circuit that generates a bias voltage supplied to a power amplifier that amplifies an input microwave pulse. A drive circuit that generates a drive signal based on the input control signal, a clamp circuit that clamps the drive signal generated by the drive circuit so that it does not fall below a predetermined voltage, and a rise time and a rise of the signal clamped by the clamp circuit A time constant circuit that shapes the waveform by controlling the fall time, and a transistor that controls the voltage supplied from the voltage source according to the signal shaped by the time constant circuit and supplies the bias voltage to the power amplifier. It is characterized by that.

  According to a second aspect of the present invention, there is provided a bias voltage generating circuit according to the first aspect of the present invention. The clamp circuit includes a clamp voltage setting circuit for setting an arbitrary clamp voltage, and a voltage supplied to the transistor is a clamp voltage. And a diode within a range that does not fall below the clamp voltage set by the setting circuit.

  According to a third aspect of the present invention, there is provided a bias voltage generation circuit according to the first aspect of the present invention, wherein the clamp circuit includes a Zener diode set so that a voltage supplied to the transistor does not become a predetermined clamp voltage or less. It is characterized by that.

  Furthermore, a radar apparatus according to a fourth aspect of the present invention includes a transmission / reception module including a power amplifier that amplifies an input microwave pulse and a bias voltage generation circuit that generates a bias voltage of the power amplifier. The bias voltage generation circuit includes a drive circuit that generates a drive signal based on an input control signal, a clamp circuit that clamps the drive signal generated by the drive circuit so that the drive signal does not fall below a predetermined voltage, and a clamp circuit A time constant circuit that shapes the waveform by controlling the rise time and fall time of the signal clamped by the signal, and controls the voltage supplied from the voltage source according to the signal shaped by the time constant circuit, and the bias voltage And a transistor for supplying power to the power amplifier.

  According to the present invention, since the amplitude of the signal for driving the transistor for shaping the waveform of the bias voltage supplied to the power amplifier that amplifies the microwave pulse is made appropriate by the clamp circuit, the transistor is driven. Increase of the falling delay time of the signal to be transmitted can be suppressed. As a result, the disadvantage that the slope of the microwave pulse does not become gentle due to the increase in the fall delay time is eliminated, so that the occupied frequency bandwidth of the microwave pulse output from the power amplification can be set within a desired range. Can be made narrower.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a diagram illustrating a circuit configuration of a microwave power amplifier that is a part of a transmission / reception module to which a bias voltage generation circuit according to a first embodiment of the present invention is applied. In the following, the same or equivalent parts as those described in the background art column are denoted by the same reference numerals as those used in the background art column, and description thereof is omitted.

  This microwave power amplifying unit is configured by adding a clamp circuit 22 to the conventional bias voltage generating circuit 12. The clamp circuit 22 is provided to make the amplitude of the gate voltage of the MOSFET 24 appropriate, and is clamped with a clamp voltage Vss (described later) so that the drive signal output from the drive circuit 21 does not become a predetermined voltage or less. The time constant circuit 23 is supplied. For example, as shown in FIG. 2, the clamp circuit 22 includes a clamp voltage setting circuit 31, a diode D, and a buffer BUF. The output terminal of the clamp voltage setting circuit 31 is connected to the anode of the diode D, and the cathode of the diode D is connected between the output terminal of the drive circuit 21 and the input terminal of the buffer BUF. The output terminal of the buffer BUF is connected to the time constant circuit 23.

  The clamp voltage setting circuit 31 includes a shunt regulator SH, a resistor R10, a variable resistor R11, a resistor R12, and a resistor R13. One terminal of the resistor R10 is connected to the voltage source 13, and the other terminal is connected to the cathode of the shunt regulator SH. The voltage Vdd is supplied from the voltage source 13 to one terminal of the resistor R10. A variable resistor R11, a resistor R12, and a resistor R13 are connected in series between the cathode and the anode of the shunt regulator SH, and the connection point between the resistor R12 and the resistor R13 is connected to the reference terminal of the shunt regulator SH. ing.

  In the clamp voltage setting circuit 31 configured as described above, the shunt regulator SH controls the current flowing from the voltage source 13 through the resistor 10 to the inside of the shunt regulator SH so that the reference voltage VREF is, for example, 2.5V. The voltage appearing at the cathode of the shunt regulator SH (referred to as “clamp voltage Vss”) is controlled to be a constant value corresponding to the resistance value of the variable resistor R11. The clamp voltage Vss can be expressed as Vss = VREF {1+ (R11 + R12) / R13} + IREF · (R11 + R12) where IREF is a current flowing through the reference terminal of the shunt regulator SH.

  Further, as shown in FIG. 3, the clamp circuit 22 can also be configured by one Zener diode ZD connected between the time constant circuit 23 and the MOSFET 24. According to this configuration, the clamp circuit 22 can be configured more easily and inexpensively. In the example shown in FIG. 2, the time constant circuit 23 is provided after the clamp circuit 22, and in the example shown in FIG. 3, the clamp circuit 22 is provided after the time constant circuit 23. The order of arrangement with the constant circuit 23 is arbitrary.

  Next, the operation of the microwave power amplifier to which the bias voltage generation circuit according to the first embodiment of the present invention configured as described above is applied will be described with reference to the timing chart shown in FIG.

  First, as shown in FIG. 4A, when the control signal rises at time t0, the control signal passes through the drive circuit 21, the clamp circuit 22, and the time constant circuit 23, and is transferred to FIG. As shown, the gate voltage of the MOSFET 24 gradually decreases from time t0 and is applied to the gate of the MOSFET 24. When the gate voltage of the MOSFET 24 becomes smaller than the threshold voltage Vth of the MOSFET 24 at time t1, as shown in FIG. 4C, the drain voltage of the MOSFET 24 gradually increases and becomes constant at time t2. The drain voltage of the MOSFET 24 is supplied to the power amplifier 11 as a drain bias voltage. Further, as shown in FIG. 4B, the gate voltage of the MOSFET 24 that gradually falls is clamped by the clamp voltage Vss, and does not decrease any more and becomes constant at the clamp voltage Vss.

  On the other hand, as shown in FIG. 4D, a microwave pulse having a predetermined amplitude is input to the power amplifier 11 used in the saturated state at time t0 when the control signal rises. When the drain bias voltage starts increasing at time t1, the power amplifier 11 outputs a microwave pulse whose amplitude gradually increases from zero as shown in FIG. 4E, and at time t2, the drain bias voltage. When becomes constant, a microwave pulse with power amplified to a specified amplitude is output.

  In this state, when the control signal falls at time t3, the control signal passes through the drive circuit 21, the clamp circuit 22, and the time constant circuit 23, and as shown in FIG. The gate voltage of the MOSFET 24 gradually increases from t3, and is applied to the gate of the MOSFET 24. When the gate voltage of the MOSFET 24 becomes higher than the threshold voltage Vth of the MOSFET 24 at time t4, the drain bias voltage gradually decreases and becomes zero at time t5 as shown in FIG. In this case, the gate voltage of the MOSFET 24 that gradually rises from the time t3 starts to rise from the clamp voltage Vss. Therefore, the rise delay time td (off) until reaching the threshold voltage Vth of the MOSFET 24 is higher than that of the conventional case. short.

  On the other hand, the input of the microwave pulse to the power amplifier 11 is stopped after the time t5 has elapsed, as shown in FIG. When the drain bias voltage starts to decrease at time t4, as shown in FIG. 4E, the power amplifier 11 outputs a microwave pulse that gradually decreases from the specified amplitude, and the drain bias voltage becomes zero. At time t5, the amplitude of the microwave pulse becomes zero.

  Thus, by shortening the rise delay time td (off) of the gate voltage supplied to the MOSFET 24, the drain bias voltage becomes zero before the input of the microwave pulse to the power amplifier 11 is stopped. Therefore, the drain bias voltage applied to the power amplifier 11 is shaped so that the rise and fall are gentle.

  As described above, the rise and fall times of the gate voltage are controlled by the time constant circuit 23, and the amplitude of the gate voltage is controlled by the clamp circuit 22, so that the rise and fall times are slow and the fall delay time is reduced. It is shaped into a waveform of the drain bias voltage in which td (off) is suppressed. As a result, the rising and falling edges of the envelope of the microwave pulse output from the power amplifier 11 are shaped so as to be gentle like the waveform of the applied drain bias voltage.

  With the above configuration and operation, by providing the clamp circuit 22, the fall delay time td (off) of the gate voltage of the MOSFET 24 can be reduced, so that the microwave output from the power amplifier 11 without destroying the ideal trapezoidal shape. The rise and fall of the pulse envelope can be made gentle, the spread of the frequency spectrum is suppressed, and the occupied frequency band is narrowed.

  Next, an experiment for suppressing the spread of the frequency spectrum using the bias voltage generation circuit configured as described above will be described below. Here, an object is to realize a pulse width τ of 1 μs and a occupied frequency bandwidth of 7.4 MHz or less of a pulse (hereinafter referred to as “RF pulse”) obtained by detecting a microwave pulse.

  FIG. 5 is a diagram illustrating a waveform of an RF pulse. The RF pulse rise time is σr [s], the fall time is σf [s], and the pulse width τ [s] is the amplitude at the position of 50% of the rise time σr and the position of 50% of the fall time σf. Time between amplitudes.

The spectrum envelope of the ideal rectangular waveform can be expressed by the following formula (1), and the spectrum envelope of the realistic trapezoidal waveform can be expressed by the following formula (2).

Here, Δf is the detuning frequency [Hz], σ is the rise / fall time [s], and is represented by the following formula (3). The detuning frequency is a frequency separated from the carrier frequency.

  FIG. 6 is a diagram showing level attenuation characteristics by pulse modulation, where S1 is an ideal rectangular wave, S2 is a realistic trapezoidal wave (σ = 110 ns) characteristic obtained by calculation, and the line of −23 dBc is , The position satisfying the standard of occupied frequency bandwidth having a power density of 99%. As can be seen from FIG. 6, in order to realize the occupied frequency bandwidth of 7.4 MHz or less with the pulse width τ of 1 μs, the rise / fall time σ should be set to 110 [ns]. FIG. 7 is a diagram showing a frequency spectrum when the pulse width τ is 1 μs and the rise / fall time is 110 ns. It can be seen that the spread of the frequency spectrum falls within 7.4 MHz at −23 dB.

  FIG. 8 is a diagram illustrating waveforms of a control signal, a gate voltage of the MOSFET 24, a drain bias voltage, and an RF detection output of the bias voltage generation circuit (when a Zener diode is used in the clamp circuit) according to the first embodiment. Drain bias voltage rise delay time td (on) = 100 ns, drain bias voltage fall delay time td (off) = 86 ns, microwave pulse (RF detection output) rise time tr = 122 ns, microwave pulse fall Time tf = 107 ns.

  FIG. 9 is a diagram illustrating a frequency spectrum when the bias voltage generation circuit according to the first embodiment is used. The 99% occupied frequency bandwidth is 7.2 MHz, which indicates that the target 7.4 MHz is achieved.

  In addition, although the bias voltage on / off circuit is used in combination with the semiconductor element of class A or class AB operation, as shown in the first embodiment, the rise / fall time of the bias voltage by the on / off circuit is moderated. Therefore, it is possible to suppress the spread of the frequency spectrum at a small size and at a low price without adding a special circuit such as a PIN diode modulator that directly modulates a microwave.

  The present invention can be used for an array antenna transmission / reception module used in, for example, a phased array radar.

It is a figure which shows the circuit structure of the microwave power amplification part which is a part of transmission / reception module to which the bias voltage generation circuit which concerns on Example 1 of this invention was applied. It is a circuit diagram which shows the structural example of the clamp circuit shown in FIG. FIG. 6 is a circuit diagram illustrating another configuration example of the clamp circuit illustrated in FIG. 1. It is a timing chart which shows operation | movement of the microwave power amplification part to which the bias voltage generation circuit which concerns on Example 1 of this invention was applied. It is a figure which shows RF pulse used in order to demonstrate operation | movement of this invention. It is a figure which shows the level attenuation | damping characteristic by pulse modulation. It is a figure which shows a frequency spectrum in case the pulse width (tau) is 1 microsecond and rise / fall time is 110 ns. It is a figure which shows the waveform of each part of the microwave power amplification part to which the bias voltage generation circuit which concerns on Example 1 of this invention was applied. It is a figure which shows the frequency spectrum at the time of using the bias voltage generation circuit which concerns on Example 1 of this invention. It is a figure for demonstrating the method to carry out band limitation by the conventional band pass filter. It is a figure for demonstrating the method of making the envelope of the conventional microwave pulse rise and fall loose. It is a figure which shows the frequency spectrum obtained by the method of making the envelope of the rising and falling of the conventional microwave pulse gentle. It is a figure which shows the circuit structure of the microwave power amplification part which is a part of transmission / reception module to which the conventional bias voltage generation circuit was applied. It is a timing chart which shows operation | movement of the microwave power amplification part to which the conventional bias voltage generation circuit was applied.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 ... Power amplifier, 12 ... Bias voltage generation circuit, 13 ... Voltage source, 21 ... Drive circuit, 22 ... Clamp circuit, 23 ... Time constant circuit, 24 ... MOSFET, 31 ... Clamp voltage setting circuit, Rg, R10-R13 ... Resistor, D ... Diode, SH ... Shunt regulator, BUF ... Buffer, ZD ... Zener diode.

Claims (4)

A bias voltage generation circuit that generates a bias voltage supplied to a power amplifier that amplifies an input microwave pulse,
A drive circuit for generating a drive signal based on the input control signal;
A clamp circuit for clamping the drive signal generated by the drive circuit so as not to become a predetermined voltage or less;
A time constant circuit for shaping the waveform by controlling the rise time and fall time of the signal clamped by the clamp circuit;
A transistor for controlling a voltage supplied from a voltage source according to a signal shaped by the time constant circuit and supplying the power amplifier as a bias voltage;
A bias voltage generation circuit comprising: The clamp circuit is
A clamp voltage setting circuit for setting an arbitrary clamp voltage;
A diode to which the voltage supplied to the transistor does not fall below the clamp voltage set by the clamp voltage setting circuit;
The bias voltage generation circuit according to claim 1, further comprising: The clamp circuit is
The bias voltage generation circuit according to claim 1, further comprising a Zener diode set so that a voltage supplied to the transistor does not become a predetermined clamp voltage or less. A power amplifier that amplifies the input microwave pulse; and
A radar apparatus including a transmission / reception module including a bias voltage generation circuit for generating a bias voltage of the power amplifier,
The bias voltage generation circuit includes:
A drive circuit for generating a drive signal based on the input control signal;
A clamp circuit for clamping the drive signal generated by the drive circuit so as not to become a predetermined voltage or less;
A time constant circuit for shaping the waveform by controlling the rise time and fall time of the signal clamped by the clamp circuit;
A transistor for controlling a voltage supplied from a voltage source according to a signal shaped by the time constant circuit and supplying the power amplifier as a bias voltage;
A radar apparatus comprising:

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