JP2008064813A - Display device and manufacturing method of display device, and image display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a liquid crystal display device capable of improving image quality by suppressing flicker. <P>SOLUTION: The liquid crystal display device is provided with a liquid crystal driving substrate which comprises a liquid crystal pixel electrode arranged in a matrix shape, and a retention capacitance and a transistor element which are connected to liquid crystal pixel electrodes, and has a lower electrode of retention capacitance and a channel of transistor element, formed of the same polysilicon, wherein the value of resistance of the upper electrode 4c of the retention capacitance is larger than the value of resistance of the lower electrode 4b. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a display device, a display device manufacturing method, and a video display device. Specifically, the present invention relates to a display device that employs an inversion driving method, a method for manufacturing the display device, and a video display device.

  Display devices such as liquid crystal display devices and organic EL display devices have advantages such as thinness, light weight, and low power consumption over CRT (Cathode Ray Tube), and are used in electronic devices such as personal computers, mobile phones, and digital cameras. Widely used as a display device.

  Taking a display device, for example, a liquid crystal display device using a liquid crystal cell as a display element of a pixel as an example, a driving substrate (liquid crystal driving substrate) in a conventional liquid crystal display device has a plurality of pixel driving elements corresponding to the liquid crystal pixels. A plurality of data lines connected to the pixel driving elements arranged in the vertical scanning direction and a plurality of scan lines connected to the pixel driving elements arranged in the horizontal scanning direction. A device that drives a pixel driving element to control a liquid crystal pixel by sequentially supplying a vertical synchronizing signal to a line and a video signal to a data line is known (see, for example, Patent Document 1).

Hereinafter, a conventional liquid crystal driving substrate will be described with reference to the drawings.
FIG. 4 is a schematic diagram for explaining a circuit configuration of a liquid crystal drive substrate of a conventional active matrix liquid crystal display device. The liquid crystal drive substrate shown here includes a plurality of scan lines X arranged in parallel in the X-axis direction. ₁ , X ₂ , X ₃ ... And a plurality of data lines Y ₁ , Y ₂ , Y ₃ ... Arranged in parallel to the Y-axis direction, and intersections between the scan lines and the data lines Are formed with active elements T ₁₁ , T ₁₂ , T ₂₁ , T ₂₂ ... Such as thin film transistors (TFTs) as pixel transistors (hereinafter referred to as pixels Tr), and storage capacitors corresponding to the active elements. Cs ₁₁ , Cs ₁₂ , Cs ₂₁ , Cs ₂₂ ..., Liquid crystal cells L ₁₁ , L ₁₂ , L ₂₁ , L ₂₂ ... Composed of liquid crystal sandwiched between the pixel electrode and the counter electrode are formed. It is. The pixels Tr are arranged in a matrix corresponding to the liquid crystal pixels, the gate electrode of each pixel Tr is connected to the scan line, the source electrode is connected to the data line, and the drain electrode corresponds. It is connected to the storage capacitor and the pixel electrode of the liquid crystal cell.

Each data line is connected to a common video line 201 via a corresponding horizontal switch S ₁ , S ₂ , S ₃ ..., And a video signal is supplied from the video line. Furthermore, the gate electrode of the switching transistor constituting each horizontal switch is connected to the horizontal scanning circuit 202, and this horizontal scanning circuit sequentially switches the horizontal switch drive pulse signal in synchronization with the horizontal clock signal inputted from the outside. Applied to the gate electrode of the transistor. Each scan line is connected to the vertical scanning circuit 203.

The lower electrode 302b of the storage capacitor described above is formed by implanting phosphorus into polysilicon under the condition of a dose amount of 2.3 × 10 ¹⁴ / cm ² , and the upper electrode 302c of the storage capacitor is formed of phosphorus-doped amorphous silicon. (PDAS) film (the concentration of phosphorus contained in PDAS is substantially the same as that in which phosphorus is implanted under the condition of about 3.0 × 10 ¹⁶ / cm ² in terms of dose).

Here, in the case of manufacturing the liquid crystal driving substrate configured as described above, that is, when the TFT and the storage capacitor are formed on the quartz substrate, first, the quartz substrate 301 has a thickness of 150 nm as a backside light shielding film. After forming tungsten silicide (WSi) (not shown) of about ˜250 nm, an insulating film (SiO ₂ film) (not shown) of about 500 nm to 700 nm is formed by CVD, and then the TFT is formed. Polysilicon 302 serving as a lower electrode of the channel and the storage capacitor is formed by LP-CVD (Low Pressure Chemical Vapor Deposition) method or epitaxial growth. Subsequently, a TFT channel 302a and a storage capacitor lower electrode 302b are formed using a general-purpose photolithography technique and etching technique, and then an insulating film (SiO ₂ film) is formed on the TFT channel and the storage capacitor lower electrode. A film 305 is formed (see FIG. 5A).

Next, an opening 306 is formed in the insulating film on the upper layer of the lower electrode of the storage capacitor by a general-purpose photolithography technique and etching technique (see FIG. 5B), and the resistance of the lower electrode of the storage capacitor is reduced. Therefore, phosphorus is implanted under the condition of a dose amount of 2.3 × 10 ¹⁴ / cm ² (see FIG. 5C).

  Subsequently, a silicon nitride (SiN) film 303 that functions as an insulating film between the upper electrode and the lower electrode of the storage capacitor is formed on the lower electrode of the storage capacitor, and the upper portion of the storage capacitor is formed on the upper layer of the silicon nitride film. A PDAS film 304 that functions as an electrode is formed. Thereafter, an upper electrode and a gate electrode are formed using a general-purpose lithography technique and an etching technique, and then an LDD region and a source / drain region are formed by impurity implantation, whereby a TFT and a storage capacitor can be formed ( (Refer FIG.5 (d).).

  In the liquid crystal drive substrate configured as described above, when the vertical scanning circuit is driven, the scan lines are excited line-sequentially, and the pixels Tr are selected for each row. At this time, when the horizontal scanning circuit is driven and the horizontal switch is operated in a line sequential manner, the video signal supplied to the video line is sequentially sampled on each data line. The sampled video signal is sequentially written in the corresponding storage capacitor via the pixel Tr selected for each row.

JP 2000-347627 A

  By the way, in the liquid crystal driving substrate as described above, when a direct current is applied to the liquid crystal, the specific resistance value of the liquid crystal is deteriorated. Therefore, the video signal supplied to each pixel is centered on the common potential Vcom applied to the counter electrode. Inversion driving is used for AC driving. That is, a high level potential (potential higher than Vcom) and a low level potential (potential lower than Vcom) are alternately applied to the pixel electrodes constituting each liquid crystal cell.

  Here, for the purpose of improving the light transmittance by increasing the aperture ratio of the pixel region of the liquid crystal display device, each of the pixel Tr and the storage capacitor is formed corresponding to the region where the data line is formed. Therefore, in other words, each of the pixel Tr and the storage capacitor is formed so as to overlap with the data line through the insulating film, so that when the high-level potential is held in the pixel electrode and in the pixel electrode The leakage current after the pixel transistor is turned off is different from when the low level potential is held. Specifically, the low level potential is held when the high level potential is held. It is known that the leakage current is larger than that of the current time (see, for example, Japanese Patent Application No. 2006-137369).

  Also, in conventional liquid crystal display devices, impurities are implanted into the lower electrode for the purpose of lowering the resistance, but since the purpose is only to lower the resistance, the injection amount is small and the upper electrode is degenerated. The lower electrode was not degenerated.

Here, when a high level potential is held on the pixel electrode (Vcom is applied to the upper electrode of the storage capacitor and a high level potential is applied to the lower electrode of the storage capacitor), the lower electrode is directed to the upper electrode. An electric field is generated, and electrons in the lower electrode are moved below the lower electrode under the influence of the electric field, so that the upper portion of the lower electrode is depleted (the region indicated by symbol α in the figure indicates a depleted region. (See FIG. 6A). Note that when the upper portion of the lower electrode is depleted, the capacitance value of the storage capacitor is decreased.
On the other hand, when a low level potential is held on the pixel electrode (Vcom is applied to the upper electrode of the storage capacitor and a low level potential is applied to the lower electrode of the storage capacitor), the upper electrode is directed toward the lower electrode. Although an electric field is generated, a phenomenon such as depletion does not occur because the upper electrode is degenerated (see FIG. 6B).
As a result, when the low-level potential is held at the pixel electrode, the capacitance value of the storage capacitor is larger than when the high-level potential is held at the pixel electrode (FIG. 6). (See (c).)

  (1) The leakage current is larger when the high-level potential is held at the pixel electrode than when the low-level potential is held at the pixel electrode, and (2) the low-level potential is at the pixel electrode. Since the capacitance value of the storage capacitor is larger when the pixel electrode is held than when the pixel electrode is held at a high level potential, the pixel electrode is held at a lower level than when the pixel electrode is held at a high level. As a result, a potential difference from that when the potential is held causes flicker, resulting in a decrease in image quality.

  That is, when the high-level potential is held at the pixel electrode, the amount of change in the potential held at the pixel electrode is large due to a large leak current, and when the high-level potential is held at the pixel electrode, Since the capacitance value (effective capacitance) of the capacitor is small, the amount of charge flowing from the storage capacitor to the pixel electrode is small to compensate for the amount of change in the potential of the pixel electrode due to the leakage current. On the other hand, when the low-level potential is held at the pixel electrode, the amount of change in the potential held at the pixel electrode is small because the leakage current is small, and when the low-level potential is held at the pixel electrode, Since the capacitance value (effective capacitance) of the capacitor is large, the amount of charge flowing from the storage capacitor to the pixel electrode is large to compensate for the displacement of the potential of the pixel electrode due to the leak current. Therefore, when the pixel electrode holds a high level potential, the amount of change in the potential of the pixel electrode is large, and when the pixel electrode holds a low level potential, the amount of change in the potential of the pixel electrode becomes small ( (See symbol A in FIG. 7), which causes flicker.

  The present invention has been devised in view of the above points, and an object of the present invention is to provide a display device that can suppress flicker and improve image quality, a method for manufacturing the same, and a video display device. Is.

  In order to achieve the above object, a display device of the present invention includes pixel electrodes arranged in a matrix, a storage capacitor and a transistor element connected to the pixel electrode, and a lower electrode of the storage capacitor; In a display device including a driving substrate in which the channel of the transistor element is formed of the same semiconductor layer, the resistance value of the upper electrode of the storage capacitor is larger than the resistance value of the lower electrode of the storage capacitor.

  In order to achieve the above object, an image display device of the present invention includes pixel electrodes arranged in a matrix, a storage capacitor and a transistor element connected to the pixel electrode, and In the video display device having a display device including a driving substrate in which a lower electrode and a channel of the transistor element are formed of the same semiconductor layer, and performing video display using light modulated by the display device, the holding The resistance value of the upper electrode of the capacitor is larger than the resistance value of the lower electrode of the storage capacitor.

  Here, when the resistance value of the upper electrode of the storage capacitor is larger than the resistance value of the lower electrode of the storage capacitor, when the high level potential is held in the pixel electrode, the low level potential is held in the pixel electrode. As a result, the capacitance value of the storage capacitor can be made larger than when the pixel electrode is held, and as a result, the potential difference between when the pixel electrode is held at a high level and when the pixel electrode is held at a low level is reduced. be able to. Hereinafter, this point will be described.

  That is, since the resistance value of the upper electrode of the storage capacitor is larger than the resistance value of the lower electrode of the storage capacitor, in other words, the lower electrode of the storage capacitor is degenerated while the upper electrode of the storage capacitor is degenerated. Therefore, when the low-level potential is held on the pixel electrode (for example, when Vcom is applied to the upper electrode of the storage capacitor and the low-level potential is applied to the lower electrode of the storage capacitor), the upper electrode An electric field is generated from the upper electrode to the lower electrode, and electrons in the upper electrode move above the upper electrode due to the influence of this electric field, so that the lower part of the upper electrode is depleted (the region indicated by symbol α in the figure is depleted (See FIG. 8A). Note that when the lower portion of the upper electrode is depleted, the capacitance value of the storage capacitor is lowered. On the other hand, when a high level potential is held on the pixel electrode (for example, when Vcom is applied to the upper electrode of the storage capacitor and a high level potential is applied to the lower electrode of the storage capacitor), the lower electrode is changed to the upper electrode. Although an electric field is generated, the lower electrode is degenerated, so that a phenomenon such as depletion does not occur (see FIG. 8B). As a result, the capacitance value of the storage capacitor is smaller when the high-level potential is held in the pixel electrode than when the low-level potential is held in the pixel electrode (FIG. 8). (See (c).)

  As described above, considering that the leakage current is larger when the pixel electrode holds the high level potential than when the pixel electrode holds the low level potential, the pixel electrode holds the high level potential. When the pixel electrode is held, the amount of change in the potential held in the pixel electrode is large because the leakage current is large. However, when the pixel electrode is held at a high level potential, the capacitance value (effective value) of the holding capacitor is large. In addition, the amount of charge flowing from the storage capacitor to the pixel electrode is large in order to compensate for the amount of displacement of the potential of the pixel electrode due to the leak current. On the other hand, when the low-level potential is held at the pixel electrode, the amount of change in the potential held at the pixel electrode is small because the leakage current is small, but when the low-level potential is held at the pixel electrode, the holding capacitance Therefore, the amount of charge flowing from the storage capacitor to the pixel electrode is small in order to compensate for the amount of change in the potential of the pixel electrode due to the leak current. Accordingly, the potential difference between when the high-level potential is held at the pixel electrode and when the low-level potential is held at the pixel electrode can be reduced (see reference B in FIG. 7).

The relationship between the magnitude of the resistance value and the depletion layer will be described.
First, when the charge amount is q, the effective carrier density is Na, the dielectric constant of Si is εs, the vacuum dielectric constant is εo, and the potential applied to the depletion layer is φs, the width D of the depletion layer is D = (2εsεo (φs) / QNa) ^1/2 . If the effective carrier density is high, the width of the depletion layer is narrowed. If the effective carrier density is low, the width of the depletion layer is widened. That is, it can be seen that the width of the depletion layer is determined by the effective carrier density.
This effective carrier density affects the resistance value, and it is known that the effective carrier density is low when the resistance value is large, and the effective carrier density is high when the resistance value is small. When the resistance value is large, the width of the depletion layer is narrowed (degenerates), and when the resistance value is small, the width of the depletion layer is widened (not degenerated). Note that the effective carrier density does not depend on the impurity species.

  In order to achieve the above object, a display device manufacturing method of the present invention includes pixel electrodes arranged in a matrix, a storage capacitor and a transistor element connected to the pixel electrode, and the storage device In a manufacturing method of a display device including a driving substrate in which a lower electrode of a capacitor and a channel of the transistor element are formed of the same first semiconductor layer, a first electrode is formed in the lower electrode formation region of the first semiconductor layer. An impurity implantation step, a step of forming a second semiconductor layer over the first semiconductor layer via an insulating film, and an upper electrode formation region of the storage capacitor of the second semiconductor layer And performing a second impurity implantation, wherein the first impurity implantation lowers the resistance value of the semiconductor layer than the second impurity implantation.

  Here, the first impurity implantation makes the resistance value of the semiconductor layer lower than that of the second impurity implantation, so that the resistance value of the upper electrode of the storage capacitor is made smaller than the resistance value of the lower electrode of the storage capacitor. As a result, the potential difference between when the high level potential is held in the pixel electrode and when the low level potential is held in the pixel electrode can be reduced.

  In the display device, the display device manufacturing method, and the video display device to which the present invention is applied, the potential difference between when the pixel electrode holds a high level potential and when the pixel electrode holds a low level potential is reduced. The image quality can be improved by suppressing the flicker.

Hereinafter, embodiments of the present invention will be described with reference to the drawings to facilitate understanding of the present invention.
FIG. 1 is a schematic diagram for explaining a circuit configuration of a liquid crystal driving substrate (an example of a driving substrate) of an active matrix type liquid crystal display device which is an example of a display device to which the present invention is applied. Like the above-described conventional liquid crystal driving substrate, a plurality of scan lines X ₁ , X ₂ , X ₃ ... Arranged in parallel in the X-axis direction and a plurality of data arranged in parallel in the Y-axis direction. Lines Y ₁ , Y ₂ , Y ₃ ... Are provided at the intersections of the scan lines and the data lines as active elements T ₁₁ , T ₁₂ , T ₂₁ , T _22. .. Are formed, and the storage capacitors Cs ₁₁ , Cs ₁₂ , Cs ₂₁ , Cs ₂₂ ... Corresponding to each active element, and liquid crystal cells L ₁₁ , L composed of liquid crystal sandwiched between the pixel electrode and the counter electrode ₁₂ , L ₂₁ , L ₂₂ ... Are formed. The pixels Tr are arranged in a matrix corresponding to the liquid crystal pixels, the gate electrode of each pixel Tr is connected to the scan line, the source electrode is connected to the data line, and the drain electrode corresponds. It is connected to the storage capacitor and the pixel electrode of the liquid crystal cell.

Each data line is connected to a common video line 1 through corresponding horizontal switches S ₁ , S ₂ , S ₃ ..., And a video signal is supplied from the video line. Furthermore, the gate electrode of the switching transistor constituting each horizontal switch is connected to the horizontal scanning circuit 2, and this horizontal scanning circuit sequentially switches the horizontal switch driving pulse signal in synchronization with a horizontal clock signal inputted from the outside. Applied to the gate electrode of the transistor. Each scan line is connected to the vertical scanning circuit 3.

  Here, in the liquid crystal driving circuit of the present embodiment, the pixel Tr and the storage capacitor are used for the purpose of achieving excellent image quality by increasing the aperture ratio of the pixel region of the liquid crystal display device and realizing improvement in light transmittance. Each of these is formed corresponding to a region where a data line is formed. That is, the pixel Tr and the storage capacitor are formed so as to overlap with the data line via the insulating film.

The lower electrode 4b of the storage capacitor described above is formed by injecting phosphorus into polysilicon under the condition of 5.0 × 10 ¹⁵ / cm ² and has a resistance value of about 25Ω / □. On the other hand, the upper electrode 4c of the storage capacitor is formed by injecting phosphorus into polysilicon under the condition of 3.0 × 10 ¹⁴ / cm ² , and has a resistance value of about 4 KΩ / □. A tungsten silicide film 4d is formed on the upper electrode surface for the purpose of reducing the resistance of the upper electrode.

  Here, in this example, the resistance value of the upper electrode is made larger than the resistance value of the lower electrode by reducing the dose amount at the time of forming the upper electrode than at the time of forming the lower electrode. The resistance value is made larger than the resistance value of the lower electrode when the pixel electrode constituting the liquid crystal cell is held at a high level potential than when the pixel electrode is held at a low level potential. Any method may be used as long as the resistance value of the upper electrode can be made larger than the resistance value of the lower electrode, and it is not always necessary when forming the upper electrode than when forming the lower electrode. It is not necessary to make the resistance value of the upper electrode larger than the resistance value of the lower electrode by reducing the dose.

When manufacturing a liquid crystal driving substrate configured as described above, that is, when forming TFTs and storage capacitors on a quartz substrate, first, a thickness of 150 nm to 150 nm as a backside light-shielding film is formed on the quartz substrate 11. After a tungsten silicide (WSi) film (not shown) having a thickness of about 250 nm is formed, an insulating film (SiO ₂ film) (not shown) having a thickness of about 500 nm to 700 nm is formed by a CVD method. Then, polysilicon (an example of the first semiconductor layer) to be the lower electrode of the storage capacitor is formed by LP-CVD or epitaxial growth. Subsequently, the TFT channel 13 and the storage capacitor lower electrode 4b are formed by using a general-purpose photolithography technique and etching technique, and then an insulating film (SiO ₂ film) is formed on the TFT channel and the storage capacitor lower electrode. 12 is formed (see FIG. 2A). In this embodiment, polysilicon is described as an example of the first semiconductor layer. However, the first semiconductor layer is not necessarily made of polysilicon, but is made of amorphous silicon, gallium arsenide (GaAs), or germanium (Ge). There may be.

Next, an opening 16 is formed in the insulating film in the upper layer of the lower electrode of the storage capacitor by a general-purpose photolithography technique and etching technique (see FIG. 2B), and electrostatic breakdown occurs in the lower electrode of the storage capacitor. Insufficient impurities are implanted with no limit (for example, phosphorus is implanted under the condition of a dose of 5.0 × 10 ¹⁵ / cm ² ) (an example of first impurity implantation) (see FIG. 2C).

Subsequently, after a silicon nitride (SiN) film 14 functioning as an insulating film between the upper electrode and the lower electrode of the storage capacitor is formed on the upper layer of the lower electrode of the storage capacitor, the storage capacitor of the storage capacitor is formed on the upper layer of the silicon nitride film. Polysilicon 15 (an example of a second semiconductor layer) having a thickness of about 100 nm to 200 nm functioning as an upper electrode is formed by a CVD method (see FIG. 2D), and does not degenerate to this polysilicon. Then, impurities are implanted (for example, phosphorus is implanted under the condition of a dose amount of 3.0 × 10 ¹⁴ / cm ² ) (an example of second impurity implantation) (see FIG. 2E). Thereafter, a tungsten silicide (WSi) film having a thickness of about 150 nm to 250 nm is formed on the surface of the upper electrode for the purpose of reducing the resistance, and the upper electrode and the gate electrode are formed using general-purpose lithography and etching techniques. By forming an LDD region and source / drain regions by impurity implantation, a TFT and a storage capacitor can be formed (see FIG. 2F).

  In the liquid crystal driving circuit substrate in the active matrix liquid crystal display device to which the present invention is applied, the pixel electrode holds a low level potential because the resistance value of the upper electrode of the storage capacitor is larger than the resistance value of the lower electrode. The capacitance value of the storage capacitor is smaller when the pixel electrode is holding a high level potential than when the pixel electrode is holding a high level potential, and the low level potential is held when the pixel electrode is holding a high level potential. In view of the fact that the leakage current is larger than when the pixel electrode is at a high level, the potential difference between when the pixel electrode is held at a high level and when the pixel electrode is held at a low level can be reduced. Can be expected to improve image quality.

  FIG. 3 is a schematic diagram for explaining a transmissive liquid crystal projector which is an example of an image display apparatus to which the present invention is applied. The transmissive liquid crystal projector 100 shown here is a so-called three-plate system that uses red, green, and blue. A transmissive liquid crystal display device using the liquid crystal driving circuit substrate shown in FIG. 1 for the three light valves corresponding to the three primary colors is used, and a projection type display that displays an enlarged color image on a screen (not shown). It is a video display device.

  Specifically, the transmissive liquid crystal projector includes a lamp 101 that is a light source that emits illumination light, an R dichroic mirror 103R that reflects only red light (R) among illumination light from the lamp, and illumination light from the lamp. Among them, a G dichroic mirror 103G that reflects only green light (G), and an R light valve 104R that is a light modulation means that modulates and transmits red light (R), green light (G), and blue light (B). , G light valve 104G and B light valve 104B, dichroic prism 105 which is a combining optical means for combining modulated red light (R), green light (G), and blue light (B), and combined illumination light And a projection lens 106 which is a projection means for projecting the image onto the screen.

  Here, the lamp emits white light including red light (R), green light (G), and blue light (B), and includes, for example, a halogen lamp, a metal halide lamp, a xenon lamp, or the like.

  Further, in the optical path between the lamp and the R dichroic mirror, a filter 109 that cuts infrared rays and ultraviolet rays, a fly-eye lens 107 that equalizes the illuminance distribution of the illumination light emitted from the lamp, and the P of the illumination light , A polarization conversion element 108 for converting the S polarization component into one polarization component (for example, S polarization component) is disposed.

  The projection lens has a function of enlarging and projecting light from the dichroic prism toward the screen.

  In the transmissive liquid crystal projector configured as described above, white light emitted from the lamp is separated into red light (R), green light (G), and blue light (B) by the R dichroic mirror and the G dichroic mirror. . The separated red light (R), green light (G), and blue light (B) are incident on each light valve via the condenser lens 112. Red light (R), green light (G), and blue light (B) incident on each light valve are subjected to polarization modulation in accordance with a driving voltage applied to each pixel of each light valve, and then are dichroic prism. The synthesized light is enlarged and projected on the screen by the projection lens.

  By the way, since the transmissive liquid crystal display device constituting each light valve can suppress flicker as described above, the reliability of display quality can be improved even in the transmissive projector shown here.

  In this embodiment, a projection type image display device that projects onto a screen like a transmission type projector has been described as an example. However, the present invention is a direct view type image display device that directly sees a transmission type LCD. Also widely applicable.

It is a schematic diagram for demonstrating the circuit structure of the liquid crystal drive substrate of the active matrix type liquid crystal display device which is an example of the display apparatus to which this invention is applied. It is a schematic diagram for demonstrating the manufacturing method of the liquid crystal drive substrate shown in FIG. It is a schematic diagram for demonstrating the transmissive liquid crystal projector which is an example of the video display apparatus to which this invention is applied. It is a schematic diagram for demonstrating the circuit structure of the liquid crystal drive substrate of the conventional active matrix type liquid crystal display device. It is a schematic diagram for demonstrating the manufacturing method of the liquid crystal drive substrate shown in FIG. It is a schematic diagram (1) for explaining the relationship between the holding potential and the capacitance value of the holding capacitor. It is a schematic diagram for demonstrating the change of a holding potential. It is a schematic diagram (2) for explaining the relationship between the holding potential and the capacitance value of the holding capacitor.

Explanation of symbols

1 video line two horizontal scanning circuit 3 vertical scanning circuit 4b lower electrode 4c upper electrode 4d tungsten silicide film 11 quartz substrate 12 insulating film (SiO ₂ film)
13 channel 14 silicon nitride film 15 polysilicon 16 opening 100 transmissive liquid crystal projector 101 lamp 103R R dichroic mirror 103G G dichroic mirror 104R R light valve 104G G light valve 104B B light valve 105 dichroic prism 106 projection lens 107 fly eye lens 108 Polarization conversion element 109 Filter 110 Total reflection mirror 111 Relay lens 112 Condenser lens

Claims (6)

Drive having a pixel electrode arranged in a matrix, a storage capacitor and a transistor element connected to the pixel electrode, and a lower electrode of the storage capacitor and a channel of the transistor element are formed by the same semiconductor layer In a display device comprising a substrate,
The resistance value of the upper electrode of the storage capacitor is larger than the resistance value of the lower electrode of the storage capacitor. The display device according to claim 1, wherein an effective carrier density of the upper electrode is lower than an effective carrier density of the lower electrode. The display device according to claim 1, wherein the storage capacitor and the transistor element are formed corresponding to a formation region of a wiring layer of the drive substrate. A pixel electrode arranged in a matrix, a storage capacitor and a transistor element connected to the pixel electrode, and a lower electrode of the storage capacitor and a channel of the transistor element are formed by the same first semiconductor layer In a manufacturing method of a display device including the driven substrate,
Performing a first impurity implantation in the lower electrode formation region of the first semiconductor layer;
Forming a second semiconductor layer on an upper layer of the first semiconductor layer via an insulating film;
Performing a second impurity implantation in an upper electrode formation region of the storage capacitor of the second semiconductor layer,
The method for manufacturing a display device, wherein the first impurity implantation reduces the resistance value of the semiconductor layer as compared with the second impurity implantation. The method for manufacturing a display device according to claim 4, wherein the first impurity implantation increases an effective carrier density of the semiconductor layer as compared with the second impurity implantation. Drive having a pixel electrode arranged in a matrix, a storage capacitor and a transistor element connected to the pixel electrode, and a lower electrode of the storage capacitor and a channel of the transistor element are formed by the same semiconductor layer In a video display device having a display device including a substrate and performing video display using light modulated by the display device,
The resistance value of the upper electrode of the storage capacitor is larger than the resistance value of the lower electrode of the storage capacitor.

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