JP2008060410A - Semiconductor light emitting element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor light emitting element of high luminance which can be manufactured inexpensively. <P>SOLUTION: In the semiconductor light emitting diode, a light emitter composed of a group III-V compound semiconductor and including an n-type clad layer (4), an active layer (5), a p-type clad layer (6), and a p-type contact layer (8) are formed on a semiconductor substrate (1). Further, a current dispersion layer (9) composed of metal oxide transparent conductive film is formed on the p-type contact layer (8); an upper electrode (10) is formed on a part of the current dispersion layer (9); and a lower electrode (11) is formed on the rear side of the semiconductor substrate (1). A light reflection layer (12) composed of the group III-V compound semiconductor and capable of reflecting light from the light emitter is formed on a portion almost corresponding to the lower part of the upper electrode (10) between the p-type contact layer (8) and the current dispersion layer (9). <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor light emitting device, and more particularly to a semiconductor light emitting device using a transparent conductive film as a current spreading layer.

  The AlGaInP-based material is a direct transition type semiconductor having the largest band gap among III-V group compound semiconductors excluding nitrides, and extremely high luminance is obtained in an emission band of 560 nm to 650 nm. For this reason, research and development are actively conducted even now, and research on further enhancement of brightness is particularly active. Recently, AlGaInP-based light emitting diodes are in the midst of price reduction competition, and cost reduction and throughput improvement of the light emitting diodes are required.

  The current diffusion layer mainly occupies the manufacturing cost of the AlGaInP light emitting diode. One factor is that the current diffusion layer is thick. The material of the current diffusion layer is mainly GaP or AlGaAs, and the thickness of the current diffusion layer has to be about 8 μm or more in order to increase the luminance and the operating voltage of the light emitting diode. For this reason, the raw material cost required for the growth of the current spreading layer is increased, and further, the time required for the growth is lengthened, the throughput is deteriorated, and the manufacturing cost of the AlGaInP-based light emitting diode is increased overall.

As a method for solving these problems, a transparent conductive film of a metal oxide film that has a very high carrier concentration and can obtain a sufficient current dispersion effect with a thin film thickness instead of a semiconductor current diffusion layer (window layer). A method of using is proposed. However, normally, when a metal oxide transparent conductive film is used, a metal electrode (upper surface electrode) is formed thereon, but contact resistance occurs between the semiconductor layer and the transparent conductive film that is a metal oxide film. As a result, there is a problem that the forward operation voltage becomes high.
In addition, a method of driving an LED with a tunnel current by making the carrier concentration of the uppermost semiconductor layer extremely high is also disclosed (for example, see Non-Patent Document 1). By using these methods, the cost can be reduced.

  However, there is a need for further increase in luminance, and as a method for increasing luminance by reducing light emission directly under the upper surface electrode that is shielded by the upper surface electrode, a current confinement type light emitting diode having a current blocking layer is provided. Has been proposed (see, for example, Patent Document 1). In the current blocking layer, a semiconductor layer having conductivity opposite to that of the current spreading layer is grown between the light emitting layer and the current spreading layer by MOVPE (metal organic chemical vapor deposition), and this is selectively etched. Then, the current blocking layer is formed by patterning. Thereafter, a current diffusion layer is grown again on the current blocking layer by the MOVPE method, thereby producing a current confinement type light emitting diode.

ELECTRONICS LETTERS, 7Th December 1995, pp. 2210-2212 JP 2002-64219 A

  However, in the method of providing the current blocking layer, it is difficult to reduce the manufacturing cost of the light emitting diode because a growth process by MOVPE is required twice. In particular, since MOVPE requires a small number of wafers to be processed at one time, if a growth process is required twice, the throughput is poor and the manufacturing cost is increased. In the reverse mesa direction, since the current blocking layer is reversely tapered, defects often occur during the second growth by MOVPE, so that the controllability is poor and the reproducibility is problematic. That is, it is difficult to manufacture technically and the yield is poor, which increases the manufacturing cost. Therefore, at present, it is difficult to manufacture a high-intensity, low-cost light-emitting diode with high yield.

  An object of the present invention is to solve the above-described problems and provide a high-luminance semiconductor light-emitting device that can be manufactured at low cost.

Light that reaches the upper surface electrode and emits light below the upper surface electrode (metal electrode) formed on the upper surface (front surface) of the light emitting element cannot be extracted from the upper surface of the light emitting element because the upper surface electrode becomes a light shielding body. . For this reason, the conventional method of providing a current blocking layer is a method of increasing luminance by reducing light emission directly under the upper surface electrode. However, as described above, since the current blocking layer is difficult to manufacture and has a low yield, the manufacturing cost is increased.
Further, the upper surface electrode is subjected to alloy processing (heat treatment) after electrode formation. By this alloying process, the upper surface electrode and the semiconductor layer are alloyed to reduce the contact resistance. However, the reflectance of light falls by alloying. That is, most of the light emitted from the light emitting section reaches the upper surface electrode and is lost without going out.
If the light reaching the upper surface electrode can be efficiently reflected, the reflected light goes to the light emitting part side and re-emits light in the active layer. So-called photo recycling is performed. In addition, the probability that light emission is reflected and light is emitted to increase the light emission output is increased.
Therefore, if light emitted directly under the top electrode and directed toward the top electrode can be efficiently reflected back to the light emitting portion, a light emitting element with high brightness can be obtained at low cost without providing a current blocking layer. The present invention has been devised from such considerations, and is configured as follows.

  According to a first aspect of the present invention, an n-type cladding layer, an active layer and a p-type cladding layer made of a III-V compound semiconductor are provided on a semiconductor substrate, and a p-type contact layer is provided. A semiconductor in which a current spreading layer made of a transparent conductive film of a metal oxide is formed on a p-type contact layer, a top electrode is formed on a part of the current spreading layer, and a bottom electrode is formed on the back side of the semiconductor substrate. In the light emitting device, a light reflecting layer made of a III-V group compound semiconductor that reflects light from the light emitting portion at a portion between the p-type contact layer and the current spreading layer and substantially corresponding to the lower part of the upper surface electrode. A semiconductor light emitting device comprising:

According to a second aspect of the present invention, in the semiconductor light emitting device according to the first aspect, the light reflecting layer includes an Al _x Ga _1-x As layer (0 ≦ x ≦ 1) and (Al _y Ga _1-y ) _z. A semiconductor light emitting device comprising a combination with an In _1-z P layer (0 ≦ y ≦ 1, 0 ≦ z ≦ 1).

  A third aspect of the present invention is the semiconductor light emitting element according to the first or second aspect, wherein the light reflection layer is a p-type layer.

  According to a fourth aspect of the present invention, in the semiconductor light emitting device according to any one of the first to third aspects, the light emitted from the active layer is between the p-type cladding layer and the p-type contact layer. The semiconductor light-emitting element is provided with a buffer layer of a III-V group compound semiconductor that is an As-based material, a P-based material, or a mixture of As-based material and P-based material.

  A fifth aspect of the present invention is the semiconductor light emitting element according to any one of the first to fourth aspects, wherein the current dispersion layer is made of ITO.

According to a sixth aspect of the present invention, in the semiconductor light emitting device according to any one of the first to fifth aspects, the current distribution layer is formed by a vacuum deposition method or a sputtering method, and the carrier concentration is in a state immediately after the formation. It is a semiconductor light emitting element characterized by being 8 × 10 ²⁰ / cm ³ or more.

According to a seventh aspect of the present invention, in the semiconductor light emitting device according to any one of the first to sixth aspects, the p-type contact layer is made of Al _x Ga _1-x As (where 0 ≦ x ≦ 0.4). Thus, the main dopant contained in the p-type contact layer is Zn, and the carrier concentration is 1 × 10 ¹⁹ / cm ³ or more.

  An eighth aspect of the present invention is a semiconductor light emitting element according to any one of the first to seventh aspects, wherein the p-type contact layer has a thickness of 1 nm to 30 nm. is there.

  According to a ninth aspect of the present invention, in the semiconductor light emitting device according to any one of the first to eighth aspects, two semiconductor layers having different refractive indexes are alternately stacked between the semiconductor substrate and the n-type cladding layer. The semiconductor light emitting device is characterized in that a light reflection layer comprising a semiconductor multilayer film is provided.

  A tenth aspect of the present invention is the semiconductor light-emitting device according to any one of the first to ninth aspects, wherein the active layer has a multiple quantum well structure or a strained multiple quantum well structure. It is an element.

  According to the present invention, a high-luminance semiconductor light-emitting device with high yield can be obtained without causing a significant cost increase.

  Embodiments of a semiconductor light emitting device according to the present invention will be described below with reference to the drawings. FIG. 1 is a cross-sectional view illustrating a layer structure of a light emitting diode according to an embodiment.

  As shown in FIG. 1, the light-emitting diode of this embodiment includes an n-type buffer layer 2, an n-type light reflection layer 3, and an n-type formed of a III-V compound semiconductor on an n-type semiconductor substrate 1. A light emitting portion including a clad layer 4, an undoped active layer 5 and a p-type clad layer 6, a p-type buffer layer 7, and a p-type contact layer 8 are formed. A current spreading layer 9 made of a metal oxide transparent conductive film is formed on the p-type contact layer 8, and an upper surface electrode 10 is formed on a part of the current spreading layer 9. A lower electrode 11 is formed on the back surface. In addition, a light reflecting layer 12 made of a III-V group compound semiconductor that reflects light from the light emitting part is provided at a portion between the p-type contact layer 8 and the current spreading layer 9 and substantially corresponding to the lower portion of the top electrode 10. Is formed.

The n-type light reflection layer 3 is a layer that reflects light from the light emitting portion toward the substrate 1, and two semiconductor layers having different refractive indexes of a high refractive index layer and a low refractive index layer are alternately stacked. A semiconductor multilayer film is preferred.
The active layer 5 preferably has a multi-quantum well structure or a strained multi-quantum well structure that can increase the output.
The p-type buffer layer 7 prevents Zn or Mg, which are p-type dopants of the p-type contact layer 8, from diffusing into the active layer 5, or alleviates the impact when wire bonding is performed on the upper surface electrode 10. It is a layer for. The p-type buffer layer 7 is a material that is transparent to the light emitted from the active layer 5, and is preferably an As-based or P-based layer, or a layer in which an As-based layer and a P-based layer are mixed.
The p-type contact layer 8 is made of Al _x Ga _1-x As (where 0 ≦ x ≦ 0.4), the main dopant contained in the p-type contact layer 8 is Zn, and the carrier concentration is 1 × 10 ^19. / Cm ³ or more is preferable. The film thickness of the p-type contact layer 8 is preferably 1 nm or more and 30 nm or less.
The current spreading layer 9 is preferably made of ITO (Indium Tin Oxide). In addition, examples of the material of the current dispersion layer 9 made of a metal oxide transparent conductive film include ZnO (zinc oxide) and CTO (cadmium tin oxide). Moreover, it is preferable that the current dispersion layer 9 is formed by a vacuum deposition method or a sputtering method, and the carrier concentration is 8 × 10 ²⁰ / cm ³ or more immediately after the formation. Further, the film thickness d (nm) of the current dispersion layer 9 substantially satisfies the relational expression of film thickness d = constant A × wavelength λp (nm) / (4 × refractive index n of the current dispersion layer 9). The constant A is preferably an odd number. The wavelength λp in the relational expression is the emission peak wavelength of the light emitting part.

The light reflecting layer 12 is a single-layer or multi-layer semiconductor layer for reflecting the light traveling from the light emitting portion toward the upper surface electrode 10 and returning it to the light emitting portion side. The light reflecting layer 12 includes an Al _x Ga _1-x As layer (0 ≦ x ≦ 1) and an (Al _y Ga _1-y ) _z In _1-z P layer (0 ≦ y ≦ 1, 0 ≦ z ≦ 1). And a semiconductor multilayer film (distributed Bragg reflection film) in which two semiconductor layers having different refractive indexes are alternately stacked. The film thickness of each layer of the light reflecting layer 12 is set to λp / (4 × refractive index of each layer of the light reflecting layer 12). The light reflecting layer 12 is preferably a p-type layer.
When the light reflection layer 12 is a p-type layer, a current is supplied from the upper electrode 10 to the active layer 5 not only from the current dispersion layer 9 but also from the light reflection layer 12. Therefore, light is emitted also from the active layer 5 immediately below the light reflecting layer 12, that is, directly below the upper surface electrode 10, but the light traveling toward the upper surface electrode 10 is reflected by the light reflecting layer 12 provided in front of the upper surface electrode 10, The light emission output is increased by returning to the light emitting part side and being used for re-light emission in the active layer 5 or by extracting light from the side surface of the LED element to the outside.

Next, the reason why the light emitting diode structure of the above-described embodiment is adopted, preferable settings, and the like will be described in detail.
First, the p-type contact layer 8 needs to have a conductivity type determining blunt substance added at an extremely high concentration in order to make ohmic contact with the current spreading layer 9 made of, for example, an ITO film. Specifically, in the case of the p-type contact layer 8 to which Zn (zinc) is added, the crystal material thereof is GaAs or AlGaAs having an Al mixed crystal ratio x of Al _x Ga _1-x As of 0 to 0.4. The carrier concentration is preferably 1 × 10 ¹⁹ / cm ³ or more, and the higher the carrier concentration, the more preferable.
The ITO film basically belongs to an n-type semiconductor material, and the LED is generally manufactured by p-side up. For this reason, the LED in which the ITO film is applied to the current dispersion layer has a conductivity type of n / p / n junction from the semiconductor substrate side. For this reason, in an LED, a large potential barrier is generated at the interface between the ITO film and the p-type semiconductor layer, and the LED usually has a very high operating voltage. In order to solve this problem, the p-type semiconductor layer requires the p-type contact layer 8 having a very high carrier concentration. The reason why the band gap of the p-type contact layer 8 is narrowed is that it is easier to increase the carrier.
Further, in conjunction with the increase in the carrier of the p-type contact layer 8, the carrier concentration of the ITO film (current dispersion layer 9) in contact with the p-type contact layer 8 is also important for reducing the tunnel voltage. Further, the carrier concentration of the ITO film is preferably as high as possible for the same reason as that of the p-type contact layer 8 described above, and specifically has a carrier concentration of 8 × 10 ²⁰ / cm ³ or more. .

Second, the thickness of the p-type contact layer 8 is preferably in the range of 1 nm to 30 nm. This is because the p-type contact layer 8 has a band gap serving as an absorption layer for the light emitted from the active layer 5, so that the light emission output decreases as the film thickness increases. FIG. 3 shows the relationship between the thickness of the contact layer and the attenuation rate of the light emission output. As shown in FIG. 3, the upper limit of the thickness of the contact layer is preferably about 30 nm, more preferably up to 25 nm.
On the other hand, when the film thickness of the p-type contact layer 8 is less than 1 nm, this time, the tunnel junction between the ITO film (current dispersion layer 9) and the p-type contact layer 8 becomes difficult. It becomes difficult to stabilize the operating voltage and operating voltage. Therefore, the optimum value of the film thickness of the p-type contact layer 8 in contact with the ITO film is 1 nm to 30 nm.

Third, as described above, the film thickness of the current dispersion layer 9 made of the transparent conductive film satisfies the relational expression of film thickness d = constant A × wavelength λp / (4 × refractive index n of the current dispersion layer 9). Further, it is preferable that the constant A is an odd number. The ITO film used as the current spreading layer 9 formed on the LED epitaxial wafer has a refractive index approximately in the middle between the semiconductor layer and the air layer, and optically functions as an antireflection film. Therefore, in order to improve the light extraction efficiency of the LED and obtain an LED element with higher output, it is preferable to design the film thickness according to the above relational expression. However, of course, the thicker the ITO film, the lower the transmittance due to absorption.
When the transmittance of the ITO film decreases, the ratio of the light emitted from the active layer 5 absorbed by the ITO film increases, and as a result, the light emission output decreases. Furthermore, as the film thickness of the current dispersion layer 9 increases, light interference in the layer 9 increases, and the wavelength region with high light extraction efficiency becomes narrow. For these, a sample in which an ITO film having a predetermined film thickness satisfying the above relational expression was formed on a GaAs substrate, and the spectrum of reflected light when light was incident perpendicularly on the sample was measured. Shown in
That is, for these reasons, the more preferable thickness d of the current spreading layer 9 is in the above relational expression, and the constant A is preferably 1 or 3, and most preferably, the constant A is 1. . Furthermore, the film thickness d of the current dispersion layer 9 formed on the LED epitaxial wafer, for example, the ITO film, may be within a range of ± 30% of the value obtained by the above relational expression. This is because the wavelength band having a low optical reflectance as the antireflection film, that is, the wavelength band having a high light extraction efficiency has a certain width. For example, as an antireflection film, the allowable value of the film thickness at which the reflectance is 15% or less when light is vertically incident on the LED epitaxial wafer on which the ITO film is formed is a film obtained from the above relational expression. It is in the range of ± 30% of the thickness d. If the thickness of the ITO film becomes larger or smaller than the range of ± 30% of the film thickness d obtained from the above relational expression, the effect as an antireflection film is reduced and the output of the LED is reduced. is there.

  Fourth, in the above embodiment, the light reflection layer 12 is a p-type layer, but it may be an n-type or an undoped layer. This is because the current flowing from the top electrode 10 to the active layer 5 is supplied through the ITO film which is the current dispersion layer 9. Note that the light reflecting layer 12 made of a III-V group compound semiconductor is lower in conductivity than the ITO film, whether it is p-type, undoped, or n-type, and more or less than the current reduction layer or current block layer with respect to the ITO film. Will function as well.

  Fifth, the larger the total number of light reflecting layers 12 provided below the top electrode 10, the so-called number of pairs, the better. However, the total thickness of the light reflecting layer 12 must be thinner than the ITO film that is the current dispersion layer 9. The reason for this is to allow a current to flow through the ITO film as described in the fourth aspect. This is because if the thickness is larger than the ITO film which is the current dispersion layer 9, current may not flow. However, when the light reflection layer 12 is p-type, it may be equal to or slightly thicker than the ITO film 9 that is the current dispersion layer 9. This is because a current also flows from the light reflecting layer 12.

Next, examples of the present invention will be described.
[Example 1]
A red LED element having an emission wavelength near 630 nm shown in FIG. An LED epitaxial growth method, an epitaxial layer thickness, an epitaxial structure, an electrode formation method, and an LED element manufacturing method are as follows.

On the n-type GaAs substrate 1, an Si-doped n-type GaAs buffer layer (film thickness 200 nm, carrier concentration 1 × 10 ¹⁸ / cm ³ ) 2 and an Si-doped n-type light reflection layer 3 (A11 nP layer) are formed by MOVPE. And 20 pairs of light reflecting layers in which 20 Al _0.5 Ga _0.5 As layers are alternately provided, and Si-doped n-type (Al _0.7 Ga _0.3 ) _0.5 In _{0.3 . 5} P clad layer (film thickness 400 nm, carrier concentration 5 × 10 ¹⁷ / cm ³ ) 4 and undoped (Al _0.1 Ga _0.9 ) _0.5 In _0.5 P active layer (film thickness 600 nm) 5 Mg-doped p-type (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P clad layer (film thickness 400 nm, carrier concentration 5 × 10 ¹⁷ / cm ³ ) 6, Mg-doped p-type al _0.8 Ga _0.2 As buffer layer (film thickness 600 nm, calibration And A concentration of ^{1 × 10 18 / cm 3)} 7, p -type Al _0.1 GaAs contact layer of Zn-doped (film thickness 3 nm, the carrier concentration of ^{7 × 10 19 / cm 3)} 8, p -type light reflected Mg-doped Layer (a pair of light reflecting layers each having an AlInP layer (film thickness 40 nm) and an Al _0.5 Ga _0.5 As layer (film thickness 30 nm), a carrier concentration of 1 × 10 ¹⁸ / cm ³ or more) 12 were sequentially epitaxially grown to produce an LED epitaxial wafer.
The film thickness of the n-type light reflection layer 3 was the emission peak wavelength λp / (4 × refractive index). Here, the refractive index of each semiconductor material constituting the light reflecting layer 3 is applied as the refractive index. The carrier concentration of the light reflecting layer 3 was about 1 × 10 ¹⁸ / cm ³ .

The growth temperature in the MOVPE growth was 650 ° C. from the n-type GaAs buffer layer 2 to the p-type buffer layer 7, and the p-type contact layer 8 and the p-type light reflection layer 12 were grown at 550 ° C. Other growth conditions were such that the growth pressure was about 6666 Pa (50 Torr), the growth rate of each layer was 0.3 to 1.0 nm / sec, and the V / III ratio was about 150. However, the V / III ratios of the p-type buffer layer 7 and the p-type contact layer 8 were 30 and 10, respectively. The V / III ratio refers to a ratio (quotient) when the denominator is the number of moles of a group III material such as TMGa or TMAl and the molecule is the number of moles of a group V material such as AsH ₃ or PH ₃ .

Examples of raw materials used in the MOVPE growth include trimethylgallium (TMGa), organic metals such as triethylgallium (TEGa), trimethylaluminum (TMAl), and trimethylindium (TMIn), arsine (AsH ₃ ), and phosphine (PH ₃ ). A hydride gas such as was used. Disilane (Si ₂ H ₆ ) was used as an additive material for an n-type layer such as the n-type buffer layer 2. Biscyclopentadienylmagnesium (Cp ₂ Mg) was used as an additive material for conductivity-determining impurities of the p-type layer such as the p-type cladding layer 5. However, diethyl zinc (DEZn) was used only for the p-type contact layer 8.
In addition, hydrogen selenide (H ₂ Se), monosilane (SiH ₄ ), diethyl tellurium (DETe), and dimethyl tellurium (DMTe) can also be used as an additive material for the conductivity determining impurity of the n-type layer. Moreover, dimethyl zinc (DMZn) and diethyl zinc (DEZn) can also be used as a p-type additive material for the p-type cladding layer and the p-type buffer layer.

Further, after the LED epitaxial wafer is unloaded from the MOCVD apparatus, on the surface of the wafer, that is, on the surface side of the p-type light reflection layer 12, equipment used in a general photolithography process and a known method are used. A pattern is formed in a matrix with a diameter of 110 μm. That is, a φ110 μm resist is formed in a matrix.
Next, a part of the AlGaAs layer which is the upper layer of the p-type light reflection layer 12 is removed using a sulfuric acid-based etching solution. At this time, the AlInP layer which is the lower layer of the p-type light reflection layer 12 is not removed (because it is selectively etched). Thereafter, a part of the AlInP layer which is the lower layer of the p-type light reflection layer 12 is further removed with a hydrochloric acid-based etching solution. Again, since the p-type Al _0.1 GaAs contact layer 8 is an As-based material, it is not removed by a hydrochloric acid-based etchant, and etching stops. That is, the p-type light reflection layer 12 is left in a matrix shape with φ110 μm by using a selective etching method. Thereafter, the resist is removed with an organic solvent.

Thereafter, an ITO film 9 having a film thickness of 80 nm was formed on the entire surface of the LED epitaxial wafer by vacuum deposition. In the first embodiment, the ITO film 9 becomes a current dispersion layer.
At this time, the glass substrate for evaluation set in the same batch as the deposition of the ITO film 9 was taken out, cut into a size capable of Hall measurement, and the electrical characteristics of the ITO film alone were evaluated. The carrier concentration was 1.1 × 10. ^{It was 21} / cm ³ , mobility 16.7 cm ² / Vs, and resistivity 3.3 × 10 ⁻⁴ Ω · cm.

  Further, on the upper surface of the epitaxial wafer on which the ITO film 9 is formed, for the circular electrode having a diameter of 110 μm, which is the upper surface electrode 10 by using the equipment used in the general photolithography process such as resist and mask aligner and a known method again. The resist pattern is formed so as to substantially coincide with the portion where the light reflecting layer 12 remains. Thereafter, a top electrode material was deposited by vacuum deposition. The lift-off method was used for electrode formation after the deposition. The top electrode 10 was vapor-deposited with Ni (nickel) and Au (gold) in the order of 20 nm and 500 nm, respectively. Further, the bottom electrode 11 was formed on the entire bottom surface of the epitaxial wafer by the same vacuum deposition method. The lower electrode 11 is formed by depositing AuGe (gold / germanium alloy), Ni (nickel), and Au (gold) in the order of 150 nm, 10 nm, and 500 nm, respectively, and then performing alloying that is alloying of the electrodes in a nitrogen gas atmosphere. The inside was heated to 400 ° C. and heat-treated for 5 minutes.

  Thereafter, the LED-equipped LED epitaxial wafer configured as described above was cut using a dicing apparatus so that the circular upper surface electrode 10 was positioned substantially at the center, and an LED bare chip having a chip size of 300 μm square was manufactured. Furthermore, the LED bare chip was mounted on a TO-18 stem (die bonding), and then wire bonding was performed on the mounted LED bare chip to produce an LED element.

Further, in order to compare the effect with Example 1, a red LED element having an emission wavelength of about 630 nm and having a structure shown in FIG. 5 was produced as a comparative example. In this comparative example, the ITO film 9 is formed on the p-type Al _0.1 GaAs contact layer 8 without providing the p-type light reflection layer 12 in the first embodiment. Except for this difference, Example 1 and the comparative example are basically the same in the epitaxial growth method, the epitaxial layer structure, the electrode forming method, and the LED element manufacturing method.

The initial characteristics of the LED elements of Example 1 and Comparative Example manufactured as described above were evaluated. As a result, in the LED element of Example 1, it was possible to obtain initial characteristics of a light emission output of 2.07 mW and an operating voltage of 1.88 V when 20 mA was applied (evaluation). On the other hand, the LED element of the comparative example had initial characteristics of a light emission output of 1.81 mW and an operating voltage of 1.86 V when 20 mA was applied (evaluation).
That is, in Example 1, the light emission output was improved by about 15% compared with the comparative example. In Example 1, the yield was also good.
Further, even in the example in which the p-type buffer layer 7 in Example 1 is changed to the GaP layer instead of the Al _0.8 Ga _0.2 As layer, about 15 to 20% higher output than the above comparative example can be realized. It was.

[Example 2]
An epitaxial wafer for red LED having an emission wavelength of about 630 nm and having the structure shown in FIG. 1 was produced. The epitaxial growth method, the epitaxial layer thickness, the epitaxial layer structure, and the LED element manufacturing method were basically the same as those in Example 1. However, in Example 2, three pairs of the p-type light reflection layer 12 are alternately provided, each including three AlInP layers (40 nm) and three Al _0.5 Ga _0.5 As layers (30 nm). Corresponding to the increase in the film thickness of the p-type light reflection layer 12, the film thickness of the ITO film 9 as the current dispersion layer was set to 240 nm.
As in Example 1, the initial characteristics of the LED of Example 2 were improved by about 15 to 20% in light output compared to the above comparative example.
In Example 2, the thickness of the ITO film 9 that is the current dispersion layer was increased from 80 nm to 240 nm in Example 1 to increase the number of pairs of the p-type light reflection layers 12. The reason for this is that light absorption by the ITO film 9 is slightly, and as the film thickness of the ITO film 9 increases, light interference in the ITO film 9 increases and the light extraction efficiency is high. This is because the wavelength region becomes narrow (see FIG. 4). If an ITO film with higher quality can be manufactured, light absorption is reduced, and it is considered that the output can be improved as the number of pairs of the p-type light reflection layers 12 increases.

[Example 3]
An epitaxial wafer for red LED having an emission wavelength near 630 nm and having the structure shown in FIG. 2 was produced. The epitaxial growth method, the epitaxial layer thickness, the epitaxial layer structure, and the LED element manufacturing method were basically the same as those in Example 1. However, in Example 3, the buffer layer 7 in Example 1 was not provided. In Example 3, as in Example 1, the light emission output of the LED could be improved by about 15 to 20% compared to the comparative example.

In addition, although the example which produced the red LED element of luminescence wavelength 630nm was demonstrated in the said Example, also in the LED element of the luminescence wavelengths 560nm-660nm other than 630nm manufactured using the same AlGaInP type material, Of course, the same effect can be obtained.
In the above embodiment, the n-type GaAs buffer layer 2 is stacked on the n-type GaAs substrate 1, but an LED element structure in which the n-type cladding layer 4 is directly provided on the n-type GaAs substrate 1 can be adopted. Good.
Furthermore, in the above embodiment, the shape of the upper surface electrode 10 is circular, but other shapes such as a square, a rhombus, and a polygon may also be used.
In the above embodiment, the p-type cladding layer 6 and the p-type buffer layer 7 are a combination of AlGaInP and AlGaAs or GaP. Of course, the same effect can be obtained.

It is sectional structure drawing of the light emitting diode concerning Embodiment, Example 1 and Example 2 of this invention. It is sectional drawing of the light emitting diode concerning Example 3 of this invention. It is a figure which shows the relationship between the film thickness of a contact layer, and the attenuation factor of light emission output. It is the figure which showed the reflectance spectrum of the ITO film | membrane formed on the GaAs substrate. It is sectional drawing of the light emitting diode concerning a comparative example.

Explanation of symbols

1 n-type semiconductor substrate (n-type GaAs substrate)
2 n-type buffer layer (n-type GaAs buffer layer)
3 n-type light reflection layer 4 n-type cladding layer (n-type AlGaInP cladding layer)
5 Undoped active layer (undoped AlGaInP active layer)
6 p-type cladding layer (p-type AlGaInP cladding layer)
7 p-type buffer layer (p-type AlGaAs buffer layer)
8 p-type contact layer (p-type AlGaAs contact layer)
9 Current distribution layer (ITO film)
10 Upper surface electrode 11 Lower surface electrode 12 Light reflection layer (p-type light reflection layer)

Claims (10)

A light emitting part of an n-type cladding layer, an active layer and a p-type cladding layer made of a III-V group compound semiconductor and a p-type contact layer are formed on a semiconductor substrate, and a metal oxide is formed on the p-type contact layer In a semiconductor light emitting device in which a current spreading layer made of a transparent conductive film is formed, a top electrode is formed on a part of the current spreading layer, and a bottom electrode is formed on the back side of the semiconductor substrate,
A light reflecting layer made of a III-V group compound semiconductor that reflects light from the light emitting portion is provided at a portion between the p-type contact layer and the current spreading layer that substantially corresponds to the lower part of the upper surface electrode. A semiconductor light emitting device characterized by the above. 2. The semiconductor light emitting device according to claim 1, wherein the light reflecting layer includes an Al _x Ga _1-x As layer (0 ≦ x ≦ 1) and an (Al _y Ga _1-y ) _z In _1-z P layer (0 <= Y <= 1, 0 <= z <= 1) The semiconductor light-emitting element characterized by the above-mentioned.   3. The semiconductor light emitting device according to claim 1, wherein the light reflecting layer is a p-type layer.   4. The semiconductor light emitting device according to claim 1, wherein the light emitting element is a material transparent to light emitted from the active layer between the p-type cladding layer and the p-type contact layer, and As A semiconductor light emitting device comprising a buffer layer of III-V group compound semiconductor in which P-type, P-type, or As-type and P-type are mixed.   5. The semiconductor light emitting device according to claim 1, wherein the current dispersion layer is made of ITO. 6. The semiconductor light emitting device according to claim 1, wherein the current dispersion layer is formed by a vacuum deposition method or a sputtering method, and a carrier concentration is 8 × 10 ²⁰ / cm ³ or more immediately after the formation. There is a semiconductor light emitting element. 7. The semiconductor light emitting device according to claim 1, wherein the p-type contact layer is made of Al _x Ga _1-x As (where 0 ≦ x ≦ 0.4) and is included in the p-type contact layer. The main dopant is Zn, and the carrier concentration is 1 × 10 ¹⁹ / cm ³ or more.   8. The semiconductor light emitting device according to claim 1, wherein the p-type contact layer has a thickness of 1 nm to 30 nm.   9. The light-emitting device according to claim 1, wherein the semiconductor light-emitting device includes a semiconductor multilayer film in which two semiconductor layers having different refractive indexes are alternately stacked between the semiconductor substrate and the n-type cladding layer. A semiconductor light emitting element comprising a layer.   10. The semiconductor light emitting device according to claim 1, wherein the active layer has a multiple quantum well structure or a strained multiple quantum well structure.

Images