JP2008047750A - Manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device capable of realizing activation of impurities in a source region and a drain region by heat treatment at a relatively low temperature, and stably obtaining a high-performance P-type thin film transistor. <P>SOLUTION: The method of manufacturing the semiconductor device includes a patterning step of patterning a semiconductor film in a polycrystalline or approximately monocrystalline state formed on a substrate (11) to form a transistor region (133), a gate electrode forming step of forming a gate insulation film (14) and a gate electrode (15) on the transistor region, an impurity introducing step of introducing impurities from the gate insulation film and the gate electrode into the source region and the drain region, and an activation step of electrically activating the impurities in the source region and the drain region by applying heat treatment to the source and drain regions into which the impurities are introduced. During the impurity introducing step, boron is injected into the source and drain regions with a concentration of 4.5×10<SP>15</SP>/cm<SP>2</SP>or more. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device.

  In an electro-optical device such as a liquid crystal display device or an organic EL (electroluminescence) display device, pixel switching is performed using a thin film circuit including a thin film transistor as a semiconductor element. In a conventional thin film transistor, an active region such as a channel formation region is formed using an amorphous silicon film. A thin film transistor in which an active region is formed using a polycrystalline silicon film has also been put into practical use. By using a polycrystalline silicon film, electrical characteristics such as mobility are improved as compared with the case of using an amorphous silicon film, and the performance of the thin film transistor can be improved.

  In order to further improve the performance of the thin film transistor, a technique for forming a semiconductor film made of large crystal grains and preventing a crystal grain boundary from entering the channel formation region of the thin film transistor has been studied. For example, a technique has been proposed in which a fine hole is formed on a substrate, and a semiconductor film is crystallized using the fine hole as a starting point for crystal growth to form a crystal grain of silicon having a large particle diameter. By forming a thin film transistor using a silicon film having a large crystal grain size formed using this technique, it is possible to prevent a crystal grain boundary from entering one thin film transistor formation region (particularly, a channel formation region). It becomes possible. As a result, a thin film transistor having excellent electrical characteristics such as mobility can be realized. Such a technique is described in, for example, Japanese Patent Application Laid-Open No. 2004-186206 (Patent Document 1).

JP 2004-186206 A I. Mizushima et al., J. Appl. Phys., 63, pp. 1065-1069 (1988), literature: Kanemoto, PhD thesis, Tohoku University, 2001 `` Substrate-orientation dependence of the epitaxial regrowth rare from Si-implanted amorphous Si '', J. Appl. Phys. 49, pp. 3906-3911 (1978)

  By the way, as the performance of a thin film transistor becomes higher, the necessity for lowering the resistance of the source region and the drain region becomes apparent. This is because the crystallinity of only the channel formation region is excellent, and even if the resistance of this portion is reduced in the ON state of the thin film transistor, carriers (electrons and holes) are transferred from the source region to the channel formation region to the drain region in the thin film transistor. This is because if the resistance of the source region and the drain region is not sufficiently low, the characteristics of the thin film transistor as a whole are not excellent.

  In general, in a source region and a drain region, an impurity is implanted into a semiconductor film, and an appropriate heat treatment is performed later to recover the crystallinity of the implanted portion, thereby electrically activating the impurity. When the glass substrate is used, the heat treatment temperature at this time needs to be a relatively low temperature of about 450 ° C. or lower, so that in practice, sufficient activation cannot be realized. In particular, a P-type thin film transistor using boron as an impurity In this case, only a source region and a drain region having a relatively high resistance value can be formed. In addition, when the crystal orientations of the semiconductor films of the source region and the drain region are not aligned and are in a random polycrystal or substantially single crystal state, the activation varies.

  Therefore, the present invention provides a method for manufacturing a semiconductor device that can realize impurity activation of a source region and a drain region of a P-type thin film transistor even with a heat treatment at a relatively low temperature, and can stably obtain a high-performance thin film transistor. The purpose is to provide.

In order to achieve the above object, the present invention provides a method for manufacturing a semiconductor device in which a P-type thin film transistor is formed by using a polycrystalline or substantially monocrystalline semiconductor film on a substrate having at least one surface insulating. A patterning step of patterning the semiconductor film to form a transistor region to be a source region, a drain region and a channel formation region, a gate electrode formation step of forming a gate insulating film and a gate electrode on the transistor region, and the gate Impurity introduction step of introducing impurities into the source region and drain region from above the insulating film and the gate electrode, and applying heat treatment to the source region and drain region into which the impurity has been introduced to remove impurities in the source region and drain region. An activation step of electrically activating, in the impurity introduction step, Implanting boron at a relatively high concentration of 4.5 × 10 ¹⁵ / cm ² or more over source region and a drain region.

  According to the above method, the sheet resistance of the source region and the drain region and the contact resistance with the source electrode and the drain electrode can be reduced even by heat treatment at a relatively low temperature of about 450 ° C. In particular, even when the semiconductor film is a polycrystalline or substantially single-crystal film and the crystal orientation of the individual crystal grains contained therein is random, the sheet resistance and contact resistance are reduced almost uniformly. Can be realized.

  Next, preferred embodiments for carrying out the present invention will be described with reference to the drawings.

<First Embodiment>
<Configuration>
Embodiments of the present invention will be described below with reference to the drawings.

  The manufacturing method according to this embodiment includes (1) a step of forming a microhole on a substrate as a starting point for crystallization of a silicon film, and (2) a step of growing and forming silicon crystal grains from the microhole. And (3) forming a thin film transistor using a silicon film containing the silicon crystal grains. Hereinafter, each process will be described in detail.

(1) Micropore Formation Step As shown in FIG. 1A, a silicon oxide film 121 as a base insulating film is formed on a glass substrate 11. The film thickness is, for example, about 200 nm. Next, a silicon oxide film having a thickness of 550 nm is formed on the base insulating film 121 as the first insulating film 122. Next, a hole 123 having a diameter of about 1 μm or less is formed in the first insulating film 122 (FIG. 1B). As this forming method, a photoresist film (not shown) having an opening exposing the formation position of the hole 123 by exposing and developing the photoresist film coated on the first insulating film 122 using a mask. )) On the first insulating film 122, reactive ion etching is performed using this photoresist film as an etching mask, and then the photoresist film is removed. Next, a silicon oxide film as a second insulating film 124 is formed on the first insulating film 122 including the holes (FIG. 1C). By adjusting the deposited film thickness of the second insulating film 124, the diameter of the hole 123 is narrowed to form a fine hole 125 having a diameter of about 20 nm to 150 nm.

These base insulating film 121, first insulating film 122, and second insulating film 124 (these layers are also referred to as insulating layer 12) are all made of, for example, TEOS (Tetra Ethyl Ortho Silicate) or silane (SiH ₄ ) gas. It can be formed by the PECVD method used.

  The present invention is characterized in that the micro holes 125 are formed in a channel formation region portion of a thin film transistor formed by a process described later, and in a source region and a drain region. At this time, the interval between adjacent micropores is preferably about 6 μm or less. This distance substantially corresponds to the size (diameter) of the silicon crystal grains grown from each micro hole 125 by laser irradiation described later. As a result, silicon crystal grains grown from the fine holes 125 are continuously arranged in the source region, channel forming region, and drain region. In particular, it is desirable to form the fine hole 125 at a position corresponding to a lower portion of a contact hole formed in a source region and a drain region described later or in the vicinity thereof.

(2) Crystal Grain Formation Process As shown in FIG. 1D, a semiconductor is formed on the silicon oxide film as the second insulating film 124 and in the micro holes 125 by a film forming method such as an LPCVD method or a PECVD method. An amorphous silicon film 130 used as a film is formed. The amorphous silicon film 130 is preferably formed to a thickness of about 50 to 300 nm. Further, instead of the amorphous silicon film 130, a polycrystalline silicon film may be formed. When these silicon films 13 are formed by the LPCVD method or the PECVD method, the hydrogen content in the formed silicon film 13 may be relatively large. In such a case, heat treatment for reducing the hydrogen content of the silicon film (preferably 1% or less) is performed in order to prevent ablation of the silicon film 13 during laser irradiation described later. Good.

Next, as shown in FIG. 1E, laser irradiation L is performed on the silicon film 13. This laser irradiation uses, for example, an XeCl pulse excimer laser with a wavelength of 308 nm and a pulse width of 20 to 30 ns, or an XeCl excimer laser with a pulse width of about 200 ns, so that the energy density is about 0.4 to 2.0 J / cm ^2. It is preferable to do so. By performing laser irradiation under such conditions, most of the irradiated laser is absorbed near the surface of the silicon film. This is because the absorption coefficient of amorphous silicon at the wavelength (308 nm) of the XeCl pulse excimer laser is relatively large at 0.139 nm ⁻¹ .

  By appropriately selecting the conditions of the laser irradiation L, the silicon film is left in a non-molten state at the bottom in the microhole 125, and the other portions are almost completely melted. As a result, the crystal growth of silicon after laser irradiation starts first near the bottom of the microhole and proceeds to the vicinity of the surface of the silicon film 13, that is, the substantially completely melted portion. Even in the case where the energy of the laser irradiation L is slightly stronger than this and no non-molten portion remains at the bottom of the fine hole 125, the vicinity of the surface of the silicon film 13 that is substantially completely melted, the bottom of the fine hole 125, The crystal growth of silicon after laser irradiation starts first near the bottom of the fine hole 125 and proceeds to the vicinity of the surface of the silicon film 13, that is, the substantially completely melted state as before. obtain.

  In the initial stage of silicon crystal growth, several crystal grains may be generated at the bottom of the fine hole 125. At this time, the cross-sectional dimension of the fine hole 125 (in this embodiment, the diameter of a circle) is set to be about the same as or slightly smaller than one crystal grain, so that the upper part (opening) of the fine hole 125 has 1. Only one crystal grain will reach. Thereby, in the substantially completely melted portion of the silicon film 13, crystal growth proceeds with one crystal grain reaching the top of the fine hole 125 as a nucleus, as shown in FIG. It becomes possible to form a silicon film formed by regularly arranging substantially single silicon crystal grains 131 having a large particle diameter with the fine hole 125 at the center.

  Here, the silicon substantially single crystal grain means a grain boundary (corresponding grain boundary) such as Σ3, Σ9, or Σ27 but not including an irregular grain boundary. In general, irregular grain boundaries contain a large number of silicon unpaired electrons, which is a major cause of deterioration in characteristics and variations in characteristics of thin film transistors formed there. Therefore, a thin film transistor having excellent characteristics can be realized by forming a thin film transistor therein. However, here, when the diameter of the micropore 125 is a micropore having a large diameter of about 150 nm or more, a plurality of crystal grains generated at the bottom of the micropore 125 grow and reach the top of the micropore. The silicon crystal grains formed around the fine hole 125 include irregular grain boundaries.

  Note that it is also preferable to heat the substrate 11 at the time of crystallization by the laser irradiation L described above. For example, heat treatment may be performed so that the temperature of the glass substrate becomes approximately 200 ° C. to 400 ° C. by a stage on which the substrate 11 is placed. Thus, by using laser irradiation and substrate heating together, the crystal grain size of each silicon single crystal grain 131 can be further increased. By using the substrate heating in combination, the grain size of the substantially silicon single crystal grains 131 can be made approximately 1.5 to 2 times that of the case where the heating is not performed. Furthermore, since the progress of crystallization is moderated by the combined use of the substrate heating, there is an advantage that the crystallinity of the substantially single crystal grains of silicon is further improved.

  By forming the micro holes 125 at desired locations on the substrate 11 as described above, silicon substantially single crystal grains 131 having relatively excellent crystallinity are formed with the micro holes 125 as the center after the laser irradiation. It becomes possible to do. Further, according to a detailed investigation by the inventor of the present application, the crystallinity is particularly excellent except for the vicinity of the fine hole 125 in the crystal grain 131, and the film thickness direction maintains a continuous crystallinity (in-film plane direction). It is confirmed that there is no corresponding grain boundary parallel to

  Further, the inventors of the present application have confirmed that the crystal orientation of each of the silicon substantially single crystal grains 131 is almost random without any preferential crystal orientation.

  Note that laser irradiation may be performed on the silicon film 13 portion without forming the fine holes 125. In this case, since isotropic nucleation and crystal growth proceed after laser irradiation, a polycrystalline silicon film containing fine crystal grains is formed. Although it depends on the conditions of laser irradiation, a polycrystalline silicon film in which relatively small crystal grains of about 0.5 μm or less are arranged randomly is formed.

(3) Thin Film Transistor Formation Step Next, the structure of the thin film transistor formed using the above-described silicon film will be described. Here, a thin film transistor forming process using the substantially silicon single crystal grain 131 obtained by performing crystallization with the fine hole 125 as a starting point will be described.

  A process of forming the thin film transistor T will be described. 4 and 5 are explanatory views for explaining a process of forming the thin film transistor T. FIGS. 4A and 4B are plan views of the completed thin film transistor, and FIGS. FIG. 4C shows a cross-sectional view in the BB ′ direction shown in FIG.

  As shown in FIG. 3A, by arranging a plurality of fine holes 125 at intervals of 6 μm or less, a plurality of substantially silicon single crystal grains 131 can be formed in contact with each other. There is no limitation on the arrangement method of the fine holes 125 at this time. For example, as shown in FIG. 3A, a method of arranging the fine holes 125 at equal intervals in the left and right and up and down directions as shown in FIG. A method of arranging all the fine holes 125 to be equally spaced can be considered.

  A patterned silicon film 133 is formed by patterning the silicon film so that a portion unnecessary for forming a thin film transistor is removed and shaped with respect to the silicon film in which a plurality of silicon single crystal grains 131 are arranged in this manner. . At this time, it is desirable that the portion that becomes the channel formation region 135 of the thin film transistor does not include the micro hole 125 and the vicinity thereof. This is because there are many crystallinity disturbances around the micropores 125 and the periphery thereof. In addition, the substantially single crystal is arranged also in a portion to be the source region and the drain region 134, particularly in the source region and the drain region 134 corresponding to a place where a contact hole is formed in a later process.

  Next, as shown in FIG. 5A, an electron cyclotron resonance PECVD method (ECR-PECVD method) or parallel is applied to the upper surfaces of the silicon oxide film 124 (12), which is the second insulating film, and the patterned silicon film 133. The silicon oxide film 14 is formed by a flat plate type PECVD method or a plasma oxidation method using oxygen plasma. The silicon oxide film 14 functions as a gate insulating film of the thin film transistor, and the film thickness is preferably about 10 nm to 150 nm.

  Next, as shown in FIG. 5B, after forming a metal thin film such as tantalum or aluminum by a film forming method such as a sputtering method, the gate electrode 15 and the gate wiring film are formed by patterning. Then, a so-called self-aligned ion implantation is performed by implanting an impurity element serving as a donor using the gate electrode 15 as a mask, thereby forming a source region and a drain region 134 and a channel formation region 135 of an N-channel thin film transistor in the silicon film 133. To do. For example, in this embodiment, phosphorus (P) is implanted as the impurity element. This causes damage to the crystallinity near the surface of the silicon film in the source region and drain region including substantially single crystal grains, resulting in crystal defects, but a portion with excellent crystallinity (crystal layer) remains in the lower part. Therefore, by performing heat treatment at a temperature of about 450 ° C. later, this crystal defect is recovered by solid phase epitaxial growth (described later) from the lower crystal layer, and at the same time, phosphorus enters and activates the crystal lattice position of silicon. The resistance of the source and drain regions 134 can be reduced.

Similarly, when forming a P-channel thin film transistor, boron (B) is widely used as an impurity element serving as an acceptor, and is typically implanted at a concentration of about 3 × 10 ¹⁵ / cm ² or less. However, when only boron is implanted, the activation rate of boron by the subsequent heat treatment is relatively low, and as a result, the resistance of the source region and the drain region of the P-channel thin film transistor becomes a relatively high value. This is because the mass of the boron element is lighter than that of the silicon element, so that the crystalline damage of the silicon film 133 is minor and it is difficult for boron to enter the silicon lattice position.

  Therefore, when forming a P-channel type thin film transistor, the gate electrode 15 is used as a mask, group 4 element ions such as silicon and germanium are implanted into the silicon film 133, and the crystallinity is destroyed near the surface of the source region and the drain region. There is a method of implanting boron as an acceptor impurity after forming a crystalline layer (pre-amorphization). By these steps, a structure is formed in which the vicinity of the surface of the silicon film in the source region and the drain region including substantially single crystal grains becomes an amorphous layer containing boron, and a crystal layer having excellent crystallinity is formed below the amorphous layer. On the other hand, by performing heat treatment at a temperature of about 450 ° C., the solid phase epitaxial growth described in Non-Patent Document 1 proceeds to the amorphous layer using the lower crystal layer as a seed layer. Then, boron, which is an impurity element, efficiently enters the lattice position of the silicon crystal structure and is activated. Thereby, the resistance of the source region and the drain region can be greatly reduced as compared with the conventional case.

  However, in the above method, an ion source (source) for implanting group 4 element ions such as silicon and germanium into the silicon film 133 is necessary for the ion implantation apparatus, and the solid phase epitaxial growth is performed depending on the crystal orientation of silicon. Since the speeds are different, in the case of a polycrystalline silicon film including the substantially silicon single crystal grains having a random crystal orientation, the resistance (sheet resistance, contact resistance) value in the region varies. (Non-Patent Document 2)

Therefore, in this application, boron is implanted into the silicon film 133 at a relatively high concentration of about 4.5 × 10 ¹⁵ / cm ² or more.

FIG. 6 shows the relationship between the contact resistance between the silicon film 133 and the source and drain electrodes (described later) with respect to the boron implantation amount of the silicon film 133 including the substantially silicon single crystal grains 131 obtained by the experiment of the present inventors. It is. The heat treatment temperature for activation is 450 ° C. When pre-amorphization is performed, a relatively low contact resistance can be obtained with an implantation amount of about 1.5 × 10 ^{15 to} 3.0 × 10 ¹⁵ / cm ^2, but there are variations. This is because the crystal orientation of the substantially silicon single crystal grains 131 is random, so that the growth rate of the solid phase epitaxial growth differs depending on the individual silicon substantially single crystal grains 131, and as a result, the resistance value varies. Further, in the case of a relatively high concentration implantation amount of about 4.5 × 10 ¹⁵ / cm ² or more, the resistance value is high and the variation is further increased. This is because, in addition to the variation caused by the random crystal orientation described above, the progress rate of solid phase epitaxial growth is reduced due to the high boron concentration, and as a result, the amorphous layer remains near the surface of the silicon film 133 and becomes high resistance. It is thought. On the other hand, when boron is implanted without pre-amorphization, a relatively high resistance value is obtained because the activation rate is low as described above when the implantation amount is about 1.5 × 10 ^{15 to} 3.0 × 10 ¹⁵ / cm ^2. However, the variation in the values is relatively small. At a relatively high concentration implantation amount of about 4.5 × 10 ¹⁵ / cm ² or more, the resistance value decreases to the same extent as when the pre-amorphization is performed, and the variation remains small. Although the detailed interpretation of this phenomenon is unknown, the silicon film 133 is implanted even at a relatively low temperature by implanting boron into the silicon film 133 having a relatively excellent crystallinity as in the present embodiment. The resistance can be stably reduced without depending on the crystal orientation. This is considered to be based on a phenomenon different from the activation by the solid phase epitaxial growth.

  In the present embodiment, the case where the silicon single crystal grain 131 formed with the fine hole 125 substantially at the center is used as the silicon film 133 has been described. However, the silicon film 133 is irradiated with laser without forming the fine hole 125. The same phenomenon has been confirmed by the present inventor even in the case of a polycrystalline silicon film formed by performing the above. The same applies to the case of a single crystal film of silicon. Therefore, the present invention is effective without depending on the crystallinity of the silicon film 133.

  Next, as shown in FIG. 5C, a silicon oxide film 16 having a thickness of about 500 nm is formed on the upper surface of the silicon oxide film as the gate insulating film 14 and the gate electrode 15 by a film forming method such as PECVD. Form. This silicon oxide film 16 functions as an interlayer insulating film. Next, contact holes 161 and 162 that penetrate through the interlayer insulating film 16 and the gate insulating film 14 to reach the source region and the drain region, respectively, are formed, and a film forming method such as a sputtering method is formed in these contact holes. A source electrode 181 and a drain electrode 182 are formed by embedding and patterning a metal such as aluminum or tungsten.

  Here, the silicon film 131 portion located at the location of the contact holes 161 and 162 and in contact with the source electrode 181 and the drain electrode 182 is also provided with silicon substantially single crystal grains 131 grown from the fine holes 125. Is desirable. As described above, since the resistance of the substantially single crystal grain portion of silicon is reduced by the activation of the impurity element, a good electrical junction between the source electrode 181 and the drain electrode 182 that are metal films and the silicon film 133 is obtained. This is because it becomes possible.

  In the present embodiment, the case where the silicon substantially single crystal grain in which the channel formation region 135 of the thin film transistor is formed and the silicon substantially single crystal grain to be the source region and the drain region 134 are substantially single crystal grains is described. Even when a channel formation region, a source region, and a drain region are formed in one silicon single crystal grain by miniaturization of a thin film transistor, the same effect as in this embodiment can be obtained.

  The thin film transistor of this embodiment is formed by the manufacturing method described above.

  Next, application examples of the thin film transistor according to the present invention will be described. The thin film transistor according to the present invention can be used as a switching element of a liquid crystal display device or as a drive element of an organic EL display device.

  FIG. 7 is a diagram illustrating a connection state of the display device 1 which is an example of the electro-optical device according to the present embodiment. As shown in FIG. 7, the display device 1 is configured by arranging a pixel region G in a display region. The pixel region G uses thin film transistors T1 to T4 that drive the organic EL light emitting element OELD. As the thin film transistors T1 to T4, those manufactured by the manufacturing method of the above-described embodiment are used. From the driver region 2, a light emission control line (Vgp) and a write control line (Vsel) are supplied to each pixel region G. A current line (Idata) and a power supply line (Vdd) are supplied from the driver area 3 to each pixel area G. By controlling the write control line Vsel and the constant current line Idata, a current program is performed for each pixel region G, and light emission is controlled by controlling the light emission control line Vgp. Further, the thin film transistors T1 to T4 of the present embodiment can use the transistor of the present invention also in the driver regions 2 and 3, and in particular, select the light emission control line Vgp and the write control line Vsel included in the driver regions 2 and 3. This is useful for applications that require a large current, such as buffer circuits.

  FIG. 8 is a diagram illustrating an example of an electronic apparatus to which the display device 1 can be applied. The display device 1 described above can be applied to various electronic devices.

  FIG. 8A shows an application example to a mobile phone. The mobile phone 20 includes an antenna unit 21, an audio output unit 22, an audio input unit 23, an operation unit 234, and the display device 100 of the present invention. . Thus, the display device 1 of the present invention can be used as a display unit.

  FIG. 8B shows an application example to a video camera. The video camera 30 includes an image receiving unit 31, an operation unit 32, an audio input unit 33, and the display device 1 of the present invention. Thus, the display device 1 of the present invention can be used as a finder or a display unit.

  FIG. 8C shows an application example to a portable personal computer (so-called PDA). The computer 40 includes a camera unit 41, an operation unit 42, and the display device 1 of the present invention. Thus, the display device 1 of the present invention can be used as a display unit.

  FIG. 8D shows an application example to a head-mounted display, and the head-mounted display 50 includes a band 51, an optical system storage unit 52, and the display device 1 of the present invention. Thus, the display panel of the present invention can be used as an image display source.

  FIG. 8E shows an application example to a rear projector. The rear projector 60 includes a housing 61, a light source 62, a composite optical system 63, mirrors 64 and 65, a screen 66, and a display device according to the present invention. 1 is provided. Thus, the display device 1 of the present invention can be used as an image display source.

  FIG. 8F shows an application example to a front type projector. The front type projector 70 includes an optical system 71 and the display device 1 of the present invention in a casing 72, and can display an image on a screen 73. Yes. Thus, the display device of the present invention can be used as an image display source.

  The display device 1 using the transistor of the present invention is not limited to the above-described example, and can be applied to any electronic device to which an active or passive matrix liquid crystal display device and organic EL display device can be applied. For example, in addition to this, it can also be used for a fax machine with a display function, a finder for a digital camera, a portable TV, an electronic notebook, an electric bulletin board, a display for advertisements, and the like.

  It is possible to combine the semiconductor device manufacturing method and the element transfer technique according to the above-described embodiment. Specifically, after applying the method according to the above-described embodiment to form a semiconductor device on the first substrate serving as the transfer source, the semiconductor device is transferred (moved) onto the second substrate serving as the transfer destination. To do. Thereby, as the first substrate, a substrate having conditions (shape, size, physical characteristics, etc.) convenient for the formation of the semiconductor film and the subsequent element formation can be used. A fine and high-performance semiconductor element can be formed thereon. In addition, the second substrate is not subject to restrictions on the element formation process, and can be increased in area, and an inexpensive substrate made of synthetic resin, soda glass, or a flexible plastic film, It is possible to use a desired one from a wide range of options. Therefore, a fine and high-performance thin film semiconductor element can be easily (low cost) formed on a large-area substrate.

Explanatory drawing explaining the process of forming a micropore and forming a silicon substantially single crystal grain. Explanatory drawing explaining the process of forming a silicon | silicone substantially single crystal grain. The top view explaining the relationship between the arrangement | positioning of a micropore and the shape of the substantially single crystal grain formed corresponding to the arrangement | positioning, when a silicon | silicone substantially single crystal grain is formed. A plan view of a thin film transistor, mainly focusing on a gate electrode and an active region (a source region, a drain region, and a channel formation region) and omitting other configurations. FIG. 10 is an explanatory diagram illustrating a process of forming a thin film transistor. Explanatory drawing explaining the change of the contact resistance value of a silicon film with respect to the implantation amount of boron. FIG. 6 is a diagram illustrating a connection state of a display device that is an example of an electro-optical device. FIG. 14 illustrates an example of an electronic device to which a display device can be applied.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 ... Glass substrate, 12 (121, 122, 124), 14, 16 ... Silicon oxide film, 123 ... Hole, 125 ... Fine hole (recessed part), 13, 130 ... Silicon film, 131 ... Substantially single crystal grain of silicon, 132 DESCRIPTION OF SYMBOLS ... Grain boundary, 133 ... Semiconductor film (transistor region), 15 ... Gate electrode, 134 ... Source region and drain region, 135 ... Channel formation region, 161, 162 ... Contact hole, 1 ... Display device.

Claims (1)

A method of manufacturing a semiconductor device, wherein a P-type thin film transistor is formed by using a polycrystalline or substantially monocrystalline semiconductor film on an insulating substrate having at least one surface,
Patterning the semiconductor film to form a transistor region to be a source region, a drain region and a channel formation region;
A gate electrode forming step of forming a gate insulating film and a gate electrode on the transistor region; an impurity introducing step of introducing impurities into the source region and the drain region from above the gate insulating film and the gate electrode;
An activation step of electrically activating the impurities in the source region and the drain region by applying a heat treatment to the source region and the drain region into which the impurity has been introduced,
In the impurity introduction step, boron is implanted into the source region and the drain region at a concentration of 4.5 × 10 ¹⁵ / cm ² or more.

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