JP2008046019A - Test device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To efficiently test a test object device which outputs an output signal derived by modulating a base band signal by a carrier signal. <P>SOLUTION: This test device comprises a test module having a frequency conversion part which outputs an IF signal derived by frequency conversion of the output signal into an intermediate frequency, an analog-to-digital conversion part which outputs a digital signal derived by sampling and digitizing the IF signal, a comparison part which compares the digital signal with the expected value signal of the digital signal, a set value memory which correlates and stores at least one operation set value of the frequency conversion part, the analog-to-digital conversion part, and the comparison part to each of a plurality of tests, and a sequencer which sequentially reads the operation set value from the set value memory for each of the plurality of tests in response to receiving directions to start the test from a control part, sets the read operation set value to the frequency conversion part, the analog-to-digital conversion part, and the comparison part, and sequentially executes the plurality of tests. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a test apparatus. In particular, the present invention relates to a test apparatus for testing a device under test that outputs an output signal in which a baseband signal is modulated by a carrier signal.

  Conventionally, an analog test apparatus for testing a device under test that outputs an output signal in which a baseband signal is modulated by a carrier signal, such as a communication device, is known. Such an analog test apparatus includes, for example, one or more test modules provided for each device under test and an external controller that controls the entire apparatus.

  The test module converts the output signal output from the device under test into an IF signal. The test module digitizes the IF signal by the AD converter and outputs the digitized signal to the external controller. The external controller acquires the digitized IF signal from each test module, and determines whether the device under test is acceptable by performing arithmetic processing on the acquired digital signal. Then, when the pass / fail determination is completed, the external controller sets each test module for the next test and causes the next test to be executed.

  According to the conventional analog test apparatus, the external controller obtains a digital signal from each test module and determines pass / fail, so it takes a long time to obtain a determination result. Furthermore, according to the conventional analog test apparatus, when a plurality of tests are continuously performed, the overhead between the tests is large.

  In addition, since the presence of a prior art document is not recognized at this time, the description regarding a prior art document is abbreviate | omitted.

  Accordingly, an object of the present invention is to provide a test apparatus that can solve the above-described problems. This object is achieved by a combination of features described in the independent claims. The dependent claims define further advantageous specific examples of the present invention.

  In order to solve the above-described problems, in the first embodiment of the present invention, a test apparatus for testing a device under test that outputs an output signal in which a baseband signal is modulated by a carrier signal, is provided in a slot of the test apparatus main body. A test module to be mounted; and a control unit that controls the test apparatus. The test module includes a baseband signal obtained by frequency-converting an output signal output from the device under test into a baseband frequency, or a device under test. A frequency converter that outputs an IF signal obtained by frequency-converting the output signal to an intermediate frequency, and an analog-to-digital converter that outputs a digital signal obtained by sampling and digitizing the baseband signal or IF signal output by the frequency converter. A comparison unit that compares the digital signal with an expected value signal of the digital signal, A setting value memory that stores at least one operation setting value among the number conversion unit, the analog-digital conversion unit, and the comparison unit in correspondence with each of a plurality of tests, and a test start instruction from the control unit In response to each of the tests, the operation setting values are sequentially read from the setting value memory, and the read operation setting values are set in the frequency conversion unit, the analog-digital conversion unit, and the comparison unit, and the plurality of tests are sequentially executed. There is provided a test apparatus having a sequencer.

  The test module includes a first test module that is mounted in the first slot of the test apparatus body, and a second test module that is mounted in the second slot of the test apparatus body. The first test module includes a frequency converter and The second test module includes an analog-digital conversion unit, the second test module includes a comparison unit, an expected value memory, and a sequencer, and the test apparatus may further include a connection unit that connects between the first test module and the second test module. .

  The frequency converter includes a plurality of local signal generators that output local signals having frequencies in different frequency bands, and one local signal generator selected from the plurality of local signal generators according to a setting by a sequencer A multiplier that multiplies the local signal output from the output device and the output signal output from the device under test, and the sequencer performs a second test after the first test during the first test. The frequency used for the second test is set for the local signal generator that outputs the local signal multiplied by the output signal in step S3, and the local signal having the set frequency is stably output prior to the second test. You may let me.

  The sequencer selects the second test next to the first test based on the comparison result by the comparison unit in the first test, reads the operation setting value in the selected second test from the setting value memory, The read operation setting value may be set in the frequency conversion unit, the analog-digital conversion unit, and the comparison unit, and the second test may be executed.

  The above summary of the invention does not enumerate all the necessary features of the present invention, and sub-combinations of these feature groups can also be the invention.

  According to the present invention, it is possible to test efficiently.

  Hereinafter, the present invention will be described through embodiments of the invention. However, the following embodiments do not limit the invention according to the scope of claims, and all combinations of features described in the embodiments are included. It is not necessarily essential for the solution of the invention.

  FIG. 1 shows a configuration of a test apparatus 10 according to this embodiment together with a device under test 100. The test apparatus 10 tests the device under test 100 that outputs an output signal in which a baseband signal is modulated by a carrier signal. As an example, the test apparatus 10 may test a transmission unit in a communication device.

  The test apparatus 10 includes one or more test modules 20 mounted in the slots of the test apparatus main body, and a control unit 30 that controls the test apparatus 10. When testing a plurality of devices under test 100 in parallel, the test apparatus 10 may include a plurality of test modules 20 corresponding to each of the plurality of devices under test 100 as an example. When the device under test 100 has a plurality of pins, the test apparatus 10 may include a plurality of test modules 20 corresponding to the plurality of pins.

  The test module 20 includes a frequency conversion unit 42, an analog / digital conversion unit 44, a comparison unit 46, a set value memory 48, and a sequencer 50. For example, the test module 20 sequentially executes a plurality of tests on the device under test 100 and acquires a pass / fail judgment result (pass or fail) for each of the plurality of tests.

  The frequency converter 42 is a baseband signal obtained by frequency-converting the output signal output from the device under test 100 to a baseband frequency, or an IF signal obtained by frequency-converting the output signal output from the device under test 100 to an intermediate frequency. Output.

  As an example, the frequency conversion unit 42 may include a plurality of local signal generators 52, an amplifier 54, a multiplier 56, and a low-pass filter 58. The plurality of local signal generators 52 output local signals having frequencies in different frequency bands. As an example, the local signal generator 52 may be a PLL (Phase Locked Loop) circuit that can vary the frequency of the local signal within a predetermined frequency range.

  The amplifier 54 amplifies the output signal output from the device under test 100. The multiplier 56 is a local signal output from one local signal generator 52 selected according to the setting by the sequencer 50 among the plurality of local signal generators 52, and a device under test after being amplified by the amplifier 54. The output signal output from the device 100 is multiplied. The low pass filter 58 passes the low frequency component of the signal output from the multiplier 56. As a result, the low-pass filter 58 can output a baseband signal or IF signal from which alias components have been removed.

  The analog-digital conversion unit 44 outputs a digital signal obtained by sampling the baseband signal or IF signal output from the frequency conversion unit 42 and digitizing it. As an example, the analog-digital conversion unit 44 may include an AD conversion circuit 62 and a storage unit 64. For example, the comparison unit 46 samples the baseband signal or the IF signal for a predetermined period, and writes the data for the predetermined period obtained by the sampling to the storage unit 64.

  The comparison unit 46 compares the digital signal output from the analog-digital conversion unit 44 with the expected value signal of the digital signal. As an example, the comparison unit 46 may include an expected value memory 72, an FFT operation unit 74, a comparator 76, and a comparison result memory 78.

  The expected value memory 72 stores an expected value signal to be acquired as a baseband signal or an IF signal. As an example, the expected value memory 72 may store an expected value for each frequency component of the expected value signal to be acquired as a baseband signal or an IF signal. As an example, the expected value memory 72 may be written with data corresponding to the expected value signal by the sequencer 50 prior to the test.

  The FFT operation unit 74 performs an FFT (Fast Fourier Transform) operation on a baseband signal or IF signal for a predetermined period stored in the storage unit 64 to calculate a signal level for each frequency of the baseband signal or IF signal. The comparator 76 compares the signal level calculated by the FFT calculator 74 with the expected value stored in the expected value memory 72 for each frequency, and determines whether the device under test 100 is good or bad based on the comparison result. For example, the comparator 76 may determine a pass if the difference between the signal level and the expected value is within a predetermined range, and fail if the difference is outside the predetermined range. The comparison result memory 78 stores a pass / fail judgment result for each test.

  The set value memory 48 stores at least one operation set value among the frequency conversion unit 42, the analog-digital conversion unit 44, and the comparison unit 46 in association with each of a plurality of tests. As an example, the setting value memory 48 outputs one local signal generator 52 that outputs a local signal among the plurality of local signal generators 52 and the frequency of the local signal output from the local signal generator 52 to a plurality of tests. You may memorize | store corresponding to each. The set value memory 48 may store an expected value signal to be acquired as a baseband signal or an IF signal in the test in association with each of the plurality of tests. In addition, the set value memory 48 may store operation timing of each unit, a test signal to be given to the device under test 100, and the like.

  The sequencer 50 controls the frequency conversion unit 42, the analog / digital conversion unit 44, and the comparison unit 46 in response to receiving a test start instruction from the control unit 30 and sequentially executes a plurality of tests. For example, the sequencer 50 stores a test program for sequentially executing a plurality of tests. The sequencer 50 may start the program in response to receiving a test start instruction from the control unit 30, and sequentially execute a plurality of tests by operating according to the started program. Furthermore, the sequencer 50 reads out the operation setting values for each of the plurality of tests from the setting value memory 48, and the read operation setting values are preliminarily executed before the corresponding test, the frequency conversion unit 42 and the analog / digital conversion unit 44. And set in the comparison unit 46.

  The test apparatus 10 as described above stores an expected value signal to be acquired as a baseband signal or an IF signal in advance, and compares the expected value signal with the acquired baseband signal or IF signal. As a result, according to the test apparatus 10, it is possible to determine whether the device under test 100 is good or not without transferring the digitized baseband signal or IF signal to the external control unit 30. Therefore, according to the test apparatus 10, the device under test 100 that outputs the output signal obtained by modulating the baseband signal with the carrier signal can be determined at high speed.

  Furthermore, according to the test apparatus 10, the set values of a plurality of tests are sequentially read from the set value memory 48 and set in the frequency conversion unit 42, the analog-digital conversion unit 44, and the comparison unit 46 prior to the test. When performing a plurality of tests in succession, the overhead between the tests can be reduced.

  In the case where the frequency conversion unit 42 includes a plurality of local signal generators 52, the sequencer 50 determines the local signal to be multiplied by the output signal in the second test after the first test during the first test. Is set to the frequency used for the second test. Then, the sequencer 50 may stably output a local signal having a set frequency from the corresponding local signal generator 52 prior to the second test. Thereby, according to the test apparatus 10, when a plurality of tests are continuously executed, for example, an operation necessary for stabilizing the PLL can be completed before the test is started. Can reduce overhead.

  The sequencer 50 may select the second test next to the first test based on the comparison result by the comparison unit 46 in the first test stored in the comparison result memory 78. Then, the sequencer 50 reads the selected operation setting value in the second test from the setting value memory 48, sets the read operation setting value in the frequency conversion unit 42, the analog-digital conversion unit 44, and the comparison unit 46, and Two tests may be performed. Thereby, according to the test apparatus 10, even if it is a case where the test sequence from which the content of the next test differs according to a test result is performed, a some test is continuously performed without going through the external control part 30. can do. Furthermore, when the result of the first test stored in the comparison result memory 78 is “fail”, the sequencer 50 may stop the test sequence without performing the next test.

  FIG. 2 shows an example of the configuration of the test module 20 and an example of connection of the test module 20 to the test apparatus main body. As an example, the test module 20 includes a first test module 20-1 installed in the first slot 82-1 of the test apparatus body and a second test module 20 installed in the second slot 82-2 of the test apparatus body. -2. The first slot 82-1 includes a frequency conversion unit 42 and an analog / digital conversion unit 44, and the second test module 20-2 includes a comparison unit 46, a set value memory 48, and a sequencer 50. That is, the test apparatus 10 may include a first test module 20-1 including an analog processing unit and a second test module 20-2 including a digital processing unit. Furthermore, in this case, the test apparatus 10 may further include a connection portion 84 that connects the first test module 20-1 and the second test module 20-2.

  According to the test apparatus 10 having such a configuration, the analog device under test 100 can be tested using a module used in an existing digital test apparatus or a module obtained by improving the module as the second test module 20-2. it can. Thereby, according to the test apparatus 10, the time and cost of creating the test module can be reduced. Furthermore, according to the test apparatus 10 having such a configuration, the first test module 20-1 and the second test module 20-2 can be operated in parallel. Therefore, according to such a test apparatus 10, the sampling process of the next second test is performed on the first test module 20-1 while the first test is performed by the second test module 20-2. Can be made. Thereby, according to the test apparatus 10, a plurality of tests can be performed in a shorter time.

  As mentioned above, although this invention was demonstrated using embodiment, the technical scope of this invention is not limited to the range as described in the said embodiment. It will be apparent to those skilled in the art that various modifications or improvements can be added to the above-described embodiment. It is apparent from the scope of the claims that the embodiments added with such changes or improvements can be included in the technical scope of the present invention.

1 shows a configuration of a test apparatus 10 according to an embodiment of the present invention, together with a device under test 100. An example of the configuration of the test module 20 and an example of connection of the test module 20 to the test apparatus main body are shown.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Test apparatus 20 Test module 30 Control part 42 Frequency conversion part 44 Analog digital conversion part 46 Comparison part 48 Setting value memory 50 Sequencer 52 Local signal generator 54 Amplifier 56 Multiplier 58 Low pass filter 62 AD conversion circuit 64 Memory | storage part 72 Expected value Memory 74 FFT operation unit 76 Comparator 78 Comparison result memory 82 Slot 84 Connection unit 100 Device under test

Claims (4)

A test apparatus for testing a device under test that outputs an output signal in which a baseband signal is modulated by a carrier signal,
A test module mounted in a slot of the test apparatus body;
A control unit for controlling the test apparatus,
The test module is
Frequency conversion for outputting a baseband signal obtained by frequency-converting the output signal output from the device under test to a baseband frequency, or an IF signal obtained by frequency-converting the output signal output from the device under test to an intermediate frequency And
An analog-to-digital converter that outputs a digital signal obtained by sampling and digitizing the baseband signal or the IF signal output from the frequency converter;
A comparison unit that compares the digital signal with an expected value signal of the digital signal;
A setting value memory that stores at least one operation setting value of the frequency conversion unit, the analog-digital conversion unit, and the comparison unit in association with each of a plurality of tests;
In response to receiving a test start instruction from the control unit, the operation setting value is sequentially read from the setting value memory for each of a plurality of tests, and the read operation setting value is read from the frequency conversion unit, A test apparatus comprising: a sequencer that is set in the analog-digital conversion unit and the comparison unit and sequentially executes the plurality of tests. The test module includes a first test module that is mounted in a first slot of the test apparatus body, and a second test module that is mounted in a second slot of the test apparatus body,
The first test module includes the frequency conversion unit and the analog-digital conversion unit,
The second test module includes the comparison unit, an expected value memory, and the sequencer,
The test apparatus according to claim 1, further comprising a connection portion that connects between the first test module and the second test module. The frequency converter is
A plurality of local signal generators for outputting local signals having frequencies in different frequency bands;
Multiplying the local signal output from one of the plurality of local signal generators selected according to the setting by the sequencer and the output signal output from the device under test. A multiplier,
The sequencer is used in the second test for the local signal generator that outputs a local signal multiplied by the output signal in a second test after the first test during the first test. The test apparatus according to claim 1, wherein a frequency is set, and a local signal having the set frequency is stably output prior to the second test. The sequencer selects a second test next to the first test based on a comparison result by the comparison unit in the first test, and sets the operation setting value in the selected second test as the setting value. The test apparatus according to claim 1, wherein the test apparatus reads the operation setting value read from a memory, sets the read operation setting value in the frequency conversion unit, the analog-digital conversion unit, and the comparison unit, and executes the second test.

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