CN114614844B - Method and circuit for testing double-tone signal and radio frequency testing device - Google Patents

Method and circuit for testing double-tone signal and radio frequency testing device Download PDF

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CN114614844B
CN114614844B CN202210500650.7A CN202210500650A CN114614844B CN 114614844 B CN114614844 B CN 114614844B CN 202210500650 A CN202210500650 A CN 202210500650A CN 114614844 B CN114614844 B CN 114614844B
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frequency
test
band
signals
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CN114614844A (en
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刘旭伟
简子良
陈宇斌
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Foshan Linkage Technology Co ltd
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Foshan Linkage Technology Co ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06Receivers
    • H04B1/10Means associated with receiver for limiting or suppressing noise or interference
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B17/00Monitoring; Testing
    • H04B17/0082Monitoring; Testing using service channels; using auxiliary channels
    • H04B17/0085Monitoring; Testing using service channels; using auxiliary channels using test signal generators

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  • Computer Networks & Wireless Communication (AREA)
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  • Monitoring And Testing Of Transmission In General (AREA)
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Abstract

The invention discloses a test method, a circuit and a radio frequency test device of a double-tone signal, wherein the test method comprises the steps of receiving a test signal, wherein the test signal comprises the double-tone signal and an intermodulation interference signal generated by the double-tone signal; moving the frequency of the two-tone signal and the frequency of the intermodulation interference signal to a first set frequency; filtering the test signal with the frequency shifted to the first set frequency to filter out non-test signals; and processing the test signal after the non-test signal is filtered to obtain a test result. The invention can filter non-test signals, thereby reducing the noise interference of the non-test signals and improving the test precision and accuracy of each order signal of IMD.

Description

Method and circuit for testing double-tone signal and radio frequency testing device
Technical Field
The invention relates to the technical field of testing of a two-tone signal, in particular to a method and a circuit for testing a two-tone signal and a radio frequency testing device.
Background
A monophonic signal is a radio frequency signal (RF signal) of a single frequency, and a diphone signal is a signal synthesized from two monophonic signals, and a diphone is a radio frequency signal of a diphone. When two or more interfering signals are applied to the receiver simultaneously, the combined frequency of the two interferers sometimes passes through the receiver exactly at or near the frequency of the desired signal due to the effect of the non-linearity, which is known as intermodulation interference.
When testing the performance of a Device Under Test (DUT) in an automatic test equipment, a two-tone signal and an intermodulation interference signal (IMD) generated by the two-tone signal need to be tested. During testing, the frequency spectrum is displayed on a screen by adopting a frequency sweep mode of a frequency spectrograph, and all frequencies are swept, so that IMD signals and main signals of all orders and power difference values between the IMD signals and the main signals can be seen.
However, in practical applications, the above method needs to set the proper gear of the receiving chain according to the power of the transmitted two-tone signal, which results in a small gain of the whole receiving chain, and when the IMD signal is weak, the IMD signal is easily interfered by system noise and even submerged by the noise. This results in a test result with large jitter and reduced test accuracy when testing a DUT with good linearity, or even a test result with noise power, which results in an erroneous test result.
Disclosure of Invention
In view of this, embodiments of the present invention provide a method and a circuit for testing a dual tone signal, and a radio frequency testing apparatus, which can solve the problem of low testing accuracy.
The technical scheme provided by the invention is as follows:
a first aspect of embodiments of the present invention provides receiving a test signal, the test signal comprising a two-tone signal and an intermodulation interference signal generated by the two-tone signal; moving the frequency of the two-tone signal and the frequency of the intermodulation interference signal to a first set frequency; filtering the test signal with the frequency shifted to the first set frequency to filter out non-test signals; and processing the test signal after the non-test signal is filtered to obtain a test result. The frequencies of all signals to be tested are moved to the same first set frequency, then the signals are filtered, and non-test signals are filtered, so that the noise interference of the non-test signals is reduced, and the test precision and accuracy of signals of each order of IMD are improved.
Optionally, the moving the frequency of the two-tone signal and the frequency of the intermodulation interference signal to a first set frequency includes: carrying out preset power gain on the test signal to obtain a gain signal; and mixing the gain signal by adopting an externally input local oscillation frequency, and moving the frequency of the double-tone signal and the frequency of the intermodulation interference signal to a first set frequency. The dynamic range of the testable IMD signal is increased by presetting the power gain, and the test signal is moved to the first set frequency by mixing the gain signal, so that the subsequent filtering operation is conveniently executed.
Optionally, the filtering the test signal with the frequency shifted to the first set frequency includes: and carrying out band-pass filtering on the test signal with the frequency shifted to the first set frequency to filter out non-test signals. The first-time band-pass filtering of the test signal can be realized, and the interference of non-test signals is reduced.
Optionally, the filtering the test signal with the frequency shifted to the first set frequency further includes: performing power compensation on the test signal subjected to band-pass filtering; and performing band-pass filtering on the test signal subjected to the power compensation again. The secondary band-pass filtering of the test signal can be realized, and the interference of the non-test signal is further reduced.
A second aspect of the embodiments of the present invention provides a dual tone signal testing circuit, including: a signal input module for receiving a test signal, the test signal comprising a two-tone signal and an intermodulation interference signal generated by the two-tone signal; the frequency shifting module comprises two input ends and an output end, wherein the two input ends are respectively connected with the signal input module and the control module and are used for shifting the frequency of the double-tone signal and the frequency of the intermodulation interference signal to a first set frequency; the filtering module is connected with the output end of the frequency shifting module and is used for filtering non-test signals; the control module is configured to process the test signal without the test signal filtered to obtain a test result, and control the frequency shifting module to shift the frequency of the two-tone signal and the frequency of the intermodulation interference signal to a first set frequency. The frequencies of all signals to be tested are moved to the same first set frequency through the frequency moving module, then the filtering module filters the signals to filter non-test signals, so that the noise interference of the non-test signals is reduced, and the test precision and accuracy of signals of each order of IMD are improved.
Optionally, the signal input module includes a first attenuator, a first variable gain amplifier, and a second attenuator, which are sequentially connected in series, the frequency shifting module includes a first mixer and a first local oscillator, an output end of the second attenuator is connected to one input end of the first mixer, another input end of the first mixer is connected to the control module through the first local oscillator, an output end of the first mixer is connected to the filtering module, and the first variable gain amplifier is configured to perform a preset power gain on a test signal to obtain a gain signal.
Optionally, the filtering module includes a first band-pass filtering module, the first band-pass filtering module includes a third attenuator, a first band-pass filter, and a fourth attenuator that are sequentially connected in series, an input end of the third attenuator is connected to an output end of the first mixer, and the first band-pass filter is configured to filter the non-test signal.
Optionally, the filtering module includes a second band-pass filtering module, the second band-pass filtering module includes a second variable gain amplifier, a fifth attenuator, a second band-pass filter and a sixth attenuator which are connected in series in sequence, an input end of the second variable gain amplifier is connected with the fourth attenuator, the second variable gain amplifier is used for performing power compensation on the test signal subjected to band-pass filtering, and the second band-pass filter is used for filtering the non-test signal again.
Optionally, the signal output module includes a second mixer, a second local oscillator, a seventh attenuator, a low-pass filter, and an analog-to-digital converter, which are sequentially connected in series, one input end of the second mixer is connected to the filtering module, the other input end of the second mixer is connected to the control module through the second local oscillator, an output end of the analog-to-digital converter is connected to the control module, and the second mixer is configured to perform frequency conversion processing on the test signal, to which the non-test signal is filtered, according to a lower local oscillation frequency input by the second local oscillator.
A third aspect of the embodiments of the present invention provides a radio frequency test apparatus, including the test circuit according to any one of the second aspect of the embodiments of the present invention. When the radio frequency testing device of the embodiment performs the double-tone test on the equipment to be tested, the frequencies of all the signals to be tested are moved to the same first set frequency, and then the frequencies are filtered to filter the non-test signals, so that the noise interference of the non-test signals is reduced, and the testing precision and accuracy of signals of each order of IMD are improved.
Drawings
In order to express the technical scheme of the embodiment of the invention more clearly, the drawings used for describing the embodiment will be briefly introduced below, and obviously, the drawings in the following description are only some embodiments of the invention, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a flow chart of a method for testing a two-tone signal according to an embodiment of the present invention;
FIG. 2 is a block diagram of a dual tone signal testing circuit according to an embodiment of the present invention;
FIG. 3 is a schematic circuit diagram of a dual tone signal test circuit according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of frequency processing of f5 and f3 in an embodiment of the present invention;
FIG. 5 is a schematic diagram of frequency processing of f1 and f2 in an embodiment of the present invention;
FIG. 6 is a schematic diagram of frequency processing of f4 and f6 in an embodiment of the present invention;
fig. 7 is a schematic structural diagram of an rf testing apparatus according to an embodiment of the invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the prior art, when a DUT (device under test) with good linearity is tested, the test result may have large jitter, the test accuracy may be reduced, and even the test result may be noise power, thereby generating an erroneous test result. The result is mainly caused by insufficient dynamic range of an ADC (analog to digital converter) in a receiving link, the current IMD (intermodulation interference) test mode is designed in a general mode, and no special test circuit is specially developed for the high-performance IMD test function, so that although the dynamic range of the current ADC is further improved, the test requirement of some DUTs on better IMD signals cannot be met. Moreover, the realization difficulty is greatly limited simply by improving the dynamic range of the ADC, the cost is very high, the design is also very complex, and the realization of the IMD test function is not facilitated.
Based on this, the embodiment of the invention provides a method for testing a two-tone signal, which can solve the problem of low testing precision. Referring to fig. 1, the method includes:
step S100, receiving a test signal, where the test signal includes a two-tone signal and an intermodulation interference signal generated by the two-tone signal.
The two-tone signal test of the present invention is for testing the performance of a DUT, which is a device under test including a switch, an LNA (low noise amplifier), a PA (power amplifier), and the like. During testing, intermodulation interference signals (IMD) are generated by transmitting the two-tone signals to pass through the DUT, the intermodulation interference signals comprise third-order intermodulation (IMD 3), fifth-order intermodulation (IMD 5) and the like, and the performance of the device to be tested is detected by testing the two-tone signals and the generated intermodulation interference signals.
Step S200, the frequency of the two-tone signal and the frequency of the intermodulation interference signal are shifted to a first set frequency.
Specifically, a test signal is subjected to preset power gain before frequency shifting to obtain a gain signal; and then, the gain signal is subjected to frequency mixing by adopting an externally input local oscillation frequency, and the frequency of the double-tone signal and the frequency of the intermodulation interference signal are moved to a first set frequency. The dynamic range of the testable IMD signal can be increased by presetting the power gain, and the test signal is moved to the first set frequency through the first frequency mixer, so that the subsequent filtering operation is conveniently executed. The first set frequency is an intermediate frequency, and can be set according to different specific situations. The test signal is moved to the first set frequency through frequency mixing, so that the subsequent filtering operation is conveniently executed.
Step S300, filtering the test signal with the frequency shifted to the first set frequency, and filtering out non-test signals.
The frequencies of all signals to be tested are moved to the same first set frequency, then the signals are filtered, and non-test signals are filtered, so that the noise interference of the non-test signals is reduced, and the test precision and accuracy of signals of each order of IMD are improved.
Specifically, the filtering the test signal with the frequency shifted to the first set frequency includes: and carrying out band-pass filtering on the test signal with the frequency shifted to the first set frequency to filter out non-test signals. The first-time band-pass filtering of the test signal can be realized, and the interference of non-test signals is reduced. The band-pass filter is specifically used for realizing the band-pass filter, the band-pass filter with a high rectangular coefficient is adopted in the embodiment, and the accessible waveband of the band-pass filter is set to be only the first set frequency, so that the band-pass filter can filter out non-test signals of other frequency bands. The step can realize the first-time band-pass filtering of the test signal, and reduce the interference of non-test signals.
Further, filtering the test signal with the frequency shifted to the first set frequency further includes: and performing power compensation on the test signal subjected to the band-pass filtering.
The power compensation is used for adjusting and amplifying the power of the test signal so as to compensate the power of different test signals. And then, the test signal after power compensation is subjected to band-pass filtering again, so that the test signal can be subjected to second band-pass filtering, and the interference of non-test signals is further reduced. The band-pass filtering can be realized by using a band-pass filter, and in this embodiment, a band-pass filter with a high rectangular coefficient is used, and the band-pass band is only the first set frequency. Non-test signal interference is further reduced by performing a second pass band filtering of the test signal.
And S400, processing the test signal with the non-test signal filtered to obtain a test result.
The processing process comprises the steps of restoring the received test signals into real power according to the gain in sequence, wherein the finally obtained real power value is displayed visually, and the finally obtained IMD signals are all shown in a power difference mode, so that the power values of different signals are needed, the required IMD signals are obtained through the final difference, and other related information is obtained.
According to the method for testing the double-tone signal, disclosed by the embodiment of the invention, the frequencies of all signals to be tested are moved to the same first set frequency, then filtering is carried out on the signals to be tested, and non-test signals are filtered, so that the noise interference of the non-test signals is reduced, and the test precision and accuracy of signals of each order of IMD are improved.
The embodiment of the present invention further provides a dual tone signal testing circuit, please refer to fig. 2, which includes: a signal input module 100, configured to receive a test signal, where the test signal includes a two-tone signal and an intermodulation interference signal generated by the two-tone signal; the frequency shifting module 200 includes two input ends and an output end, the two input ends are respectively connected with the signal input module 100 and the control module 500, and are used for shifting the frequency of the dual-tone signal and the frequency of the intermodulation interference signal to a first set frequency; the filtering module 300 is connected with the output end of the frequency shifting module 200 and is used for filtering the non-test signals; the control module 500 is configured to process the test signal without the test signal filtered to obtain a test result, and control the frequency shifting module 200 to shift the frequency of the dual tone signal and the frequency of the intermodulation interference signal to a first set frequency. Specifically, the control module 500 is a field programmable gate array FPGA, but in other embodiments, chips such as other general-purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or combinations thereof may also be used according to the actual situation without departing from the principles of the present invention.
In this embodiment, the frequency of all signals to be tested is shifted to the same first set frequency by the frequency shifting module 200, and then the filtering module 300 filters the signals to filter out non-test signals, thereby reducing noise interference of the non-test signals and improving the test precision and accuracy of signals of each order of the IMD.
Referring to fig. 3, in an embodiment, the signal input module 100 includes a first attenuator, a first variable gain amplifier VGA1, and a second attenuator, which are sequentially connected in series, the frequency shifting module 200 includes a first mixer and a first local oscillator LO, an output end of the second attenuator is connected to one input end of the first mixer, the other input end of the first mixer is connected to the control module 500 through the first local oscillator LO, an output end of the first mixer is connected to the filtering module 300, and the first variable gain amplifier VGA1 is configured to perform a preset power gain on the test signal to obtain a gain signal. By performing a predetermined power gain, the dynamic range of the testable IMD signal is increased. Through the linkage of the first local oscillator LO and the signal to be tested, the frequency of the output signal is moved to a first set frequency, the subsequent band-pass filtering is convenient to perform, and the non-test signal interference is reduced.
In one embodiment, the filtering module 300 includes a first band-pass filtering module 300, the first band-pass filtering module 300 includes a third attenuator, a first band-pass filter BPF1 and a fourth attenuator connected in series in sequence, an input terminal of the third attenuator is connected to an output terminal of the first mixer, and the first band-pass filter BPF1 is used for filtering the non-test signal. Specifically, the first band-pass filter BPF1 adopts a high-rectangular-coefficient band-pass filter, and the pass band of the first band-pass filter BPF1 is set to only the first set frequency, so that the first band-pass filter BPF1 can filter out non-test signals in other frequency bands.
In an embodiment, the filtering module 300 includes a second band-pass filtering module 300, the second band-pass filtering module 300 includes a second variable gain amplifier VGA2, a fifth attenuator, a second band-pass filter BPF2, and a sixth attenuator, which are sequentially connected in series, an input end of the second variable gain amplifier VGA2 is connected to the fourth attenuator, the second variable gain amplifier VGA2 is configured to perform power compensation on the test signal after the band-pass filtering, and the second band-pass filter BPF2 is configured to filter out the non-test signal again. Specifically, the second band-pass filter BPF2 is the same high-rectangular-coefficient band-pass filter as the first band-pass filter BPF 1. Non-test signal interference is further reduced by performing a second pass band filtering of the test signal. The second variable gain amplifier VGA2 adjusts and amplifies the signal power, so that the power of different test signals passing through the second variable gain amplifier VGA2 is compensated.
Further, in an embodiment, the apparatus further includes a signal output module 400, where the signal output module 400 includes a second mixer, a second local oscillator LO1, a seventh attenuator, a low pass filter LPF, and an analog-to-digital converter ADC sequentially connected in series, one input end of the second mixer is connected to the filtering module 300, the other input end of the second mixer is connected to the control module 500 through a second local oscillator LO1, an output end of the analog-to-digital converter is connected to the control module 500, and the second mixer is configured to perform frequency conversion processing on the test signal, to which the non-test signal is filtered, according to a lower local oscillation frequency input by the second local oscillator LO 1. The second frequency mixer converts the intermediate frequency signal into a baseband signal, and the baseband signal is filtered by the LPF and then sent to the analog-digital converter ADC to convert the baseband signal into a digital signal and sent to the FPGA for processing.
Referring to fig. 3, according to the testing circuit of a two-tone signal of the embodiment of the present invention, the signal input module 100 includes a first attenuator, a first variable gain amplifier VGA1 and a second attenuator which are connected in series in sequence, and an output end of the second attenuator is connected to the first mixer; the frequency shifting module 200 includes a first mixer and a first local oscillator LO, one input end of the first mixer is connected to the signal input module 100, the other input end is connected to the control module 500 through the first local oscillator LO, and the output end is connected to the filtering module 300. The filtering module 300 comprises a first band-pass filtering module 300 and a second band-pass filtering module 300, the first band-pass filtering module 300 comprises a third attenuator, a first band-pass filter BPF1 and a fourth attenuator which are sequentially connected in series, the input end of the third attenuator is connected with the output end of the first mixer, the second band-pass filtering module 300 comprises a second variable gain amplifier VGA2, a fifth attenuator, a second band-pass filter BPF2 and a sixth attenuator which are sequentially connected in series, and the input end of the second variable gain amplifier VGA2 is connected with the fourth attenuator; the signal output module 400 includes a second mixer, a second local oscillator LO1, a seventh attenuator, a low pass filter LPF, and an analog-to-digital converter ADC sequentially connected in series, one input end of the second mixer is connected to the sixth attenuator, the other input end of the second mixer is connected to the control module 500 through the second local oscillator, and an output end of the analog-to-digital converter ADC is connected to the control module 500. The control module 500 is a field programmable gate array FPGA.
The working principle of the test circuit of the double-tone signal of the embodiment of the invention is as follows:
referring to fig. 3, in this embodiment, after a test signal enters a test link, the test signal is first attenuated by a first attenuator to attenuate a large received signal, so as to avoid the nonlinear influence of the receive link on the received signal, then the gain is adjusted by a first variable gain amplifier VGA1 to increase the dynamic range of the IMD signal to be tested, and then the signal enters a second attenuator to process the signal power passing through a first variable gain amplifier VGA1, where the purpose of the second attenuator is to isolate and match a mixer, so as to reduce the nonlinearity of the test signal generated by the first variable gain amplifier VGA1 and the first mixer. Then the test signal is mixed with the local oscillator signal fLO to generate an intermediate frequency signal fif with a fixed frequency, the fif signal passes through the first mixer and then the third attenuator to avoid the nonlinearity generated by the mismatch of the first mixer and the first band pass filter BPF1 from influencing the received signal, then the signal is sent to a frequency selector, namely a first band pass filter BPF1 with a high rectangular coefficient to filter other non-test signals, then the signal passes through the fourth attenuator to match the first band pass filter BPF1 with the back stage, because different IMD signals and fundamental wave double tone signals need to be tested, the power of the tested signal needs to have a large dynamic range, therefore, the fourth attenuator is connected with a second variable gain amplifier VGA2 to adjust and amplify the signal power, so that the power of different test signals after passing through the second variable gain amplifier VGA2 is compensated, the compensated signal is matched with the second variable gain amplifier VGA2 and a frequency selector with a high-level rectangular coefficient at the rear level, namely a second band-pass filter BPF2 through a fifth attenuator, and the second band-pass filter BPF2 can further filter non-test signals and other signals in a link to improve the signal purity. The signal passing through the second band-pass filter BPF2 is sent to the second mixer through the sixth attenuator to convert the intermediate frequency signal fif into the baseband signal fbb, and the sixth attenuator plays a role in isolation and matching of the second band-pass filter BPF2 and the second mixer. The baseband signal fbb firstly passes through the seventh attenuator to match and isolate the second mixer and the post-stage low pass filter LPF, the baseband signal passes through the low pass filter LPF to filter out the out-of-band spurious signals and then is sent to the analog-to-digital converter ADC, and the analog-to-digital converter ADC converts the baseband signal into a digital signal and sends the digital signal to the field programmable gate array FPGA for processing.
The signal processing principles of embodiments of the present invention are described below using test IMDs 3 and 5 as examples.
Referring to fig. 4, 5 and 6, the two-tone signal is transmitted at frequencies f1 and f2 and at an interval Δ f, and an IMD3 signal is generated after passing through the DUT and has frequencies f3 and f4, respectively, and an IMD5 signal with frequencies f5 and f 6. The frequency interval of any two adjacent signals is delta f.
The invention can set the frequency sequence of the received signal at will, and the invention receives the signal from small to large, namely the sequence of the received frequency is as follows: f5, f3, f1, f2, f4 and f 6.
Firstly, on a radio frequency link, all signals enter a receiver from a receiving port and then pass through a fixed attenuator, namely a first attenuator to attenuate all signal power, so as to avoid nonlinear influence of the receiver caused by overlarge power of a double-tone signal, then the signals are sent into a controlled first variable gain amplifier VGA1, and proper gain is set according to the power of the signals with frequencies of f1 and f2, wherein the gain is G. The signal processed by the first variable gain amplifier VGA1 passes through the second attenuator to isolate the output end of the first variable gain amplifier VGA1 from the radio frequency input end of the first mixer fLO, so as to avoid the influence caused by the non-linearity of the circuit. According to the difference of the required receiving signal frequency, the FPGA controls the first local oscillator LO to generate different frequencies, the intermediate frequency is fif, and a low local oscillator design is adopted, so that the output frequency of the first local oscillator LO is fLO = frf-fif. Corresponding to the receiving frequencies f5, f3, f1, f2, f4 and f6, the local oscillator frequencies fLO5, fLO3, fLO1, fLO2, fLO4 and fLO6 respectively, and the frequency calculation is as follows: fLO5= f 5-fif; fLO3= f 3-fif; fLO1= f 1-fif; fLO2= f 2-fif; fLO4= f 4-fif; fLO6= f 6-fif.
Thus, the overall frequency is shifted downwards by the first mixer fLO at different frequencies, which are respectively fLO5, fLO3, fLO1, fLO2, fLO4 and fLO6, and the intermediate frequencies after shifting by the corresponding frequencies f5, f3, f1, f2, f4 and f6 are all corresponding to fif.
Secondly, on the intermediate frequency link, the output of the first mixer fLO is firstly isolated from the input end of a first filter BPF1 through attenuation 3, then the signal passes through a first band-pass filter BPF1 with high rectangular coefficient and passband frequency only fif, and other frequency signals are all stopband frequencies, after the signal is filtered through a first band-pass filter BPF1, the first band-pass filter BPF1 filters out other signals, only the signal with fif frequency passes through, the signal with fif frequency output by the first band-pass filter BPF1 passes through a fourth attenuator, the output end of the first band-pass filter BPF1 is isolated from the input end of a second variable gain amplifier VGA2, so as to avoid the influence of circuit nonlinearity, then the signal enters a second variable gain amplifier VGA2, the signal with fif frequency is subjected to gain processing, and the rf frequencies f5, f3, f1, f2, f4 and f6 respectively pass through fLO5, fl 3, fl 1, fl 2, the power of the fif signals generated after the frequency shifting of the fLO4 and fLO6 are Pif5, Pif3, Pif1, Pif2, Pif4 and Pif6 respectively, when the second variable gain amplifier VGA2 processes the power, the gain settings are G5, G3, G1, G2, G4 and G6 respectively, the output signal of the second variable gain amplifier VGA2 is isolated by a fifth attenuator, the output signal of the second variable gain amplifier VGA2 is output and input with the second band-pass filter BPF2, the output signal of the fifth attenuator is sent to a second band-pass filter BPF2 with the same high rectangular coefficient as that of the first band-pass filter BPF1, the non-test signals are further filtered, the test precision and performance are improved, and the output signal of the second band-pass filter BPF2 is isolated by a sixth attenuator, and the second band-pass filter BPF2 is isolated from the input end of the second mixer. The frequency of the output baseband signal of the second mixer is fbb, the down local oscillator is used for signal frequency conversion, and the frequency of the input signal is fif, so the fixed local oscillator frequency of the second mixer is denoted as flo bb, and the calculation method is flo bb = fif-fbb.
Finally, on the baseband link, the output of the second mixer is isolated from the output end of the second mixer 2 and the input end of the low pass filter LPF through the seventh attenuator, clutter signals are filtered by the low pass filter LPF and then sent to the ADC chip, and then the corresponding power is obtained after calculation by digital chips such as the FPGA and the like, and the specific frequency operation is as shown in fig. 4, 5 and 6.
It should be noted that, in the embodiment of the present invention, the gain of the first variable gain amplifier VGA1 is set according to the transmitted two-tone signal, so as to avoid the distortion of the receiving circuit due to the excessive signal power, which affects the test signal and thus the test result, and because the power requirements of the two-tone signals of different DUTs are different, the dynamic range of the output two-tone of different DUTs is adjusted by the different gains of the first variable gain amplifier VGA1, thereby improving the versatility of the test function. The second variable gain amplifier VGA2 is set after the first mixer and the first band pass filter BPF1, so the signal entering the second variable gain amplifier VGA2 is a single frequency point signal, but because the input signal of the second variable gain amplifier VGA2 has the IMD signal requirement for testing different orders and also should not meet the test requirement of different DUTs, the signal power entering the second variable gain amplifier VGA2 is not the same, and the gain adjustment of the second variable gain amplifier VGA2 makes the output have relatively stable signal power, thereby improving the signal-to-noise ratio of the ADC signal and improving the test accuracy.
The fif and fbb are parameters in system design, and are designed to improve system performance, reduce design cost and improve reliability as much as possible, and the fif is mainly related to the high squareness factor BPF1 and BPF2 that can be realized, and the fif is designed after being selected according to the two filters, and other frequencies of non-fif signals can be filtered out as much as possible through the two filters. Fbb selectivity is flexible, frequency is low, design cost is low, stability is good, but too low is interfered by inherent noise, and in practical use, fbb selects 1MHz as frequency.
Specifically, in the circuit according to the embodiment of the present invention, the first attenuator-the seventh attenuator is a fixed attenuation attenuator, the conversion loss of the first mixer and the second mixer at a specific conversion frequency is also fixed, the in-band loss of the first bandpass filter BPF1, the second bandpass filter BPF2 and the low-pass filter LPF is also fixed, and then the conversion gains for converting the frequencies of the above-mentioned circuits from f5, f3, f1, f2, f4 and f6 to fbb frequencies are also fixed, and after calibration, the conversion gains at different frequencies are respectively Gtotal5, Gtotal3, Gtotal1, Gtotal2, Gtotal4 and Gtotal 6. Gtotal5, Gtotal3, Gtotal1, Gtotal2, Gtotal4, Gtotal6 are fixed gains, which were calibrated before application of the embodiments of the present invention. The calibration principle is as follows: the gains of VGA1 and VGA2 are respectively set to 0dB (relative 0, not absolute 0), the power applied at the frontmost end of the system, that is, the signal receiving end is fixed to Pin, different frequency sweep signals are input to the input of the embodiment of the present invention, and simultaneously the local oscillation frequency of the corresponding LO signal is controlled to make the output frequency of the first mixer fif, the frequency of LO1 is not changed, the output frequency of the second mixer is fbb, the FPGA calculates the signal power after processing the different frequency sweep signals by the circuit of the present invention, the calculated power is Pout, the gain of the fixed gain circuit is G = Pout-Pin, and Pin under different frequencies uses the same power, but due to the frequency response of the circuit, Pout will be different according to different frequencies, so that different frequencies correspond to different G, that is, corresponding to Gtotal5, Gtotal3, Gtotal1, Gtotal2, Gtotal4, Gtotal6 under the above frequencies. Where the gain is only frequency dependent.
The signals received by the FPGA under different test frequencies are recorded as P5, P3, P1, P2, P4 and P6 in sequence. According to the above circuit arrangement, the real power values of the input signals at different frequencies are respectively Pin5, Pin3, Pin1, Pin2, Pin4 and Pin6, and the real power values are respectively: pine5= P5-Gtotal 5-G5-G; pine3= P3-Gtotal 3-G3-G; pine1= P1-Gtotal 1-G1-G; pine2= P2-Gtotal 2-G2-G; pine4= P4-Gtotal 4-G4-G; pine6= P6-Gtotal 6-G6-G. Then the IMD5 lower sideband required for testing is: IMD5L (dB) = Pine5- (Pine 1+ Pine 2)/2; the IMD3 required to be tested has the following sidebands: IMD3L (dB) = Pine3- (Pine 1+ Pine 2)/2; the upper sidebands of the IMD5 required to be tested are: IMD5U (dB) = Pine6- (Pine 1+ Pine 2)/2; the upper sidebands of IMD3 required for testing are: IMD3U (dB) = Pine4- (Pine 1+ Pine 2)/2.
And if the IMD signal is required to be tested, the rest can be analogized.
According to the embodiment of the invention, the finally obtained real power value is visually displayed, and the final IMD signals are all shown in the form of power difference, so that the power values of different signals are also needed, the required IMD signals are obtained through the final difference, and further other related information is obtained. In testing DUTs, both IMD3 and IMD5 generate two signals of upper and lower sidebands, some DUT tests require testing of the upper sideband, some DUT tests require testing of the lower sideband, some DUT tests require testing of both sidebands, and sometimes the power of both sidebands is not the same, so that both sidebands need to be tested simultaneously.
The invention does not depend on the dynamic range of the ADC, but uses the frequency selector, cooperates with different variable gain amplifiers and matching circuits, and adds the application of software control and algorithm calculation, and the invention greatly improves the test precision and test accuracy of IMD signals by filtering out unnecessary frequency signals and calculating single-frequency point power, reduces the design difficulty and design cost by reducing the requirement on the ADC, and provides the possibility of further improving the circuit according to the test requirement of subsequent development on higher IMD signals.
An embodiment of the present invention further provides a radio frequency testing apparatus, including the testing circuit according to any one of the second aspect of the embodiments of the present invention. The specific situation of the device is referred to the above test circuit embodiment, and is not described herein again.
In the description herein, references to the description of the term "the present embodiment," "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature.
The above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims (10)

1. A method for testing a two-tone signal, comprising:
receiving test signals in sequence from small to large according to signal frequency, wherein the test signals comprise dual-tone signals and intermodulation interference signals generated by the dual-tone signals;
respectively moving the frequency of the two-tone signal and the frequency of the intermodulation interference signal to a first set frequency with the same frequency according to the received frequency of the two-tone signal and the intermodulation interference signal according to a receiving sequence, wherein the frequency of the two-tone signal is different from that of the intermodulation interference signal;
filtering the test signal with the frequency shifted to the first set frequency to filter out non-test signals;
and processing the test signal without the non-test signal to obtain a test result, wherein the test result is the power of each two-tone signal and each intermodulation interference signal obtained by sequentially calculating the received test signal.
2. The method of claim 1, wherein the moving the frequency of the two-tone signal and the frequency of the intermodulation interference signal to a first predetermined frequency comprises:
carrying out preset power gain on the test signal to obtain a gain signal;
and mixing the gain signal by adopting an externally input local oscillation frequency, and moving the frequency of the double-tone signal and the frequency of the intermodulation interference signal to a first set frequency.
3. The method as claimed in claim 1, wherein the filtering the test signal shifted to the first predetermined frequency comprises:
and carrying out band-pass filtering on the test signal with the frequency shifted to the first set frequency to filter out non-test signals.
4. The method as claimed in claim 3, wherein the filtering the test signal shifted to the first predetermined frequency further comprises:
performing power compensation on the test signal subjected to band-pass filtering;
and performing band-pass filtering on the test signal subjected to the power compensation again.
5. A circuit for testing a two-tone signal, comprising:
the signal input module is used for receiving test signals in sequence from small to large according to signal frequency, and the test signals comprise dual-tone signals and intermodulation interference signals generated by the dual-tone signals;
the frequency shifting module comprises two input ends and an output end, wherein the two input ends are respectively connected with the signal input module and the control module and are used for respectively shifting the frequency of the two-tone signal and the frequency of the intermodulation interference signal to a first set frequency with the same frequency according to the received frequency of the two-tone signal and the intermodulation interference signal according to the receiving sequence, wherein the frequency of the two-tone signal is different from that of the intermodulation interference signal;
the filtering module is connected with the output end of the frequency shifting module and is used for filtering non-test signals;
the control module is configured to process the test signal without the test signal to obtain a test result, and control the frequency shifting module to shift the frequency of the two-tone signal and the frequency of the intermodulation interference signal to a first set frequency, where the test result is the power of each two-tone signal and the intermodulation interference signal obtained by sequentially calculating the received test signal.
6. The circuit for testing a diphone signal according to claim 5, wherein the signal input module comprises a first attenuator, a first variable gain amplifier and a second attenuator which are sequentially connected in series, the frequency shifting module comprises a first mixer and a first local oscillator, an output terminal of the second attenuator is connected with one input terminal of the first mixer, the other input terminal of the first mixer is connected with the control module through the first local oscillator, an output terminal of the first mixer is connected with the filtering module, and the first variable gain amplifier is configured to perform a predetermined power gain on the test signal to obtain the gain signal.
7. The dual tone signal testing circuit of claim 6, wherein the filtering module comprises a first band-pass filtering module, the first band-pass filtering module comprises a third attenuator, a first band-pass filter and a fourth attenuator sequentially connected in series, an input end of the third attenuator is connected to an output end of the first mixer, and the first band-pass filter is used for filtering non-test signals.
8. The dual-tone signal testing circuit according to claim 7, wherein the filtering module comprises a second band-pass filtering module, the second band-pass filtering module comprises a second variable gain amplifier, a fifth attenuator, a second band-pass filter and a sixth attenuator which are sequentially connected in series, an input end of the second variable gain amplifier is connected to the fourth attenuator, the second variable gain amplifier is configured to perform power compensation on the test signal subjected to band-pass filtering, and the second band-pass filter is configured to filter out a non-test signal again.
9. The dual tone signal testing circuit as claimed in claim 6, further comprising: the signal output module comprises a second frequency mixer, a second local oscillator, a seventh attenuator, a low-pass filter and an analog-to-digital converter which are sequentially connected in series, one input end of the second frequency mixer is connected with the filtering module, the other input end of the second frequency mixer is connected with the control module through the second local oscillator, the output end of the analog-to-digital converter is connected with the control module, and the second frequency mixer is used for carrying out frequency conversion processing on the test signal after the non-test signal is filtered according to the lower local oscillation frequency input by the second local oscillator.
10. A radio frequency test device comprising a test circuit as claimed in any one of claims 5 to 9.
CN202210500650.7A 2022-05-10 2022-05-10 Method and circuit for testing double-tone signal and radio frequency testing device Active CN114614844B (en)

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