JP2008042487A - Operational amplifier - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an operational amplifier supplying sufficient currents to a load during dynamic operation, reducing power consumption during static operation, reducing offset and reducing distortion. <P>SOLUTION: An output current that flows to one transistor of a pair of differential transistors 100 is converted into a voltage by a current/voltage converting means 120 and output from first and second voltage output terminals. Control terminals of output transistors 130, 140 connected to the first and the second voltage output terminals of the current/voltage converting means 120 are output. An operating area of the output transistor 130 is a class-A amplification operating area and an operating area of the second output transistor 140 is a class-B amplification operating area. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an operational amplifier that is used in electronic equipment and can be integrated on a semiconductor integrated circuit.

  Conventionally, operational amplifiers used in electronic devices and can be integrated on semiconductor integrated circuits are CMOS Analog Circuit Design p388 published by Saunders College Publishing and Analysis and Design of Analog Integrated Circuits (Third Edition) published by John Wiley & Sons, Inc. ) It is disclosed in p462.

  FIG. 12 is a circuit diagram of a conventional operational amplifier (voltage input current source output type operational amplifier or OTA: Operational Transconductance Amplifier). Since an output dynamic range is wide and advantageous, a current source output type operational amplifier is often used.

  In FIG. 12, VDD is a power supply terminal, VSS is a ground terminal, in− is an input terminal having a negative polarity of the operational amplifier, in + is an input terminal having a positive polarity of the operational amplifier, and out is an output terminal of the operational amplifier. is there.

  I1N is a current source for operating an operational amplifier, M1N and M2N are n-channel MOS transistors constituting a differential pair, M3P and M4P are p-channel MOS transistors constituting a current mirror, and M5N, M6N and M7N are current source current mirrors , M8P is a p-channel output MOS transistor, and C1N is a capacitor for preventing oscillation of the operational amplifier.

  The n-channel MOS transistor M1N and the n-channel MOS transistor M2N constitute a differential amplifier, and the current of the n-channel MOS transistor M6N is changed to the n-channel MOS according to the voltage difference applied to the input terminal in− and the input terminal in +. They are distributed to the drain of the transistor M1N and the drain of the n-channel MOS transistor M2N. The current flowing through the n-channel MOS transistor M1N is sent to the p-channel MOS transistor M3P and reflected on the gate voltage of the p-channel MOS transistor M4P operating as a current mirror. The voltage at the connection point between the drain of the n-channel MOS transistor M2N and the drain of the p-channel MOS transistor M4P is determined by the current flowing through the n-channel MOS transistor M2N and the gate voltage of the p-channel MOS transistor M4P. That is, when the current supply capability (hereinafter simply referred to as capability) of the n-channel MOS transistor M2N is higher than that of the p-channel MOS transistor M4P, the n-channel MOS transistor M2N operates in the triode region (linear region), and p The channel MOS transistor M4P operates in the saturation region. As a result, the voltage at the connection point between the drain of the n-channel MOS transistor M2N and the drain of the p-channel MOS transistor M4P decreases. Accordingly, the gate voltage of the output MOS transistor M8P decreases, and the output MOS transistor M8P tries to discharge current. At this time, the operational amplifier functions as a source, that is, discharges current from the output terminal out.

  Conversely, when the capability of the p-channel MOS transistor M4P is higher than that of the n-channel MOS transistor M2N, the p-channel MOS transistor M4P operates in the triode region and the n-channel MOS transistor M2N operates in the saturation region. As a result, the voltage at the connection point between the drain of the n-channel MOS transistor M2N and the drain of the p-channel MOS transistor M4P increases. Accordingly, the gate voltage of the output MOS transistor M8P increases, and the current of the output MOS transistor M8P stops. At this time, as the operational amplifier, the n-channel MOS transistor M7N functions as a current source and functions as a sink, that is, draws current from the output terminal out.

  In this case, the source current capability is determined by the gate voltage of the output MOS transistor M8P, and the sink current capability is determined by the current of the n-channel MOS transistor M7N acting as a current source.

  Furthermore, in the conventional operational amplifier, the input transistor may be configured by a p-channel MOS transistor instead of an n-channel MOS transistor. This is shown in FIG. In FIG. 13, I1P is a current source for operating an operational amplifier, M1P and M2P are p-channel MOS transistors forming a differential pair, M3N and M4N are n-channel MOS transistors forming a current mirror, and M5P, M6P and M7P are currents. A p-channel MOS transistor constituting the current mirror of the source, M8N is an n-channel output MOS transistor, and C1P is a capacitor for preventing oscillation of the operational amplifier. Others are the same as FIG.

  The p-channel MOS transistor M1P and the p-channel MOS transistor M2P constitute a differential amplifier, and the current of the p-channel MOS transistor M6P is changed to the p-channel MOS according to the voltage difference applied to the input terminal in− and the input terminal in +. They are distributed to the drain of the transistor M1P and the drain of the p-channel MOS transistor M2P. The current flowing through the p-channel MOS transistor M1P is sent to the n-channel MOS transistor M3N and reflected on the gate voltage of the n-channel MOS transistor M4N operating as a current mirror. The current at the p-channel MOS transistor M2P and the gate voltage of the n-channel MOS transistor M4N determine the voltage at the connection point between the drain of the p-channel MOS transistor M2P and the drain of the n-channel MOS transistor M4N. That is, when the capability of the p-channel MOS transistor M2P is higher than that of the n-channel MOS transistor M4N, the p-channel MOS transistor M2P operates in the triode region and the n-channel MOS transistor M4N operates in the saturation region. As a result, the voltage at the connection point between the drain of the p-channel MOS transistor M2P and the drain of the n-channel MOS transistor M4N increases. Accordingly, the gate voltage of the output MOS transistor M8N rises, and the output MOS transistor M8N attempts to sink current. At this time, the operational amplifier functions as a sink.

  On the contrary, when the capability of the n-channel MOS transistor M4N is higher than that of the p-channel MOS transistor M2P, the n-channel MOS transistor M4N operates in the triode region and the p-channel MOS transistor M2P operates in the saturation region. As a result, the voltage at the connection point between the drain of the p-channel MOS transistor M2P and the drain of the n-channel MOS transistor M4N decreases. Accordingly, the gate voltage of the output MOS transistor M8N decreases, and the current of the output MOS transistor M8N stops. At this time, as the operational amplifier, the p-channel MOS transistor M7P serves as a current source and serves as a source.

  In this case, the source current capability is determined by the gate voltage of the output MOS transistor M8N, and the sink current capability is determined by the current of the p-channel MOS transistor M7P acting as a current source.

  Here, FIG. 10 shows a block diagram of the operational amplifier whose circuit diagram is shown in FIG. 12 and FIG. In FIG. 10, OP is the operational amplifier of FIG. 12 or FIG. A more detailed block diagram of the operational amplifier whose circuit diagram is shown in FIGS. 12 and 13 is shown in FIG. In FIG. 11, 200 is a differential transistor pair, 210 is a current source, 220 is a current mirror, and 230 is an output transistor.

  The differential transistor pair 200 corresponds to the n-channel MOS transistors M1N and M2N in FIG. 12, and corresponds to the p-channel MOS transistors M1P and M2P in FIG.

  The current source 210 corresponds to the current source I1N and the n-channel MOS transistors M5N, M6N, and M7N in FIG. 12, and corresponds to the current source I1P and the p-channel MOS transistors M5P, M6P, and M7P in FIG.

  The current mirror 220 corresponds to the p-channel MOS transistors M3P and M4P in FIG. 12, and corresponds to the n-channel MOS transistors M3N and M4N in FIG.

  The output transistor 230 corresponds to the output MOS transistor M8P in FIG. 12, and corresponds to the output MOS transistor M8N in FIG.

  Further, an operational amplifier that has been conventionally used in electronic equipment and can be integrated on a semiconductor integrated circuit is disclosed in FIG. 1 of Japanese Patent Laid-Open No. 61-148906. FIG. 15 shows a view corresponding to FIG. 1 of Japanese Patent Laid-Open No. 61-148906. 15, components having the same functions as those in FIGS. 12 and 13 are denoted by the same reference numerals. The operational amplifier of FIG. 15 has a structure in which the operational amplifier of FIG. 12 and the operational amplifier of FIG. 13 are coupled in parallel. However, the n-channel MOS transistor M7N and the p-channel MOS transistor M7P shown in FIGS. 12 and 13 are omitted.

  The operational amplifier of FIG. 15 is represented by the operational amplifier block shown in FIG. 10 as shown in FIG. In FIG. 14, OPN is an operational amplifier whose input MOS transistor is an n-channel MOS transistor (corresponding to the operational amplifier of FIG. 12), and OPP is an operational amplifier whose input MOS transistor is a p-channel MOS transistor (operation of FIG. 13). Corresponding to the amplifier). When the operational amplifier of FIG. 14 acts as a source, the operational amplifier OPN is activated, and when it acts as a sink, the operational amplifier OPP is activated.

  Further, an operational amplifier that is conventionally used in electronic equipment and can be integrated on a semiconductor integrated circuit is disclosed as a line drive circuit in FIG. 3 of US Pat. No. 6,188,284. FIG. 16 shows a line driving circuit shown in FIG. 3 of US Pat. No. 6,188,284. In FIG. 16, AMP is an amplifier, and VIN− and VIN + are input terminals. The amplifier OP100 and the output MOS transistor M8P constitute an operational amplifier OPN1. The amplifier OP111 and the output MOS transistor M81P constitute an operational amplifier OPN2. The amplifier OP200 and the output MOS transistor M8N constitute an operational amplifier OPP1. The amplifier OP211 and the output MOS transistor M81N constitute an operational amplifier OPP2.

FIG. 16 is a block diagram of the operational amplifier shown in FIG. In FIG. 17, OPN1 and OPN2 are operational amplifiers using n-channel MOS transistors as input transistors, and OPP1 and OPP2 are operational amplifiers using p-channel MOS transistors as input transistors. The operational amplifier OPN1 and the operational amplifier OPP1 perform class AB operation. The operational amplifier OPN2 and the operational amplifier OPP2 are composed of operational amplifiers whose operation switching voltages are set in the input differential amplifier portion for shifting the operation range from the class AB operation to the class B operation. That is, the operational amplifier OPN2 and the operational amplifier OPP2 are operational amplifiers that output a current only when the signal level is high, and perform a class B operation.
JP-A-61-148906 US Pat. No. 6,188,284 CMOS Analog Circuit Design (1987), author Philip E. Allen, Douglas R. Holberg, publisher Saunders College Publishing Analysis and Design of Analog Integrated Circuits (Third Edition) (1993), author Paul R. Gray, Robert G. Meyer, publisher John Wiley & Sons, Inc.

  Conventionally, in an operational amplifier that is used in an electronic device and can be integrated on a semiconductor integrated circuit, a sufficient current is supplied to a load during a dynamic operation and a static operation is performed. Reductions in power consumption, offset, and distortion were problems.

  For example, in the operational amplifier using the n-channel MOS transistor of FIG. 12 as the input transistor, in order to increase the output source current, the size of the gate width of the output MOS transistor M8P or the gate length of the output MOS transistor M8P is increased. The size must be reduced.

  However, in order to reduce the offset of the system (operation center in circuit design), the current of the MOS transistor M7N must be increased according to the size of the output MOS transistor M8P.

  As a result, the power consumption of the static operation increases in order to guarantee the dynamic operation while maintaining the system offset performance, that is, keeping the system offset small. The output sink current is limited by the amount of current of the n-channel MOS transistor M7N constituting the current source.

  Here, an evaluation circuit is shown in FIG. This evaluation circuit is for evaluating a typical use state of the operational amplifier OP. In FIG. 18, R represents a load resistance. Vsin represents an input signal. Vref represents the voltage of the operational amplifier operation reference voltage source. This voltage Vref is set to (1/2) VDD, for example.

  FIG. 19 shows the relationship between the input signal voltage VIN measured using the evaluation circuit of FIG. 18 and the output signal current IOUT flowing through the load resistor R.

  FIG. 19 shows the relationship between the input signal voltage VIN and the output signal current IOUT flowing through the load resistor R in the operational amplifier of FIG. 12 using an n-channel MOS transistor as an input transistor. In FIG. 19, the output signal current IOUT is illustrated corresponding to each of a plurality of input signal voltages VIN having different amplitudes. Where the instantaneous value of the input signal voltage VIN is large, the output signal current IOUT is saturated.

  For example, in the operational amplifier having the p-channel MOS transistor of FIG. 13 as an input transistor, in order to increase the output sink current, the size of the gate width of the output MOS transistor M8N or the size of the gate length of the output MOS transistor M8N is increased. Must be reduced.

  However, in order to reduce the system offset, the current of the MOS transistor M7P must be increased according to the size of the output MOS transistor M8N.

  As a result, the power consumption of the static operation increases in order to guarantee the dynamic operation while maintaining the system offset performance, that is, keeping the system offset small. The output source current is limited by the amount of current of the p-channel MOS transistor M7P constituting the current source.

  FIG. 20 shows the relationship between the input signal voltage VIN measured using the evaluation circuit of FIG. 18 and the output signal current IOUT flowing through the load resistor R.

  FIG. 20 shows the relationship between the input signal voltage VIN and the output signal current IOUT flowing through the load resistor R in the operational amplifier of FIG. 13 using a p-channel MOS transistor as an input transistor. In FIG. 20, the output signal current IOUT is shown corresponding to each of the plurality of input signal voltages VIN having different amplitudes. Where the instantaneous value of the input signal voltage VIN is large, the output signal current IOUT is saturated.

  For example, in the operational amplifier of FIG. 15, in order to increase the output current, the size of the gate width of the output MOS transistor M8N and the output MOS transistor M8P is increased, or the size of the gate length of the output MOS transistor M8N and the output MOS transistor M8P. Must be reduced.

  However, in order to reduce the system offset, the currents of the output MOS transistors M8N and M8P must be increased according to the current capability of the transistors.

  As a result, the power consumption of the static operation increases in order to guarantee the dynamic operation while maintaining the system offset performance, that is, keeping the system offset small.

  The relationship between the input signal voltage VIN measured using the evaluation circuit of FIG. 18 and the output signal current IOUT flowing through the load resistor R is shown in FIG.

  In FIG. 21, the output signal current IOUT is illustrated corresponding to each of a plurality of input signal voltages VIN having different amplitudes. Where the instantaneous value of the input signal voltage VIN is large, the output signal current IOUT is saturated.

  As described above, in the operational amplifier of FIG. 15, in order to increase the output current, the gate width size of the output MOS transistor M8N and the output MOS transistor M8P is increased or the gates of the output MOS transistor M8N and the output MOS transistor M8P are increased. What is necessary is just to reduce the size of the length. In order to reduce the power consumption of the static operation, the output MOS transistors M8N and M8P may be turned off in the static state.

  However, the operational amplifier is in class B operation and small signals are not allowed to pass. This causes signal distortion.

  FIG. 22 shows the relationship between the input signal voltage VIN measured using the evaluation circuit of FIG. 18 and the output signal current IOUT flowing through the load resistor R.

  In FIG. 22, the output signal current IOUT is illustrated corresponding to each of the plurality of input signal voltages VIN having different amplitudes. Even when the instantaneous value of the input signal voltage VIN is large, the output signal current IOUT is not saturated. However, the signal does not pass when the instantaneous value of the input signal voltage VIN is small.

  For example, in the operational amplifier of FIG. 16, in order to increase the output current, the size of the gate width of the output MOS transistor M81N and the output MOS transistor M81P is increased, or the size of the gate length of the output MOS transistor M81N and the output MOS transistor M81P. Must be reduced.

  Further, the system offsets of the operational amplifiers OPN1 and OPP1 can be individually reduced by optimizing the transistor size of the output MOS transistor and the current source.

  Further, the operational amplifiers OPN2 and OPP2 set an operation range switching voltage for class B operation at the operating point, and share the operation with the operational amplifiers OPN1 and OPP1. Thereby, reduction of consumption current and dynamic output signal current can be secured.

However, there is no correlation between the random offset voltages (due to relative variations in devices) of the operational amplifier OPN1 and the operational amplifier OPN2 and the operation region switching voltage that causes the operational amplifier OPN2 to perform class B operation. Further, there is no correlation between the random offset voltages of the operational amplifiers OPP1 and OPP2 and the operation region switching voltage for operating the operational amplifier OPP2 in class B. Here, the 3σ value resulting from the dispersion of the random offset voltage of the operational amplifier OPN1 is VON1, the 3σ value resulting from the dispersion of the random offset voltage of the operational amplifier OPN2 is VON2, and the operational amplifier OPN2 that gives the operation sharing is operated for class B operation. If the operating area switching voltage is VONAB,
VONAB> VON1 + VON2
The following conditions are required.

Also, the 3σ value due to the dispersion of the random offset voltage of the operational amplifier OPP1 is VOP1, the 3σ value due to the dispersion of the random offset voltage of the operational amplifier OPP2 is VOP2, and the operation region switching voltage for operating the operational amplifier OPP2 in class B is If it is VOPAB,
VOPAB> VOP1 + VOP2
The following conditions are required.

  If this relationship is not observed, the operational amplifiers cannot be reliably shared, the output signal distortion increases, the output transistors of the operational amplifier OPN2 and the operational amplifier OPP2 operate, and the operational amplifier OPN2 operates. Products with increased current consumption of the amplifier OPP2 appear due to manufacturing variations.

  FIG. 23 shows the relationship between the input signal voltage VIN measured using the evaluation circuit of FIG. 18 and the output signal current IOUT flowing through the load resistor R in the operational amplifier shown in FIG.

  In FIG. 23, the output signal current IOUT is shown corresponding to each of a plurality of input signal voltages VIN having different amplitudes. Even when the instantaneous value of the input signal voltage VIN is large, the output signal current IOUT is not saturated. In addition, the signal passes through even where the instantaneous value of the input signal voltage VIN is small.

  A frequency spectrum diagram at that time is shown in FIG. As can be seen from FIG. 24, the output signal current IOUT is distorted and the level of the harmonic component is high.

  As described above, the output signal current IOUT is distorted and the level of the harmonic component is high because the operating range switching voltage for performing the class B amplification operation is set to be large in consideration of the variation at the time of manufacture. This is considered to be because small signals are difficult to pass.

  Therefore, the present invention solves the above-described conventional problems, and provides sufficient current supply to the load during dynamic operation, power consumption during static operation, offset reduction, and distortion reduction. It is an object to provide an operational amplifier capable of performing

  In order to solve the above-described problems, an operational amplifier according to the present invention converts a differential transistor pair and an output current flowing through one transistor of the differential transistor pair into a voltage and outputs the voltage from first and second voltage output terminals. Current voltage conversion means, and first and second output transistors having control terminals connected to the first and second voltage output terminals of the current voltage conversion means, and the operating range of the first output transistor is A The second output transistor is in the class B amplification operation region.

  According to this configuration, since the second output transistor that operates in the class B amplification operation region is provided in parallel with the first output transistor that operates in the class A amplification operation region, the current capacity of the first output transistor Can be set small and the current capacity of the second output transistor can be set large so that dynamic operation can be guaranteed and static operation power consumption can be reduced while keeping the system offset small. In addition, distortion can be reduced. Also, unlike providing an operational amplifier for class A operation and an operational amplifier for class B operation in parallel, a plurality of output transistors are provided inside the operational amplifier, one operating in the class A amplification operating range. Since the rest is operated in the class B amplification operation region, there is little variation in the characteristics of the class A amplification operation portion and the class B amplification operation portion, and therefore the operation region switching voltage for operation in the class B operation amplification operation region is minimized. It can be set as small as possible, and even in the class B amplification operation portion, a small signal can easily pass through, and distortion can be further reduced.

  In the operational amplifier configured as described above, the voltage at the first voltage output terminal of the current-voltage conversion means is set so that the first output transistor operates in the class A amplification operation region, and the second voltage of the current-voltage conversion means is set. A voltage obtained by superimposing an operating region switching voltage for switching the operating region from the class A amplification operating region to the class B amplification operating region with respect to the voltage at the first voltage output terminal of the current-voltage conversion means. It is preferable to set to.

  In the above configuration, the current-voltage conversion means includes, for example, a differential transistor pair including a first input transistor and second and third input transistors that form an input differential pair with the first input transistor. . The current-voltage conversion means includes a current mirror input transistor connected in series to the first input transistor of the differential transistor pair, and the first and second currents respectively connected to the second and third input transistors of the differential transistor pair. It consists of a current mirror in which mirror output transistors are connected in series. The connection point between the second input transistor of the differential transistor pair and the first current mirror output transistor of the current mirror is connected to the control terminal of the first output transistor, and the third input transistor of the differential transistor pair. And the second current mirror output transistor of the current mirror are connected to the control terminal of the second output transistor, and the operating area switching voltage is the size of the second and third input transistors of the differential transistor pair. They are generated by making them different from each other.

  In the above configuration, the current-voltage conversion means may have the following configuration. That is, the differential transistor pair includes a first input transistor and second and third input transistors that form an input differential pair with the first input transistor. The current-voltage conversion means includes a current mirror input transistor connected in series to the first input transistor of the differential transistor pair, and the first and second currents respectively connected to the second and third input transistors of the differential transistor pair. It consists of a current mirror in which mirror output transistors are connected in series. The connection point between the second input transistor of the differential transistor pair and the first current mirror output transistor of the current mirror is connected to the control terminal of the first output transistor, and the third input transistor of the differential transistor pair. And the second current mirror output transistor of the current mirror is connected to the control terminal of the second output transistor, and the operating area switching voltage is the size of the first and second current mirror output transistors of the current mirror. They are generated by making them different from each other.

  In the above configuration, a plurality of second output transistors may be provided.

  In the above configuration, the differential transistor pair is formed of an n-channel MOS transistor or a p-channel MOS transistor.

  The operational amplifier according to the present invention converts the output current flowing through the n-channel differential transistor pair and one of the n-channel differential transistor pair into a voltage and outputs the voltage from the first and second voltage output terminals. 1 current-voltage converting means, first and second p-channel output transistors having control terminals connected to first and second voltage output terminals of the first current-voltage converting means, and p-channel differential transistors A second current-voltage conversion means for converting an output current flowing through one transistor of the pair and a p-channel type differential transistor pair into a voltage and outputting the voltage from the third and fourth voltage output terminals; a second current voltage First and second n-channel output transistors having control terminals connected to the third and fourth voltage output terminals of the conversion means, and a first p-channel output transistor The operating range of the first n-channel output transistor is the class A amplification operating range, and the operating range of the second n-channel output transistor is the class A amplification operating range. The operating region of the second n-channel output transistor is a class B amplification operating region.

  According to this configuration, the second n-channel output transistor that operates in the class B amplification operation region is provided in parallel with the first n-channel output transistor that operates in the class A amplification operation region. Since the second p-channel output transistor operating in the class B amplification operation region is provided in parallel with the operating first p-channel output transistor, the first n-channel output transistor and the first p-channel output transistor By setting the current capacity to be small and setting the current capacity of the second n-channel output transistor and the second p-channel output transistor to be large, it is possible to guarantee dynamic operation while keeping the system offset small, and Static power consumption can be reduced, and distortion can be reduced. That. Also, unlike providing an operational amplifier for class A operation and an operational amplifier for class B operation in parallel, a plurality of output transistors are provided inside the operational amplifier, one operating in the class A amplification operating range. Since the rest is operated in the class B amplification operation region, there is little variation in the characteristics of the class A amplification operation portion and the class B amplification operation portion, and therefore the operation region switching voltage for operation in the class B operation amplification operation region is minimized. It can be set as small as possible, and even in the class B amplification operation portion, a small signal can easily pass through, and distortion can be further reduced.

  According to the operational amplifier of the present invention, the output transistor that operates in the class A amplification operation region and the output transistor that operates in the class B amplification operation region are provided and operated in parallel. It is possible to realize an excellent operational amplifier capable of supplying a sufficient current to the load, reducing power consumption during static operation, reducing offset, and reducing distortion.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 shows a circuit diagram of an operational amplifier according to the present invention. In FIG. 1, OPNN is an operational amplifier using an n-channel MOS transistor as an input transistor, and OPNP is an operational amplifier using a p-channel MOS transistor as an input transistor. in1- is an input terminal having a negative polarity of the operational amplifier OPNN, in1 + and in2 + are input terminals having a positive polarity of the operational amplifier OPNN, and out1 is an output terminal of the operational amplifier OPNN corresponding to the input terminal in1 + having a positive polarity. , Out2 are output terminals of the operational amplifier OPNN corresponding to the input terminal in2 + having a positive polarity. in2- is an input terminal having a negative polarity of the operational amplifier OPNP, in3 +, in4 + are input terminals having a positive polarity of the operational amplifier OPNP, out3 is an output terminal of the operational amplifier OPNP corresponding to the input terminal in3 + having a positive polarity, out4 is an output terminal of the operational amplifier OPNP corresponding to the input terminal in4 + having a positive polarity.

  An operational amplifier OP is composed of the operational amplifier OPNN and the operational amplifier OPNP. An input terminal in− having a negative polarity of the operational amplifier OP is constituted by the input terminal in1− of the operational amplifier OPNN and the input terminal in2- of the operational amplifier OPNP. An input terminal in + having a positive polarity of the operational amplifier OP is constituted by the input terminals in1 + and in2 + of the operational amplifier OPNN and in3 + and in4 + of the operational amplifier OPNP. The output terminals OUT1 and OUT2 of the operational amplifier OPNN and the output terminals OUT3 and OUT4 of the operational amplifier OPNP constitute an output terminal OUT of the operational amplifier OP.

  FIG. 2 is a block diagram of an operational amplifier OPN (for example, the operational amplifier OPNN of FIG. 1) which is a component of FIG.

  FIG. 3 is a block diagram showing a more detailed configuration of the operational amplifier OPN. In FIG. 3, reference numeral 100 denotes a differential transistor pair having one input terminal in1- having a negative polarity and two input terminals in1 +, in2 + having a positive polarity. 110 is a current source, 120 is a current-voltage conversion circuit, 130 is an output transistor corresponding to the input terminal in1 +, and 140 is an output transistor corresponding to the input terminal in2 +.

  The differential transistor pair 100 includes a first input transistor and second and third input transistors that form an input differential pair with the first input transistor (see FIGS. 4 and 5). The current-voltage conversion circuit 120 includes a current mirror, and has a function of converting currents flowing through the second and third input transistors into voltages. The output transistor 130 is provided corresponding to the second input transistor, and the output transistor 140 is provided corresponding to the third input transistor. The output transistor 130 operates in the class A amplification operation region, and the output transistor 140 operates in the class B amplification operation region.

  In the operational amplifier having the above configuration, the voltage at the voltage output terminal corresponding to the output transistor 130 of the current-voltage conversion circuit 120 is set so that the output transistor 130 operates in the class A amplification operation region. To switch the voltage at the voltage output terminal corresponding to the output transistor 140 from the class A amplification operation area to the class B amplification operation area with respect to the voltage at the voltage output terminal corresponding to the output transistor 130 of the current-voltage conversion circuit. The operating range switching voltage is set to the superimposed voltage.

  According to this configuration, the output transistor 140 that operates in the class B amplification operation region is provided in parallel with the output transistor 130 that operates in the class A amplification operation region. By setting the current capacity of the transistor 140 large, it is possible to guarantee dynamic operation while keeping the system offset small, reduce the power consumption of static operation, and reduce distortion. it can. Further, unlike providing an operational amplifier that performs class A operation and an operational amplifier that performs class B operation in parallel, a plurality of output transistors 130 and 140 are provided inside the operational amplifier, one of which is a class A amplification. Since the operation is performed in the operation region and the rest is operated in the class B amplification operation region, there is little variation in the characteristics of the class A amplification operation portion and the class B amplification operation portion, and thus the operation region for operation in the class B operation amplification operation region. The switching voltage can be set to a minimum, and a small signal can easily pass through even in the class B amplification operation portion, and distortion can be further reduced.

  FIG. 4 shows a circuit example of an operational amplifier OPNN having a CMOS configuration in which an n-channel MOS transistor is an input differential transistor. In FIG. 4, VDD is a power supply terminal, VSS is a ground terminal, in− is an input terminal having a negative polarity of the operational amplifier, in1 + and in2 + are two input terminals having a positive polarity of the operational amplifier, and out1 and out2 are Two output terminals of the operational amplifier.

  I1N is a current source that operates an operational amplifier, M1N, M2N, and M21N are n-channel MOS transistors that form a differential pair, M3P, M4P, and M41P are p-channel MOS transistors that form a current mirror that functions as a current-voltage conversion circuit, M5N, M6N, and M7N are n-channel MOS transistors that constitute a current mirror of the current source I1N, M8P and M81P are p-channel output MOS transistors, and C1N and C11N are capacitors for preventing oscillation of the operational amplifier.

  The output MOS transistor M8P has a gate voltage set to operate in the class A amplification operation region, and the output MOS transistor M81P has an operation region with respect to the gate voltage of the output MOS transistor M8P so as to operate in the class B amplification operation region. The gate voltage is set to the voltage on which the switching voltage is superimposed.

  The p-channel MOS transistors M3P, M4P, and M41P constituting the current mirror are current voltages that convert the current flowing through the n-channel MOS transistors M2N and M21N into voltages in the n-channel MOS transistors M1N, M2N, and M21N constituting the differential pair. A conversion circuit is configured.

  FIG. 5 shows a circuit example of an operational amplifier OPNP having a CMOS configuration in which a p-channel MOS transistor is an input differential transistor. In FIG. 5, VDD is a power supply terminal, VSS is a ground terminal, in− is an input terminal having a negative polarity of an operational amplifier, in1 + and in2 + are two input terminals having a positive polarity of the operational amplifier, and out1 and out2 are Two output terminals of the operational amplifier.

  I1P is a current source that operates an operational amplifier, M1P, M2P, and M21P are p-channel MOS transistors that form a differential pair, M3N, M4N, and M41N are n-channel MOS transistors that form a current mirror that functions as a current-voltage conversion circuit, M5P, M6P, and M7P are p-channel MOS transistors that constitute the current mirror of the current source I1P, M8N and M81N are n-channel output MOS transistors, and C1P and C11P are capacitors for preventing oscillation of the operational amplifier.

  The output MOS transistor M8N has a gate voltage set to operate in the class A amplification operation region, and the output MOS transistor M81N operates in the operation region with respect to the gate voltage of the output MOS transistor M8N so as to operate in the class B amplification operation region. The gate voltage is set to the voltage on which the switching voltage is superimposed.

  The n-channel MOS transistors M3N, M4N, and M41N that constitute the current mirror are current voltages that convert the current flowing through the p-channel MOS transistors M2P and M21P into voltages in the p-channel MOS transistors M1P, M2P, and M21P that constitute the differential pair. A conversion circuit is configured.

  6 shows a circuit example of an operational amplifier in which the operational amplifier of FIG. 4 and the operational amplifier of FIG. 5 are combined. In FIG. 6, VDD is a power supply terminal, VSS is a ground terminal, in− is an input terminal having a negative polarity of the operational amplifier, in + is an input terminal having a positive polarity of the operational amplifier, and out is an output terminal of the operational amplifier. is there. The input terminal in + is obtained by commonly connecting the input terminals in1 + and in2 + in FIGS. The output terminal out is obtained by commonly connecting the output terminals out1 and out2 of FIGS.

  I1N is a current source that operates an operational amplifier, M1N, M2N, and M21N are n-channel MOS transistors that form a differential pair, M3P, M4P, and M41P are p-channel MOS transistors that form a current mirror that functions as a current-voltage conversion circuit, M5N, M6N, and M7N are n-channel MOS transistors that constitute a current mirror of the current source I1N, M8P and M81P are p-channel output MOS transistors, and C1N and C11N are capacitors for preventing oscillation of the operational amplifier.

  I1P is a current source that operates an operational amplifier, M1P, M2P, and M21P are p-channel MOS transistors that form a differential pair, M3N, M4N, and M41N are n-channel MOS transistors that form a current mirror that functions as a current-voltage conversion circuit, M5P, M6P, and M7P are p-channel MOS transistors that constitute the current mirror of the current source I1P, M8N and M81N are n-channel output MOS transistors, and C1P and C11P are capacitors for preventing oscillation of the operational amplifier.

  The output MOS transistor M8P is set to a small size because the gate voltage is set so that it operates in the class A amplification operation region and a small current can flow. Further, the output MOS transistor M81P is set to a voltage in which the operation region switching voltage is superimposed on the gate voltage of the output MOS transistor M8P so that the output MOS transistor M81P operates in the class B amplification operation region, and a large current flows. It is set to a large size so that it can.

  The output MOS transistor M8N has a gate voltage set so as to operate in the class A amplification operation region and only needs to be able to flow a small current. Further, the output MOS transistor M81N is set to a voltage in which the operation region switching voltage is superimposed on the gate voltage of the output MOS transistor M8N so that the output MOS transistor M81N operates in the class B amplification operation region, and a large current flows. It is set to a large size so that it can.

  The p-channel MOS transistors M3P, M4P, and M41P constituting the current mirror are current voltages that convert the current flowing through the n-channel MOS transistors M2N and M21N into voltages in the n-channel MOS transistors M1N, M2N, and M21N constituting the differential pair. A conversion circuit is configured.

  The n-channel MOS transistors M3N, M4N, and M41N that constitute the current mirror are current voltages that convert the current flowing through the p-channel MOS transistors M2P and M21P into voltages in the p-channel MOS transistors M1P, M2P, and M21P that constitute the differential pair. A conversion circuit is configured.

  The operation of the operational amplifier of the present invention configured as described above will be described below with reference to FIG. The operation of the CMOS operational amplifier of FIGS. 4 and 5 is substituted by the operation description of FIG. The basic operation is the same as that of the prior art shown in FIGS. The difference from the prior art is that in addition to the output transistors M8P and M8N performing class A operation, output transistors M81P and M81N performing class B operation are added, and correspondingly, n-channel MOS transistors constituting a differential pair M21N, a p-channel MOS transistor M21P, a p-channel MOS transistor M41P that constitutes a current mirror, and an n-channel MOS transistor M41N are added.

  With this configuration, the small signals are mainly amplified by the output transistors M8P and M8N performing class A operation, and the large signals are mainly amplified by the output transistors M81P and M81N performing class B operation.

  In FIG. 6, an n-channel MOS transistor M21N forms a differential pair with an n-channel MOS transistor M1N, and a p-channel MOS transistor M41P forms a current mirror corresponding to the n-channel MOS transistor M21N. The p-channel MOS transistor M41P operates as a current-voltage conversion circuit that converts the current flowing through the n-channel MOS transistor M21N into a voltage.

  The p-channel MOS transistor M21P forms a differential pair with the p-channel MOS transistor M1P, and the n-channel MOS transistor M41N forms a current mirror corresponding to the p-channel MOS transistor M21P. The n-channel MOS transistor M41N operates as a current-voltage conversion circuit that converts the current flowing through the p-channel MOS transistor M21P into a voltage.

  Here, the random offsets of the operational amplifiers OPNN and OPNP are individually reduced by optimizing the transistor sizes of the output MOS transistors M8P and M8N and the n-channel MOS transistor M7N and the p-channel MOS transistor M7P as current sources. Can do. Here, since the large current is shared by the output MOS transistors M81P and M81N, the output MOS transistors M8P and M8N do not need to flow a very large current, and may be small in size. Therefore, the n channel MOS transistor M7N and the p channel MOS transistor M7P may be small in size. As a result, power consumption during static operation can be reduced.

  In the operational amplifier of FIG. 6, in order to increase the output current, the gate width size of the output MOS transistor M81N and the output MOS transistor M81P is increased, or the gate length size of the output MOS transistor M81N and the output MOS transistor M81P is decreased. That's fine.

  In the operational amplifier OPNN, there are two ways to operate the output MOS transistor M81P in class B: a method of weighting the balance of the differential pair and a method of weighting the transistor pair of the current mirror.

  The output MOS transistor M81P sets an operating region switching voltage for class B operation by making the size of the n-channel MOS transistor M21N, which is an input differential transistor, different from the size of the n-channel MOS transistor M2N, which is an input differential transistor. Is possible. The operating region switching voltage can be set by making the size of the p-channel MOS transistor M41P constituting the current mirror different from that of the p-channel MOS transistor M4P constituting the current mirror.

  In other words, by making the size of the n-channel MOS transistor M21N different from the size of the n-channel MOS transistor M2N, there is a difference between the gate voltages of the output MOS transistors M8P and M81P by the operating range switching voltage. Thus, the output MOS transistor M8P can be operated in the class A amplification operation region, and the output MOS transistor M81P can be operated in the class B amplification operation region.

  Similarly, by making the size of the p-channel MOS transistor M41P different from the size of the p-channel MOS transistor M4P, there is a difference between the gate voltages of the output MOS transistors M8P and M81P by the operating region switching voltage. Thereby, the output MOS transistor M8P can be operated in the class A amplification operation region, and the output MOS transistor M81P can be operated in the class B amplification operation region.

  In the operational amplifier OPNP, in order to cause the output MOS transistor M81N to perform the class B operation, there are two methods, a method of weighting the balance of the differential pair and a method of weighting the transistor pair of the current mirror, as described above.

  The output MOS transistor M81N sets an operating range switching voltage for class B operation by making the size of the p-channel MOS transistor M21P, which is an input differential transistor, different from the size of the p-channel MOS transistor M2P, which is an input differential transistor. Is possible. The operating region switching voltage can be set by making the size of the n-channel MOS transistor M41N constituting the current mirror different from the n-channel MOS transistor M4N constituting the current mirror.

  In other words, by making the size of the p-channel MOS transistor M21P different from the size of the p-channel MOS transistor M2P, there is a difference between the gate voltages of the output MOS transistors M8N and M81N by the operating range switching voltage. Thus, the output MOS transistor M8N can be operated in the class A amplification operation region, and the output MOS transistor M81N can be operated in the class B amplification operation region.

  Similarly, by making the size of the n-channel MOS transistor M41N different from the size of the n-channel MOS transistor M4N, there is a difference between the gate voltages of the output MOS transistors M8N and M81N by the operating area switching voltage. Thereby, the output MOS transistor M8N can be operated in the class A amplification operation region, and the output MOS transistor M81N can be operated in the class B amplification operation region.

  In an operational amplifier using an n-channel MOS transistor as an input differential transistor, current source variation (n-channel MOS transistor M6N in FIG. 12) and differential pair variation (n-channel MOS transistor M1N and n-channel MOS transistor M2N in FIG. 12). ), Current mirror variations (p-channel MOS transistor M3P and p-channel MOS transistor M4P in FIG. 12) contribute to random offset variations between the operational amplifier OPN1 and the operational amplifier OPN2 in FIG.

  In an operational amplifier having a p-channel MOS transistor as an input differential transistor, current source variation (p-channel MOS transistor M6P in FIG. 13) and differential pair variation (p-channel MOS transistor M1P and p-channel MOS transistor M2P in FIG. 13). ), Current mirror variations (n-channel MOS transistor M3N and n-channel MOS transistor M4N in FIG. 13) contribute to random offset variations between the operational amplifiers OPP1 and OPP2 in FIG.

  Therefore, in the operational amplifier of FIG. 17, it is necessary to determine the offset voltage for class B operation with sufficient margin in consideration of these random offset voltages. On the other hand, when setting the operation region switching voltage for class B operation with the transistors constituting the differential pair, unlike the operational amplifier of FIG. 17, the variation between the transistors constituting the differential pair, that is, The operating region switching voltage may be determined in consideration of only the variation between devices. In addition, since the transistors constituting the differential pair are integrally formed on a single semiconductor substrate, variations between devices can be extremely reduced. Thereby, it becomes almost unaffected by random offset.

  In other words, the operating region switching voltage is determined by, for example, the mutual variation between the n-channel MOS transistor M2N and the n-channel MOS transistor M21N constituting the differential pair in the operational amplifier OPNN. Further, for example, in the operational amplifier OPNP, it is determined based on the mutual variation between the p-channel MOS transistor M2P and the p-channel MOS transistor M21P constituting the differential pair.

  In addition, when setting the operation region switching voltage for class B operation in the transistors constituting the current mirror, unlike the operational amplifier of FIG. 17, the variation among the transistors constituting the current mirror, that is, the variation between devices. It is only necessary to determine the operation region switching voltage considering only the above. In addition, since the transistors constituting the differential pair are integrally formed on a single semiconductor substrate, variations between devices can be extremely reduced. Thereby, it becomes almost unaffected by random offset.

  In other words, the operating region switching voltage is determined by, for example, the mutual variation between the p-channel MOS transistor M4P and the p-channel MOS transistor M41P constituting the current mirror in the operational amplifier OPNN. Further, for example, in the operational amplifier OPNP, it is determined based on the mutual variation between the n-channel MOS transistor M4N and the n-channel MOS transistor M41N constituting the current mirror.

  Accordingly, it is possible to realize setting of the operation region switching voltage for class B operation, which is smaller than that of the operational amplifier shown in FIG. Thereby, distortion of an output signal can be suppressed small. Therefore, the output MOS transistor M81P of the operational amplifier OPNN and the output MOS transistor M81N of the operational amplifier OPNP operate in a dynamic operation without being affected by a random offset, and a large amplitude is guaranteed. The output MOS transistor M81P of the amplifier OPNN and the output MOS transistor M81N of the operational amplifier OPNP are stopped, and the output MOS transistor M8P and the output MOS transistor M8N can operate with power saving according to the current source.

  In addition, products that increase the current consumption of the operational amplifier OP do not appear due to manufacturing variations.

  FIG. 7 shows the relationship between the input signal voltage VIN measured using the evaluation circuit of FIG. 18 and the output signal current IOUT flowing through the load resistor R in the operational amplifier shown in FIG.

  FIG. 7 shows an input signal voltage VIN in the operational amplifier of FIG. 6 in which the operational amplifier of FIG. 4 having an n-channel MOS transistor as an input transistor and the operational amplifier of FIG. 5 having a p-channel MOS transistor as an input transistor are combined. And the output current IOUT flowing through the load resistor R is shown. In FIG. 7, the output current IOUT is illustrated corresponding to each of a plurality of input signal voltages VIN having different amplitudes. The output current IOUT appears even where the instantaneous value of the input signal voltage VIN is small. That is, a small signal has passed sufficiently.

  Further, a frequency spectrum diagram of the output signal is shown in FIG. As can be seen from FIG. 8, the output current IOUT is sufficiently distorted and the level of the harmonic component is low.

  As described above, according to this embodiment, the output transistors M81N and M81P operating in the class B amplification operation region are provided in parallel with the output transistors M8N and M8P operating in the class A amplification operation region. By setting the current capacities of the transistors M8N and M8P small and increasing the current capacities of the output transistors M81N and M81P, it is possible to guarantee sufficient current supply to the load during dynamic operation while keeping the system offset small. In addition, the power consumption of the static operation can be reduced, and the distortion can be reduced.

  In addition, as shown in FIG. 17, an operational amplifier that performs class A operation and an operational amplifier that performs class B operation are not provided in parallel, but an output MOS transistor that performs class A operation and B in a single operational amplifier. Since the output MOS transistor that performs the class operation is provided in parallel, the manufacturing variation is smaller than that in the configuration of FIG. Therefore, the margin when determining the operation region switching voltage for performing the class B operation can be sufficiently reduced. As a result, even in an output MOS transistor that performs a class B operation, a smaller signal can be passed, and distortion of the output signal can be sufficiently reduced.

  In the present embodiment, the operational amplifier has two input terminals and two output terminals each having a positive polarity. However, as shown in FIG. 9, a plurality of operation region switching voltages for class B operation are set. The number of input terminals and output terminals having positive polarity may be three or more.

  In this embodiment, the operational amplifier is configured by a MOS transistor, but an OTA type operational amplifier may be configured by a bipolar transistor.

  In this embodiment, the operational amplifier is configured by the MOS transistor, but an OTA type operational amplifier may be configured by the BiCMOS transistor.

  The operational amplifier according to the present invention has an output MOS transistor and is useful as a drive circuit or the like. The present invention can also be applied to uses such as an acoustic amplifier, a video signal amplifier, a line driving device, and a motor driving device.

It is a block diagram which shows the structure of the operational amplifier of embodiment of this invention. It is a block diagram which shows the structure of the operational amplifier of embodiment of this invention. It is a block diagram which shows the internal structure of the operational amplifier of embodiment of this invention. It is a circuit diagram which shows the example of the operational amplifier which uses an n channel MOS transistor as an input transistor in embodiment of this invention. It is a circuit diagram which shows the example of the operational amplifier which uses a p-channel MOS transistor as an input transistor in embodiment of this invention. FIG. 6 is a circuit diagram illustrating an example of an operational amplifier in which the operational amplifiers of FIGS. 4 and 5 are combined. It is a wave form diagram which shows the current waveform (AB class operation | movement) of the operational amplifier in embodiment of this invention. It is a frequency spectrum figure of the operational amplifier in the embodiment of the present invention. It is a block diagram which shows the other example of the operational amplifier of embodiment of this invention. It is a block diagram which shows the structure of the conventional operational amplifier. It is a block diagram which shows the internal structure of the conventional operational amplifier. It is a circuit diagram which shows the example of the operational amplifier which uses the conventional n channel MOS transistor as an input transistor. It is a circuit diagram showing an example of an operational amplifier using a conventional p-channel MOS transistor as an input transistor. 1 is a block diagram of an operational amplifier disclosed in Japanese Patent Application Laid-Open No. 61-148906. FIG. 6 is a circuit diagram of an operational amplifier disclosed in Japanese Patent Application Laid-Open No. 61-148906. FIG. 6 is a block diagram of a line driving device disclosed in US Pat. No. 6,188,284. FIG. 6 is a block diagram of an operational amplifier disclosed in US Pat. No. 6,188,284. It is a circuit diagram of the evaluation circuit which evaluates an operational amplifier. It is an output signal current waveform diagram of an operational amplifier using a conventional n-channel MOS transistor as an input transistor. It is an output signal current waveform diagram of an operational amplifier using a conventional p-channel MOS transistor as an input transistor. It is a wave form diagram which shows the current waveform (AB class operation | movement) of the conventional operational amplifier. It is a wave form diagram which shows the current waveform (B class operation | movement) of the conventional operational amplifier. It is a wave form diagram which shows the current waveform (AB class operation | movement) of the conventional operational amplifier. It is a wave form diagram which shows the frequency spectrum figure of the conventional operational amplifier.

Explanation of symbols

OP, OPN: operational amplifiers OPNN, OPN1, OPN2: operational amplifiers with n-channel MOS transistors as input transistors OPNP, OPP1, OPP2: operational amplifiers with p-channel MOS transistors as input transistors M1N to M8N: n-channel MOS transistors M1P to M8P: p-channel MOS transistor I1N, I1P: current source C1P, C11P, C1N, C11N: capacitor R: load resistance Vsin: input signal voltage source Vref: reference voltage source for operational amplifier operation

Claims (8)

A differential transistor pair;
Current-voltage conversion means for converting an output current flowing in one transistor of the differential transistor pair into a voltage and outputting the voltage from the first and second voltage output terminals;
First and second output transistors having control terminals connected to first and second voltage output terminals of the current-voltage conversion means,
An operational amplifier in which an operating range of the first output transistor is a class A amplification operating range and an operating range of the second output transistor is a class B amplification operating range. Setting the voltage at the first voltage output terminal of the current-voltage conversion means so that the first output transistor operates in the class A amplification operation region;
The operation range of the voltage at the second voltage output terminal of the current-voltage conversion means is switched from the class A amplification operation area to the class B amplification operation area with respect to the voltage at the first voltage output terminal of the current-voltage conversion means. The operational amplifier according to claim 1, wherein the operation region switching voltage for the operation is set to a superimposed voltage. The differential transistor pair includes a first input transistor, and second and third input transistors that form an input differential pair with the first input transistor,
In the current-voltage converter, a current mirror input transistor is connected in series to the first input transistor of the differential transistor pair, and the first and second currents are respectively connected to the second and third input transistors of the differential transistor pair. A mirror output transistor consists of a current mirror connected in series,
A connection point between the second input transistor of the differential transistor pair and the first current mirror output transistor of the current mirror is connected to a control terminal of the first output transistor, and a third point of the differential transistor pair A connection point between the input transistor and the second current mirror output transistor of the current mirror is connected to a control terminal of the second output transistor;
3. The operational amplifier according to claim 2, wherein the operating region switching voltage is generated by making the sizes of the second and third input transistors of the differential transistor pair different from each other. The differential transistor pair includes a first input transistor, and second and third input transistors that form an input differential pair with the first input transistor,
In the current-voltage conversion means, a current mirror input transistor is connected in series to the first input transistor of the differential transistor pair, and the first and second current mirrors are respectively connected to the second and third input transistors of the differential transistor pair. It consists of a current mirror with output transistors connected in series,
A connection point between the second input transistor of the differential transistor pair and the first current mirror output transistor of the current mirror is connected to a control terminal of the first output transistor, and a third point of the differential transistor pair A connection point between the input transistor and the second current mirror output transistor of the current mirror is connected to a control terminal of the second output transistor;
3. The operational amplifier according to claim 2, wherein the operating region switching voltage is generated by making the sizes of the first and second current mirror output transistors of the current mirror different from each other.   The operational amplifier according to claim 1, wherein a plurality of second output transistors are provided.   2. The operational amplifier according to claim 1, wherein the differential transistor pair is composed of an N channel MOS transistor.   2. The operational amplifier according to claim 1, wherein the differential transistor pair is composed of a P-channel MOS transistor. an n-channel differential transistor pair;
First current-voltage conversion means for converting an output current flowing through one transistor of the n-channel type differential transistor pair into a voltage and outputting the voltage from first and second voltage output terminals;
First and second p-channel output transistors having control terminals connected to first and second voltage output terminals of the first current-voltage converting means;
a p-channel differential transistor pair;
Second current-voltage conversion means for converting an output current flowing through one transistor of the p-channel type differential transistor pair into a voltage and outputting the voltage from the third and fourth voltage output terminals;
First and second n-channel output transistors having control terminals connected to the third and fourth voltage output terminals of the second current-voltage conversion means,
The operating region of the first p-channel output transistor is a class A amplification operating region, the operating region of the second p-channel output transistor is a class B amplification operating region, and the operation of the first n-channel output transistor is An operational amplifier in which a region is a class A amplification operation region and an operation region of the second n-channel output transistor is a class B amplification operation region.

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