JP2008011051A - Differential operational amplifier - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a differential operational amplifier capable of sufficiently supplying a current to a load in a dynamic operation, decreasing the power consumption in a static operation, reducing the offset, and reducing the distortion. <P>SOLUTION: The differential operational amplifier is provided with: output transistors 50, 60 of a positive polarity side whose control terminals respectively receive one output signal from a differential transistor pair 10 via a current voltage conversion circuit 20 of a positive polarity side, and output transistors 70, 80 of a negative polarity side whose control terminals respectively receive the other output signal from the differential transistor pair 10 via a current voltage conversion circuit 30 of a negative polarity side. The output transistors 50, 70 are operated in a class A amplification operation region and the output transistors 70, 80 are operated in a class B amplification operation region. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a differential operational amplifier that is used in electronic equipment and can be integrated on a semiconductor integrated circuit.

  Conventionally, a differential operational amplifier that is used in electronic equipment and can be integrated on a semiconductor integrated circuit is disclosed in Design of Analog CMOS Integrated Circuits p308 published by McGraw Hill.

  FIG. 12 is a circuit diagram of a conventional differential operational amplifier (voltage input current source output type differential operational amplifier or differential OTA: Operational Transconductance Amplifier). Since the output dynamic range is wide and advantageous, a current source output type differential operational amplifier is often used.

  In FIG. 12, VDD is a power supply terminal, VSS is a ground terminal, in− is an input terminal having a negative polarity of the differential operational amplifier, in + is an input terminal having a positive polarity of the differential operational amplifier, and out + is a differential. An output terminal having a positive polarity of the operational amplifier, out− is an output terminal having a negative polarity of the differential operational amplifier, and CMFB is a common mode feedback for feeding back an output operating point for operating the differential operational amplifier in the active region. Circuit, inCM + is an input terminal of a common mode feedback circuit for feeding back the positive polarity output of the differential operational amplifier, and inCM- is a common mode feedback circuit for feeding back the negative polarity output of the differential operational amplifier. An input terminal, VCM, is a voltage application terminal that determines the operating point of the differential operational amplifier. The input terminal inCM + of the common mode feedback circuit is connected to the output terminal out + having a positive polarity of the differential operational amplifier. Similarly, the input terminal inCM− is the output terminal out− having the negative polarity of the differential operational amplifier. Connected to.

  I1N is a current source that operates the differential operational amplifier, M1N and M2N are n-channel MOS transistors that form a differential pair, M3P, M4P, and M5P are p-channel MOS transistors that form a current mirror of the current source, M6N, M7N, M8N is an n-channel MOS transistor constituting a current source current mirror, M9N is an n-channel MOS transistor constituting a current source set by common mode feedback, M10P and M11P are output MOS transistors, and C1N and C2N are differential operational amplifiers. This is a capacitor for preventing the oscillation.

  The n-channel MOS transistor M1N and the n-channel MOS transistor M2N constitute a differential amplifier, and the current of the n-channel MOS transistor M9N is changed to the n-channel MOS according to the voltage difference applied to the input terminal in− and the input terminal in +. They are distributed to the drain of the transistor M1N and the drain of the n-channel MOS transistor M2N.

  The current flowing through the n-channel MOS transistor M1N is sent to the p-channel MOS transistor M4P to determine the voltage at the connection point between the drain of the n-channel MOS transistor M1N and the drain of the p-channel MOS transistor M4P. The current flowing through the n-channel MOS transistor M2N is sent to the p-channel MOS transistor M5P to determine the voltage at the connection point between the drain of the n-channel MOS transistor M2N and the drain of the p-channel MOS transistor M5P.

  Here, the n-channel MOS transistor M1N and the p-channel MOS transistor M4P have a function of converting a current flowing through the n-channel MOS transistor M1N into a voltage. The n-channel MOS transistor M2N and the p-channel MOS transistor M5P have a function of converting a current flowing through the n-channel MOS transistor M2N into a voltage.

  For example, when the current supply capability of the n-channel MOS transistor M2N (hereinafter simply referred to as capability) is higher than that of the p-channel MOS transistor M5P, the n-channel MOS transistor M2N operates in the triode region (linear region), and p The channel MOS transistor M5P operates in the saturation region. As a result, the voltage at the connection point between the drain of the n-channel MOS transistor M2N and the drain of the p-channel MOS transistor M5P decreases. Accordingly, the gate voltage of the p-channel MOS transistor M11P decreases, and the p-channel MOS transistor M11P tries to discharge current. At this time, the output terminal out + of the differential operational amplifier functions as a source (that is, so as to discharge current from the output terminal out +).

  Conversely, when the capability of the p-channel MOS transistor M5P is higher than that of the n-channel MOS transistor M2N, the p-channel MOS transistor M5P operates in the triode region and the n-channel MOS transistor M2N operates in the saturation region. As a result, the voltage at the connection point between the drain of the n-channel MOS transistor M2N and the drain of the p-channel MOS transistor M5P increases. Accordingly, the gate voltage of the p-channel MOS transistor M11P increases, and the current of the p-channel MOS transistor M11P stops. As the differential operational amplifier, the n-channel MOS transistor M8N functions as a current source and functions as a sink (that is, so as to draw current from the output terminal out +).

  In this case, the source current capability is determined by the gate voltage of the p-channel MOS transistor M11P, and the sink current capability is determined by the current of the n-channel MOS transistor M8N acting as a current source.

  When the capability of the n-channel MOS transistor M1N is higher than that of the p-channel MOS transistor M4P, the n-channel MOS transistor M1N operates in the triode region and the p-channel MOS transistor M4P operates in the saturation region. As a result, the voltage at the connection point between the drain of the n-channel MOS transistor M1N and the drain of the p-channel MOS transistor M4P decreases. Accordingly, the gate voltage of the p-channel MOS transistor M10P decreases, and the p-channel MOS transistor M10P tries to discharge current. The output terminal out-terminal of the differential operational amplifier serves as a source.

  Conversely, when the capability of the p-channel MOS transistor M4P is higher than that of the n-channel MOS transistor M1N, the p-channel MOS transistor M4P operates in the triode region and the n-channel MOS transistor M1N operates in the saturation region. As a result, the voltage at the connection point between the drain of n channel MOS transistor M1N and the drain of p channel MOS transistor M4P increases. Accordingly, the gate voltage of the p-channel MOS transistor M10P increases, and the current of the p-channel MOS transistor M10P stops. As the differential operational amplifier, the n-channel MOS transistor M7N serves as a current source and serves as a sink.

  In this case, the source current capability is determined by the gate voltage of the p-channel MOS transistor M10P, and the sink current capability is determined by the current of the n-channel MOS transistor M7N acting as a current source.

  An example of the common mode feedback circuit CMFB is shown in FIG. In FIG. 13, RCM1 and RCM2 are resistors, AMP is an amplifier, and VCM is a voltage source. As described above, the common mode feedback circuit CMFB has the input terminal inCM + connected to the output terminal out + of the differential operational amplifier, and the input terminal inCM− connected to the output terminal out−. An intermediate potential between the signal potentials of the output terminals out + and out− is detected by the resistors RCM1 and RCM2, compared with the voltage VCM, amplified by the amplifier AMP, and fed back to the n-channel MOS transistor M9N. As a result, the operating point of the output of the differential operational amplifier matches the voltage VCM and operates stably.

  Furthermore, the conventional differential operational amplifier may form an input transistor with a p-channel MOS transistor. This is shown in FIG. In FIG. 14, I1P is a current source for operating a differential operational amplifier, M1P and M2P are p-channel MOS transistors that constitute a differential pair, M3N, M4N, and M5N are n-channel MOS transistors that constitute a current mirror of the current source, M6P, M7P, and M8P are p-channel MOS transistors that constitute a current mirror of the current source, M9P is a p-channel MOS transistor that constitutes a current source set by common mode feedback, M10N and M11N are output MOS transistors, and C1P and C2P are This is a capacitor for preventing oscillation of the differential operational amplifier.

  The p-channel MOS transistor M1P and the p-channel MOS transistor M2P constitute a differential amplifier, and the current of the p-channel MOS transistor M9P is changed to a p-channel MOS transistor according to the voltage difference applied to the input terminal in− and the input terminal in +. They are distributed to the drains of M1P and p-channel MOS transistor M2P.

  The current flowing through the p-channel MOS transistor M1P is sent to the n-channel MOS transistor M4N to determine the voltage at the connection point between the drain of the p-channel MOS transistor M1P and the drain of the n-channel MOS transistor M4N. The current flowing through the p-channel MOS transistor M2P is sent to the n-channel MOS transistor M5N to determine the voltage at the connection point between the drain of the p-channel MOS transistor M2P and the drain of the n-channel MOS transistor M5N.

  Here, the p-channel MOS transistor M1P and the n-channel MOS transistor M4N have a function of converting a current flowing through the p-channel MOS transistor M1P into a voltage. The p-channel MOS transistor M2P and the n-channel MOS transistor M5N have a function of converting a current flowing through the p-channel MOS transistor M2P into a voltage.

  For example, when the capability of the p-channel MOS transistor M2P is higher than that of the n-channel MOS transistor M5N, the p-channel MOS transistor M2P operates in the triode region and the n-channel MOS transistor M5N operates in the saturation region. As a result, the voltage at the connection point between the drain of the p-channel MOS transistor M2P and the drain of the n-channel MOS transistor M5N increases. Accordingly, the gate voltage of the n-channel MOS transistor M11N rises, and the n-channel MOS transistor M11N tries to sink current. The output terminal out + of the differential operational amplifier functions as a sink.

On the contrary, when the capability of the n-channel MOS transistor M5N is higher than that of the p-channel MOS transistor M2P, the n-channel MOS transistor M5N operates in the triode region and the p-channel MOS transistor M2P operates in the saturation region. as a result,
The voltage at the connection point between the drain of the p-channel MOS transistor M2P and the drain of the n-channel MOS transistor M5N decreases. Accordingly, the gate voltage of the n-channel MOS transistor M11N decreases, and the current of the n-channel MOS transistor M11N stops. As the differential operational amplifier, the p-channel MOS transistor M8P serves as a current source and serves as a source.

  In this case, the sink current capability is determined by the gate voltage of the n-channel MOS transistor M11N, and the source current capability is determined by the current of the p-channel MOS transistor M8P acting as a current source.

  When the capability of the p-channel MOS transistor M1P is higher than that of the n-channel MOS transistor M4N, the p-channel MOS transistor M1P operates in the triode region and the n-channel MOS transistor M4N operates in the saturation region. As a result, the voltage at the connection point between the drain of the p-channel MOS transistor M1P and the drain of the n-channel MOS transistor M4N increases. Accordingly, the gate voltage of the n-channel MOS transistor M10N increases, and the n-channel MOS transistor M10N tries to sink current. The output terminal out− of the differential operational amplifier functions as a sink.

  Conversely, when the capability of the n-channel MOS transistor M4N is higher than that of the p-channel MOS transistor M1P, the n-channel MOS transistor M4N operates in the triode region and the p-channel MOS transistor M1P operates in the saturation region. As a result, the voltage at the connection point between the drain of the p-channel MOS transistor M1P and the drain of the n-channel MOS transistor M4N increases. Accordingly, the gate voltage of the n-channel MOS transistor M10N decreases, and the current of the n-channel MOS transistor M10N stops. As the differential operational amplifier, the p-channel MOS transistor M7P serves as a current source and serves as a source.

  In this case, the sink current capability is determined by the gate voltage of the n-channel MOS transistor M10N, and the source current capability is determined by the current of the p-channel MOS transistor M7P acting as a current source.

  Here, FIG. 10 shows a block diagram of the differential operational amplifier whose circuit diagram is shown in FIG. 12 and FIG. In FIG. 10, DOP is the differential operational amplifier of FIG. 12 or FIG. FIG. 11 shows a more detailed block diagram of the differential operational amplifier whose circuit diagrams are shown in FIGS. In FIG. 11, 200 is a differential transistor pair, 210 and 220 are current sources, and 230 and 240 are output transistors.

  The differential transistor pair 200 corresponds to the n-channel MOS transistors M1N and M2N in FIG. 12, and corresponds to the p-channel MOS transistors M1P and M2P in FIG.

  The current source 210 corresponds to the current source I1N and the p-channel MOS transistors M3P, M4P, and M5P in FIG. 12, and the current source I1P and the n-channel MOS transistors M3N, M4N, and M5N correspond to the current source 210 in FIG.

  In FIG. 12, the current source 220 corresponds to the current source I1N and the n-channel MOS transistors M6N, M7N, M8N, and M9N. In FIG. 14, the current source I1P and the p-channel MOS transistors M6P, M7P, M8P, and M9P correspond to each other. .

  The output transistor 230 corresponds to the output OS transistor M10P in FIG. 12, and corresponds to the output MOS transistor M10N in FIG.

  The output transistor 240 corresponds to the output MOS transistor M11P in FIG. 12, and corresponds to the output MOS transistor M11N in FIG.

  15 shows a differential operation in which the differential operational amplifier DOPN of FIG. 12 having an n-channel MOS transistor as a differential pair and the differential operational amplifier DOPP of FIG. 14 having a p-channel MOS transistor as a differential pair are combined in parallel. 1 shows a block diagram of an amplifier DOP. In FIG. 15, inN + and inN− are input terminals having positive and negative polarities of the differential operational amplifier DOPN, inP + and inP− are input terminals having positive and negative polarities of the differential operational amplifier DOPP, outN +, outN− is an output terminal having positive and negative polarities of the differential operational amplifier DOPN, outP + and outP− are output terminals having positive and negative polarities of the differential operational amplifier DOPP, and inCMN + and inCMN− are differential operational amplifiers DOPN. InCMP + and inCMP− are input terminals having positive and negative polarities of the common mode feedback circuit of the differential operational amplifier DOPP.

  As shown in FIG. 15, by superposing the current capability of the differential operational amplifier DOPN having an n-channel MOS transistor as a differential pair and the current capability of a differential operational amplifier DOPP having a p-channel MOS transistor as a differential pair, Both sink current capability and source current capability can be made larger.

Further, an operational amplifier having a single output that is conventionally used in electronic equipment and can be integrated on a semiconductor integrated circuit is disclosed in FIG. 1 of Japanese Patent Laid-Open No. 61-148906. FIG. 3 of US Pat. No. 6,188,284 discloses an operational amplifier having a single output that can be integrated on a semiconductor integrated circuit as a line driving circuit.
JP 61-148906 A (FIG. 1) US Pat. No. 6,188,284 (FIG. 3) Design of Analog CMOS Integrated Circuits (2001), author Behzad Razavi, publisher McGraw Hill

  2. Description of the Related Art Conventionally, in a differential operational amplifier that is used in an electronic device and can be integrated on a semiconductor integrated circuit, sufficient current is supplied to a load during dynamic operation and static operation. Reduction of power consumption at the time, reduction of offset, and reduction of distortion were problems.

  For example, in the differential operational amplifier having the n-channel MOS transistor of FIG. 12 as an input transistor, the output source currents are increased so that the output currents IOUT + and IOUT− are not saturated. It is necessary to increase the size of the gate width or reduce the size of the gate length of the output MOS transistors M10P and M11P.

  However, in order to reduce the offset of the system (operation center in circuit design), the current of the n-channel MOS transistor M7N is increased according to the size of the output MOS transistor M10P, and further, n is increased according to the size of the output MOS transistor M11P. The current of the channel MOS transistor M8N must be increased.

  As a result, the power consumption of the static operation increases in order to guarantee the dynamic operation while maintaining the system offset performance, that is, keeping the system offset small. The output sink current is limited by the amount of current of the n-channel MOS transistors M7N and M8N constituting the current source.

  Here, an evaluation circuit is shown in FIG. This evaluation circuit is for evaluating a typical use state of the differential operational amplifier DOP. In FIG. 16, R represents resistance. Vsin and -Vsin indicate input signals. Vref indicates a voltage input to the terminal VCM of the differential operational amplifier DOP. This voltage Vref is set to (1/2) VDD, for example.

  FIG. 17 shows the relationship between the input signal voltage VIN measured using the evaluation circuit of FIG. 16 and the output currents IOUT + and IOUT− flowing through the load resistor R.

  FIG. 17 shows the relationship between the input signal voltage VIN and the output currents IOUT + and IOUT− flowing through the load resistor R in the differential operational amplifier of FIG. 12 using an n-channel MOS transistor as an input transistor. In FIG. 17, output currents IOUT + and IOUT− are illustrated corresponding to a plurality of input signal voltages VIN having different amplitudes. Where the instantaneous value of the input signal voltage VIN is large, the output currents IOUT + and IOUT− are saturated.

  For example, in the differential operational amplifier having the p-channel MOS transistor of FIG. 14 as an input transistor, the size of the gate width of the output transistors M10N and M11N is increased or the output MOS transistors M10N and M11N are increased in order to increase the output sink current. It is necessary to reduce the gate length size.

  However, in order to reduce the system offset, the current of the p-channel MOS transistor M7P is increased according to the size of the n-channel MOS transistor M10N, and the current of the p-channel MOS transistor M8P is further increased according to the size of the output MOS transistor M11N. Must be increased.

  As a result, the power consumption of the static operation increases in order to guarantee the dynamic operation while maintaining the system offset performance, that is, keeping the system offset small. The output source current is limited by the amount of current of the n-channel MOS transistors M7P and M8P constituting the current source.

  Here, the relationship between the input signal voltage VIN measured using the evaluation circuit of FIG. 16 and the output currents IOUT + and IOUT− flowing through the load resistor R is shown in FIG.

  FIG. 18 shows the relationship between the input signal voltage VIN and the output currents IOUT + and IOUT− flowing through the load resistor R in the differential operational amplifier of FIG. 14 using a p-channel MOS transistor as an input transistor. In FIG. 18, output currents IOUT + and IOUT− are shown corresponding to a plurality of input signal voltages VIN having different amplitudes. Where the instantaneous value of the input signal voltage VIN is large, the output currents IOUT + and IOUT− are saturated.

  For example, in the differential operational amplifier of FIG. 15, in order to increase the output current, the gate width size of the output transistors M10N and M11N of the differential operational amplifier DOPP and the output transistors M10P and M11P of the differential operational amplifier DOPN are increased. Alternatively, it is necessary to reduce the size of the gate lengths of the output MOS transistors M10N and M11N of the differential operational amplifier DOPP and the output transistors M10P and M11P of the differential operational amplifier DOPN.

  However, in order to reduce the offset of the system, the currents of the p-channel MOS transistors M7P and M8P serving as the current source of the differential operational amplifier DOPP and the n-channel MOS transistors M7N and M8N serving as the current source of the differential operational amplifier DOPN are output. It must increase with the current capability of the transistor.

  As a result, the power consumption of the static operation is increased in order to guarantee the dynamic operation while maintaining the system offset performance, that is, keeping the system offset small.

  Here, FIG. 19 shows the relationship between the input signal voltage VIN measured using the evaluation circuit of FIG. 16 and the output currents IOUT + and IOUT− flowing through the load resistor R.

  19 is a combination of the differential operational amplifier shown in FIG. 12 using an n-channel MOS transistor as an input transistor and the differential operational amplifier shown in FIG. 14 using a p-channel MOS transistor as an input transistor. 2 shows the relationship between the input signal voltage VIN and the output currents IOUT + and IOUT− flowing through the load resistor R. In FIG. 19, output currents IOUT + and IOUT− are shown corresponding to a plurality of input signal voltages VIN having different amplitudes. Where the instantaneous value of the input signal voltage VIN is large, the output currents IOUT + and IOUT− are saturated.

  Further, in the differential operational amplifier of FIG. 15, in order to increase the output current, the gate width size of the output transistors M10N and M11N of the differential operational amplifier DOPP and the output transistors M10P and M11P of the differential operational amplifier DOPN should be increased. The gate lengths of the output transistors M10N and M11N of the differential operational amplifier DOPP and the output transistors M10P and M11P of the differential operational amplifier DOPN need to be reduced.

  In addition, in order to reduce the power consumption of the static operation, the output transistors M10N and M11N of the differential operational amplifier DOPP and the output transistors M10P and M11P of the differential operational amplifier DOPN may be turned off in the static state.

  However, the differential operational amplifier becomes a class B operation, and the passage of small signals is not allowed. This causes signal distortion.

  FIG. 20 shows the relationship between the input signal voltage VIN measured using the evaluation circuit of FIG. 16 and the output currents IOUT + and IOUT− flowing through the load resistor R.

  20 is a combination of the differential operational amplifier shown in FIG. 12 using an n-channel MOS transistor as an input transistor and the differential operational amplifier shown in FIG. 15 using a p-channel MOS transistor as an input transistor. 2 shows the relationship between the input signal voltage VIN and the output currents IOUT + and IOUT− flowing through the load resistor R. In FIG. 20, output currents IOUT + and IOUT− are shown corresponding to a plurality of input signal voltages VIN having different amplitudes. Where the instantaneous value of the input signal voltage VIN is small, the output currents IOUT + and IOUT− are lost. That is, the small signal does not pass.

  Further, FIG. 21 shows a frequency spectrum diagram of the output signal. As can be seen from FIG. 21, the output currents IOUT + and IOUT− are distorted and the level of the harmonic component is high.

  The present invention solves the above-described conventional problems, and can supply sufficient current to the load during dynamic operation, reduce power consumption during static operation, reduce offset, and reduce distortion. It is an object to provide a differential operational amplifier.

  In order to solve the above-described problem, a first differential operational amplifier according to the present invention converts a differential transistor pair and an output current of a positive polarity side transistor of the differential transistor pair into a voltage and outputs the voltage to a plurality of voltage output terminals. A current-voltage conversion means on the positive polarity side for outputting each, a current-voltage conversion means on the negative polarity side for converting the output current of the negative polarity side transistor of the differential transistor pair into a voltage and outputting each to a plurality of voltage output terminals, A first positive output transistor having a control terminal connected to one voltage output terminal of the positive current side voltage conversion means, and a control terminal at the remaining voltage output terminal of the positive current voltage conversion means. A control terminal is connected to one of the voltage output terminals of the current / voltage converting means on the negative polarity side, which is paired with the second positive polarity output transistor connected to the first positive polarity output transistor. Negative side of An output transistor, and a second negative output transistor that is paired with a second positive output transistor and has a control terminal connected to the remaining voltage output terminal of the negative current-voltage converting means. The operating range of the pair of the first positive polarity output transistor and the first negative polarity output transistor is a class A amplification operating range, the second positive polarity output transistor and the second negative polarity side. The operating region of the output transistor pair is a class B amplification operating region.

  According to this configuration, in parallel with the pair of the first positive polarity output transistor and the first negative polarity output transistor operating in the class A amplification operation region, the second operation in the class B amplification operation region. Since the pair of the output transistor on the positive polarity side and the output transistor on the second negative polarity side is provided, the current capacity of the pair of the first positive polarity output transistor and the first negative polarity output transistor is reduced. By setting the current capacity of the second positive polarity output transistor and the second negative polarity output transistor to a large value, dynamic operation is guaranteed while keeping the system offset small. In addition, the power consumption of static operation can be reduced, and distortion can be reduced.

  In the differential operational amplifier having the above configuration, for example, the positive side and the negative side are set so that the pair of the first positive side output transistor and the first negative side output transistor operate in the class A amplification operation region. The voltage at one voltage output end of the current-voltage conversion means on the positive side is set, and the voltage at the remaining voltage output end of the current-voltage conversion means on the positive polarity side and the negative polarity side is set to The operating region switching voltage for switching the operating region from the class A amplification operating region to the class B amplification operating region is set to a voltage superimposed on the voltage at one voltage output terminal of the voltage conversion means.

  In the differential operational amplifier having the above configuration, the following configuration is preferable. For example, the current / voltage conversion means on the positive polarity side includes a current mirror on the positive polarity side that receives the output current of the transistor on the positive polarity side of the differential transistor pair at the input transistor, and a plurality of output transistors of the current mirror on the positive polarity side, respectively. It is composed of a plurality of positive polarity side current source transistors connected in series, and each connection point of the plurality of output transistors of the positive polarity side current mirror and the plurality of positive polarity side current source transistors is used as an output end. . Further, the negative-side current-voltage conversion means includes a negative-side current mirror that receives the output current of the negative-side transistor of the differential transistor pair by an input transistor, and a plurality of output transistors of the negative-side current mirror, A plurality of negative-polarity-side current source transistors each connected in series, and each of connection points of the plurality of output transistors and the plurality of negative-polarity-side current source transistors on the negative-polarity side current mirror as output ends It is preferable to do. The operating region switching voltage is obtained by making the sizes of the plurality of output transistors constituting the positive current mirror different from each other and making the sizes of the plurality of output transistors constituting the negative current mirror different from each other. Generate.

  Further, the differential operational amplifier having the above-described configuration may have the following configuration. For example, the positive-side current-voltage conversion means includes a positive-side current mirror that receives the output current of the positive-side transistor of the differential transistor pair at the input transistor, and a plurality of output transistors of the positive-side current mirror; A plurality of positive current source transistors connected in series with each other, each output point of the plurality of output transistors of the positive current mirror and the plurality of positive current source transistors as output ends To do. Further, the negative-side current-voltage conversion means includes a negative-side current mirror that receives the output current of the negative-side transistor of the differential transistor pair at the input transistor, and a plurality of output transistors of the negative-side current mirror, A plurality of negative polarity side current source transistors each connected in series, and each of connection points of the plurality of output transistors of the negative polarity side current mirror and the plurality of negative polarity side current source transistors as output ends. To do. The operating region switching voltage is generated by making the sizes of the plurality of positive current source transistors different from each other and making the sizes of the plurality of negative current source transistors different from each other.

  In the differential operational amplifier having the above configuration, a plurality of second positive polarity output transistors and a plurality of second negative polarity output transistors may be provided.

  In the differential operational amplifier having the above configuration, the differential transistor pair is preferably an N-channel MOS transistor pair or a P-channel MOS transistor pair.

  The second differential operational amplifier according to the present invention converts the output current of the first differential transistor pair consisting of an N-channel MOS transistor pair and the positive polarity side transistor of the first differential transistor pair into a voltage, and outputs a plurality of voltages. The first positive current side voltage-to-voltage conversion means for outputting to each voltage output terminal of the first differential transistor pair, and the output current of the negative polarity side transistor of the first differential transistor pair are converted into voltages and output to a plurality of voltage output terminals, respectively. First negative polarity side current-to-voltage conversion means, a first positive polarity side output transistor having a control terminal connected to one voltage output terminal of the first positive polarity side current voltage conversion means, A first positive polarity output transistor is paired with a second positive polarity output transistor having a control terminal connected to the remaining voltage output terminal of the first positive polarity current-voltage conversion means. Current-voltage variation on the negative polarity side A first negative polarity side output transistor having a control terminal connected to one voltage output terminal of the means and a second positive polarity side output transistor of the first negative polarity side current-voltage conversion means. A second negative output transistor having a control terminal connected to the remaining voltage output terminal, a second differential transistor pair comprising a P-channel MOS transistor pair, and a positive polarity side of the second differential transistor pair A second positive current side voltage-to-voltage conversion means for converting the output current of the first transistor into a voltage and outputting the voltage to a plurality of voltage output terminals, and the output current of the negative polarity side transistor of the second differential transistor pair as a voltage A control terminal connected to one of the voltage output terminals of the second negative-side current-voltage conversion means that converts the current into a plurality of voltage output terminals and outputs to the plurality of voltage output terminals; 3 positive polarity An output transistor of the second positive polarity side, a fourth positive polarity output transistor having a control terminal connected to the remaining voltage output terminal of the second positive polarity side current-voltage conversion means, a third positive polarity output transistor, A pair of a third negative polarity output transistor having a control terminal connected to one voltage output terminal of the second negative polarity side current-voltage conversion means and a fourth positive polarity output transistor are paired. None of the second negative polarity side output transistors, and a fourth negative polarity side output transistor having a control terminal connected to the remaining voltage output terminal of the second negative polarity side current-voltage conversion means. In addition, the operating range of the pair of first and third negative polarity output transistors is a class A amplification operating range, the second and fourth positive polarity output transistors, and the second and fourth negative polarity side output transistors. Output transistor pair operation The area is a class B amplification operation area.

  According to this configuration, the class B amplification operation is performed in parallel with the pair of the first and third positive polarity output transistors and the first and third negative polarity output transistors operating in the class A amplification operation region. Since the second and fourth positive polarity output transistors and the second and fourth negative polarity output transistors operating in the region are provided, the first and third positive polarity output transistors and the second The current capacity of the pair of the first and third negative polarity output transistors is set to be small, and the current of the second and fourth positive polarity output transistors and the second and fourth negative polarity output transistors of the pair Setting a large capacity ensures a sufficient current supply to the load during dynamic operation while keeping the system offset small, and reduces the power consumption of static operation. It can be reduced, yet it is possible to suppress reduce the distortion.

  The differential operational amplifier having the above configuration may have the following configuration. For example, one voltage of the first positive polarity side current-voltage conversion means so that the first positive polarity side output transistor and the first negative polarity side output transistor pair operate in the class A amplification operation region. A voltage at the output terminal is set and a voltage at one voltage output terminal of the first negative current side voltage conversion means is set to output a third positive polarity output transistor and a third negative polarity output transistor. The voltage of one voltage output terminal of the second positive current side voltage / voltage converting means is set so that the pair of the second positive current side voltage / voltage converting means operates in the class A amplification operation region. Sets the voltage at the two voltage output terminals. Further, the voltage at the remaining voltage output terminal of the first and second positive current side voltage conversion means is set to the voltage at one voltage output terminal of the first and second positive current side voltage conversion means. Then, the operating range is set to a voltage superposed with the operating range switching voltage for switching from the class A amplifying operating range to the class B amplifying operating range, and the remaining current-voltage converting means on the first and second negative polarity side are set. In order to switch the voltage at the voltage output terminal from the class A amplification operation area to the class B amplification operation area with respect to the voltage at one voltage output terminal of the first and second negative current side voltage conversion means. Set the operation range switching voltage to the voltage superimposed.

  The active filter of the present invention is configured using the differential operational amplifier having the above-described configuration.

  The switched capacitor filter of the present invention is configured using the differential operational amplifier having the above configuration.

  As described above, according to the present invention, it is possible to supply a sufficient current to the load during dynamic operation, reduce power consumption during static operation, reduce offset, and reduce distortion. A dynamic operational amplifier can be realized.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 shows a circuit diagram of a differential operational amplifier according to the present invention. In FIG. 1, DOP is a differential operational amplifier, a differential operational amplifier DOPNN having an n-channel MOS transistor as a differential input transistor pair, and a differential operational amplifier DOPNP having a p-channel MOS transistor as a differential input transistor pair. Consists of.

  inN− is an input terminal having a negative polarity of the differential operational amplifier DOPNN, inN + is an input terminal having the same positive polarity, out1N + is an output terminal having the same positive polarity, out2N + is an output terminal having the same positive polarity, out1N− is an output terminal having the same negative polarity, out2N− is an output terminal having the same negative polarity, inP− is an input terminal having the negative polarity of the differential operational amplifier DOPNP, and inP + is an input having the same positive polarity Out1P + is an output terminal having the same positive polarity, out2P + is an output terminal having the same positive polarity, out1P− is an output terminal having the same negative polarity, and out2P− is an output terminal having the same negative polarity.

  As described above, the differential operational amplifier DOP includes the differential operational amplifier DOPNN and the differential operational amplifier DOPNP. An input terminal in− having a negative polarity of the differential operational amplifier DOP is constituted by the input terminal inN− of the differential operational amplifier DOPNN and the input terminal inP− of the differential operational amplifier DOPNP. An input terminal in + having a positive polarity of the differential operational amplifier DOP is constituted by the input terminal inN + of the differential operational amplifier DOPNN and the input terminal inP + of the differential operational amplifier DOPNP.

  The differential operational amplifier DOPNN output terminals out1N− and out2N− and the differential operational amplifier DOPNP output terminals out1P− and out2P− constitute an input terminal out− having a negative polarity of the differential operational amplifier DOP. . The output terminal out1N +, out2N + of the differential operational amplifier DOPNN and the output terminal out1P +, out2P + of the differential operational amplifier DOPNP constitute an input terminal out + having a positive polarity of the differential operational amplifier DOP.

  In addition, the input terminal inCM− of the common mode feedback circuit for feeding back the negative polarity output of the differential operational amplifier from the input terminal inCMN− of the differential operational amplifier DOPNN and the input terminal inCMP− of the differential operational amplifier DOPNP is provided. Composed. The input terminal inCM + of the common mode feedback circuit for feeding back the positive polarity output of the differential operational amplifier is constituted by the input terminal inCMN + of the differential operational amplifier DOPNN and the input terminal inCMP + of the differential operational amplifier DOPNP.

  FIG. 2 is a block diagram of a differential operational amplifier DOPN (differential operational amplifier DOPNN or DOPNP) which is a component of FIG. In FIG. 2, in + and in− are input terminals, inCM− and inCM + are input terminals, and out1−, out2−, out1 + and out2 + are output terminals. FIG. 2 is a common block diagram of the differential operational amplifiers DOPNN or DOMNP, and therefore the N or P symbol corresponding to the conductivity type of the input transistor is omitted.

  FIG. 3 is a block diagram showing a more detailed configuration of the differential operational amplifier DOPN. In FIG. 3, 10 is a differential transistor pair, 20 is a positive-current side current-voltage conversion circuit, 30 is a negative-polarity-side current-voltage conversion circuit, 40 is a current source, and 50 is a positive polarity operating in a class A amplification operation region. Side output transistor, 60 is a positive polarity output transistor operating in the class B amplification operating region, 70 is a negative polarity output transistor operating in the class A amplification operating region, and 80 is operating in the class B amplification operating region This is an output transistor on the negative polarity side.

  FIG. 4 shows a circuit example of a CMOS differential operational amplifier DOPNN using an n-channel MOS transistor as an input differential transistor pair. In FIG. 4, I1N is a current source, M1N and M2N are n-channel MOS transistors constituting a differential pair, M12P, M4P and M41P are p-channel MOS transistors constituting a current mirror, and M13P, M5P and M51P constitute a current mirror. P-channel MOS transistors, M6N, M7N, M91N, and M8N are n-channel MOS transistors that constitute a current mirror, M14N, M15N, M16N, and M17N are n-channel MOS transistors that serve as current sources, and M10P and M11P are class A amplification operation regions M101P and M111P are output transistors that operate in the class B amplification operation region, C1N, C2N, C11N, and C21N are capacitors that prevent the differential operational amplifier from oscillating, and CMFB is a common mode filter. A readback circuit.

  The n-channel MOS transistors M1N and M2N correspond to the differential transistor pair 10 in FIG. The p-channel MOS transistors M12P, M4P, M41P and the n-channel MOS transistors M14N, M15N correspond to the current-voltage conversion circuit 20 in FIG. The p-channel MOS transistors M13P, M5P, M51P and the n-channel MOS transistors M16N, M17N correspond to the current-voltage conversion circuit 20 in FIG. The p-channel MOS transistor M10P corresponds to the output transistor 50 in FIG. 3, the p-channel MOS transistor M101P corresponds to the output transistor 60 in FIG. 3, the p-channel MOS transistor M11P corresponds to the output transistor 70 in FIG. The MOS transistor M111P corresponds to the output transistor 80 in FIG. The n-channel MOS transistors M6N, M7N, M91N, and M8N correspond to the current source 40 in FIG.

  FIG. 5 shows a circuit example of a CMOS differential operational amplifier DOPNP having a p-channel MOS transistor as an input differential transistor pair. In FIG. 5, I1P is a current source, M1P and M2P are p-channel MOS transistors constituting a differential pair, M12N, M4N and M41N are n-channel MOS transistors constituting a current mirror, and M13N, M5N and M51N constitute a current mirror. N-channel MOS transistors, M6P, M7P, M91P, and M8P are p-channel MOS transistors that constitute a current mirror, M14P, M15P, M16P, and M17P are p-channel MOS transistors that serve as current sources, and M10N and M11N are class A amplification operation regions M101N and M111N are output transistors that operate in the class B amplification operation region, C1P, C2P, C11P, and C21P are capacitors that prevent the differential operational amplifier from oscillating, and CMFB is a common mode filter. A readback circuit.

  The p-channel MOS transistors M1P and M2P correspond to the differential transistor pair 10 in FIG. The n-channel MOS transistors M12N, M4N, and M41N and the p-channel MOS transistors M14P and M15P correspond to the current-voltage conversion circuit 20 in FIG. The n-channel MOS transistors M13N, M5N, M51N and the p-channel MOS transistors M16P, M17P correspond to the current-voltage conversion circuit 20 in FIG. The n-channel MOS transistor M10N corresponds to the output transistor 50 in FIG. 3, the p-channel MOS transistor M101N corresponds to the output transistor 60 in FIG. 3, the p-channel MOS transistor M11N corresponds to the output transistor 70 in FIG. The MOS transistor M111N corresponds to the output transistor 80 in FIG. The p-channel MOS transistors M6P, M7P, M91P, and M8P correspond to the current source 40 in FIG.

  6 shows a CMOS differential operational amplifier DOPNN using the n-channel MOS transistor of FIG. 4 as an input differential transistor pair, and a CMOS differential operational amplifier DOPNP using a p-channel MOS transistor of FIG. 5 as an input differential transistor pair. The circuit example of the differential operational amplifier which combined these is shown. The components are the same as those shown in FIGS.

  The operation of the differential operational amplifier of the present invention configured as described above will be described below with reference to FIG. The operation of the CMOS differential operational amplifier of FIGS. 4 and 5 is substituted by the operation description of FIG.

  The n-channel MOS transistor M1N and the n-channel MOS transistor M2N constitute a differential amplifier, and the current of the n-channel MOS transistor M91N is changed to the n-channel MOS according to the voltage difference applied to the input terminal in− and the input terminal in +. They are distributed to the drain of the transistor M1N and the drain of the n-channel MOS transistor M2N.

  The current flowing through the n-channel MOS transistor M1N is sent to the p-channel MOS transistor M4P via the p-channel MOS transistor M12P, and the voltage at the connection point between the drain of the n-channel MOS transistor M15N and the drain of the p-channel MOS transistor M4P is obtained. Decide. The current flowing through the n-channel MOS transistor M2N is sent to the p-channel MOS transistor M5P via the p-channel MOS transistor M13P, and determines the voltage at the connection point between the drain of the n-channel MOS transistor M16N and the drain of the p-channel MOS transistor M5P. . Here, the voltage at the connection point is set so that the p-channel MOS transistors M10P and M11P are operated in the class A amplification operation region.

  The current flowing through the n-channel MOS transistor M1N is sent to the p-channel MOS transistor M41P via the p-channel MOS transistor M12P, and the connection point between the drain of the n-channel MOS transistor M14N and the drain of the p-channel MOS transistor M41P. Determine the voltage. The current flowing through the n-channel MOS transistor M2N is sent to the p-channel MOS transistor M51P via the p-channel MOS transistor M13P, and determines the voltage at the connection point between the drain of the n-channel MOS transistor M17N and the drain of the p-channel MOS transistor M51P. . Here, the voltage at the connection point is set to operate the p-channel MOS transistors M101P and M111P in the class B amplification operation region.

  The voltage at the connection point between the drain of the n-channel MOS transistor M14N and the drain of the p-channel MOS transistor M41P is within the operating range with respect to the voltage at the connection point between the drain of the n-channel MOS transistor M15N and the drain of the p-channel MOS transistor M4P. Is a value superimposed with an operation region switching voltage for shifting from a class A amplification operation region to a class B amplification operation region. Similarly, the voltage at the connection point between the drain of the n-channel MOS transistor M17N and the drain of the p-channel MOS transistor M51P is the voltage at the connection point between the drain of the n-channel MOS transistor M16N and the drain of the p-channel MOS transistor M5P. The operation region switching voltage for shifting the operation region from the class A amplification operation region to the class B amplification operation region is a superimposed value.

  Here, the n-channel MOS transistor M15N and the p-channel MOS transistors M4P and M12P convert the current flowing through the n-channel MOS transistor M1N into a voltage. The n-channel MOS transistor M16N and the p-channel MOS transistors M5P and M13P convert the current flowing through the n-channel MOS transistor M2N into a voltage. In the current-voltage conversion here, the current-voltage conversion characteristics are set so that the p-channel MOS transistors M10P and M11P are operated in the class A amplification operation region.

  The n-channel MOS transistor M14N and the p-channel MOS transistors M41P and M12P convert the current flowing through the n-channel MOS transistor M1N into a voltage. The n-channel MOS transistor M17N and the p-channel MOS transistors M51P and M13P convert the current flowing through the n-channel MOS transistor M2N into a voltage. In the current-voltage conversion here, the current-voltage conversion characteristics are set so that the p-channel MOS transistors M101P and M111P are operated in the class B amplification operation region.

  For example, when the capability of the n-channel MOS transistor M16N is higher than that of the p-channel MOS transistor M5P, the n-channel MOS transistor M16N operates in the triode region (linear region), and the p-channel MOS transistor M5P operates in the saturation region. . As a result, the voltage at the connection point between the drain of the n-channel MOS transistor M16N and the drain of the p-channel MOS transistor M5P decreases. Accordingly, the gate voltage of the p-channel MOS transistor M11P decreases, and the p-channel MOS transistor M11P tries to discharge current. At this time, the output terminal out1- of the differential operational amplifier serves as a source.

  Conversely, when the capability of the p-channel MOS transistor M5P is higher than that of the n-channel MOS transistor M16N, the p-channel MOS transistor M5P operates in the triode region and the n-channel MOS transistor M16N operates in the saturation region. As a result, the voltage at the connection point between the drain of the n-channel MOS transistor M16N and the drain of the p-channel MOS transistor M5P increases. Accordingly, the gate voltage of the p-channel MOS transistor M11P increases, and the current of the p-channel MOS transistor M11P stops. As the differential operational amplifier, the n-channel MOS transistor M8N serves as a current source and serves as a sink.

  When the capability of the n-channel MOS transistor M15N is higher than that of the p-channel MOS transistor M4P, the n-channel MOS transistor M15N operates in the triode region and the p-channel MOS transistor M4P operates in the saturation region. As a result, the voltage at the connection point between the drain of the n-channel MOS transistor M15N and the drain of the p-channel MOS transistor M4P decreases. Accordingly, the gate voltage of the p-channel MOS transistor M10P decreases, and the p-channel MOS transistor M10P tries to discharge current. At this time, the output terminal out1 + of the differential operational amplifier serves as a source.

  Conversely, when the capability of the p-channel MOS transistor M4P is higher than that of the n-channel MOS transistor M15N, the p-channel MOS transistor M4P operates in the triode region and the n-channel MOS transistor M15N operates in the saturation region. As a result, the voltage at the connection point between the drain of the n-channel MOS transistor M15N and the drain of the p-channel MOS transistor M4P increases. Accordingly, the gate voltage of the p-channel MOS transistor M10P increases, and the current of the p-channel MOS transistor M10P stops. As the differential operational amplifier, the n-channel MOS transistor M7N serves as a current source and serves as a sink.

  When the capability of the n-channel MOS transistor M17N is higher than that of the p-channel MOS transistor M51P, the n-channel MOS transistor M17N operates in the triode region (linear region) and the p-channel MOS transistor M51P operates in the saturation region. . As a result, the voltage at the connection point between the drain of the n-channel MOS transistor M17N and the drain of the p-channel MOS transistor M51P decreases. Accordingly, the gate voltage of the p-channel MOS transistor M111P decreases, and the p-channel MOS transistor M111P tries to discharge current. At this time, the output terminal out2- of the differential operational amplifier serves as a source.

  Conversely, when the capability of the p-channel MOS transistor M51P is higher than that of the n-channel MOS transistor M17N, the p-channel MOS transistor M51P operates in the triode region and the n-channel MOS transistor M17N operates in the saturation region. As a result, the voltage at the connection point between the drain of the n-channel MOS transistor M17N and the drain of the p-channel MOS transistor M51P increases. Accordingly, the gate voltage of the p-channel MOS transistor M111P increases, and the current of the p-channel MOS transistor M111P stops.

  When the capability of the n-channel MOS transistor M14N is higher than that of the p-channel MOS transistor M41P, the n-channel MOS transistor M14N operates in the triode region, and the p-channel MOS transistor M41P operates in the saturation region. As a result, the voltage at the connection point between the drain of the n-channel MOS transistor M14N and the drain of the p-channel MOS transistor M41P decreases. Accordingly, the gate voltage of the p-channel MOS transistor M101P decreases, and the p-channel MOS transistor M101P tries to discharge current. At this time, the output terminal out2 + of the differential operational amplifier serves as a source.

  Conversely, when the capability of the p-channel MOS transistor M41P is higher than that of the n-channel MOS transistor M14N, the p-channel MOS transistor M41P operates in the triode region and the n-channel MOS transistor M14N operates in the saturation region. As a result, the voltage at the connection point between the drain of the n-channel MOS transistor M14N and the drain of the p-channel MOS transistor M41P increases. Accordingly, the gate voltage of the p-channel MOS transistor M101P increases, and the current of the p-channel MOS transistor M101P stops.

  The p-channel MOS transistor M1P and the p-channel MOS transistor M2P constitute a differential amplifier, and the current of the p-channel MOS transistor M91P is changed to a p-channel MOS transistor according to the voltage difference applied to the input terminal in− and the input terminal in +. They are distributed to the drains of M1P and p-channel MOS transistor M2P.

  The current flowing through the p-channel MOS transistor M1P is sent to the n-channel MOS transistor M4N via the n-channel MOS transistor M12N, and the voltage at the connection point between the drain of the p-channel MOS transistor M15P and the drain of the n-channel MOS transistor M4N is obtained. Decide. The current flowing through the p-channel MOS transistor M2P is sent to the n-channel MOS transistor M5N via the n-channel MOS transistor M13N, and determines the voltage at the connection point between the drain of the p-channel MOS transistor M16P and the drain of the n-channel MOS transistor M5N. . Here, the voltage at the connection point is set to operate the n-channel MOS transistors M10N and M11N in the class A amplification operation region.

  The current flowing through the p-channel MOS transistor M1P is sent to the n-channel MOS transistor M41N via the n-channel MOS transistor M12N, and the connection point between the drain of the p-channel MOS transistor M14P and the drain of the n-channel MOS transistor M41N. Determine the voltage. The current flowing through the p-channel MOS transistor M2P is sent to the n-channel MOS transistor M51N via the n-channel MOS transistor M13N, and determines the voltage at the connection point between the drain of the p-channel MOS transistor M17P and the drain of the n-channel MOS transistor M51N. . Here, the voltage at the connection point is set to operate the n-channel MOS transistors M101N and M111N in the class B amplification operation region.

  The voltage at the connection point between the drain of the p-channel MOS transistor M14P and the drain of the n-channel MOS transistor M41N is within the operating range with respect to the voltage at the connection point between the drain of the p-channel MOS transistor M15P and the drain of the n-channel MOS transistor M4N. Is a value superimposed with an operation region switching voltage for shifting from a class A amplification operation region to a class B amplification operation region. Similarly, the voltage at the connection point between the drain of the p-channel MOS transistor M17P and the drain of the n-channel MOS transistor M51N is the voltage at the connection point between the drain of the p-channel MOS transistor M16P and the drain of the n-channel MOS transistor M5N. The operation region switching voltage for shifting the operation region from the class A amplification operation region to the class B amplification operation region is a superimposed value.

  Here, the p-channel MOS transistor M15P and the n-channel MOS transistors M4N and M12N convert the current flowing through the p-channel MOS transistor M1P into a voltage. The p-channel MOS transistor M16P and the n-channel MOS transistors M5N and M13N convert the current flowing through the p-channel MOS transistor M2P into a voltage. In the current-voltage conversion here, the current-voltage conversion characteristics are set so that the n-channel MOS transistors M10N and M11N are operated in the class A amplification operation region.

  The p-channel MOS transistor M14P and the n-channel MOS transistors M41N and M12N convert the current flowing through the p-channel MOS transistor M1P into a voltage. The p-channel MOS transistor M17P and the n-channel MOS transistors M51N and M13N convert the current flowing through the p-channel MOS transistor M2P into a voltage. In the current-voltage conversion here, the current-voltage conversion characteristics are set so that the n-channel MOS transistors M101N and M111N are operated in the class B amplification operation region.

  For example, when the capability of the p-channel MOS transistor M16P is higher than that of the n-channel MOS transistor M5N, the p-channel MOS transistor M16P operates in the triode region and the n-channel MOS transistor M5N operates in the saturation region. As a result, the voltage at the connection point between the drain of the p-channel MOS transistor M16P and the drain of the n-channel MOS transistor M5N increases. Accordingly, the gate voltage of the n-channel MOS transistor M11N rises, and the n-channel MOS transistor M11N tries to sink current. At this time, the output terminal out− of the differential operational amplifier functions as a sink.

  On the other hand, when the capability of the n-channel MOS transistor M5N is higher than that of the p-channel MOS transistor M16P, the n-channel MOS transistor M5N operates in the triode region and the p-channel MOS transistor M16P operates in the saturation region. As a result, the voltage at the connection point between the drain of the p-channel MOS transistor M16P and the drain of the n-channel MOS transistor M5N decreases. Accordingly, the gate voltage of the n-channel MOS transistor M11N decreases, and the current of the n-channel MOS transistor M11N stops. As the differential operational amplifier, the p-channel MOS transistor M8P serves as a current source and serves as a source.

  When the capability of the p-channel MOS transistor M15P is higher than that of the n-channel MOS transistor M4N, the p-channel MOS transistor M15P operates in the triode region and the n-channel MOS transistor M4N operates in the saturation region. As a result, the voltage at the connection point between the drain of the p-channel MOS transistor M15P and the drain of the n-channel MOS transistor M4N increases. Accordingly, the gate voltage of the n-channel MOS transistor M10N increases, and the n-channel MOS transistor M10N tries to sink current. At this time, the output terminal out1 + of the differential operational amplifier functions as a sink.

  On the contrary, when the capability of the n-channel MOS transistor M4N is higher than that of the p-channel MOS transistor M15P, the n-channel MOS transistor M4N operates in the triode region and the p-channel MOS transistor M15P operates in the saturation region. As a result, the voltage at the connection point between the drain of the p-channel MOS transistor M15P and the drain of the n-channel MOS transistor M4N increases. Accordingly, the gate voltage of the n-channel MOS transistor M10N decreases, and the current of the n-channel MOS transistor M10N stops. As the differential operational amplifier, the p-channel MOS transistor M7P serves as a current source and serves as a source.

  When the capability of the p-channel MOS transistor M17P is higher than that of the n-channel MOS transistor M51N, the p-channel MOS transistor M17P operates in the triode region and the n-channel MOS transistor M51N operates in the saturation region. As a result, the voltage at the connection point between the drain of the p-channel MOS transistor M17P and the drain of the n-channel MOS transistor M51N increases. Accordingly, the gate voltage of the n-channel MOS transistor M111N increases, and the n-channel MOS transistor M111N tries to sink current. The output terminal out2- of the differential operational amplifier functions as a sink.

  On the contrary, when the capability of the n-channel MOS transistor M51N is higher than that of the p-channel MOS transistor M17P, the n-channel MOS transistor M51N operates in the triode region and the p-channel MOS transistor M17P operates in the saturation region. As a result, the voltage at the connection point between the drain of the p-channel MOS transistor M17P and the drain of the n-channel MOS transistor M51N decreases. Accordingly, the gate voltage of the n-channel MOS transistor M111N decreases, and the current of the n-channel MOS transistor M111N stops.

  When the capability of the p-channel MOS transistor M14P is higher than that of the n-channel MOS transistor M41N, the p-channel MOS transistor M14P operates in the triode region and the n-channel MOS transistor M41N operates in the saturation region. As a result, the voltage at the connection point between the drain of the p-channel MOS transistor M14P and the drain of the n-channel MOS transistor M41N increases. Accordingly, the gate voltage of the n-channel MOS transistor M101N increases, and the n-channel MOS transistor M101N tries to sink current. The output terminal out2 + of the differential operational amplifier functions as a sink.

  On the contrary, when the capability of the n-channel MOS transistor M41N is higher than that of the p-channel MOS transistor M14P, the n-channel MOS transistor M41N operates in the triode region and the p-channel MOS transistor M14P operates in the saturation region. As a result, the voltage at the connection point between the drain of the p-channel MOS transistor M14P and the drain of the n-channel MOS transistor M41N increases. Accordingly, the gate voltage of the n-channel MOS transistor M101N decreases, and the current of the n-channel MOS transistor M101N stops.

  The operation of the common mode feedback circuit CMFB is the same as that of the conventional example.

  Here, by optimizing the transistor sizes of the output MOS transistors M10P and M10N and the current sources M7N and M7P, the random offsets of the positive outputs of the differential operational amplifiers DOPNN and DOSNP caused by variations in manufacturing conditions are individually reduced. can do.

  Further, by optimizing the transistor sizes of the output MOS transistors M11P and M11N and the current sources M8N and M8P, the random offsets of the negative outputs of the differential operational amplifiers DOPNN and DONP caused by variations in manufacturing conditions are individually reduced. can do.

  In the differential operational amplifier of FIG. 6, the positive output current is the sum of the currents of the positive output transistors M10N and M10P that perform class A operation and the currents of the positive output transistors M101N and M101P that perform class B operation. can do. Therefore, in the differential operational amplifier of FIG. 6, in order to increase the positive output current to avoid saturation and to guarantee dynamic operation, the gates of the positive output transistor M101N and the positive output transistor M101P performing the class B operation The width may be increased or the gate lengths of the positive output MOS transistor M101N and the positive output transistor M101P may be reduced. As a result, it is not necessary to design the positive output transistors M10N and M10P that perform the class A operation so that a large current can flow. Therefore, it is not necessary to increase the currents of the transistors M7P and M7N in order to ensure dynamic operation while keeping the system offset small. As a result, the power consumption of static operation can be reduced. Moreover, since the positive output current can be the sum of the currents of the positive output transistors M10N and M10P that perform the class A operation and the currents of the positive output transistors M101N and M101P that perform the class B operation, the small signal can be passed. It will be allowed and distortion can be reduced.

  In the differential operational amplifier shown in FIG. 6, the negative output currents are the currents of the negative output transistors M11N and M11P that perform the class A operation and the currents of the negative output transistors M111N and M111P that perform the class B operation. Can be summed. Therefore, in the differential operational amplifier of FIG. 6, in order to increase the negative output current to avoid saturation and guarantee dynamic operation, the gates of the negative output transistor M111N and the negative output transistor M111P performing the class B operation The width may be increased or the gate lengths of the negative output MOS transistor M111N and the negative output transistor M111P may be reduced. As a result, it is not necessary to design the negative output transistors M11N and M11P that perform class A operation so that a large current can flow. Therefore, it is not necessary to increase the currents of the transistors M8P and M8N in order to ensure dynamic operation while keeping the system offset small. As a result, the power consumption of static operation can be reduced. In addition, since the negative output current can be the sum of the currents of the negative output transistors M11N and M11P that perform the class A operation and the currents of the negative output transistors M111N and M111P that perform the class B operation, the small signal can be passed. It will be allowed and distortion can be reduced.

  In the differential operational amplifier DOPNN, in order to cause the positive output MOS transistor M101P to perform class B operation, a method of weighting the transistor pair of the current mirror constituting the current-voltage conversion circuit, and a current constituting the current-voltage conversion circuit are the same. There are two ways to weight the source balance. The positive output MOS transistor M101P can set the operation region switching voltage by making the size of the current mirror transistor M41P different from the size of the current mirror transistor 4P. Further, by changing the size of the current source transistor M14N from the size of the current source transistor M15N, it is possible to set an operation region switching voltage for class B operation.

  In the differential operational amplifier DOPNN, in order to operate the negative output MOS transistor M111P in class B, a method of weighting the transistor pair of the current mirror that constitutes the current-voltage conversion circuit, and a current that also constitutes the current-voltage conversion circuit There are two ways to weight the source balance. The positive output MOS transistor M111P can set the operating region switching voltage by making the size of the current mirror transistor M51P different from the size of the current mirror transistor M5P. Further, by changing the size of the current source transistor M17N from the size of the current source transistor M16N, it is possible to set the operation region switching voltage for performing the class B operation.

  In the differential operational amplifier DOPNP, in order to cause the positive output MOS transistor M101N to perform class B operation, a method of weighting the transistor pair of the current mirror that constitutes the current-voltage conversion circuit and a current that also constitutes the current-voltage conversion circuit There are two ways to weight the source balance. The positive output MOS transistor M101N can set the operating region switching voltage by making the size of the current mirror transistor M41N different from the size of the current mirror transistor M4N. Also, an offset voltage for class B operation can be set by making the size of the current source transistor M14P different from the size of the current source transistor M15P.

  In the differential operational amplifier DOPNP, in order to cause the negative output MOS transistor M111N to perform the class B operation, a method of weighting the transistor pair of the current mirror that constitutes the current-voltage conversion circuit, and a current that also constitutes the current-voltage conversion circuit There are two ways to weight the source balance. The positive output MOS transistor M111N can set the operating region switching voltage by making the size of the current mirror transistor M51N different from the size of the current mirror transistor M5N. Further, by changing the size of the current source transistor M17P from the size of the current source transistor M16P, it is possible to set an operation region switching voltage for performing class B operation.

  FIG. 7 shows the relationship between the input signal voltage VIN measured using the evaluation circuit of FIG. 16 and the output currents IOUT + and IOUT− flowing through the load resistor R in the differential operational amplifier shown in FIG.

  7 is a combination of the differential operational amplifier of FIG. 4 using an n-channel MOS transistor as an input transistor and the differential operational amplifier of FIG. 5 using a p-channel MOS transistor as an input transistor. 2 shows the relationship between the input signal voltage VIN and the output currents IOUT + and IOUT− flowing through the load resistor R. In FIG. 7, output currents IOUT + and IOUT− are shown corresponding to a plurality of input signal voltages VIN having different amplitudes. Even when the instantaneous value of the input signal voltage VIN is small, output currents IOUT + and IOUT− appear. That is, a small signal passes.

  Further, a frequency spectrum diagram of the output signal is shown in FIG. As can be seen from FIG. 21, the output currents IOUT + and IOUT− are less distorted and the level of the harmonic component is lower.

  As described above, according to this embodiment, class B amplification is performed in parallel with a pair of the positive output transistors M10N and M10P and the negative output transistors M11N and M11P operating in the class A amplification operation region. Since a pair of output transistors M101N and M101P on the positive polarity side and output transistors M111N and M111P on the negative polarity side that operate in the operating range is provided, the output transistors M10N and M10P on the positive polarity side and the output transistors M11N and M11P on the negative polarity side are provided. The current capacity of the pair of output transistors M101N and M101P on the positive polarity side and the current capacity of the pair of output transistors M111N and M111P on the negative polarity side are set large so that the offset of the system is kept small. Sufficient to load during dynamic operation Ensuring the flow supply, and it is possible to reduce the power consumption of static operation, yet can be suppressed to be small distortion.

  In this embodiment, the output terminal pairs of the differential operational amplifier are two sets. However, as shown in FIG. 9, by setting a plurality of operation region switching voltages for class B operation, Three or more sets may be used. That is, in addition to the output transistor that operates in class A, two or more sets of output transistors that operate in class B may be provided.

  In the present embodiment, the differential operational amplifier is configured by a MOS transistor, but may be an OTA type differential operational amplifier configured by a bipolar transistor.

  In this embodiment, the differential operational amplifier is composed of a MOS transistor, but may be an OTA type differential operational amplifier composed of a BiCMOS transistor.

  FIG. 22 shows an example of a low-pass filter (LPF) as an active filter using the differential operational amplifier of the present invention. In FIG. 22, DOP is the differential operational amplifier of the present invention, R1 and R2 are resistors, and C is a load capacitor. IOUT− and IOUT + are output currents. Vsin is an input signal voltage source, and Vref is a differential operational amplifier operation reference voltage source.

  FIG. 23 shows an example of a switched capacitor filter (SCF) using the differential operational amplifier of the present invention. In this example, the switched capacitor filter constitutes an integrator. In FIG. 23, DOP is a differential operational amplifier of the present invention, C1 and C2 are load capacitors, SW11, SW21, SW32, SW42, SW51, SW61, SW72, and SW82 are switches. IOUT− and IOUT + are output currents. Vsin is an input signal voltage source, and Vref is a differential operational amplifier operation reference voltage source.

  The differential operational amplifier according to the present invention has an output transistor and is useful as an active filter (active filter).

  The differential operational amplifier according to the present invention has an output transistor and is useful as a switched capacitor filter (SCF).

  Furthermore, the differential operational amplifier according to the present invention has an output transistor and is useful as a drive circuit or the like. The present invention can also be applied to uses such as an acoustic amplifier, a video signal amplifier, a line driving device, and a motor driving device.

It is a block diagram which shows the example of the differential operational amplifier by embodiment of this invention. It is a block diagram which shows the example of the differential operational amplifier by embodiment of this invention. It is a detailed block diagram showing an example of a differential operational amplifier according to an embodiment of the present invention. FIG. 3 is a circuit diagram showing a circuit example of a differential operational amplifier using an n-channel MOS transistor as an input transistor according to an embodiment of the present invention. 1 is a circuit diagram showing a circuit example of a differential operational amplifier using a p-channel MOS transistor as an input transistor according to an embodiment of the present invention. FIG. It is a circuit diagram which shows an example of the circuit of the differential operational amplifier by embodiment of this invention. It is a wave form diagram which shows the current waveform (AB class operation | movement) of the differential operational amplifier by embodiment of this invention. It is a frequency spectrum figure of the differential operational amplifier by embodiment of this invention. It is a block diagram which shows the example of the differential operational amplifier by embodiment of this invention. It is a block diagram of the differential operational amplifier of a prior art example. It is a more detailed block diagram of the differential operational amplifier of the conventional example. It is a circuit diagram of the differential operational amplifier which uses the n channel MOS transistor of a prior art example as an input transistor. It is a circuit diagram which shows the circuit example of the common feedback in the differential operational amplifier of a prior art example. It is a circuit diagram of the differential operational amplifier which uses the p channel MOS transistor of a prior art example as an input transistor. It is a block diagram which shows the structural example of the differential operational amplifier of a prior art example. It is a circuit diagram of an evaluation circuit. It is a wave form diagram which shows the output current waveform of the differential operational amplifier which uses the n channel MOS transistor of a prior art example as an input transistor. It is a wave form diagram which shows the output current waveform of the differential operational amplifier which uses the p channel MOS transistor of a prior art example as an input transistor. It is a wave form diagram which shows the current waveform (AB class operation | movement) of the differential operational amplifier of a prior art example. It is a wave form diagram which shows the current waveform (B class operation | movement) of the differential operational amplifier of a prior art example. It is a frequency spectrum figure of the differential operational amplifier of a prior art example. It is a circuit diagram of the active filter using the differential operational amplifier of this invention. It is a circuit diagram of a switched capacitor filter using a differential operational amplifier of the present invention.

Explanation of symbols

DOP, DOPN: differential operational amplifiers DOPNN, DOPN1, DOPN2: differential operational amplifiers DOPNP, DOPP1, DOPP2 using n-channel MOS transistors as input transistors: differential operational amplifiers M1N to M16N using p-channel MOS transistors as input transistors: n-channel MOS transistors M1P to M16P: p-channel MOS transistors I1N, I1P: current sources C1P, C11P, C1N, C11N, C2P, C21P, C2N, C21N: capacitors R: load resistors C, C1, C2: load capacitors SW11, SW21 , SW32, SW42, SW51, SW61, SW72, SW82: SCF switch CMFB: common mode feedback circuit Vsin: input signal voltage source Vref: differential operation Reference voltage source for operational amplifier operation

Claims (11)

A differential transistor pair;
A current-voltage conversion means on the positive polarity side that converts the output current of the positive polarity side transistor of the differential transistor pair into a voltage and outputs it to a plurality of voltage output terminals, respectively.
Current-voltage conversion means on the negative polarity side, which converts the output current of the negative polarity side transistor of the differential transistor pair into a voltage and outputs it to a plurality of voltage output terminals, respectively.
A first positive-side output transistor having a control terminal connected to one voltage output terminal of the positive-current side current-voltage converting means;
A second positive output transistor having a control terminal connected to the remaining voltage output terminal of the positive current side voltage conversion means;
A first negative polarity output transistor paired with the first positive polarity output transistor and having a control terminal connected to one voltage output terminal of the negative polarity current-voltage conversion means;
A second negative polarity output transistor paired with the second positive polarity output transistor and having a control terminal connected to the remaining voltage output terminal of the negative polarity current-voltage conversion means;
The operating range of the pair of the first positive polarity output transistor and the first negative polarity output transistor is a class A amplification operating range, and the second positive polarity output transistor and the second positive polarity output transistor A differential operational amplifier in which the operating region of the pair of output transistors on the negative polarity side is a class B amplification operating region. One voltage output of the current-voltage conversion means on the positive polarity side and the negative polarity side so that the pair of the first positive polarity output transistor and the first negative polarity output transistor operates in the class A amplification operation region. Set the end voltage,
The voltage of the remaining voltage output terminals of the positive voltage side and negative voltage side current / voltage converting means is an operating range with respect to the voltage of one voltage output terminal of the positive voltage side and negative voltage side current / voltage converting means. The differential operational amplifier according to claim 1, wherein the operation region switching voltage for switching from the class A amplification operation region to the class B amplification operation region is set to a superimposed voltage. The positive-side current-voltage conversion means includes a positive-side current mirror that receives the output current of the positive-side transistor of the differential transistor pair by an input transistor, and a plurality of output transistors of the positive-side current mirror, respectively. A plurality of positive-polarity-side current source transistors connected in series, and each output point of each of the plurality of output transistors of the positive-polarity-side current mirror and the plurality of positive-polarity-side current source transistors. age,
The negative-side current-voltage converting means includes a negative-side current mirror that receives the output current of the negative-side transistor of the differential transistor pair at the input transistor, and a plurality of output transistors of the negative-side current mirror, respectively A plurality of negative-polarity-side current source transistors connected in series, and each of connection points between the plurality of output transistors of the negative-polarity-side current mirror and the plurality of negative-polarity-side current source transistors. age,
The operating region switching voltage is obtained by making the sizes of the plurality of output transistors constituting the positive polarity side current mirror different from each other and making the sizes of the plurality of output transistors constituting the negative polarity side current mirror different from each other. The differential operational amplifier according to claim 2, wherein the differential operational amplifier is generated. The positive-side current-voltage conversion means includes a positive-side current mirror that receives the output current of the positive-side transistor of the differential transistor pair by an input transistor, and a plurality of output transistors of the positive-side current mirror, respectively. A plurality of positive-polarity-side current source transistors connected in series, and each output point of each of the plurality of output transistors of the positive-polarity-side current mirror and the plurality of positive-polarity-side current source transistors. age,
The negative-side current-voltage converting means includes a negative-side current mirror that receives the output current of the negative-side transistor of the differential transistor pair at the input transistor, and a plurality of output transistors of the negative-side current mirror, respectively A plurality of negative-polarity-side current source transistors connected in series, and each of connection points between the plurality of output transistors of the negative-polarity-side current mirror and the plurality of negative-polarity-side current source transistors. age,
The operating region switching voltage is generated by making the sizes of the plurality of positive current source transistors different from each other and making the sizes of the plurality of negative current source transistors different from each other. Differential operational amplifier.   2. The differential operational amplifier according to claim 1, wherein a plurality of the second positive polarity side output transistors and a plurality of the second negative polarity side output transistors are provided.   2. The differential operational amplifier according to claim 1, wherein the differential transistor pair is an N-channel MOS transistor pair.   2. The differential operational amplifier according to claim 1, wherein said differential transistor pair comprises a P-channel MOS transistor pair. A first differential transistor pair comprising an N-channel MOS transistor pair;
First positive current side voltage / voltage converting means for converting the output current of the positive polarity side transistor of the first differential transistor pair into a voltage and outputting the voltage to a plurality of voltage output terminals, respectively.
First negative current side voltage-to-voltage conversion means for converting an output current of a negative polarity side transistor of the first differential transistor pair into a voltage and outputting the voltage to a plurality of voltage output terminals, respectively.
A first positive polarity side output transistor having a control terminal connected to one voltage output terminal of the first positive polarity side current / voltage converting means;
A second positive polarity side output transistor having a control terminal connected to the remaining voltage output terminal of the first positive polarity side current-voltage conversion means;
A first negative output transistor which is paired with the first positive output transistor and has a control terminal connected to one voltage output terminal of the first negative current-voltage converting means;
A second negative polarity output transistor which is paired with the second positive polarity output transistor and has a control terminal connected to the remaining voltage output terminal of the first negative polarity current-voltage conversion means;
A second differential transistor pair comprising a P-channel MOS transistor pair;
A second positive current side voltage-to-voltage conversion means for converting an output current of a positive polarity side transistor of the second differential transistor pair into a voltage and outputting the voltage to a plurality of voltage output terminals, respectively.
A second negative-side current-voltage converting means for converting the output current of the negative-side transistor of the second differential transistor pair into a voltage and outputting the voltage to a plurality of voltage output terminals, respectively.
A third positive polarity output transistor having a control terminal connected to one voltage output terminal of the second positive polarity current / voltage converting means;
A fourth positive polarity side output transistor having a control terminal connected to the remaining voltage output terminal of the second positive polarity side current-voltage converting means;
A third negative polarity output transistor paired with the third positive polarity output transistor and having a control terminal connected to one voltage output terminal of the second negative polarity current-voltage converting means;
A fourth negative polarity output transistor which is paired with the fourth positive polarity output transistor and whose control terminal is connected to the remaining voltage output terminal of the second negative polarity current-voltage converting means; Prepared,
The operating range of the pair of the first and third positive output transistors and the first and third negative output transistors is a class A amplification operating range, and the second and fourth positive polarity A differential operational amplifier in which the operating range of the pair of the output transistor on the side and the pair of the output transistors on the second and fourth negative polarity sides is a class B amplification operating range. One voltage output terminal of the first positive polarity side current-voltage conversion means so that the pair of the first positive polarity output transistor and the first negative polarity output transistor operate in the class A amplification operation region. And a voltage at one voltage output terminal of the first negative current side voltage conversion means,
One voltage output terminal of the second positive polarity side current-voltage conversion means so that the third positive polarity output transistor and the third negative polarity output transistor pair operate in the class A amplification operation region. And the voltage at one voltage output terminal of the second negative current side voltage conversion means,
The voltage at the remaining voltage output terminal of the first and second positive current side voltage conversion means is set to the voltage at one voltage output terminal of the first and second positive current side voltage conversion means. And setting the operating range to a voltage superimposed with the operating range switching voltage for switching the operating range from the class A amplification operating range to the class B amplification operating range,
The voltage of the remaining voltage output terminal of the first and second negative current side voltage conversion means is set to the voltage of one voltage output terminal of the first and second negative current voltage conversion means. 9. The differential operational amplifier according to claim 8, wherein the operation region is set to a voltage superimposed with an operation region switching voltage for switching from the class A amplification operation region to the class B amplification operation region.   An active filter comprising the differential operational amplifier according to claim 1.   A switched capacitor filter comprising the differential operational amplifier according to claim 1.

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