JP2008041699A - Led package - Google Patents

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JP2008041699A
JP2008041699A JP2006209929A JP2006209929A JP2008041699A JP 2008041699 A JP2008041699 A JP 2008041699A JP 2006209929 A JP2006209929 A JP 2006209929A JP 2006209929 A JP2006209929 A JP 2006209929A JP 2008041699 A JP2008041699 A JP 2008041699A
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led
chip
led package
resin
recess
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Takenori Yasuda
剛規 安田
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Resonac Holdings Corp
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Showa Denko KK
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

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  • Led Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide an inexpensive LED package reducing output loss in a 3-in-1 package or a multi-chip package. <P>SOLUTION: The LED package comprises a plurality of LED chips mounted on a recess having a side face and a bottom face formed of resin and/or conductive metal, wherein the recess is sealed with translucent resin. A barrier partitioning the respective LED chips is integrally molded of the same resin or the same conductive metal as the bottom face. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明はLEDパッケージに関する。特に、複数個のLEDチップを搭載したLEDパッケージに関する。   The present invention relates to an LED package. In particular, the present invention relates to an LED package on which a plurality of LED chips are mounted.

LEDは、小型で長寿命であり発光効率に優れていることから、照明、各種ディスプレイ、バックライトなどの用途に使用されている。またそれらの用途に応じて様々な構造のものが考案されている。例えば、配光指向性の高い砲弾タイプ、薄くて小型の面実装タイプ、放熱部を備える高出力タイプなどがある。また、1つのLEDパッケージに3色のチップを並列回路として実装した通称3 in 1 パッケージと呼ばれるものは電流の配分によりフルカラーが出せるパッケージとしてカラーディスプレーに使われている。これらは、形状や特性に応じてさらに多くのタイプに細分化されている。更に、同一色のチップを複数個搭載し、光出力を高めたマルチチップパッケージがある。マルチチップパッケージに蛍光体を組合せて白色パッケージとしたものも存在する。   Since LEDs are small and have a long life and excellent luminous efficiency, they are used in applications such as lighting, various displays, and backlights. Also, various structures have been devised according to their use. For example, there are a shell type with high light distribution directivity, a thin and small surface mount type, and a high output type with a heat radiating section. A so-called 3 in 1 package in which three color chips are mounted as a parallel circuit on one LED package is used for a color display as a package capable of producing a full color by current distribution. These are subdivided into many types according to the shape and characteristics. Furthermore, there is a multi-chip package in which a plurality of chips of the same color are mounted to increase the light output. There is also a white package that combines a multi-chip package with a phosphor.

これらのうち、面実装タイプとして例えば平面図および断面図を図1および図3に示す3 in 1 LEDパッケージがある。4方向に分かれている金属リード部1、2、3、4上に凹部5が形成される様に熱可塑性樹脂からなる樹脂成型体6が一体成型されている。青色LEDチップ7、緑色LEDチップ8および赤色LEDチップ9がそれぞれ金属リード部2、3および4に透明ダイボンディングペーストを用いて接着し硬化固着されている。青色LEDチップ7、緑色LEDチップ8および赤色LEDチップ9はチップ表面に2つの電極を有する2ワイヤータイプであり、一方の電極からチップが載置されている金属リード部2、3および4へ、他方の電極から金属リード部1に、それぞれAu線が接続されている。LEDチップ7、8、9および金線12を被覆するように熱硬化性の透光性樹脂が凹部5の中に充填されている。これら3色のLEDチップは並列回路となっており、それぞれ独立に電流を調整する事で、1パッケージにてフルカラーの発色が実現する。
また、図2に示すように同一のパッケージでもワイヤーによってチップ同士を直列回路に接続したタイプも存在する。
Among these, as a surface mount type, there is a 3 in 1 LED package whose plan view and cross-sectional view are shown in FIGS. A resin molded body 6 made of a thermoplastic resin is integrally molded so that the concave portion 5 is formed on the metal lead portions 1, 2, 3, and 4 divided in four directions. The blue LED chip 7, the green LED chip 8, and the red LED chip 9 are bonded and cured and fixed to the metal lead portions 2, 3 and 4 using a transparent die bonding paste, respectively. The blue LED chip 7, the green LED chip 8 and the red LED chip 9 are two-wire types having two electrodes on the chip surface, and from one electrode to the metal lead parts 2, 3 and 4 on which the chip is mounted, Au wires are connected to the metal leads 1 from the other electrode. A thermosetting translucent resin is filled in the recess 5 so as to cover the LED chips 7, 8, 9 and the gold wire 12. These three-color LED chips are parallel circuits, and by adjusting the current independently, full-color coloring is realized in one package.
As shown in FIG. 2, there is a type in which chips are connected to a series circuit by wires even in the same package.

これらマルチチップパッケージにおいてはチップ間の相互光吸収による出力ロスの問題が指摘されている。この問題に対し、特開2005−277380号公報においては、シリコン基板表面を部分的にエッチングする事でマルチチップをそれぞれ独立的に包囲する仕切り壁を形成した、シリコンを基材とするパッケージを提案している。   In these multi-chip packages, a problem of output loss due to mutual light absorption between chips has been pointed out. In response to this problem, Japanese Patent Application Laid-Open No. 2005-277380 proposes a silicon-based package in which a partition wall surrounding each multichip is formed by partially etching the surface of the silicon substrate. is doing.

しかし、この特許公報に開示された手法ではシリコンの光吸収を抑えるミラー形成工程まで含めると工程が複雑かつ長く、コストが高い。また図1の様な一般的なパッケージ形態に適用するにはコスト高が否めない。さらに、仕切り壁をエッチングで形成するために、仕切り壁を光取り出し効率に優れた放物面にすることが困難である。   However, in the method disclosed in this patent publication, the process is complicated and long, and the cost is high, including a mirror forming process that suppresses light absorption of silicon. In addition, high costs cannot be denied for application to a general package form as shown in FIG. Furthermore, since the partition wall is formed by etching, it is difficult to make the partition wall a paraboloid excellent in light extraction efficiency.

特開2005−277380号公報JP 2005-277380 A

図1の様な従来の3 in 1 パッケージに対し、緑色チップと赤色チップを除去した所、残った青色チップの発光出力が除去前に比べて増加する事を本発明者は確認した。同様に緑色チップを残した場合と赤色チップを残した場合を検証した所、緑色チップでも出力が上昇、赤色チップでは出力がほとんど変化しない事を確認した。3色のチップの出力に関して、平均値と標準偏差を±5%に揃えた10個ずつの3グループについて、チップの除去前と除去後の出力の比較をした結果を表1に示す。   The present inventor confirmed that when the green chip and the red chip were removed from the conventional 3 in 1 package as shown in FIG. 1, the light emission output of the remaining blue chip increased compared to before removal. Similarly, when the case of leaving the green chip and the case of leaving the red chip was verified, the output increased with the green chip, and it was confirmed that the output with the red chip hardly changed. Table 1 shows the results of comparing the output before and after the removal of the three groups of 10 chips each having an average value and a standard deviation of ± 5% with respect to the outputs of the chips of three colors.

Figure 2008041699
この結果によると、3 in 1パッケージにする事で青色チップは71%に出力ダウン、緑色チップは89%に出力ダウン、赤色チップは98%に出力ダウンとなっている。トータルの出力は、3 in 1パッケージで12.1mWに対し、その他チップを除去した場合の合計が14.2mWであり、85%に出力ダウンとなっている。
Figure 2008041699
According to this result, the output of the blue chip is reduced to 71%, the output of the green chip is reduced to 89%, and the output of the red chip is reduced to 98% by using a 3 in 1 package. The total output is 14.2 mW when the other chips are removed compared to 12.1 mW in the 3 in 1 package, and the output is down to 85%.

3 in 1 パッケージにおいて赤色チップ、緑色チップ、青色チップの順にロスが大きくなる主な原因は、チップ間の光吸収にある。一般的なLEDは発光波長より長波長の光は吸収せず、発光波長より短波長の光を吸収する性質を有している。従って、青色LEDチップから発した光は緑色LEDチップや赤色LEDチップに吸収される。一方、緑色LEDチップから発した光は青色LEDチップには吸収されないが、赤色LEDチップには吸収される。また、赤色LEDチップから発した光は青色LEDチップや緑色LEDチップには吸収されない。こういった原理により3 in 1 パッケージにおいては赤色LEDチップ、緑色LEDチップ、青色LEDチップの出力ロスが生じていた。   In the 3 in 1 package, the main cause of the increase in loss in the order of the red chip, the green chip, and the blue chip is light absorption between the chips. A general LED does not absorb light having a wavelength longer than the emission wavelength but has a property of absorbing light having a wavelength shorter than the emission wavelength. Therefore, the light emitted from the blue LED chip is absorbed by the green LED chip and the red LED chip. On the other hand, light emitted from the green LED chip is not absorbed by the blue LED chip, but is absorbed by the red LED chip. Further, light emitted from the red LED chip is not absorbed by the blue LED chip or the green LED chip. Due to such a principle, the output loss of the red LED chip, the green LED chip, and the blue LED chip occurs in the 3 in 1 package.

また、同色のチップ3個を直列に並べた場合と2個のチップを除去して1個を残した場合との比較を表2に示す。チップの配置とワイヤーの配置は図2に示す通りである。

Figure 2008041699
この表から判るとおり、3個チップを搭載しても光出力は3倍になっていない。この原因は、3 in 1パッケージの場合と同様、あるチップから放出した光が別のチップに再吸収された為である。 Table 2 shows a comparison between the case where three chips of the same color are arranged in series and the case where two chips are removed to leave one chip. The arrangement of the chip and the arrangement of the wires are as shown in FIG.
Figure 2008041699
As can be seen from this table, even if three chips are mounted, the light output is not tripled. This is because light emitted from one chip is reabsorbed by another chip, as in the case of the 3 in 1 package.

以上述べた通り、3 in 1パッケージやマルチチップパッケージにおけるこれらトータルの出力ロスを低減する低コストなパッケージ、手法を提供する事が本発明の解決しようとする課題である。   As described above, it is a problem to be solved by the present invention to provide a low-cost package and method for reducing these total output losses in a 3 in 1 package and a multi-chip package.

この出力ロスを低減するには、チップから発した光が他のLEDチップに直接当たらない様にすれば良い。即ち、本発明は下記の発明を提供する。   In order to reduce this output loss, the light emitted from the chip may be prevented from directly hitting other LED chips. That is, the present invention provides the following inventions.

(1)側面と樹脂および/または導電性金属から形成された底面とを有する凹部に複数のLEDチップが搭載され、該凹部が透光性樹脂で封止されているLEDパッケージにおいて、該LEDチップ各々を隔てる障壁が該底面と同一の樹脂または同一の導電性金属で一体成型されていることを特徴とするLEDパッケージ。   (1) In an LED package in which a plurality of LED chips are mounted in a recess having a side surface and a bottom surface formed of a resin and / or a conductive metal, and the recess is sealed with a translucent resin, the LED chip The LED package characterized in that the barrier separating each is integrally formed of the same resin or the same conductive metal as the bottom surface.

(2)複数のLEDチップが発光波長の異なるLEDチップを含んでいる上記1項に記載のLEDパッケージ。   (2) The LED package as described in (1) above, wherein the plurality of LED chips include LED chips having different emission wavelengths.

(3)LEDチップが青色、緑色および赤色である上記2項に記載のLEDパッケージ。   (3) The LED package as described in the above item (2), wherein the LED chips are blue, green and red.

(4)凹部の側面が底面と同一の金属材料または同一の樹脂材料で一体成型された上記1〜3項のいずれか一項に記載のLEDパッケージ。   (4) The LED package according to any one of (1) to (3), wherein a side surface of the concave portion is integrally formed of the same metal material or the same resin material as the bottom surface.

(5)樹脂材料が、二酸化チタン、二酸化ジルコニウム、チタン酸カリウム、窒化アルミニウムおよび窒化ホウ素からなる群から選ばれた少なくとも一種の添加物を含有している上記1〜4項のいずれか一項に記載のLEDパッケージ。   (5) In any one of the above items 1 to 4, wherein the resin material contains at least one additive selected from the group consisting of titanium dioxide, zirconium dioxide, potassium titanate, aluminum nitride, and boron nitride. The described LED package.

(6)障壁の高さがLEDチップの高さ以上である上記1〜5項のいずれか一項に記載のLEDパッケージ。   (6) The LED package according to any one of (1) to (5), wherein a height of the barrier is not less than a height of the LED chip.

(7)障壁の側面および/または凹部の側面が放物面である上記1〜6項のいずれか一項に記載のLEDパッケージ。   (7) The LED package according to any one of the above items 1 to 6, wherein the side surface of the barrier and / or the side surface of the recess is a paraboloid.

(8)上記1〜7のいずれか一項に記載のLEDパッケージからなるディスプレイ。
(9)上記1〜7のいずれか一項に記載のLEDパッケージからなるバックライト。
(8) A display comprising the LED package according to any one of 1 to 7 above.
(9) A backlight comprising the LED package according to any one of 1 to 7 above.

本発明のLEDパッケージは、発光素子(LEDチップ)を搭載する凹部の底面において、それぞれのチップが載置される金属リード部間に障壁を設ける事で、別のLEDチップへの光吸収を抑制し、出力あるいは効率の高いLEDパッケージが実現する。
さらに、その障壁を凹部の底面と同一材料で一体成型することにより、工程が簡略化され、コンパクトな低コストのLEDパッケージとなる。
The LED package of the present invention suppresses light absorption to another LED chip by providing a barrier between the metal lead portions on which the respective chips are mounted on the bottom surface of the concave portion where the light emitting element (LED chip) is mounted. Thus, an LED package with high output or high efficiency is realized.
Furthermore, by integrally molding the barrier with the same material as the bottom surface of the recess, the process is simplified and a compact and low-cost LED package is obtained.

図4および図5は、後述する実施例1で作製した本発明の面実装タイプのLEDパッケージの平面模式図および断面模式図である。また、図8および図9は、後述する実施例3で作製した本発明の砲弾型LEDパッケージの平面模式図および断面模式図である。本発明のLEDパッケージは、凹部5を有し、該凹部の底面に複数の半導体発光素子(LEDチップ)20を搭載し、該凹部を透光性樹脂で封止したLEDパッケージである。該底面に形成した各半導体発光素子を隔てる障壁10の高さはチップの高さと同一あるいはそれ以上の高さに設定する事が望ましい。この障壁は凹部を構成する底面と同一の樹脂あるいは金属で構成され、底面と一体成型されていることが好ましい。底面と共に凹部を形成する側面も、底面および障壁と一体成型されていることが好ましいが、側面は、底面および障壁と別個の材料により形成されていてもよい。   4 and 5 are a schematic plan view and a schematic cross-sectional view of the surface-mount type LED package of the present invention produced in Example 1 described later. 8 and 9 are a schematic plan view and a schematic cross-sectional view of a bullet-type LED package of the present invention produced in Example 3 described later. The LED package of the present invention is an LED package having a recess 5, a plurality of semiconductor light emitting elements (LED chips) 20 mounted on the bottom of the recess, and the recess sealed with a translucent resin. The height of the barrier 10 separating the semiconductor light emitting elements formed on the bottom surface is preferably set to be equal to or higher than the height of the chip. This barrier is preferably made of the same resin or metal as the bottom surface constituting the recess, and is integrally molded with the bottom surface. The side surface that forms the recess together with the bottom surface is also preferably integrally formed with the bottom surface and the barrier, but the side surface may be formed of a material that is separate from the bottom surface and the barrier.

障壁10を凹部5の底面を形成する樹脂または金属と一体成型するには、凹部の製造工程において、図4および図5の様な樹脂注入成型においては樹脂型に、図8および図9の様なプレス成形においては金型に、それぞれ障壁を設けておけば良く、工程短縮および製造コスト上望ましい。なお、半導体発光素子は、凹部底面において金属リード部などの導電性材料の上に設置されていても、樹脂やセラミックなどの絶縁性材料に設置搭載されていても良い。   In order to integrally mold the barrier 10 with the resin or metal forming the bottom surface of the recess 5, in the manufacturing process of the recess, in the resin injection molding as shown in FIGS. 4 and 5, the resin mold is used as shown in FIGS. 8 and 9. In such press molding, it is only necessary to provide a barrier for each mold, which is desirable in terms of process shortening and manufacturing cost. The semiconductor light emitting element may be installed on a conductive material such as a metal lead part at the bottom of the recess, or may be installed and mounted on an insulating material such as resin or ceramic.

底面に形成した障壁の厚さはチップ間の光を遮光するに足る厚さに設定する事が望ましい。白色フィラー入りの樹脂の場合はフィラーの濃度に依存するが、光が透けない為に例えば50μm程度以上に設計されている。図8および図9の様な金属反射面で障壁を形成する場合は、より薄くても良い。   The thickness of the barrier formed on the bottom surface is desirably set to a thickness sufficient to shield light between chips. In the case of a resin containing a white filler, although it depends on the concentration of the filler, it is designed to be, for example, about 50 μm or more in order not to transmit light. When the barrier is formed by the metal reflecting surface as shown in FIGS. 8 and 9, it may be thinner.

本発明において障壁の形状は、チップの真横からの光がパッケージの光放出方向に方向を変換するべく、平坦面から構成される傾斜面、あるいは円錐面、放物面などを代表とする曲面である事が望ましい。特に、放物面が好ましい。また、障壁の表面は光のロスを抑制するべく、金属コーティング等による正反射面、あるいは白色フィラー等による拡散反射面である事が望ましい。   In the present invention, the shape of the barrier is an inclined surface constituted by a flat surface, or a curved surface typified by a conical surface, a paraboloid, or the like so that light from the side of the chip is changed in the light emission direction of the package. Something is desirable. In particular, a parabolic surface is preferable. Further, it is desirable that the surface of the barrier is a regular reflection surface made of metal coating or the like, or a diffuse reflection surface made of white filler or the like, in order to suppress light loss.

本発明は3 in 1 パッケージに止まらず、同一色のLEDチップを複数個実装するマルチチップパッケージや、多数のLEDチップを基板に直接実装するチップonボード(COB)、チップonフィルム(COF)などにも効果を発揮する。
本発明は、単色のマルチチップLEDパッケージに止まらず、蛍光体と組み合わせたマルチチップLEDパッケージ、チップonボードなどにも効果を発揮する。
本発明において障壁内に搭載される素子としては、半導体発光素子に限らず、ツェナーダイオードやチップ抵抗などの発光素子の光を吸収・散乱する素子に対しても有効である。
The present invention is not limited to a 3 in 1 package, a multi-chip package in which a plurality of LED chips of the same color are mounted, a chip-on-board (COB) in which a large number of LED chips are directly mounted on a substrate, a chip-on film (COF), etc. Also effective.
The present invention is not limited to a single-color multichip LED package, but is also effective for a multichip LED package combined with a phosphor, a chip-on-board, and the like.
The element mounted in the barrier in the present invention is not limited to a semiconductor light emitting element, but is also effective for an element that absorbs and scatters light from a light emitting element such as a Zener diode or a chip resistor.

以下本発明の実施の形態について一体成型された樹脂からなるLEDパッケージを例にとり説明する。本発明のLEDパッケージは、その平面図および断面図が図4および図5に示されるように、凹部5と障壁10を形成する樹脂成型体6が、金属リード1〜4と一体化されており、凹部の底面にあるリード部にLEDチップが搭載されている。LEDチップの底面はダイボンディングペーストによって固定されており、発光素子20の上面の電極は金線12により金属リード1と接続されている。これら発光素子及び金線は凹部5を封止する透光性の樹脂により覆われている。このLEDパッケージは金属リードに通電させることによって発光させることができる。以下本発明の各構成部材について順次説明する。   Hereinafter, an embodiment of the present invention will be described by taking an LED package made of resin integrally molded as an example. In the LED package of the present invention, as shown in FIGS. 4 and 5 in a plan view and a cross-sectional view, the resin molded body 6 forming the recess 5 and the barrier 10 is integrated with the metal leads 1 to 4. The LED chip is mounted on the lead portion on the bottom surface of the recess. The bottom surface of the LED chip is fixed by a die bonding paste, and the electrode on the top surface of the light emitting element 20 is connected to the metal lead 1 by a gold wire 12. These light emitting elements and gold wires are covered with a translucent resin that seals the recess 5. This LED package can emit light by energizing a metal lead. Hereinafter, each component of the present invention will be described sequentially.

LEDパッケージを構成する障壁を有する樹脂成型体は、金属リード(1〜4)上に熱可塑性樹脂を射出成型することにより形成する。障壁を有する樹脂成型体の形成は射出成型に使用する金型の設計により、様々な形状を実現することが可能である。   The resin molded body having a barrier constituting the LED package is formed by injection molding a thermoplastic resin on the metal leads (1 to 4). Formation of the resin molded body having a barrier can realize various shapes by designing a mold used for injection molding.

樹脂成型体の全体の大きさは例えば縦が1.5〜20mm、横が1.5〜20mmおよび高さが0.3〜10mm程度となるように成型し、発光素子の搭載部となる凹部の大きさは縦が1〜19mm、横が1〜19mmおよび高さが0.2〜9mm程度である。但し、これらの大きさはこういった値に限定されるものではない。また形状については全体及び凹部共に直方体、円筒形および錐形などの形状を自由に選択することが可能である。凹部底面についても円形、楕円形または多角形とすることができる。   The overall size of the resin molded body is, for example, a concave portion that is molded to have a length of 1.5 to 20 mm, a width of 1.5 to 20 mm, and a height of about 0.3 to 10 mm, and serves as a mounting portion of the light emitting element. The size is about 1 to 19 mm in length, 1 to 19 mm in width, and about 0.2 to 9 mm in height. However, these sizes are not limited to these values. As for the shape, it is possible to freely select a shape such as a rectangular parallelepiped, a cylindrical shape, and a conical shape for both the whole and the concave portion. The bottom surface of the recess can also be circular, elliptical or polygonal.

凹部の側面の断面角度は配光の指向角を制御するために自由に設計することが可能であり、かつその断面形状は図3の従来例のように直線から構成されていてもよいし、曲線から構成されていてもよい。光取りだし効率の観点からは凹部底面および側面の表面は段差がなく平滑であることが好ましいが、混色の都合により凹部底面および側面の表面を荒らした方が良い場合もある。   The cross-sectional angle of the side surface of the recess can be freely designed to control the directivity angle of the light distribution, and the cross-sectional shape thereof may be constituted by a straight line as in the conventional example of FIG. You may be comprised from the curve. From the viewpoint of light extraction efficiency, it is preferable that the bottom surface of the recess and the surface of the side surface are smooth without any step, but it may be better to roughen the surface of the bottom surface of the recess and the side surface for convenience of color mixing.

また、発光素子を搭載する凹部について、配光特性や側面の反射特性の制御をより自由に行うために側面部に銀などのめっきを施すことも可能である。また凹部の底面および側面は一体成型時に一度に成型してもよいが、側面部については一体成型せずに、異なる材料で構成されていてもよい。側面に銀めっきを施した樹脂製のリフレクタを配置することも可能である。この場合、発光素子を搭載後にリフレクタを接着することによって組み合わせることができる。   In addition, in order to more freely control the light distribution characteristics and the reflection characteristics of the side surfaces of the recesses in which the light emitting elements are mounted, it is possible to plate the side surfaces with silver or the like. In addition, the bottom surface and the side surface of the concave portion may be molded at a time at the time of integral molding, but the side surface portion may be composed of different materials without being integrally molded. It is also possible to arrange a resin reflector with silver plating on the side surface. In this case, it can be combined by attaching a reflector after mounting the light emitting element.

成型に使用する熱可塑性樹脂については、特に耐熱性、耐候性および機械的強度の優れたものを選ぶことが望ましい。樹脂の種類としては、ポリアミド、ポリフタルアミド、ポリフェニレンサルファイド、液晶ポリマー、ポリエーテルサルホン、ポリエーテルイミドおよびポリブチレンテレフタレートなどを使用できる。さらにまた、これらの樹脂中に光反射剤として、二酸化チタン、二酸化ジルコニウム、チタン酸カリウム、窒化アルミニウムおよび窒化ホウ素のうちいずれかを添加することによって、凹部の底面及び側面において、発光素子からの光の反射率を増大させ、パッケージ全体の光取り出し効率を増大させることが可能となる。   As the thermoplastic resin used for molding, it is particularly desirable to select a resin having excellent heat resistance, weather resistance and mechanical strength. As the type of resin, polyamide, polyphthalamide, polyphenylene sulfide, liquid crystal polymer, polyether sulfone, polyether imide, polybutylene terephthalate, and the like can be used. Furthermore, by adding any of titanium dioxide, zirconium dioxide, potassium titanate, aluminum nitride, and boron nitride as a light reflecting agent in these resins, light from the light emitting element is formed on the bottom and side surfaces of the recess. Thus, the light extraction efficiency of the entire package can be increased.

金属リード(1〜4)は、0.1〜0.5mm程度の厚みをもつ金属板であり、加工性および熱伝導性に優れた金属として鉄/銅合金をベースとし、その上にめっき層としてニッケル、チタン、金、銀などを数μm積層したリードフレームの一部である。めっきを施すのは耐食性及び光反射率向上のためであるが、特に最表面のめっき層としては反射率の高い銀などの金属を選択することがパッケージ外部への発光取り出し量を増大させる点から好ましい。ワイヤーボンディングの密着性の点で金属リードの最表面に金を選択する場合が多いが、発光素子の波長が600nm以下の場合、金属リードの最表面を金より反射率の高い金属を選択する方が光取り出しの観点からは好ましい。   The metal leads (1 to 4) are metal plates having a thickness of about 0.1 to 0.5 mm, based on an iron / copper alloy as a metal having excellent workability and thermal conductivity, and a plating layer thereon As a part of a lead frame in which nickel, titanium, gold, silver or the like is laminated by several μm. The reason for plating is to improve corrosion resistance and light reflectivity. In particular, selecting a highly reflective metal such as silver as the outermost plating layer increases the amount of light emitted outside the package. preferable. In many cases, gold is selected as the outermost surface of the metal lead in terms of adhesion of wire bonding. However, when the wavelength of the light emitting element is 600 nm or less, the metal surface having the higher reflectivity than gold is selected as the outermost surface of the metal lead. Is preferable from the viewpoint of light extraction.

発光素子を搭載する凹部について、底面及び側面が一体成型された樹脂成型体については上述したが、底面及び側面を分離した構造とし、底面としてメタルベース基板を利用することも可能である。メタルベース基板は放熱性の高いアルミニウム又は銅基板上に絶縁薄膜として耐熱性のある樹脂を1〜100μm積層し、その上に銅板を貼り合わせ、Ni等を介して金又は銀めっきが施されている。フォトリソグラフィーによりエッチングにて配線パターンを形成した後、LEDチップなどの半導体素子とワイヤーボンディングに必要なエリア以外の部分を保護するために絶縁薄膜を形成することによって作製できる。   The resin molded body in which the bottom surface and the side surface are integrally molded with respect to the recess for mounting the light emitting element has been described above, but it is also possible to use a structure in which the bottom surface and the side surface are separated, and a metal base substrate can be used as the bottom surface. The metal base substrate is a heat-dissipating aluminum or copper substrate with a heat-resistant resin laminated as an insulating thin film in a thickness of 1 to 100 μm, and a copper plate is laminated on it, and gold or silver plating is applied via Ni or the like. Yes. After forming a wiring pattern by etching by photolithography, it can be produced by forming an insulating thin film to protect a portion other than a semiconductor element such as an LED chip and an area necessary for wire bonding.

また、絶縁薄膜とする樹脂層は反射率向上のために光反射剤として二酸化チタン、二酸化ジルコニウム、チタン酸カリウム、窒化アルミニウムおよび窒化ホウ素のうちいずれかを添加することによって光取り出し効率を上げることができる。   Moreover, the resin layer used as the insulating thin film can increase the light extraction efficiency by adding any of titanium dioxide, zirconium dioxide, potassium titanate, aluminum nitride and boron nitride as a light reflecting agent for improving the reflectance. it can.

また、凹部を形成する側面としてリフレクタを配置することによって配光特性や側面からの反射特性を向上させることが望ましい。リフレクタは金属または樹脂から形成され、縦横が2〜30mm、高さが2〜10mmの大きさを自由にとることができるがこの大きさに限定されるものではない。形状は逆円錐形および逆角錐形などの形状を自由に選択できる。また光反射率を向上させるために側面に銀めっきを施してもよい。   Further, it is desirable to improve the light distribution characteristic and the reflection characteristic from the side surface by disposing a reflector as the side surface forming the recess. The reflector is made of metal or resin, and can freely take a size of 2 to 30 mm in length and width and 2 to 10 mm in height, but is not limited to this size. A shape such as an inverted cone shape and an inverted pyramid shape can be freely selected. In order to improve the light reflectance, the side surface may be silver-plated.

本発明で用いられる化合物半導体発光素子(LEDチップ)は、発光層として例えばGaP、GaAs、GaAlAs、GaAsP、AlInGaPおよびInGaNなどの化合物半導体単結晶からなる材料を選ぶことによって、紫外光〜赤外光に渡る発光波長を選択することができる。化合物半導体エピタキシャルウェハは適当な基板上にLPE法、VPE法、MOCVD法などのエピタキシャル成長方法により、発光層を積層して作製できる。エピタキシャルウェハはラッパーや研削機により定厚加工を施した後、リソグラフィーによって電極を形成する。電極形成後、ダイサー又はブレーカーにより分割して素子を得ることができる。エピタキシャル成長において半導体基板を用いる場合は、電極を基板下面と、エピタキシャル成長層表面上面とに形成することができるので、発光素子の上面と下面にコンタクトを取ればよい。従ってLEDパッケージ搭載時には発光素子下面を導電性のダイボンディングペーストにて接続できるので、ワイアボンディングは上面電極に少なくとも1回実施すればよい。一方でInGaNを発光層とする発光素子の場合、特に絶縁性のサファイア基板上に発光層を成長させた場合、電極はエピタキシャル成長層をエッチング加工することによって同一面に設け、同一面からコンタクトをとる必要がある。この場合、ワイアボンディングを少なくとも2回行う必要がある。   The compound semiconductor light emitting device (LED chip) used in the present invention is selected from a material made of a compound semiconductor single crystal such as GaP, GaAs, GaAlAs, GaAsP, AlInGaP, and InGaN as a light emitting layer, thereby allowing ultraviolet light to infrared light. It is possible to select a light emission wavelength over a wide range. A compound semiconductor epitaxial wafer can be produced by laminating a light emitting layer on an appropriate substrate by an epitaxial growth method such as LPE, VPE, or MOCVD. The epitaxial wafer is subjected to constant thickness processing by a wrapper or a grinding machine, and then an electrode is formed by lithography. After forming the electrode, it can be divided by a dicer or a breaker to obtain an element. When a semiconductor substrate is used for epitaxial growth, the electrodes can be formed on the lower surface of the substrate and the upper surface of the epitaxial growth layer, so that contacts may be made on the upper and lower surfaces of the light emitting element. Therefore, when the LED package is mounted, the lower surface of the light emitting element can be connected with a conductive die bonding paste, so that the wire bonding may be performed at least once on the upper surface electrode. On the other hand, in the case of a light-emitting device using InGaN as a light-emitting layer, particularly when a light-emitting layer is grown on an insulating sapphire substrate, the electrodes are provided on the same surface by etching the epitaxial growth layer and contact is made from the same surface. There is a need. In this case, it is necessary to perform wire bonding at least twice.

発光素子の大きさは必要とする光学電気特性に応じて自由に設計可能であり、一辺が200〜1000μmとする方形で、高さは50〜300μmであるが、これに限定されるものではない。   The size of the light-emitting element can be freely designed according to the required opto-electrical characteristics, and is a square having a side of 200 to 1000 μm and a height of 50 to 300 μm, but is not limited thereto. .

なお、本発明のLEDパッケージには同じ発光素子を複数搭載させてもよいし、異なる発光波長をもつ複数の発光素子を搭載させてもよい。   Note that a plurality of the same light emitting elements may be mounted on the LED package of the present invention, or a plurality of light emitting elements having different emission wavelengths may be mounted.

化合物半導体発光素子はダイボンディングペーストにより、凹部底面を構成する金属リード部又は樹脂成型体上に固定する。発光素子の構造が上下電極タイプの場合、底面でコンタクトをとる必要があるために、フィラーとして銀粒子を含む導電性の熱硬化性エポキシ樹脂を用いる。前記ダイボンディングペーストを塗布後に発光素子をダイボンディングし、オーブン中で100〜150℃にて熱硬化させることによって接着する。一方、発光素子の構造が同一面に電極を形成するタイプの場合、底面でコンタクトをとる必要がないために、銀粒子を含まない絶縁性のダイボンディングペーストを使用可能である。特にエネルギーの大きい短波長の発光波長をもつ発光素子を搭載したLEDパッケージの場合、通電発光時間の経過に伴いダイボンディングペーストの樹脂が劣化し、光の取り出し効率が低下しやすい。従って、耐光性のあるエポキシ樹脂やシリコーン樹脂からなるダイボンディングペーストを選択することが望ましい。   The compound semiconductor light emitting element is fixed on the metal lead portion or the resin molding constituting the bottom surface of the recess by a die bonding paste. When the structure of the light emitting element is an upper and lower electrode type, it is necessary to make contact with the bottom surface. Therefore, a conductive thermosetting epoxy resin containing silver particles is used as a filler. After the die bonding paste is applied, the light emitting element is die bonded and bonded by being thermally cured at 100 to 150 ° C. in an oven. On the other hand, in the case where the structure of the light emitting element is an electrode formed on the same surface, it is not necessary to make contact on the bottom surface, and therefore an insulating die bonding paste that does not contain silver particles can be used. In particular, in the case of an LED package equipped with a light emitting element having a large light emission wavelength with a large energy, the resin of the die bonding paste deteriorates with the passage of energized light emission time, and the light extraction efficiency tends to be lowered. Therefore, it is desirable to select a die bonding paste made of light-resistant epoxy resin or silicone resin.

封止樹脂は、光の取り出し効率を向上させるために、LEDパッケージの発光波長において光透過率が高く、また屈折率が高い材料を選択するのが望ましい。従って耐熱性、耐候性、及び機械的強度が高い特性を満たす樹脂として、エポキシ樹脂やシリコーン樹脂を選択する。主なエポキシ樹脂としては、ビスフェノールAグリシジルエーテルやビスフェノールFグリシジルエーテルなどが挙げられ、特に高温での熱変形抑制、耐候性、変色防止の効果を高めるために脂環式エポキシを添加することが望ましい。しかしながらエポキシ樹脂は、500nm以下の短波長の光や高熱に弱く、駆動時間の経過とともに劣化が進行し、光の透過率が著しく低下して、発光効率が減少する場合がある。一方、シリコーン樹脂は耐光性、耐熱性の点でエポキシ樹脂よりも優れているため短波長の発光素子の封止樹脂として適している。さらにまたシリコーン樹脂は硬化後の可塑性がエポキシ樹脂と比較して大きいため、加熱処理による封止樹脂の体積変化がLEDパッケージを構成する樹脂成型体の外形変形を起こさせ難い点からも好ましい。しかしながら樹脂成型体への密着度が低い点やLED動作温度付近で膨張係数が大きく変動する場合は好ましくない。従ってLEDパッケージの動作条件に応じて適切な封止樹脂を選択する必要がある。   As the sealing resin, it is desirable to select a material having a high light transmittance and a high refractive index at the emission wavelength of the LED package in order to improve the light extraction efficiency. Accordingly, an epoxy resin or a silicone resin is selected as a resin that satisfies the properties of high heat resistance, weather resistance, and mechanical strength. Examples of the main epoxy resin include bisphenol A glycidyl ether and bisphenol F glycidyl ether, and it is desirable to add an alicyclic epoxy in order to enhance the effects of suppressing thermal deformation, weather resistance, and discoloration prevention particularly at high temperatures. . However, the epoxy resin is vulnerable to light having a short wavelength of 500 nm or less and high heat, and the deterioration progresses with the lapse of driving time, the light transmittance is remarkably lowered, and the light emission efficiency may be reduced. On the other hand, a silicone resin is more suitable than an epoxy resin in terms of light resistance and heat resistance, and is therefore suitable as a sealing resin for a short wavelength light emitting element. Furthermore, since the plasticity after curing of the silicone resin is larger than that of the epoxy resin, the volume change of the sealing resin due to the heat treatment is preferable from the point that it is difficult to cause the outer shape deformation of the resin molded body constituting the LED package. However, it is not preferable when the degree of adhesion to the resin molding is low or when the expansion coefficient fluctuates greatly around the LED operating temperature. Therefore, it is necessary to select an appropriate sealing resin according to the operating conditions of the LED package.

本発明のLEDパッケージは、出力ロスが少なく、発光強度が高い特長を生かして、ディスプレイおよびバックライトなどの用途に特に有効である。また、各種照明およびインジケーターなどの用途にも広く用いることができる。   The LED package of the present invention is particularly effective for applications such as displays and backlights, taking advantage of the features of low output loss and high emission intensity. Further, it can be widely used for various illuminations and indicators.

以下に本発明を実施例および比較例に基づいて具体的に説明するが、本発明はこれらの実施例のみに限定されるものではない。   Hereinafter, the present invention will be specifically described based on Examples and Comparative Examples, but the present invention is not limited to these Examples.

(実施例1)
図4は本実施例で作製したLEDパッケージの平面模式図であり、図5は図4のA−A’における断面模式図である。図中、1〜4は金属リード部、5は凹部、6は樹脂成型体、10は障壁、12は金線、20はLEDチップである。化合物半導体発光素子(LEDチップ)はサファイア基板上にInGaNの発光層を含むエピタキシャル層を成長させた後にn側とp側の両電極を共に発光素子の上面から形成した、いわゆるフェイスアップ型の発光素子である。以下発光素子の作製方法について述べる。
(Example 1)
FIG. 4 is a schematic plan view of the LED package manufactured in this example, and FIG. 5 is a schematic cross-sectional view taken along the line AA ′ of FIG. In the figure, 1-4 are metal lead portions, 5 is a recess, 6 is a resin molding, 10 is a barrier, 12 is a gold wire, and 20 is an LED chip. A compound semiconductor light emitting device (LED chip) is a so-called face-up type light emitting device in which an epitaxial layer including an InGaN light emitting layer is grown on a sapphire substrate and then both n-side and p-side electrodes are formed from the upper surface of the light emitting device. It is an element. A method for manufacturing a light-emitting element is described below.

発光素子は、サファイアからなる基板上に、AlNからなるバッファ層を介して、窒化ガリウム系化合物半導体層を積層した。窒化ガリウム系化合物半導体層は、厚さ10μmのGeドープn型GaNコンタクト層および厚さ20nmのSiドープn型In0.1Ga0.9Nクラッド層、厚さ16nmのSiドープGaN障壁層および厚さ2.5nmのIn0.06Ga0.94N井戸層を5回積層し、最後に障壁層を設けた多重量子井戸構造の発光層、および厚さ10nmのMgドープp型Al0.07Ga0.93Nクラッド層と厚さ180nmのMgドープp型Al0.02Ga0.98Nコンタクト層からなっている。p型AlGaNコンタクト層上に、厚さ200nmのITOからなる透明電極層および、Au/Ti/Al/Ti/Au5層構造(厚さはそれぞれ50/20/10/100/200nm)のボンディングパッドよりなる正極を形成した。n型GaNコンタクト層には、Ti/Auの二層構造の負極を形成した。光取り出し面はITO電極側とした。基板を研削して、素子の厚さは80μmにした。素子サイズは350μm角となるような素子を作製した。この素子は発光面上に2つの電極を有しており、2本のワイヤーを用いて通電するタイプである。20mAを印加するとドミナント波長470nmの青色で発光した。 In the light emitting device, a gallium nitride compound semiconductor layer was laminated on a substrate made of sapphire via a buffer layer made of AlN. The gallium nitride compound semiconductor layer includes a Ge-doped n-type GaN contact layer having a thickness of 10 μm, a Si-doped n-type In 0.1 Ga 0.9 N cladding layer having a thickness of 20 nm, a Si-doped GaN barrier layer having a thickness of 16 nm, and a thickness of 2. A 5 nm In 0.06 Ga 0.94 N well layer is stacked five times, and finally a light emitting layer having a multiple quantum well structure provided with a barrier layer, a 10 nm thick Mg-doped p-type Al 0.07 Ga 0.93 N cladding layer and a thickness of 180 nm Mg-doped p-type Al 0.02 Ga 0.98 N contact layer. From a transparent electrode layer made of ITO having a thickness of 200 nm and a bonding pad of Au / Ti / Al / Ti / Au5 layer structure (thickness is 50/20/10/100/200 nm, respectively) on the p-type AlGaN contact layer A positive electrode was formed. A negative electrode having a two-layer structure of Ti / Au was formed on the n-type GaN contact layer. The light extraction surface was the ITO electrode side. The substrate was ground to make the element thickness 80 μm. An element having an element size of 350 μm square was manufactured. This element has two electrodes on the light emitting surface, and is a type in which electricity is supplied using two wires. When 20 mA was applied, light was emitted in blue with a dominant wavelength of 470 nm.

また、InGaN井戸層のIn組成を増加させたエピ構造を形成することで、ドミナント波長525nmの緑色発光の発光素子を作製した。   In addition, by forming an epi structure with an increased In composition in the InGaN well layer, a green light emitting device having a dominant wavelength of 525 nm was fabricated.

一方、GaAs基板上にエピタキシャル成長させたAlInGaP系の発光素子構造をGaAs基板からGaP基板へ貼り替えた発光素子を作製した。この素子は発光面上に2つの電極を有しており、2本のワイヤーを用いて通電するタイプである。20mAを印加するとドミナント波長625nmの赤色に発光した。   On the other hand, a light emitting device was fabricated by replacing an AlInGaP-based light emitting device structure epitaxially grown on a GaAs substrate from a GaAs substrate to a GaP substrate. This element has two electrodes on the light emitting surface, and is a type in which electricity is supplied using two wires. When 20 mA was applied, it emitted red light with a dominant wavelength of 625 nm.

樹脂成型体6は二酸化チタンを含むポリフタルアミド樹脂を金属リード部1、2、3、4と一体成型されるように成型した。図4および図5の様に成型したLEDパッケージは縦3.2mm、横2.8mm、高さ1.8mmの直方体とし、発光素子を搭載する凹部5の底面は直径約1.8mm、開口部は直径2.4mmとなる円形とし、高さ0.85mmなるように成型した。また、凹部の側面は円錐形状となるようにした。その底面に金属リード部が露出している。底面には更にチップが個別に区分けされる障壁10が形成されており、障壁の斜面の形状は平坦斜面となっている。障壁の高さは0.15mmであり、障壁の底面からの傾斜角は凹部の傾斜角と概ね同じとなっている。また、障壁の底面における幅は0.16mmである。   The resin molding 6 was molded so that polyphthalamide resin containing titanium dioxide was integrally molded with the metal lead portions 1, 2, 3, and 4. The LED package molded as shown in FIGS. 4 and 5 is a rectangular parallelepiped having a length of 3.2 mm, a width of 2.8 mm, and a height of 1.8 mm, and the bottom surface of the recess 5 in which the light emitting element is mounted is approximately 1.8 mm in diameter and has an opening. Was formed into a circle having a diameter of 2.4 mm and a height of 0.85 mm. In addition, the side surface of the concave portion has a conical shape. The metal lead portion is exposed on the bottom surface. A barrier 10 is further formed on the bottom surface to separate the chips individually, and the slope of the barrier is a flat slope. The height of the barrier is 0.15 mm, and the inclination angle from the bottom surface of the barrier is substantially the same as the inclination angle of the recess. Moreover, the width | variety in the bottom face of a barrier is 0.16 mm.

青、赤、緑の発光素子はこの順に透明エポキシ樹脂にて発光素子ボンディング側金属リード2、3、4上にダイボンディングした後、150℃にて90分間硬化させ、その後上面の電極と各金属リード間を直径25μmの金線にてワイヤーボンディングした。その後、シリコーン樹脂を凹部内に注入し、発光素子及びワイヤーを封止した後、150℃にて180分間硬化させ、LEDパッケージを完成した。   The blue, red, and green light emitting elements are sequentially bonded to the light emitting element bonding side metal leads 2, 3, and 4 with a transparent epoxy resin, and then cured at 150 ° C. for 90 minutes, and then the upper electrode and each metal Between the leads, wire bonding was performed with a gold wire having a diameter of 25 μm. Thereafter, silicone resin was poured into the recesses, and after sealing the light emitting element and the wire, the resin was cured at 150 ° C. for 180 minutes to complete the LED package.

本実施例にて製作された3 in 1 LEDパッケージの青色チップ(負荷5mA)、緑色チップ(負荷20mA)、赤色チップ(負荷10mA)にそれぞれ単独でそれぞれの負荷を印加した際の出力は4.0mW、6.0mW、4.1mWであり、合計すると14.1mWであった。   The output when each load is individually applied to the blue chip (load 5 mA), the green chip (load 20 mA), and the red chip (load 10 mA) of the 3 in 1 LED package manufactured in this example is 4. It was 0 mW, 6.0 mW, 4.1 mW, and it was 14.1 mW in total.

(比較例1)
図1は本比較例で作製したLEDパッケージの平面模式図であり、図3は図1のA−A’における断面模式図である。図中番号は図4および図5と同一である。凹部底面における障壁が無い従来型にしたことを除いて、実施例1と同様にLEDパッケージを作製した。
(Comparative Example 1)
FIG. 1 is a schematic plan view of an LED package manufactured in this comparative example, and FIG. 3 is a schematic cross-sectional view taken along line AA ′ of FIG. The numbers in the figure are the same as those in FIGS. An LED package was produced in the same manner as in Example 1 except that the conventional type without a barrier at the bottom of the recess was used.

得られた3 in 1 LEDパッケージの青色チップ(負荷5mA)、緑色チップ(負荷20mA)、赤色チップ(負荷10mA)にそれぞれ単独でそれぞれの負荷を印加した際の出力は2.9mW、5.3mW、4.1mWであり、合計すると12.3mWであった。
障壁を有する本発明の方がトータルの出力が高く、チップ相互間の吸収による出力ロスが低減された事が示された。
The output when each load is applied individually to the blue chip (load 5 mA), green chip (load 20 mA), and red chip (load 10 mA) of the obtained 3 in 1 LED package is 2.9 mW and 5.3 mW, respectively. It was 4.1 mW, and it was 12.3 mW in total.
It was shown that the present invention having a barrier had a higher total output and reduced output loss due to absorption between chips.

(実施例2)
図6は本実施例で作製したLEDパッケージの平面模式図であり、図7は図6のA−A’における断面模式図である。図中番号は図4および図5と同一である。樹脂成型体6を下記の如く作製したことを除いて、実施例1と同様にLEDパッケージを作製した。
(Example 2)
FIG. 6 is a schematic plan view of an LED package manufactured in this example, and FIG. 7 is a schematic cross-sectional view taken along line AA ′ of FIG. The numbers in the figure are the same as those in FIGS. An LED package was produced in the same manner as in Example 1 except that the resin molded body 6 was produced as follows.

成型したLEDパッケージは縦3.2mm、横2.8mm、高さ1.8mmの直方体とし、発光素子を搭載する凹部5の底面は直径約1.8mm、開口部は直径2.4mmとなる円形とし、高さ0.85mmなるように成型した。また、凹部の側面は断面形状が放物線から構成されるパラボラ形状となるようにした。底面には更にチップが個別に収納される個別凹部15が形成されておりその底面に金属リード部が露出している。各個別凹部の側面が障壁10の役割を果たしている。個別凹部開口部の直径は0.7mm、個別凹部底面の直径は0.6mm、個別凹部の深さ即ち障壁の高さは0.15mmであり、個別凹部側面の形状、即ち障壁の斜面の形状も断面形状が放物線から構成されるパラボラ形状となるようにした。   The molded LED package is a rectangular parallelepiped having a length of 3.2 mm, a width of 2.8 mm, and a height of 1.8 mm. The bottom surface of the recess 5 on which the light emitting element is mounted is a circle having a diameter of about 1.8 mm and an opening having a diameter of 2.4 mm. And was molded to a height of 0.85 mm. In addition, the side surface of the concave portion has a parabolic shape in which the cross-sectional shape is composed of a parabola. Individual recesses 15 for individually storing chips are formed on the bottom surface, and the metal lead portions are exposed on the bottom surface. The side surface of each individual recess serves as a barrier 10. The diameter of the individual recess opening is 0.7 mm, the diameter of the bottom of the individual recess is 0.6 mm, the depth of the individual recess, that is, the height of the barrier is 0.15 mm, and the shape of the side surface of the individual recess, that is, the shape of the slope of the barrier In addition, the cross-sectional shape is a parabolic shape composed of parabolas.

得られた3 in 1 LEDパッケージの青色チップ(負荷5mA)、緑色チップ(負荷20mA)、赤色チップ(負荷10mA)にそれぞれ単独でそれぞれの負荷を印加した際の出力は4.2mW、6.3mW、4.3mWであり、合計すると14.8mWであった。   The output when each load is applied individually to the blue chip (load 5 mA), green chip (load 20 mA), and red chip (load 10 mA) of the obtained 3 in 1 LED package is 4.2 mW and 6.3 mW, respectively. It was 4.3 mW, and it was 14.8 mW in total.

(実施例3)
図8は本実施例で作製した砲弾型LEDパッケージの平面模式図であり、図9は図8のA−A’における断面模式図である。図中番号は図4および図5と同一である。チップ、ワイヤー部の保護、光取りだし効率向上、配光角制御を目的とした樹脂製の砲弾レンズがマウントリード30とアウターリード64〜66の周りを封止している。リードの材質は銅合金であり、表面に銀がコーティングされている。発光素子については実施例1と同じものを使用した。砲弾型LED用リードフレームはプレス機を用いて不要部分の打ち抜きと、たたき潰しでカップ部分を形成している。図8および図9に示したマウントリード30のカップ部分はたたき潰す部分の金型を桃割れ状に形成しておくことで製造した。
(Example 3)
FIG. 8 is a schematic plan view of a bullet-type LED package manufactured in this example, and FIG. 9 is a schematic cross-sectional view taken along line AA ′ of FIG. The numbers in the figure are the same as those in FIGS. A resin-made bullet lens for the purpose of protecting the chip and the wire portion, improving the light extraction efficiency, and controlling the light distribution angle seals the mount lead 30 and the outer leads 64-66. The material of the lead is a copper alloy, and the surface is coated with silver. The same light emitting element as in Example 1 was used. The bullet frame LED lead frame forms a cup portion by punching and crushing unnecessary portions using a press machine. The cup portion of the mount lead 30 shown in FIGS. 8 and 9 was manufactured by forming a mold of a portion to be crushed into a peach crack shape.

また、図8および図9の様に成型した砲弾型LEDパッケージは砲弾レンズ部の直径が5mm、高さが9.0mmである。発光素子を搭載するマウントリードの凹部の底面は直径0.75mm、開口部は直径1.4mmとなる円形とし、高さ0.35mmなるように成型した。また、凹部の側面は円錐面から構成されている。底面には更にチップが個別に収納される個別凹部61〜63が形成されており、その底面に金属リード部が露出している。図6および図7と同様、各個別凹部の側面が障壁10の役割を果たしている。個別凹部は円形を3等分した扇形をしており、3つの個別凹部を併せた円形の直径は、開口部で0.7mm、底面で0.6mmである。個別凹部の深さ、即ち障壁の高さは0.15mmである。個別凹部の側面、即ち障壁の斜面の形状も凹部の側面同様円錐面から構成されている。   Further, the bullet-type LED package molded as shown in FIGS. 8 and 9 has a bullet lens portion having a diameter of 5 mm and a height of 9.0 mm. The bottom surface of the concave portion of the mount lead on which the light emitting element is mounted was formed into a circular shape having a diameter of 0.75 mm and an opening portion having a diameter of 1.4 mm, and a height of 0.35 mm. Moreover, the side surface of the recessed part is comprised from the conical surface. Further, individual recesses 61 to 63 for individually storing chips are formed on the bottom surface, and the metal lead portions are exposed on the bottom surface. As in FIGS. 6 and 7, the side surface of each individual recess serves as a barrier 10. The individual recess has a fan shape obtained by dividing the circle into three equal parts, and the diameter of the circle including the three individual recesses is 0.7 mm at the opening and 0.6 mm at the bottom. The depth of the individual recess, that is, the height of the barrier is 0.15 mm. The side surfaces of the individual recesses, that is, the shape of the slopes of the barriers, are also composed of conical surfaces as with the side surfaces of the recesses.

実施例1と同じ青、赤、緑の発光素子をそれぞれ、個別凹部61、62、63の底面に透明エポキシ樹脂を用いてダイボンディングした後、150℃にて90分間硬化させ、その後、各チップの負電極パッドとチップがボンディングされているマウントリードとを直径25μmの金線12にてワイヤーボンディングした。また、各チップの正電極パッドから各チップ用のアウターリード64、65、66へ直径25μmの金線にてワイヤーボンディングした。その後、砲弾レンズ形成用のキャスティングケースに2液混合型のエポキシ樹脂を注入し、上述のワイヤーボンディング済みのリードフレームをキャスティングケースに挿入し、次いでオーブンにてエポキシ樹脂を加熱硬化させた。キャスティングケースから砲弾レンズが固着したリードフレームを取り外し、タイバーをカットする事で、個片の4端子の3 in 1砲弾型LEDパッケージを完成させた。   The same blue, red, and green light emitting elements as in Example 1 were die-bonded to the bottom surfaces of the individual recesses 61, 62, and 63 using a transparent epoxy resin, and then cured at 150 ° C. for 90 minutes, and then each chip. The negative electrode pad and the mount lead to which the chip was bonded were wire-bonded with a gold wire 12 having a diameter of 25 μm. Further, wire bonding was performed from the positive electrode pad of each chip to the outer leads 64, 65, 66 for each chip with a gold wire having a diameter of 25 μm. Thereafter, a two-component mixed type epoxy resin was poured into a casting case for forming a bullet lens, the above-mentioned lead frame after wire bonding was inserted into the casting case, and then the epoxy resin was heated and cured in an oven. The lead frame to which the bullet lens was fixed was removed from the casting case, and the tie bar was cut to complete a 3 in 1 bullet-type LED package with four individual terminals.

得られた3 in 1 LEDパッケージの青色チップ(負荷5mA)、緑色チップ(負荷20mA)、赤色チップ(負荷10mA)にそれぞれ単独でそれぞれの負荷を印加した際の出力は4.5mW、6.5mW、4.4mWであり、合計すると15.4mWであった。   The output when each load is individually applied to the blue chip (load 5 mA), green chip (load 20 mA), and red chip (load 10 mA) of the obtained 3 in 1 LED package is 4.5 mW and 6.5 mW, respectively. It was 4.4 mW, and it was 15.4 mW in total.

(比較例2)
図10は本比較例で作製したLEDパッケージの平面模式図であり、図11は図10のA−A’における断面模式図である。図中番号は図8および図9と同一である。個別凹部を設けない、即ち凹部底面における障壁が無い従来型であることを除いて、実施例1と同様にLEDパッケージを作製した。
(Comparative Example 2)
FIG. 10 is a schematic plan view of an LED package manufactured in this comparative example, and FIG. 11 is a schematic cross-sectional view taken along line AA ′ of FIG. The numbers in the figure are the same as those in FIGS. An LED package was produced in the same manner as in Example 1 except that the conventional type was not provided with no individual concave portions, that is, no barrier on the bottom surface of the concave portions.

得られた3 in 1 LEDパッケージの青色チップ(負荷5mA)、緑色チップ(負荷20mA)、赤色チップ(負荷10mA)にそれぞれ単独でそれぞれの負荷を印加した際の出力は3.3mW、5.6mW、4.3mWであり、合計すると13.2mWであった。
実施例3の結果と比較すると、障壁を有する本発明の方がトータルの出力が高く、チップ相互間の吸収による出力ロスが低減された事が示された。
The output when each load is applied individually to the blue chip (load 5 mA), green chip (load 20 mA), and red chip (load 10 mA) of the obtained 3 in 1 LED package is 3.3 mW and 5.6 mW, respectively. It was 4.3 mW, and it was 13.2 mW in total.
Compared with the results of Example 3, it was shown that the present invention having a barrier had a higher total output and reduced output loss due to absorption between chips.

本発明のLEDパッケージは、マルチチップ実装時のチップ間相互吸収を抑制することができるので、各種ディスプレイ、バックライト、インジケーターおよび照明などの効率向上に広く用いることができ、産業上の利用価値は極めて大きい。   Since the LED package of the present invention can suppress mutual absorption between chips at the time of multichip mounting, it can be widely used for improving the efficiency of various displays, backlights, indicators, lighting, etc. Very large.

比較例1で作製した従来の並列配置のマルチチップパッケージの平面模式図である。FIG. 10 is a schematic plan view of a conventional multichip package produced in Comparative Example 1 in parallel arrangement. 従来の直列配置のマルチチップパッケージの平面模式図である。It is a schematic plan view of a conventional multi-chip package arranged in series. 図1のA−A’における断面模式図である。It is a cross-sectional schematic diagram in A-A 'of FIG. 実施例1で作製した本発明の面実装タイプマルチチップパッケージの平面模式図である。1 is a schematic plan view of a surface mount type multichip package of the present invention produced in Example 1. FIG. 図4のA−A’における断面模式図である。It is a cross-sectional schematic diagram in A-A 'of FIG. 実施例2で作製した本発明の面実装タイプマルチチップパッケージの平面模式図である。6 is a schematic plan view of a surface mount type multichip package of the present invention produced in Example 2. FIG. 図6のA−A’における断面模式図である。It is a cross-sectional schematic diagram in A-A 'of FIG. 実施例3で作製した本発明の砲弾型マルチチップパッケージの平面模式図である。6 is a schematic plan view of a shell-type multichip package of the present invention produced in Example 3. FIG. 図8のA−A’における断面模式図である。It is a cross-sectional schematic diagram in A-A 'of FIG. 比較例2で作製した従来の砲弾型マルチチップパッケージの平面模式図である。10 is a schematic plan view of a conventional shell-type multichip package manufactured in Comparative Example 2. FIG. 図10のA−A’における断面模式図である。It is a cross-sectional schematic diagram in A-A 'of FIG.

符号の説明Explanation of symbols

1〜4 金属リード
5 凹部
6 樹脂成型体
7 青色LEDチップ
8 緑色LEDチップ
9 赤色LEDチップ
10 障壁
12 金線
15 個別凹部
20 LEDチップ
30 マウントリード
61〜63 個別凹部
64〜66 アウターリード
1-4 Metal leads 5 Recess 6 Resin molding 7 Blue LED chip 8 Green LED chip 9 Red LED chip 10 Barrier 12 Gold wire 15 Individual recess 20 LED chip 30 Mount lead 61-63 Individual recess 64-66 Outer lead

Claims (9)

側面と樹脂および/または導電性金属から形成された底面とを有する凹部に複数のLEDチップが搭載され、該凹部が透光性樹脂で封止されているLEDパッケージにおいて、該LEDチップ各々を隔てる障壁が該底面と同一の樹脂または同一の導電性金属で一体成型されていることを特徴とするLEDパッケージ。   In an LED package in which a plurality of LED chips are mounted in a recess having a side surface and a bottom surface formed of resin and / or conductive metal, and the recess is sealed with a translucent resin, the LED chips are separated from each other. An LED package, wherein the barrier is integrally formed of the same resin or the same conductive metal as the bottom surface. 複数のLEDチップが発光波長の異なるLEDチップを含んでいる請求項1に記載のLEDパッケージ。   The LED package according to claim 1, wherein the plurality of LED chips include LED chips having different emission wavelengths. LEDチップが青色、緑色および赤色である請求項2に記載のLEDパッケージ。   The LED package according to claim 2, wherein the LED chips are blue, green and red. 凹部の側面が底面と同一の金属材料または同一の樹脂材料で一体成型された請求項1〜3のいずれか一項に記載のLEDパッケージ。   The LED package according to any one of claims 1 to 3, wherein a side surface of the recess is integrally formed of the same metal material or the same resin material as the bottom surface. 樹脂材料が、二酸化チタン、二酸化ジルコニウム、チタン酸カリウム、窒化アルミニウムおよび窒化ホウ素からなる群から選ばれた少なくとも一種の添加物を含有している請求項1〜4のいずれか一項に記載のLEDパッケージ。   The LED according to any one of claims 1 to 4, wherein the resin material contains at least one additive selected from the group consisting of titanium dioxide, zirconium dioxide, potassium titanate, aluminum nitride, and boron nitride. package. 障壁の高さがLEDチップの高さ以上である請求項1〜5のいずれか一項に記載のLEDパッケージ。   The LED package according to any one of claims 1 to 5, wherein a height of the barrier is not less than a height of the LED chip. 障壁の側面および/または凹部の側面が放物面である請求項1〜6のいずれか一項に記載のLEDパッケージ。   The LED package according to claim 1, wherein a side surface of the barrier and / or a side surface of the recess is a paraboloid. 請求項1〜7のいずれか一項に記載のLEDパッケージを用いてなるディスプレイ。   The display which uses the LED package as described in any one of Claims 1-7. 請求項1〜7のいずれか一項に記載のLEDパッケージからなるバックライト。   The backlight which consists of an LED package as described in any one of Claims 1-7.
JP2006209929A 2006-08-01 2006-08-01 Led package Pending JP2008041699A (en)

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