JP2008033907A5 - - Google Patents
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- JP2008033907A5 JP2008033907A5 JP2007164594A JP2007164594A JP2008033907A5 JP 2008033907 A5 JP2008033907 A5 JP 2008033907A5 JP 2007164594 A JP2007164594 A JP 2007164594A JP 2007164594 A JP2007164594 A JP 2007164594A JP 2008033907 A5 JP2008033907 A5 JP 2008033907A5
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- JP
- Japan
- Prior art keywords
- semiconductor device
- paper
- circuit
- element layer
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000004065 semiconductor Substances 0.000 claims 33
- 238000007789 sealing Methods 0.000 claims 13
- 239000010408 film Substances 0.000 claims 12
- 239000000463 material Substances 0.000 claims 9
- 239000010409 thin film Substances 0.000 claims 6
- 238000004519 manufacturing process Methods 0.000 claims 2
- -1 polypropylene Polymers 0.000 claims 2
- 229920005989 resin Polymers 0.000 claims 2
- 239000011347 resin Substances 0.000 claims 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 2
- 239000004952 Polyamide Substances 0.000 claims 1
- 239000004743 Polypropylene Substances 0.000 claims 1
- 239000004793 Polystyrene Substances 0.000 claims 1
- 239000000853 adhesive Substances 0.000 claims 1
- 230000001070 adhesive Effects 0.000 claims 1
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 239000004020 conductor Substances 0.000 claims 1
- 238000001035 drying Methods 0.000 claims 1
- 238000005755 formation reaction Methods 0.000 claims 1
- 229920002239 polyacrylonitrile Polymers 0.000 claims 1
- 229920002647 polyamide Polymers 0.000 claims 1
- 239000011528 polyamide (building material) Substances 0.000 claims 1
- 229920000728 polyester Polymers 0.000 claims 1
- 229920000139 polyethylene terephthalate Polymers 0.000 claims 1
- 239000005020 polyethylene terephthalate Substances 0.000 claims 1
- 229920001155 polypropylene Polymers 0.000 claims 1
- 229920002223 polystyrene Polymers 0.000 claims 1
- 229920000915 polyvinyl chloride Polymers 0.000 claims 1
- 239000004800 polyvinyl chloride Substances 0.000 claims 1
- 239000000843 powder Substances 0.000 claims 1
- 235000012239 silicon dioxide Nutrition 0.000 claims 1
- 239000000377 silicon dioxide Substances 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
Claims (17)
前記半導体装置は、
薄膜トランジスタを有する回路、及び前記回路に接続されたアンテナを有する素子層と、前記素子層の上面を封止する封止層とが積層された積層体と、
前記積層体の底部に固定された可撓性の基材と、を有し、
前記素子層は、前記可撓性の基材と前記封止層とにより挟まれていることを特徴とする半導体装置を内包する用紙。 A paper containing a semiconductor device,
The semiconductor device includes:
A laminate in which a circuit having a thin film transistor, an element layer having an antenna connected to the circuit, and a sealing layer for sealing an upper surface of the element layer are stacked;
A flexible base material fixed to the bottom of the laminate,
A sheet containing a semiconductor device, wherein the element layer is sandwiched between the flexible base material and the sealing layer .
前記半導体装置は、
薄膜トランジスタを有する回路、及び前記回路に接続されたアンテナを有する素子層と、前記素子層の上面を封止する封止層とが積層された積層体と、
前記積層体の底部に固定された可撓性の基材と、を有し、
前記素子層の側面は、前記回路及び前記アンテナを作製するときに形成された絶縁膜の積層膜でなり、
前記素子層は、前記可撓性の基材、前記封止層、及び前記絶縁膜の積層膜により覆われていることを特徴とする半導体装置を内包する用紙。 A paper containing a semiconductor device,
The semiconductor device includes:
A laminate in which a circuit having a thin film transistor, an element layer having an antenna connected to the circuit, and a sealing layer for sealing an upper surface of the element layer are stacked;
A flexible base material fixed to the bottom of the laminate,
Side surface of the element layer is made of a laminated film of an insulating film formed when fabricating the front Symbol circuit and said antenna,
The element layer is covered with a laminated film of the flexible base material, the sealing layer, and the insulating film, the paper containing the semiconductor device.
紙層と紙層の間に抄き込まれた半導体装置を有し、
前記半導体装置は、
薄膜トランジスタを有する回路、及び前記回路に接続されたアンテナを有する素子層と、前記素子層の上面を封止する封止層とが積層された積層体と、
前記積層体の底部に固定された可撓性の基材と、を有し、
前記素子層は、前記可撓性の基材と前記封止層とにより挟まれていることを特徴とする半導体装置を内包する用紙。 A multi-layered paper with a semiconductor device.
Having a semiconductor device embedded between the paper layers,
The semiconductor device includes:
A laminate in which a circuit having a thin film transistor, an element layer having an antenna connected to the circuit, and a sealing layer for sealing an upper surface of the element layer are stacked;
A flexible base material fixed to the bottom of the laminate,
A sheet containing a semiconductor device, wherein the element layer is sandwiched between the flexible base material and the sealing layer .
紙層と紙層の間に抄き込まれた半導体装置を有し、
前記半導体装置は、
薄膜トランジスタを有する回路、及び前記回路に接続されたアンテナを有する素子層と、前記素子層の上面を封止する封止層とが積層された積層体と、
前記積層体の底部に固定された可撓性の基材と、を有し、
前記素子層の側面は、前記回路及び前記アンテナを作製するときに形成された絶縁膜の積層膜でなり、
前記素子層は、前記可撓性の基材、前記封止層、及び前記絶縁膜の積層膜により覆われていることを特徴とする半導体装置を内包する用紙。 A multi-layered paper with a semiconductor device.
Having a semiconductor device embedded between the paper layers,
The semiconductor device includes:
A laminate in which a circuit having a thin film transistor, an element layer having an antenna connected to the circuit, and a sealing layer for sealing an upper surface of the element layer are stacked;
A flexible base material fixed to the bottom of the laminate,
Side surface of the element layer, Ri such a laminated film of an insulating film formed when fabricating the circuit and the antenna,
The element layer is covered with a laminated film of the flexible base material, the sealing layer, and the insulating film, the paper containing the semiconductor device.
前記半導体装置を内包する用紙の厚さは１３０μｍ以下であることを特徴とする半導体装置を内包する用紙。A sheet containing a semiconductor device, wherein the thickness of the sheet containing the semiconductor device is 130 μm or less.
前記半導体装置の厚さは３０μｍ以下であることを特徴とする半導体装置を内包する用紙。A sheet containing a semiconductor device, wherein the semiconductor device has a thickness of 30 μm or less.
前記可撓性の基材の厚さは２０μｍを超えないことを特徴とする半導体装置を内包する用紙。A sheet containing a semiconductor device, wherein the thickness of the flexible substrate does not exceed 20 μm.
前記可撓性の基材は、基材フィルムと接着層との積層構造を有することを特徴とする半導体装置を内包する用紙。The flexible base material has a laminated structure of a base film and an adhesive layer, and is a paper containing a semiconductor device.
前記基材フィルムは、ポリエステル、ポリプロピレン、ポリ塩化ビニル、ポリスチレン、ポリアクリロニトリル、ポリエチレンテレフタレート又はポリアミドのいずれかからなる樹脂であることを特徴とする半導体装置を内包する用紙。The paper including a semiconductor device, wherein the base film is a resin made of polyester, polypropylene, polyvinyl chloride, polystyrene, polyacrylonitrile, polyethylene terephthalate, or polyamide.
前記基材フィルムの表面は、二酸化シリコンの粉末によりコーティングされていることを特徴とする半導体装置を内包する用紙。A sheet containing a semiconductor device, wherein the surface of the base film is coated with a powder of silicon dioxide.
前記基材フィルムの表面は、導電性材料によりコーティングされていることを特徴とする半導体装置を内包する用紙。A sheet containing a semiconductor device, wherein the surface of the base film is coated with a conductive material.
前記半導体装置が内包された用紙の少なくとも一方の表面は、平坦性を有していることを特徴とする半導体装置を内包する用紙。At least one surface of the paper in which the semiconductor device is included has flatness, and the paper includes the semiconductor device.
前記半導体装置が内包された用紙は、可撓性を有していることを特徴とする半導体装置を内包する用紙。The paper including the semiconductor device is characterized in that the paper including the semiconductor device has flexibility.
前記薄膜トランジスタを有する回路は無線で通信を行うための回路であることを特徴とする半導体装置を内包する用紙。A circuit including a semiconductor device, wherein the circuit having the thin film transistor is a circuit for performing wireless communication.
間に半導体装置を挟んだ状態で２層の前記湿紙を重ね、
前記重ねた湿紙をプレスし、
前記プレスした湿紙を乾燥して、多層紙を形成する紙の作製方法であり、
前記湿紙をプレスする際に、プレスの際に変形が可能な物体を前記湿紙の一方の面に接触させることを特徴とする半導体装置を内包する用紙の作製方法。
Prepare at least two layers of wet paper,
Two layers of wet paper are stacked with a semiconductor device in between,
Press the stacked wet paper,
A method for producing a paper for drying the pressed wet paper to form a multilayer paper,
A method for manufacturing a paper including a semiconductor device, wherein when pressing the wet paper, an object that can be deformed during pressing is brought into contact with one surface of the wet paper.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007164594A JP5094232B2 (en) | 2006-06-26 | 2007-06-22 | Paper containing semiconductor device and method for manufacturing the same |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006175678 | 2006-06-26 | ||
| JP2006175678 | 2006-06-26 | ||
| JP2007164594A JP5094232B2 (en) | 2006-06-26 | 2007-06-22 | Paper containing semiconductor device and method for manufacturing the same |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2008033907A JP2008033907A (en) | 2008-02-14 |
| JP2008033907A5 true JP2008033907A5 (en) | 2010-05-27 |
| JP5094232B2 JP5094232B2 (en) | 2012-12-12 |
Family
ID=39123201
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007164594A Expired - Fee Related JP5094232B2 (en) | 2006-06-26 | 2007-06-22 | Paper containing semiconductor device and method for manufacturing the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP5094232B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101588576B1 (en) * | 2008-07-10 | 2016-01-26 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Light emitting device and electronic device |
| JP5586920B2 (en) * | 2008-11-20 | 2014-09-10 | 株式会社半導体エネルギー研究所 | Method for manufacturing flexible semiconductor device |
| WO2011021248A1 (en) * | 2009-08-20 | 2011-02-24 | 国立大学法人東京大学 | Semiconductor substrate, method for production of semiconductor layer, method for production of semiconductor substrate, semiconductor element, luminescent element, display panel, electronic element, solar battery element, and electronic device |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2634482B2 (en) * | 1990-06-12 | 1997-07-23 | 三田工業株式会社 | Image forming apparatus cleaning method |
| JP3925101B2 (en) * | 2001-04-19 | 2007-06-06 | 特種製紙株式会社 | Manufacturing method of anti-counterfeit sheet |
| JP5041681B2 (en) * | 2004-06-29 | 2012-10-03 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
| JP4749062B2 (en) * | 2004-07-16 | 2011-08-17 | 株式会社半導体エネルギー研究所 | Device for sealing thin film integrated circuit and method for manufacturing IC chip |
| JP4563122B2 (en) * | 2004-09-14 | 2010-10-13 | 株式会社中戸研究所 | Barrier laminated film and method for producing the same |
| JP5072210B2 (en) * | 2004-10-05 | 2012-11-14 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
| JP4799130B2 (en) * | 2004-11-09 | 2011-10-26 | 株式会社半導体エネルギー研究所 | IC chip and IC chip manufacturing method |
| JP4811561B2 (en) * | 2005-04-19 | 2011-11-09 | 大日本印刷株式会社 | Non-contactable IC tag that can be disabled |
-
2007
- 2007-06-22 JP JP2007164594A patent/JP5094232B2/en not_active Expired - Fee Related
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