JP2008009514A - Rfid tag and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a new RFID tag which can be installed regardless of a conductive object or a non-conductive object without shortening a communication distance for eliminating the risk of the damage of an IC chip due to any impact or the like by preventing any protrusion due to an IC chip from being generated on the surface of an RFID tag, and for executing printing by a label printer. <P>SOLUTION: This RFID tag is provided with a dielectric substrate having a hole section on one main surface; a ground conductor pattern formed on the other main face of the dielectric substrate; a film base material; a conductive pattern formed on the film substrate configuring a slot inside; and an IC chip electrically connected through the slot to the conductive pattern, and inserted into the hole section of the dielectric substrate. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an RFID (Radio Frequency Identification) tag and a manufacturing method thereof, and receives a command signal transmitted from a reader / writer, updates tag information stored in a memory according to the information of the command signal, and additionally writes the tag signal. Alternatively, the tag information is transmitted as a read signal to the RFID reader / writer, and is used for living / article entry / exit management, logistics management, and the like.

  A conventional RFID system performs wireless communication between an RFID tag having an IC chip and an RFID reader / writer. RFID tags include a so-called active type tag that is mounted with a battery and driven by the electric power, and a so-called passive type tag that receives electric power from a reader / writer and drives it as a power source. The active tag has a battery compared to the passive type, so it has advantages in terms of communication distance and communication stability, but has a complicated structure and disadvantages such as an increase in size and cost. There is also. And with recent improvements in semiconductor technology, IC chips have become smaller and higher performance for passive tags, and the use of passive tags in a wide range of fields has been expanded by extending communication distance and improving communication stability. This is an expected situation.

  In the passive induction tag, in the electromagnetic induction method applied to the RFID tag of the long wave band and the short wave band, a voltage is applied to the RFID tag by the electromagnetic induction action between the transmission antenna coil of the reader / writer and the antenna coil of the RFID tag. The IC chip is activated by this voltage to enable communication. Therefore, the RFID tag operates only within the induction electromagnetic field by the RFID reader / writer, and the communication distance becomes about several tens of centimeters. In addition, in radio frequency RFID tags such as UHF band and microwave band, the radio wave communication method is applied, and power is supplied to the IC chip of the RFID tag by radio waves, so the communication distance is about 1 to 8 m. And has improved significantly. Accordingly, RFID tags in high frequency bands such as UHF band and microwave band are collectively read and moved by a plurality of RFID tags that are difficult to realize in long wave band and short wave band RFID systems with short communication distances. RFID tags can be read, and the range of use is expected to expand significantly in the future. Then, as a passive tag of high frequency, such as a UHF band or a microwave band, there existed what was described in patent documents 1-3, for example.

  Regarding a conventional RFID tag, FIG. 2 of Patent Document 1 includes a half-wavelength microstrip line resonator 13, a dielectric substrate 14, and a ground conductor plate 15. By connecting the IC chip to the ground conductor plate 15, even if there is a metal object (conductor) on the ground conductor plate 15 side, the metal object (conductor) is hardly affected by the radiation characteristics of the antenna. An RFID tag that can be installed and pasted is disclosed.

  Further, in FIG. 1 of Patent Document 2, the terminal portion 3 formed on the surface of the base material 1 and the IC chip placement region 9 formed on a part of the base material 1 are connected to the terminal portion 3. An RFID tag including an IC chip 6 is disclosed. For this purpose, it is not necessary to embed the IC chip 6 in the base material 1 and it can be mounted on the upper surface of the antenna. Therefore, an RFID tag having a simple structure can be manufactured by simply processing the surface of the base material 1, thereby reducing yield. It has been disclosed that manufacturing costs can be reduced.

  Further, FIG. 19 of Patent Document 3 shows an RFID tag 5 including a dielectric member 10, an IC chip recess 10 b, a film substrate 20, an antenna pattern 30, and an IC chip 40. An IC chip recess 10b in which the IC chip 40 can be embedded is provided. The IC chip 40 is embedded in the IC chip recess 10b, and the antenna pattern 30 and the IC chip 40 formed on the inner surface side of the film base 20 are electrically connected. A loop antenna in which a film substrate 20 is wound around a dielectric member 10 so as to be connected to the antenna member 30 and the antenna pattern 30 is used to suppress a decrease in communication distance even in the vicinity of the radio wave absorber is disclosed.

Japanese Patent Laid-Open No. 2000-332523 (FIG. 3)

JP 2002-197434 (FIG. 1)

Japanese Patent Laying-Open No. 2006-53833 (FIG. 19)

  However, although the RFID tag described in Patent Document 1 can be installed on a metal object (conductor), an IC chip is connected between the half-wavelength microstrip line resonator and the ground conductor plate. Because of the configuration, it is necessary to embed an IC chip inside the dielectric substrate. For this reason, there existed a subject that a structure was complicated and manufacture became difficult.

  The RFID tag described in Patent Document 2 is thicker than the antenna pattern and the conductor thickness of the terminal portion even if the IC chip is downsized, and the IC chip is on the surface of the substrate. Therefore, a protrusion is formed on the surface of the RFID tag. Therefore, as described in the section “0023” of Patent Document 2, it is necessary to cover and protect the entire mounting portion or a part of the IC chip to flatten the surface of the RFID tag. That is, when an antenna pattern and an IC chip are mounted on a substrate, the IC chip may be damaged due to an impact or the like, and it becomes difficult to directly print on the surface (upper surface) of the RFID tag using a label printer. There was a problem. Further, when a film having an antenna pattern and an IC chip mounted thereon is bonded to the base material, the film bulges (protrusions) due to the IC chip, which also has the above-described problems.

  Furthermore, the RFID tag described in Patent Document 3 is attached to or near a conductive object (conductor) such as a metal object, although the film (film substrate) bulges (projections) by the IC chip hardly occur. In the case where it is installed in the mobile phone, there are problems that the loop antenna does not operate due to the influence of the conductive object, and the communication distance is extremely reduced.

Accordingly, the present invention has been made to solve the above-described problems, and can be installed regardless of a conductive object or a non-conductive object without reducing the communication distance, Therefore, it is an object of the present invention to provide a novel RFID tag that can be printed by a label printer without causing a risk of damage to the IC chip due to an impact or the like.
Another object of the present invention is to provide a novel RFID tag manufacturing method that can be easily manufactured because the configuration of the RFID tag is relatively simple.

  An RFID tag according to claim 1 is a dielectric substrate having a hole on one main surface, a grounding conductor pattern provided on the other main surface of the dielectric substrate, a film base, and a film base on the film base. A conductive pattern provided inside the slot, and an IC chip electrically connected to the conductive pattern via the slot and inserted into the hole of the dielectric substrate.

  An RFID tag according to claim 2 is a dielectric substrate having a hole on one main surface, a ground conductor pattern provided on the other main surface of the dielectric substrate, a film base, and a film base on the film base. A conductive pattern provided on the inner side of the film substrate at a predetermined distance from the end of the film base, and a slot is formed inside the conductive pattern, and is electrically connected to the conductive pattern through the slot. And an IC chip inserted into the hole of the dielectric substrate.

  An RFID tag according to a third aspect includes a dielectric substrate having a hole on one main surface, a ground conductor pattern provided on the other main surface of the dielectric substrate, a film base, and a film base on the film base. A conductor pattern provided on the inner side of the film substrate at a predetermined distance from the end of the film base, a slot is formed inside the conductor pattern, and the slot is formed from both sides of the conductor pattern constituting the slot. And an IC chip electrically connected to these electrical connection parts and inserted into the hole of the dielectric substrate.

  An RFID tag according to claim 4 is a dielectric substrate having a hole in one main surface, a ground conductor pattern provided on the other main surface of the dielectric substrate, a film base, and a film base A conductive pattern that is provided and has a slot formed therein, an IC chip that is electrically connected to the conductive pattern through the slot, and is inserted into the hole of the dielectric substrate; and A fixing means is provided which is inserted into the hole of the dielectric substrate and fixes the conductor pattern of the film base and one main surface of the dielectric substrate.

  An RFID tag according to a fifth aspect is the RFID tag according to any one of the first to fourth aspects, wherein the dielectric substrate is made of a thermoplastic resin.

  The RFID tag manufacturing method according to claim 6 includes a hole forming step of forming a hole on one main surface of the dielectric substrate, and a ground pattern forming step of forming a ground conductor pattern on the other main surface of the dielectric substrate. A conductor pattern forming step of forming a conductor pattern having a slot on the film substrate, an IC chip connecting step of electrically connecting the IC chip to the conductor pattern via the slot, and after the IC chip connecting step And a fixing step of inserting the IC chip into the hole and fixing the film base to the dielectric substrate.

  The method for manufacturing an RFID tag according to claim 7 is characterized in that the upper mold and the lower mold are formed by superimposing a recess and an upper mold having a protrusion inside the recess and a lower mold having a recess. A dielectric substrate is formed in which a space is formed in between, a resin of a dielectric material is injected into the space, and a hole is formed on one main surface of the dielectric substrate corresponding to the protrusion of the upper mold. A grounding conductor that forms a grounding conductor pattern on the other main surface of the dielectric substrate simultaneously with the formation of the dielectric substrate by arranging a conductive foil in the concave portion of the lower mold before the injection of the resin A pattern forming step, a conductor pattern forming step of forming a conductor pattern having a slot on a film substrate, an IC chip connecting step of electrically connecting an IC chip to the conductor pattern via the slot, and the IC chip Into the hole, The serial film substrate is obtained and a fixing step of fixing the dielectric substrate.

  The RFID tag manufacturing method according to an eighth aspect is the one according to the seventh aspect, wherein an inlet for injecting the resin is provided in the upper mold, and a vacuum inlet is provided in the lower mold.

  The RFID tag manufacturing method according to a ninth aspect is the one according to the seventh aspect, wherein the upper surface is subjected to chemical conversion treatment before the conductor foil is disposed in the recess of the lower mold.

  As described above, according to the RFID tag according to the present invention, since the conductor pattern constituting the slot acts as a radiating portion of the patch antenna, it is a case where the slot is installed not only on a non-conductive but also on a conductive installation. However, the antenna radiation characteristics are hardly affected, and the IC chip is electrically connected to the conductive pattern through the slot, so that the power feeding loss can be reduced and communication is possible for this purpose. In addition to the effect that the distance is not shortened, the IC chip is inserted into the hole of the dielectric substrate, so that the IC chip does not bulge, and the IC chip is damaged by an impact or printed by a label printer. In this case, there is an effect that the IC chip is caught by the roller or the drum and the damage of the IC chip due to this is reduced.

  In addition, according to the RFID tag manufacturing method of the present invention, since the configuration of the RFID tag is relatively simple, it is possible to mass-produce at once, and the manufacturing time can be greatly reduced. It is possible to improve the yield and reduce the manufacturing cost.

Embodiment 1 FIG.
Embodiment 1 of the present invention will be described below. FIG. 1 is a configuration diagram of an RFID tag according to the first embodiment. 1A is a plan view of the RFID tag, FIG. 1B is a cross-sectional view taken along line AA ′ in FIG. 1A, and FIG. 1C is FIG. FIG. In these FIG. 1, 1 is a dielectric substrate comprised, for example with the olefin type thermoplastic elastomer. Reference numeral 2 denotes a film base provided on one main surface (front surface) of the dielectric substrate 1. For this film substrate 2, film polyethylene terephthalate, polyimide, polyethylene naphthalate, polyvinyl chloride, or the like can be used. The film substrate 2 may be a flexible substrate or a substrate that is not, and may be transparent or colored and translucent. In addition, in Fig.1 (a), when the film base material 2 is transparency, the state seen through the film base material 2 is shown. Here, the film base 2 and the dielectric substrate 1 have the same dimensions in a plane. 3 is a conductor pattern provided on the film substrate 2. As shown in FIG. 1A, the conductor pattern 3 is formed on the inner side of the film base 2 with a distance d from the vertical and horizontal ends. In this case, it can be said that the conductor pattern 3 is formed at a distance d from the vertical and horizontal ends of the dielectric substrate 1. On the other hand, the film base 2 can be disposed on one main surface of the dielectric substrate at a distance d from the vertical and horizontal ends of the dielectric substrate 1. In this case, the conductor pattern 3 can also be provided on the entire surface of the film substrate 2. As shown in FIG. 1A, an elongated slot 4 is formed at the center of the conductor pattern 3. The slot 4 can be formed by etching the conductive pattern 3. The length and width of the slot 4 can be determined by the frequency used. Reference numeral 5 denotes a hole formed in one main surface of the dielectric substrate 1. Reference numeral 6 denotes an IC chip, which is composed of a memory or the like as will be described later. The IC chip 6 is electrically connected to the conductor pattern 3 through the slot 4.

  Here, a connection configuration between the IC chip 6 and the conductor pattern 3 will be described. 1 and 7, projecting electrical connection portions extending from the conductor pattern 3 on both sides of the slot 4 to the inside of the slot 4 as shown in FIGS. 1A and 1B, respectively. 3 and 3 are connected continuously and electrically connected. These electrical connection portions 7 and 7 may be formed simultaneously with the formation of the conductor pattern 3 by etching. Terminals (not shown) of the IC chip 6 are connected to the electrical connection portions 7 and 7. If the size of the IC chip 6 is the same as or smaller than the width of the slot 4, it will fall within the width of the slot 4, but at this time, the terminals (not shown) of the IC chip 6 are electrically connected. Connected to units 7 and 7 However, when the size of the IC chip 6 is larger than the width of the slot 4, the terminal (not shown) of the IC chip may be electrically connected to a portion near the slot 4 of the conductor pattern 3 through the slot. Therefore, in this case, it is not necessary to provide the electrical connection portions 7 and 7 as described above.

  In FIG. 1A, the IC chip 6 is arranged at the center in the length direction of the slot 4, but it may be arranged not at the center but at the end of the slot 4 in the length direction. Good. Since the hole portion 5 of the dielectric substrate 1 is formed to insert the IC chip 6, the depth and the width thereof correspond to the size of the IC chip. Of course, the position where the hole 5 is formed is determined according to the position in the slot 4 where the IC chip 6 is placed. In any case, the shape and dimensions of the slot 4 must be matched to the number and characteristic impedance of the electrical connection portions 7 of the IC chip 6 to be mounted. For example, in order to achieve impedance matching, in addition to fine adjustment of the shape of the slot 4, in the case where there are two connection terminals of the IC chip 6, two electrical connection portions 7 having a width capable of impedance matching are formed. do it. Next, 8 is a ground conductor pattern provided on the other main surface (back surface) of the dielectric substrate 1. Reference numeral 9 denotes an adhesive sheet for bonding the dielectric substrate 1 and the film base 2. The adhesive sheet 9 is provided on a portion corresponding to a portion other than the hole 5 on the dielectric substrate 1 as shown in FIG. 1 (c), and bonds the dielectric substrate 1 and the film base 2 to each other. Can be fixed. Further, in order to fix the dielectric substrate 1 and the film base 2, an adhesive may be used instead of the adhesive sheet 9.

  FIG. 2A is a conceptual diagram schematically showing how transmission / reception is performed between an RFID tag and an RFID reader / writer. FIG. 2B is a configuration diagram of the RFID tag, and in particular, a block configuration diagram functionally showing the internal configuration of the IC chip 6. 2A and 2B, reference numeral 10 denotes an RFID tag having the configuration shown in FIG. Reference numeral 11 denotes an antenna portion provided in the RFID tag 10, which corresponds to the conductor pattern 3 in which the slot 4 is formed in FIG. As shown in FIGS. 1A and 1B described above, the antenna portion 11 of the RFID tag 10 is provided with the conductor pattern 3 having the slots 4 on one main surface (front surface) of the dielectric substrate 1, and the dielectric substrate. Since the ground conductor pattern 8 is provided on the other main surface (back surface) of the one, the RFID tag 10 functions as a patch antenna. That is, the conductor pattern 3 having the slot 4 functions as an antenna pattern (radiating portion). The conductor pattern 3 and the slot 4 are adjusted so as to obtain impedance matching between the operating frequency of the RFID system and the IC chip 6 so as to be excited. Since this adjustment is greatly related to the thickness and relative dielectric constant of the dielectric substrate 1, a desired radiation pattern and gain can be obtained by adjusting and designing these conditions together. As described above, the slot 4 is formed in the central portion of the conductor pattern 3 so that the radiation pattern of the conductor pattern 3 is good. By adjusting and designing in accordance with such conditions, a desired radiation pattern and gain in the RFID tag 10 can be obtained, and without increasing the size of the RFID tag 10, that is, the dielectric substrate 1, for example, 1 to 1 A communication distance of about 8 m can be obtained.

  Reference numeral 12 denotes an RFID reader / writer, and reference numeral 13 denotes an antenna unit provided in the RFID reader / writer 12, which performs wireless communication with the antenna unit 11 of the RFID tag 10. Reference numeral 6 denotes the IC chip described in FIG. 1, and the specific configuration thereof is as shown in FIG. An analog unit 14 receives a transmission wave from the RFID reader / writer 12 by the antenna unit 11 of the RFID tag 10 and outputs the received wave to the digital circuit 21 at the subsequent stage. Reference numeral 15 denotes an A / D converter that performs A / D conversion on the transmission wave, and reference numeral 16 denotes a power that is generated by smoothing the transmission wave received by the antenna unit 11 with a rectifier circuit. It is a power supply control part which performs control. A memory unit 17 is mounted on the RFID tag 10 and stores tag information such as individual identification information. Reference numeral 18 denotes a demodulation unit that demodulates the transmission wave, and reference numeral 19 denotes a control unit that controls a circuit in the IC chip 6 including the memory unit 17 using the transmission wave demodulated by the demodulation unit 18. A modulation unit 20 modulates information extracted from the memory unit 17 by the control unit 19. 21 is a digital unit composed of the demodulation unit 15, the control unit 16 and the modulation unit 17, and 22 is a D / A conversion which D / A converts the signal transmitted from the modulation unit 20 and outputs it to the analog unit 14. Part.

  Here, the basic operation of such an RFID system will be described. The tag information is stored in the memory unit 17 of the RFID tag 10 in accordance with the use (biological / article entry / exit management and logistics management) using the RFID system, and the RFID reader / writer 12 itself The tag information can be updated, written, or read when the RFID tag 10 is present or moved (attached to a living body / article subject to entry / exit management or physical distribution management) in the transmission / reception area it can. The RFID reader / writer 12 transmits a command signal for instructing the RFID tag 10 to update, write, or read from the antenna unit 13 of the RFID reader / writer 12 to the antenna unit 11 of the RFID tag 10 as a transmission wave. The antenna unit 11 of the RFID tag 10 receives the transmission wave, and the transmission wave is detected and stored (smoothed) by the power supply control unit 16 to generate an operation power supply for the RFID tag 10, and the operation power supply to each circuit of the RFID tag 10. Supply. Further, the command signal of the transmission wave is demodulated by the demodulator 18. The control unit 19 performs data processing from the instruction content of the demodulated command signal, and instructs the memory unit 17 to update or write tag information, or to read the tag information. A return wave obtained by modulating the read signal output from the unit 17 by the modulation unit 20 is transmitted from the antenna unit 11 to the antenna unit 13 of the RFID reader / writer 12 via the analog unit 14, and the RFID reader / writer 12 receives the read signal. Thus, desired information is obtained.

  Further, the operation of the RFID system using the RFID tag according to the first embodiment will be described in detail. The RFID reader / writer 12 uses a command signal for instructing the RFID tag 10 to perform update / write or read as a transmission wave. The data is transmitted from the antenna unit 13 of the RFID reader / writer 12 to the antenna unit 11 of the RFID tag 10. The conductor pattern 3, which is a radio wave radiation portion of the dielectric substrate 1 constituting the RFID tag 10, receives the transmission wave, generates a potential difference between the opposing portions of the slot 4, and the transmission wave is supplied to the IC chip 6. As described above, the transmission wave supplied to the IC chip 6 is detected and stored (smoothed) by the power supply control unit 16 to generate an operating power supply for the RFID tag 10, and each circuit (IC chip 6) of the RFID tag 10. To supply the operation power, the command signal is demodulated from the transmission wave, the tag information is updated / written and / or read from / to the memory unit 17 from the instruction content of the demodulated command signal, and the memory unit The readout signal output from the circuit 17 traces back the same path as the transmission wave supplied to the IC chip 6 as a return wave, and returns to the RFID reader / writer 12 from the conductor pattern 3 that is the radiation section. Waves are transmitted, the antenna unit 13 of the RFID reader-writer 12 receives the reply wave, it comes to obtaining the desired information. Note that the content of wireless communication data performed by the RFID system may be conventional or new, and since the ground conductor pattern 8 is formed on the back surface of the dielectric substrate 1, By directing the back side to the installation target surface, it is possible to manufacture a simple structure RFID tag that can be installed regardless of whether the installation target is a conductor or non-conductor. It can be used in a wide range of fields such as management, equipment management, and car entrance / exit management, and can be installed even if the installation target or installation target surface is a conductor such as a conductive object.

  Next, FIGS. 3A to 3E describe each manufacturing process based on the sectional view of the RFID tag manufacturing method according to the first embodiment. FIG. 3A shows a conductor layer forming step of forming the conductor layer 23 on the film substrate 2 (the back side of the film substrate 2). Then, as shown in FIG. 3B, the region in which the conductor pattern 3 is to be formed and the region in which the electrical connection portions 7 and 7 are to be formed inside the slot 4 are masked, and the conductor pattern 3 and the electrical connection are etched. The conductor pattern formation process which forms the parts 7 and 7 simultaneously is shown. In addition, you may print a conductor pattern on the film base material 2, without performing a conductor layer formation process on the film base material 2. FIG. Next, as shown in FIGS. 3C and 3D, in the IC chip connection step, the connection terminals 24 and 24 of the IC chip 6 are electrically connected to the electrical connection portions 7 and 7 by soldering. The electrical connection method is generally thermocompression bonding by reflow, but may be connected by other methods. On the other hand, as shown in FIG. 3E, the ground conductor pattern 8 is formed on the other main surface (back surface side) of the dielectric substrate 1, and an IC chip is inserted on one main surface (front surface side). The hole 5 to be formed is formed. The hole 5 is formed by, for example, an injection molding method. Thereafter, as shown in FIG. 3 (e), in the film supporting step (adhering step), the adhesive sheet 9 excluding the holes 5 is attached on one main surface side of the dielectric substrate 1. In this way, the dielectric substrate 1 with the adhesive sheet 9 attached is overlapped with the film base 2 attached with the conductor pattern 3 and the IC chip 6 so that the IC chip 6 is inserted into the hole 5. In addition, the film base 2 is supported with respect to the dielectric substrate 1 by the adhesive sheet 9. Thus, the RFID tag 10 is configured.

  4 to 7 illustrate each manufacturing process based on the plan view of the RFID tag manufacturing method according to the first embodiment. FIG. 4 is a plan view in which a conductor layer is formed on the entire surface of the film substrate. FIG. 5A is a rear view of the film substrate 2 after the conductor pattern 3 and the slot 4 are formed. As shown in FIG. 4, in the case where the conductor layer 23 is entirely formed on the back side of the film substrate 2, the electrical connection portions 7 and 7 are separated from the peripheral portion separated from the end of the film substrate 2 by a predetermined distance d. The configuration of the conductor pattern 3 is shown in which the conductor layer in the slot 4 portion excluding is removed by, for example, etching. The configuration of the film base 2 when viewed from the surface of the film base 2 at this time is shown in FIG. This is a case where the film substrate 2 is transparent or translucent. FIG. 6A is a back view of the IC chip 6 attached to the inside of the slot 4 on the film substrate 2. FIG. 6B is a state diagram when the IC chip is attached to the film base 2 when viewed from the front side of the film base 2, and the electrical connection portions 7 and 7 and the IC chip 6 are transparent or translucent. Visible through the film base 2. FIG. 7 is a plan view of the dielectric substrate 1 in which the hole 5 for inserting the IC chip 6 is formed on one main surface of the dielectric substrate 1. The hole 5 may be formed by etching or milling other than the above-described injection molding method. Then, as described above, the IC chip 6 attached to the film base 2 is then inserted into the hole 5 of the dielectric substrate 1 so that the film base is supported on the dielectric substrate 1. Complete the tag.

  As described above, the RFID tag according to the first embodiment is configured such that the IC chip 6 is inserted into the hole 5 formed on one main surface of the dielectric substrate 1, so that the film base 2 is bent or swollen. Therefore, even when an impact or the like is applied to the RFID tag, the occurrence rate of breakage of the IC chip 6, poor electrical contact between the IC chip 6 and the electrical connection portion 7, or breakage of the connection is greatly increased. Can be reduced. Further, the size of the hole portion of the dielectric substrate 1 may be set in consideration of the yield when the IC chip 6 is inserted into the hole portion 5 with respect to the volume of the IC chip 6. In addition, when forming the hole 5 in the dielectric substrate 1 not using the injection molding method, the hole 5 may be formed by a method of cutting one main surface of the dielectric substrate 1.

  FIG. 8 is an electric field diagram showing an electric field (indicated by an arrow) of the RFID tag according to the first embodiment. FIG. 8 also shows a partial enlarged view around the IC chip 6 and shows the state of the electric field with arrows in the partial enlarged view. The arrows shown in FIG. 8 indicate the electric field between the ground conductor pattern 8 and the conductor pattern 3. Since such an electric field is formed between the conductors, the electric field runs between the opposing portions of the slot 4. A potential difference occurs. A position where the intensity of the electric field in the thickness direction of the dielectric substrate 1 is zero is used as a feeding point of the IC chip. As shown in FIG. 8, since the left and right electric fields cancel each other out inside the dielectric substrate 1, the electric field strength is at a position along the longitudinal axis of the slot 4 (the depth direction in FIG. 8). Becomes zero. Therefore, if the electrical connection portion 7 of the IC chip 6 is arranged at this position, the power feeding loss can be greatly reduced. Therefore, with this configuration, the symmetry of the radiation pattern of the conductor pattern 3 is hardly adversely affected, the communication distance can be greatly extended, and even if the configuration is simple, the performance is greatly improved. There is an effect that an improved RFID tag can be obtained.

  FIG. 9 is a characteristic diagram illustrating a change in characteristic impedance in the RFID tag 10 according to the first embodiment. As described above, it has been described that the conductor pattern 3 is formed at a predetermined distance d from the end of the film substrate 2, but this means that the ground conductor pattern 8 is formed on the entire other main surface of the dielectric substrate 1. Therefore, it can be said that the predetermined distance d is a dimensional difference at the four corners of the conductor pattern 3 and the ground conductor pattern 8, as shown in FIG. In this way, the predetermined distance d is the same at the four corners of the conductor pattern 3 and the ground conductor pattern 8 even when the ground conductor pattern 8 is not formed on the entire other main surface of the dielectric substrate 1. It can be considered as a dimensional difference. Therefore, in FIG. 9, the horizontal axis represents a predetermined distance or the above-described dimensional difference d and the wavelength ratio of the used frequency of the RIFD tag, and the vertical axes R [Ω] and X [Ω] are the real parts of the characteristic impedance, respectively. And the imaginary part. Where λ on the horizontal axis is the wavelength of the operating frequency. According to the characteristic diagram of FIG. 9, when the predetermined distance d is 0.13λ or more, the characteristic impedance of the RFID tag 10 is substantially constant. Therefore, by setting the predetermined distance d to be 0.13λ or more, the characteristic impedance of the RFID tag can be obtained regardless of whether the RFID tag is installed in the air, regardless of whether it is a conductor or a non-conductor object. Therefore, the RFID performance does not deteriorate, and wireless communication with the RFID reader / writer 12 can be achieved. Since the electric field strength at the position of the hole portion 5 of the dielectric substrate 1 is zero, it can be said that it is almost the same as the change in characteristic impedance of the RFID tag when there is no hole portion 5.

Embodiment 2. FIG.
Next, Embodiment 2 of the present invention will be described with reference to FIGS. FIG. 10 is a plan view showing the configuration of the RFID tag according to the second embodiment, and FIG. 11 is an enlarged plan view of the vicinity of the slot shown in FIG. FIG. 11A is a plan view when the IC chip is not mounted, and FIG. 11B is a plan view when the IC chip is mounted. Here, in the case of the first embodiment, the case where two connection terminals 24, that is, two IC chips are used has been described, but when the connection terminal 24 mounts four IC chips, In addition to the electrical connection portions 7 and 7 described in the first embodiment, two dummy pads 25 and 25 are provided inside the slot 4 and in the vicinity of the connection terminals. The dummy pads 25 and 25 are formed at the same time as the electrical connection portions 7 and 7 are formed. Moreover, the dummy pads 25 and 25 seen through the film base 2 from FIGS. 10 and 11 are mere dummy pads that are not electrically connected to the conductor pattern 3 and the electrical connection portions 7 and 7. As described above, since it is possible to flexibly cope with a change in the specification of the IC chip 6 mounted on the RFID, it is possible to manufacture an RFID tag with a simple structure at low cost. Note that the number of dummy pads 25 is not limited to two.

Embodiment 3 FIG.
The structure / manufacturing method of the dielectric substrate 1 in which the ground conductor pattern 8 by injection molding is formed on the other main surface (back surface) will be described with reference to FIGS. In these drawings, the same reference numerals indicate the same or corresponding parts. FIG. 12 is a block diagram for explaining the configuration of the injection mold, FIG. 12 (a) is a plan view of the injection mold, and FIG. 12 (b) is a side view of the injection mold. . 12 (a) and 12 (b), reference numeral 26 denotes an injection mold for manufacturing a dielectric substrate for an RFID tag. Reference numeral 28 denotes an upper mold of the injection mold 26, and 29 denotes a lower mold of the injection mold 26. Reference numeral 27 denotes an injection port for injecting a resin provided in the upper mold 28. 13 is a cross-sectional view of an injection mold, FIG. 13 (a) is a cross-sectional view taken along the line AA ′ shown in FIG. 12 (a), and FIG. 13 (b) is a cross-sectional view of FIG. FIG. 13C is a cross-sectional view taken along the line BB ′ shown in FIG. 12A, and FIG. 13C is a plan view when the upper mold is seen taken along the line XX ′ shown in FIG. FIG. 13D is a plan view when the lower mold is viewed by cutting along the line XX ′ shown in FIG. In FIGS. 13A to 13D, reference numeral 30 denotes a protrusion formed in the recess of the upper mold 28 and corresponding to the shape of the hole 5. Of course, when the upper mold 28 and the lower mold 29 are overlapped with each other, the space formed by the respective recesses and the protrusions 30 is the dielectric substrate 1 necessary for the RFID tag shown in FIG. This corresponds to the shape of the groove 5 formed in the above. Reference numeral 31 denotes a vacuum drawing port provided in the lower mold 29 for evacuating the gas in the injection mold 26. A plurality of vacuum suction ports 31 are provided as shown in FIG.

  14 is a cross-sectional view showing a state when the conductive foil is placed on the lower mold, and FIG. 14 (a) is a cross-sectional view showing a state where the conductive foil is fixed to the lower mold, and FIG. 14 (b). These are sectional drawings which show the state which chemically converted the conductor foil. A conductor foil 32 for a ground conductor pattern is placed on the bottom surface of the concave portion of the lower mold 29. The conductor foil 32 is subjected to a chemical conversion treatment on the surface (surface) opposite to the surface in contact with the vacuum suction port 31 in order to enhance the resin and adhesiveness of the dielectric substrate 1, and fine irregularities are formed on the surface. The formed chemical conversion treatment layer 33 is used. 15 is a cross-sectional view showing a state before the upper mold is overlaid on the lower mold. FIG. 15A is a cross-sectional view taken along line AA ′ shown in FIG. FIG. 15B is a cross-sectional view taken along the line BB ′ shown in FIG. 12A with the conductor foil 32 provided in the lower mold. A grounding conductor pattern 8 on the other main surface (back surface) of the completed dielectric substrate 1 manufactured by injection molding by placing a conductor foil 32 having a size corresponding to the size of the recess (bottom) of the lower mold 29. 14A, a plurality of vacuum pumps 31 are connected by connecting vacuum pumps or suction devices to a plurality of vacuum pumps 31 provided in the lower mold 29, as shown in FIG. Then, vacuuming (suction) is performed with a substantially equal force, and the conductor foil 32 is brought into close contact with the concave portion (bottom) of the lower mold 29 and fixed. In order to fill the inside of the injection mold 26 with the resin by injecting the resin, a vacuum inlet or air vent different from the vacuum inlet for adhering the conductor foil 32 to the lower mold 29 in the injection mold 26 is provided. Create a hole.

  The chemical conversion treatment is generally used for an injection-molded substrate such as forming fine streaks on the surface of the conductor foil 23 or forming a layer on the surface of the conductor foil 23 in order to improve the adhesion to the resin. use. Further, when the degree of adhesion is low only by the chemical conversion treatment, an adhesive sheet similar to the adhesive sheet 9 that bonds the dielectric substrate 1 and the film base 2 is placed on the chemical conversion treated surface of the chemical conversion treatment layer. In addition, it is sufficient for adhesion between the conductor foil 32 and the resin even if the adhesive sheet similar to the adhesive sheet 9 is placed on the surface of the conductor foil 32 opposite to the surface facing the vacuum suction port without performing chemical conversion treatment. If a high degree of adhesion is obtained, there is no need to perform chemical conversion treatment. In addition, the procedure related to FIG. 14A and the procedure related to FIG. 14B may be switched in order (a preparation step of the ground conductor pattern forming step).

  Next, after the chemical conversion treatment is performed on the surface of the conductor foil 32, as shown in FIG. 15, a space inside the injection mold 26 (excluding the openings of the inlet 27 and the vacuum inlet 31) is desired. The upper mold 28 and the lower mold 29 are fixed so that the upper mold 28 and the lower mold 29 are in close contact with each other so that the dielectric substrate 1 is formed. At this time, although not shown, the upper mold 28 and the lower mold 29 are provided with guide pins and guide holes, respectively, and the guide pins are fitted into the guide holes so that the upper mold is fitted. In general, after the positioning of 28 and the lower mold 29 is performed, the mold is clamped and fixed (injection mold clamping process).

  FIG. 16 is a cross-sectional view showing a state where a dielectric substrate is formed by superposing an upper mold on a lower mold and injecting a thermoplastic resin. FIG. 16 (a) is a cross-sectional view of FIG. ) Is a cross-sectional view taken along the line AA ′ shown in FIG. 16, FIG. 16B is a cross-sectional view taken along the line BB ′ shown in FIG. 12A, and 34 is a resin (thermoplastic material). Resin). After the clamping of the injection mold 26 is completed, in FIG. 16, the chemical conversion treatment layer 33 to be the ground conductor pattern 8 is placed on the surface of the recess of the lower mold 29, and the upper mold 28 is placed on the lower mold 29. In a state where the molds are superposed, the thermoplastic resin 34 melted from the injection port 27 is injected into the space between the upper mold 28 and the lower mold 29, that is, the inside of the injection mold 26, and the upper mold is injected. A groove 5 is formed on one main surface of the dielectric substrate 1 corresponding to the 28 protrusions 30. (Dielectric substrate forming step). Further, since the conductor foil 32 having the chemical conversion treatment layer 33 is placed in the recess of the lower mold 29 before the resin 34 is injected, the other main surface of the dielectric substrate 1 is formed simultaneously with the formation of the dielectric substrate 1. A ground conductor pattern 8 is formed on the ground (ground conductor pattern forming step).

  FIG. 17 is a cross-sectional view for explaining the removal of the injection-molded dielectric substrate. FIG. 17A is a cross-sectional view taken along line AA ′ in FIG. 12A when the upper mold is separated from the lower mold. FIG. 17B is a cross-sectional view taken along the line BB ′ in FIG. 12B, and FIG. 17B is an excess resin remaining in the injection port 27. FIG. . After the resin 34 is solidified, the mold clamping of the injection mold 26 is released, and the upper mold 28 and the lower mold 29 are separated as shown in FIG. 26 (dielectric substrate removing step). Further, when the injected resin 34 is injected more than the volume inside the injection mold 26 as shown in FIG. 17A, the resin 34 remaining in the injection port 27 is solidified to form the dielectric substrate 1. Since the surplus resin 35 in the shape of the inner tube of the injection port 27 is formed on one main surface, the surplus resin 35 is separated from the dielectric substrate 1, and the cross section is obstructed from adhering to the dielectric substrate 1 and the film base 2. The surface is polished to such an extent that it does not become (post-processing step). Since the conductor foil 32 (chemical conversion treatment layer 33) is evacuated (sucked) in close contact with the lower mold 29 in the preparation step of the ground conductor pattern forming step, the conductor foil 32 (during injection molding of the resin 34) The chemical conversion treatment layer 33) does not extend, and the ground conductor pattern 8 of the dielectric substrate 1 formed after the resin 34 is solidified can be prevented from being thinned or cut.

  18A is a cross-sectional view of the dielectric substrate formed by the RFID tag manufacturing method according to the third embodiment, taken along the line AA ′ shown in FIG. 12A, and FIG. FIG. 18B is a cross-sectional view of the dielectric substrate taken along the line BB ′ shown in FIG. FIG. 19 is a perspective view of a dielectric substrate formed by the RFID tag manufacturing method according to the third embodiment. The dielectric substrate 1 shown in FIG. 18 and FIG. 19 is manufactured through the above-mentioned preparation process of the ground conductor pattern forming process to the post-processing process, and the manufacturing method (conductor) described in the first embodiment is applied to the dielectric substrate 1. The film substrate 2 manufactured in the layer forming step (can be omitted), the conductor pattern forming step, and the IC chip connecting step) is bonded. The bonding process is the same as the film supporting process and the fixing process of the first embodiment. In addition, a flexible RFID tag using a flexible dielectric substrate can be manufactured by manufacturing the dielectric substrate 1 using the resin 34 with a low hardness (for example, JIS-A55) olefin-based thermoplastic elastomer. Therefore, the RFID tag 10 that can be installed along the curved surface of a curved object such as a drum can can be obtained. The curved surface on which the RFID tag 10 can be installed is such that the electrical connection between the IC chip 6 and the conductor pattern 3 is not disconnected. Even if the conductor pattern 3 is bent, since the electrical length does not change, the radiation pattern is slightly deformed, but the conductor pattern 3 does not hinder the operation of the RFID tag 10 as a radio wave radiation portion.

  In this way, by designing and manufacturing the dielectric substrate 1 by injection molding, a dielectric substrate obtained by injection molding using a resin (thermoplastic resin) 34 on a dielectric substrate obtained by laminating several printed circuit boards together. In addition to significantly lowering the substrate cost (manufacturing cost) of the body substrate, the dielectric (material) of the dielectric substrate used for the RFID tag is polytetrafluoroethylene used for general printed circuit boards. In the case of dielectric materials such as (fluororesin), ceramics, and glass epoxy, it is difficult to fabricate a substrate of any thickness, and it is difficult to flexibly respond to changes in required dimensions depending on the RFID tag installation position. With dielectric substrates, the thickness and shape can be easily changed by simply changing the mold, making it possible to easily produce RFID tags with various variations. . Also, by using an olefin polymer resin with a low dielectric loss tangent among the resins (thermoplastic resins) as a dielectric substrate for RFID tags, radiation efficiency is improved and high-gain RFID tags can be manufactured. It is. In addition, the specific gravity of the olefin polymer resin is about half that of a general printed circuit board, and the RFID tag can be reduced in weight. Further, the IC chip 6 is mounted on a hard and thick material such as a dielectric substrate made of polytetrafluoroethylene (fluorine resin), ceramic, glass epoxy, etc. used in a general printed circuit board. In this case, there is no dedicated equipment for mounting, and it must be mounted one by one, and the formation of the groove portion 5 required for mounting becomes complicated. Many facilities for mounting the IC chip 6 on the substrate 2 are on the market, and mass production is possible at a time, and the manufacturing time and cost including the formation of the groove 5 can be greatly reduced.

It is a block diagram of the RFID tag which concerns on this invention. 1 is a basic configuration diagram of an RFID system. It is a manufacturing process figure of the RFID tag which concerns on this invention. It is a block diagram of the film base material which concerns on this invention. It is a conductor pattern figure formed in the film base material concerning this invention. It is a conductor pattern figure (IC chip connection completed) formed in the film base material which concerns on this invention. It is a dielectric substrate block diagram in which the groove part concerning this invention was formed. It is an electric field diagram of the RFID tag according to the present invention. It is a characteristic impedance figure of the RFID tag which concerns on this invention. It is a block diagram (with a dummy pad) of the RFID tag which concerns on Embodiment 2 of this invention. It is a slot vicinity enlarged view (with a dummy pad) of the RFID tag which concerns on Embodiment 2 of this invention. It is a block diagram of the injection mold which concerns on Embodiment 3 of this invention. It is injection molding metal sectional drawing which concerns on Embodiment 3 of this invention. It is conductor foil mounting drawing to the lower metal mold | die which concerns on Embodiment 3 of this invention. It is a superposition figure of the injection mold concerning Embodiment 3 of this invention. It is an injection mold thermoplastic resin injection figure for dielectric substrates concerning Embodiment 3 of this invention. It is a take-out view of an injection-molded dielectric substrate according to Embodiment 3 of the present invention. It is a dielectric substrate of the RFID tag which concerns on Embodiment 3 of this invention. It is a dielectric substrate of the RFID tag which concerns on Embodiment 3 of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Dielectric substrate, 2 ... Film base material, 3 ... Conductor pattern, 4 ... Slot, 5 ... Groove part, 6 ... IC chip, 7 ... Electrical connection part, 8 ... Grounding conductor pattern, 9 ... Adhesive sheet, 10 ... RFID Tag 11, antenna unit (tag) 12, RFID reader / writer 13, antenna unit (reader / writer) 14 analog unit 15 A / D conversion unit 16 power control unit 17 memory unit 18 DESCRIPTION OF SYMBOLS ... Demodulation part 19 ... Control part 20 ... Modulation part 21 ... Digital part 22 ... D / A conversion part 23 ... Conductor layer 24 ... Connection terminal 25 ... Dummy pad 26 ... Injection mold 27 ... injection port, 28 ... upper mold, 29 ... lower mold, 30 ... projection, 31 ... vacuum inlet, 32 ... conductor foil, 33 ... chemical conversion layer, 34 ... resin (thermoplastic resin), 35 ... excess resin.

Claims (9)

A dielectric substrate having a hole on one main surface, a ground conductor pattern provided on the other main surface of the dielectric substrate, a film base, and a slot provided on the film base. An RFID tag comprising: a conductor pattern; and an IC chip electrically connected to the conductor pattern via the slot and inserted into the hole of the dielectric substrate. A dielectric substrate having a hole on one main surface; a grounding conductor pattern provided on the other main surface of the dielectric substrate; a film base; and an end of the film base provided on the film base. A conductor pattern provided on the inner side of the conductor pattern at a predetermined distance, and a slot is formed inside the conductor pattern, and is electrically connected to the conductor pattern via the slot, and the hole of the dielectric substrate RFID tag comprising an IC chip inserted into the part. A dielectric substrate having a hole on one main surface; a grounding conductor pattern provided on the other main surface of the dielectric substrate; a film base; and an end of the film base provided on the film base. A conductor pattern provided on the inner side of the conductor pattern at a predetermined distance, and a slot formed inside the conductor pattern, and an electrical connection portion extending from both sides of the conductor pattern constituting the slot to the inside of the slot. And an IC chip electrically connected to these electrical connection portions and inserted into the hole portion of the dielectric substrate. A dielectric substrate having a hole on one main surface, a grounding conductor pattern provided on the other main surface of the dielectric substrate, a film base, and a slot formed on the film base. A conductive pattern, an IC chip electrically connected to the conductive pattern through the slot and inserted into the hole of the dielectric substrate, and the IC chip inserted into the hole of the dielectric substrate An RFID tag comprising a fixing means for fixing the conductive pattern of the film base and one main surface of the dielectric substrate. The RFID tag according to claim 1, wherein the dielectric substrate is made of a thermoplastic resin. A hole forming step for forming a hole on one main surface of the dielectric substrate, a ground pattern forming step for forming a ground conductor pattern on the other main surface of the dielectric substrate, and a conductor pattern having a slot on the film substrate A conductor pattern forming step of forming an IC chip, an IC chip connecting step of electrically connecting the IC chip to the conductor pattern through the slot, and after the IC chip connecting step, inserting the IC chip into the hole And a fixing step of fixing the film base material to the dielectric substrate. A space part is formed between the upper mold and the lower mold by superposing a concave part and an upper mold having a protrusion inside the concave part and a lower mold having a concave part to form the space part. A dielectric substrate forming step of injecting a resin of dielectric material into the upper mold and forming a hole in one main surface of the dielectric substrate corresponding to the protrusion of the upper mold, and before the resin injection, A conductor foil is disposed in the concave portion of the side mold to form a grounding conductor pattern on the other main surface of the dielectric substrate simultaneously with the formation of the dielectric substrate, and a slot is formed on the film substrate. A conductor pattern forming step for forming a conductive pattern, an IC chip connecting step for electrically connecting an IC chip to the conductor pattern via the slot, and inserting the IC chip into the hole, Fix the material to the dielectric substrate Method of manufacturing the RFID tag and a fixing step. The RFID tag manufacturing method according to claim 7, wherein an injection port for injecting the resin is provided in the upper mold, and a vacuum drawing port is provided in the lower mold. The RFID tag manufacturing method according to claim 7, wherein the upper surface is subjected to chemical conversion treatment before the conductor foil is disposed in the concave portion of the lower mold.

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