JP2007535178A - Hot electron transistor - Google Patents

Abstract

  The hot electron transistor has an emitter electrode, a base electrode and a collector electrode, and a first tunnel structure disposed between the emitter electrode and the base electrode and functioning as an electron transport layer there. The first tunnel structure includes at least a first amorphous insulator layer and another second insulator layer so that electron transport includes transport by tunneling. The transistor further includes a second tunnel structure disposed between the base electrode and the collector electrode. The second tunnel structure functions as a transport layer by ballistic transport between at least a part of the electrons and between the base electrode and the collector electrode, so that a part of the electrons is collected at the collector electrode. A related method for reducing electron reflection at an interface in a thin film transistor is also disclosed.

Description

  The present invention relates generally to transistors, and more particularly to a transistor based on a tunnel structure and its applications. More specifically, the present invention relates to a thin film transistor based on a tunnel structure and its application.

  A tunnel hot electron transistor amplifier including a metal-insulator-metal-insulator-metal (MIMIMIM) configuration was first proposed by Mead in 1960 (see Non-Patent Document 1). ), And was examined in detail in 1981 by Heiblum (see Non-Patent Document 2). FIG. 1 illustrates a typical MIMIM transistor according to the prior art. In the drawings, similar reference numerals are used for similar components as much as possible throughout the various drawings. Also, the figures are not drawn to scale for clarity.

  FIG. 1 is a partial cross-sectional view of a typical MIMIM transistor 100. The MIMIM transistor 100 comprises alternating single layers of metal and insulator, including an emitter electrode 110, a base electrode 112, a collector electrode 114, an emitter barrier 116, and A collector barrier 118 is included.

  Other investigators have also found similar transistor structures using epitaxially grown metal-insulator structures (see Non-Patent Document 3), III-V group semiconductor structures (see Non-Patent Documents 4 and 5), and ferromagnetic metals (non-Patent Document 3). Research has been conducted using a structure using an insulator (see Patent Document 6) and an insulator (see Non-Patent Document 7).

  In addition, in many circuit applications, it is advantageous to have complementary pairs, with one transistor turning on with a positive base-emitter voltage and the other complementary transistor turning on with a negative base-emitter voltage. It is. In this way, a push-pull type amplifier circuit or switch circuit can be constructed. Examples of such devices include silicon CMOS or bipolar push-pull power amplifiers that use relatively low quiescent power.

A conventional hot hole transistor (see Non-Patent Document 8) has the same MIMIM as the hot electron transistor described above. Device operation is similar, with the exception that holes instead of electrons are charge carriers in the device. However, the prior art hot hole transistors share the same problems as the prior art MIMIM hot electron transistors.
C. A. Mead, “Tunnel-Emission Amplifiers”, Proc. IRE, 1960, 48, p. 359 Mordehai Heiblum, “Tunneling Hot Electron Amplifiers (THETA): Amplifiers Operating Up to the Infrared”, Solid State Elec. 1981, 24, p. 343 S. Murake, M.M. Watanabe, T.A. Suemasu, M .; Asada, “Transistor action of metal (CoSi2) / insulator (CaF2) hot electron transistor structure” Elec. Lett. 1992, 28, p. 1002 M.M. Heiblum, M.M. I. Nathan, D.C. C. Thomas, C.I. M.M. Knoedler, “Direct Observation of Ballistic Transport in GaAs”, Phys. Rev. Lett. 1985, 55, p. 2200 A. Seabaugh, YC. Kao, J .; Rndall, W.M. Frensery, A.M. Khatibzadeh, “Room Temperature Hot Electron Transistors with InAs-Notched Resonant-Tunneling-Diode Injector,” Japan Journal of Appl. Phys. 1991, 30, p. 921 D. Lacour, M.M. Hehn, F.M. Montaigne, H.M. Jakes, P .; Rottlander, G.M. Rodaray, F.M. Ghuyen Van Dau, F.A. Petrol, A.M. Schuhl, “Hot-electron transport in 3-terminal devices based on magnetic tunnel junctions”, Europhysics Letters, 2002, 60, p. 896 S. Sugahara, M .; Tanaka, “Spin-Filter Transistor”, Japan Journal of Applied Physics, 2004, 43, p. L838 M.M. Heiblum, K.M. Seo, H.C. P. Meier, T.W. W. Hickmot, “First Observation of Ballistic Holes in a Type THETA Device”, IEEE Trans. on Electron Devices, 1988, 35, p. 2428

  An object of the present invention is to provide a high-speed thin film device whose performance is improved while solving the problems of the above-described current technology.

  In accordance with one aspect of the present invention, a hot electron transistor adapted to receive at least one input signal is an emitter electrode, a base electrode separated from the emitter electrode, wherein at least a portion of the input signal is an emitter electrode. And the base electrode, whereby electrons are emitted from the emitter electrode toward the base electrode. The transistor also has a first tunnel structure disposed between the emitter electrode and the base electrode and configured to function as an electron transport layer between and to the emitter electrode and the base electrode. The first tunnel structure is disposed directly adjacent to at least the first amorphous insulator layer, and the first amorphous insulator layer, such that the transport of electrons at least partially includes transport by tunneling; And a second insulator layer configured to cooperate therewith. The transistor further includes a collector electrode separated from the base electrode and a second tunnel structure between the base electrode and the collector electrode. The second tunnel structure is configured to function as a transport layer by ballistic transport between at least part of the electrons emitted from the emitter electrode and between the base electrode and the collector electrode, whereby part of the electrons are Collected at the collector electrode. The input signal can include, for example, a bias voltage, a signal voltage, or electromagnetic radiation.

  In another aspect of the transistor, at least a selected one of the base electrode and the collector electrode is at least partially formed of a semimetal. Alternatively, a selected one of the base electrode and the collector electrode is at least partially formed of metal silicide or metal nitride.

  In yet another aspect, the second tunnel structure is configured to exhibit a first value of hot electron reflection and has a shaped barrier energy band characteristic, thereby providing a first hot electron reflection first value. Is lower than the second value of hot electron reflection that would be exhibited by a second tunnel structure having no shaped barrier energy band characteristics. More specifically, the shaped barrier energy band characteristic includes a parabolic slope of the second tunnel structure.

  In another aspect, the transistor is configured to exhibit a first value of electron emission energy width, and the first tunnel structure has a shaped barrier energy band characteristic, thereby reducing the electron emission energy width. The first value is set lower than the second value of the electron emission energy width that would be exhibited by a transistor without shaped barrier energy band characteristics.

  In yet another aspect, the emitter electrode is configured to exhibit a given Fermi level, and the first tunnel structure exhibits a given conduction band that differs from the given Fermi level by less than 2 eV. It is configured.

  According to a further aspect of the invention, a hot hole transistor adapted to receive at least one input signal is an emitter electrode, a base electrode separated from the emitter electrode, wherein at least a portion of the input signal is A base electrode provided between the emitter electrode and the base electrode, whereby holes are emitted from the emitter electrode toward the base electrode. The hot hole transistor is also disposed between the emitter electrode and the base electrode and is configured to function as a hole transport layer between and to the emitter electrode and the base electrode. Have The first tunnel structure is disposed directly adjacent to at least the first amorphous insulator layer and the first amorphous insulator layer such that hole transport at least partially includes tunneling transport. And a second insulator layer configured to cooperate therewith. The transistor is further disposed between the base electrode and the collector electrode, the collector electrode being spaced from the base electrode, and being disposed between the base electrode and the collector electrode, and at least a portion of the hot holes emitted from the emitter electrode. , A second tunnel structure configured to function as a transport layer by ballistic transport, thereby having a second tunnel structure in which part of the holes are collected by the collector electrode. The input signal can include, for example, a bias voltage, a signal voltage, or electromagnetic radiation.

  Another aspect of the invention is a method for use in a hot electron transistor comprising a plurality of layers, comprising a plurality of interfaces defined therebetween and ballistic electrons transported between them. The plurality of layers have at least a first layer and a second layer, the first layer and the second layer being adjacent to each other and defining a first interface therebetween, whereby at least some of the ballistic electrons are first Reflected at the interface. At least a method for reducing the reflection of electrons at the first interface includes the steps of configuring the first layer to exhibit a first selected wave function, and a first proportion of ballistic electrons at the first interface. Configuring the second layer to exhibit a second selected wave function to be reflected. The first rate is less than the second rate of ballistic electrons reflected at the first interface when there is no second layer configured to exhibit the second selected wave function.

  Yet another aspect of the invention is a transistor adapted to receive at least one input signal, the transistor being an emitter electrode, a base electrode separated from the emitter electrode, and at least a portion of the input signal. Is provided between the emitter electrode and the base electrode so that electrons are emitted from the emitter electrode toward the base electrode. The transistor also has a first tunnel structure disposed between the emitter electrode and the base electrode and configured to function as an electron transport layer between and to the emitter electrode and the base electrode. The transistor is further disposed between the base electrode and the collector electrode, the collector electrode being spaced from the base electrode, and disposed between the base electrode and the collector electrode, and at least some of the electrons emitted by the emitter electrode. A second tunnel structure configured to function as a transport layer by ballistic transport, thereby having a second tunnel structure in which a part of electrons can be collected by the collector electrode. The second tunnel structure is configured to exhibit a first value of hot electron reflection and configured to exhibit a selected wave function, whereby a first value of hot electron reflection is selected. Lower than the second value of hot electron reflection that would be exhibited by a second tunnel structure having no wave function.

  Yet another aspect of the invention is a linear amplifier adapted to receive at least one input signal. The linear amplifier includes a hot electron transistor, the hot electron transistor being a first emitter electrode and a first base electrode separated from the first emitter electrode, and at least a first of the input signal. A first base electrode, wherein a portion is provided between the first emitter electrode and the first base electrode, whereby electrons are emitted from the first emitter electrode toward the first base electrode; Have The hot electron transistor is also disposed between the first emitter electrode and the first base electrode and functions as an electron transport layer between and to the first emitter electrode and the first base electrode. A first tunnel structure configured as described above. The first tunnel structure is disposed directly adjacent to at least the first amorphous insulator layer and the first amorphous insulator layer such that the transport of electrons at least partially includes transport by tunneling; And a second insulator layer configured to cooperate therewith. The hot electron transistor is further disposed between the first collector electrode separated from the first base electrode and between the first base electrode and the first collector electrode and emitted from the first emitter electrode. A second tunnel structure configured to function as a transport layer by ballistic transport between at least a portion of the electrons between the first base electrode and the first collector electrode, whereby a portion of the electrons Has a second tunnel structure that can be collected by the first collector electrode. The linear amplifier also includes a hot hole transistor, the hot hole transistor being a second emitter electrode and a second base electrode separated from the second emitter electrode, and at least a second of the input signal. Is provided between the second emitter electrode and the second base electrode, whereby holes are emitted from the second emitter electrode toward the second base electrode. It has a base electrode. The hot hole transistor is also disposed between the second emitter electrode and the second base electrode and functions as a hole transport layer between and to the second emitter electrode and the second base electrode. A third tunnel structure configured to do so. The third tunnel structure is disposed directly adjacent to at least the third amorphous insulator layer and the third amorphous insulator layer so that hole transport at least partially includes tunneling transport. And a fourth insulator layer configured to cooperate therewith. The hot hole transistor is further disposed between the second collector electrode separated from the second base electrode, and between the second base electrode and the second collector electrode, and emitted from the second emitter electrode. A fourth tunnel structure configured to function as a transport layer by ballistic transport between the second base electrode and the second collector electrode of at least a part of the hot holes, whereby It has a fourth tunnel structure, part of which can be collected by the second collector electrode. In the linear amplifier, the hot electron transistor and the hot hole transistor are configured in a push-pull amplifier configuration.

  The present invention will be described with reference to the drawings. In the drawings, certain elements are not drawn to scale for clarity. Also, descriptive terms such as vertical and horizontal used in the various drawings are for illustrative purposes only and are not intended to limit the practical orientation of the structures and devices described.

  The following description is provided in the context of a patent application and its requirements that enable one of ordinary skill in the art to practice the invention. Various modifications to the described embodiments will be apparent to those skilled in the art, and the generic principles described herein may be applied to other embodiments. Thus, the present invention is not limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features described herein.

  Although MIMIM thin film transistor structures have been studied since around 1960, no commercially useful devices have been demonstrated by anyone to date. Recent developments in the status of material processing and understanding, device manufacturing, and device modeling techniques are good for the realization of well-controlled MIMIM thin film transistors and the understanding of their operation. It contributes to the direction. In addition, the innovation created by the applicant of the present invention allows further development of conventional MIMIM thin film transistors, as will be described in detail below.

  The improvement of the tunnel hot electron transistor will be described.

  In this disclosure, a major innovation to the thin film hot electron transistor structure is described, which distinguishes the device according to the present invention from conventional unsuccessful devices and makes the device according to the present invention a feasible thin film transistor. Is. In addition, some possible facilitating techniques are described.

  The use of a double insulator (ie, I-I) structure for a thin film metal-insulator structure is described in detail, for example, in US Pat. No. 6,534,784 (hereinafter referred to as the 784 patent). This patent is assigned to the present applicant and is incorporated herein by reference. Inclusion of an I-I configuration in the emitter barrier solves at least two problems. First, the I-I structure results in a tunnel junction having significantly greater nonlinearity than a single insulator tunnel junction, resulting in higher differentials with lower DC bias (high efficiency and low noise). Electrical conductivity (high speed) can be obtained. In addition, if charge accumulation at the insulator-insulator interface is avoided, the emitter-base capacitance can also be reduced by using two insulator layers. Second, the energy distribution of hot electrons emitted to the base is much narrower than that due to a single insulator tunnel junction, resulting in increased current gain.

  US Pat. No. 6,563,185 (hereinafter referred to as the 185 patent) includes a structure including a multi-layer tunnel structure as one or both of the I layers of the MIMIM transistor of FIG. A junction transistor is disclosed. This patent is assigned to the present applicant and is incorporated herein by reference. That is, in the case of a junction transistor, the emitter barrier 116 and / or the collector barrier 118 includes a multilayer tunnel structure. As known to those skilled in the art, a junction transistor uses a bias voltage or bias current from an external bias source (not shown) to set the operating point of the transistor and the power driving the output. These external bias sources are configured, for example, to apply a voltage as a base-emitter junction potential and / or a collector-emitter junction potential in a common emitter configuration. For example, the bias source may be used to apply a voltage between the emitter and base electrode to control the potential in the emitter barrier 116 and thus the tunneling probability of electrons from the emitter electrode 110 to the base electrode 112. Once emitted, the electrons tunnel through the emitter barrier 116, base electrode 112, collector barrier 118, and eventually to the collector electrode 114 with a given collection efficiency. Collection efficiency is a function of the percentage of electrons that tunnel unimpeded through the base electrode 112. The tunnel probability is determined by the voltage applied to the base and other material properties.

FIG. 2 shows an example of such a junction transistor including a double insulator structure in the emitter barrier. This N-I-I-N-N (generally N is a non-insulator layer, I is an insulator layer) transistor is an improvement over the conventional MIMIM tunnel hot electron transistor structure. And
The energy band diagram is shown in FIG. In the N-I-I-N-I-N transistor, the emitter tunnel junction injects hot electrons into the base. The electrons travel through a thin metal base by ballistic transport. Ballistic transport is understood to be movement (eg, of electrons) with a speed that is not subject to scattering, which is greater than the equilibrium thermal motion speed. In contrast, resonant tunneling is the movement of electrons through a quasi-stationary energy level.

  If the injected electrons have sufficient energy to overcome the collector barrier, they will travel through the ballistic path and reach the collector metal. On the other hand, the relatively cold electrons in the base that control the base-emitter potential do not have enough energy to overcome the collector barrier. The current gain of the transistor is determined by the ratio of the hot electron current from the emitter to the collector to the base current. As disclosed in the previous 185 and 784 patents, the N layer can be a variety of materials such as, but not limited to, metals, semi-metals, metal silicides and metal nitrides. May be formed.

  With continued reference to FIG. 2, an energy band diagram 200 corresponding to the NI-IN-IN hot-electron transistor structure is illustrated. The energy band diagram 200 has an x-axis 202 (representing the thickness t of the thin film stack) and a y-axis 204 (representing energy E). The various parts of the energy band diagram 200 of the NI-IN-IN-N hot electron transistor structure correspond to the emitter electrode 210, the base electrode 212, the collector electrode 214, the emitter barrier structure 216, and the collector barrier structure 218. ing. The emitter barrier structure 216 includes a first insulator layer 216A and a second insulator layer 216B. That is, the emitter electrode 210, the base electrode 212, and the collector electrode 214 correspond to the “N” layer of the NI-INN-IN hot electron transistor structure, and the first insulator layer of the emitter barrier structure 216. 216A and second insulator layer 216B and collector barrier structure 218 correspond to the "I" layer of the NI-IN-IN hot electron transistor structure. A bias voltage (not shown) applied between the emitter electrode 210 and the base electrode 212 generates ballistic electrons 220 from the emitter electrode 210. The electron energy distribution 221 of the ballistic electrons 220 is represented by a curve having a peak centered around the energy level 222 represented by an arrow. By using a double insulator structure (ie, first insulator layer 216A and second insulator layer 216B) in the transistor structure represented by energy band diagram 200, for example, a narrow peak in electron energy distribution 221 is achieved. A width is provided, thereby improving the efficiency of the transistor.

Further, semi-metallic materials, metal silicides or metal nitrides may be used to form one or both of the base electrode and the collector electrode. For example, metal silicides such as cobalt silicide (CoSi ₂ ) and tungsten silicide (WSi ₂ ) are semi-metallic in that conductivity and carrier concentration are between those of metal and semiconductor. Semimetals exhibit a trade-off between high conductivity and high current gain.

  Another important thing that can help improve the properties of thin film transistors is the shaping of one or both of the emitter and collector barriers. The barrier can be shaped by controlling the slope of the electronic properties of the thin film on one or both sides so that electrons traveling through the transistor element encounter a shaped energy band. For example, the formation of the barrier may be realized by changing factors such as composition, electron affinity, charge neutral level, electron mass and dielectric constant when forming the barrier. The curved collector barrier suppresses hot electron reflection at the interface between the electrode and the barrier, for example. The shaped emitter barrier also provides a narrower emission of electrons from the emitter electrode to the base electrode.

  Yet another improvement to thin film transistors is to use a low barrier for one or both of the emitter and collector barriers. By using a low barrier, both high conductivity (high speed) and low scattering of hot electrons (high gain) are obtained, as opposed to the high barrier used in conventional thin film transistors.

The NI-IN-IN transistor according to the present invention has various advantages over the prior art. N-I-I-N-N transistors are thin film devices that can be formed without the use of semiconductors and epitaxy. For example, N-I-I-N-I-N transistors can be formed entirely on metal and insulators (ie, as M-I-I-M-I-M structures so that they can be formed on a variety of substrates. ) May be formed. The temperature of the deposition and processing of N-I-IN-IN transistors is lowered to be compatible with a substrate that cannot withstand high temperature processing, such as a flexible polymer substrate. N-I-I-N-N is a high-speed device, and its cut-off frequency (f _T ) can extend to the terahertz region.

  4A and 4B show a NI-INN-IN tunnel hot electron transistor structure according to the present invention. FIG. 4A shows an energy band diagram 400 corresponding to an improved NINN INN tunnel hot electron transistor according to the present invention. The energy band diagram 400 includes the energy band levels of the emitter electrode 410, the base electrode 412, the collector electrode structure 414, the emitter barrier structure 416 and the collector barrier structure 418. The emitter barrier structure has a double insulator structure including a first insulator layer 416A and a second insulator layer 416B. The base electrode 412 is made of metal silicide. Further, the collector electrode structure 414 includes a metal silicide layer 414A and a metal layer 414B. FIG. 4B shows a partial elevation view of the NI-IN-IN tunnel hot electron transistor 450 (and equivalent circuit diagram) corresponding to the energy band diagram.

  The NI-INNN tunnel hot electron transistor represented by the energy band diagram 400 of FIG. 4A and the elevation view of FIG. 4B provides various improvements over the prior art provided by the present invention. It is to be embodied. Various factors contribute to the improvement included in the N-I-I-N-I-N transistor.

Compared to a semiconductor transistor, the responsiveness of the transistor structure of FIG. 4B is faster due to: 1) shorter carrier transport time due to thin film and active junction region; 2) up to and within the device The use of a metallic or semi-metallic conductive layer, in particular, reduces the series resistance in the thin base layer and especially at frequencies above several hundred gigahertz; 3) high differential conductivity N Using an -I-I-N emitter structure results in low emitter resistance and high transimpedance gain; and 4) using low dielectric constant substrate material reduces substrate parasitic capacitance. Since the film included in the N-I-I-N-I-N transistor is thin, the tunnel time passing through the emitter barrier is about 1 femtosecond. Furthermore, ballistic transport of hot electrons across the base electrode 412 (approximately 10 nm thick) and the collector barrier structure 418 (approximately 8 nm thick) is on the order of 0.1 picosecond or less. In the transistors shown in FIGS. 4A and 4B, a high conductivity metal lead extends all the way to the junction, thereby significantly reducing parasitic resistance and high maximum oscillation compared to semiconductor devices. A frequency (f _max ) is provided. Further, it is known that the electrical conductivity at a high frequency of a specific material is limited by the plasma frequency of the material. The plasma frequency of the semiconductor is about 1 THz at the maximum, but the plasma frequency of the metal is in the ultraviolet region. As a result, the high-frequency conductivity of the electrode layer of the NI-INN transistor is higher than that of the semiconductor device. It will be much higher. In addition, the use of a double insulator structure for the emitter barrier allows a high differential conductivity for a high transconductance gain at a relatively low DC bias current, thereby obtaining a high cutoff frequency f _T (2 Details of the heavy insulator structure are disclosed, for example, in the aforementioned 784 patent). Further, it is known that a generally used semiconductor substrate exhibits a high dielectric constant. However, since N-I-N-I-N transistors are compatible with various substrates, N-I-I -N-I-N transistors can be fabricated on low dielectric constant substrates, thus minimizing parasitic capacitance.

  Compared to conventional MIMIM and other hot electron transistors, the transistor of FIG. 4A incorporates several improvements in current gain performance. First, the shaped features of the collector barrier portion of the energy band diagram 400 help reduce the reflection of electrons at the base electrode-collector barrier-collector electrode structure interface. In addition, the semi-metallic base and collector layers (labeled in FIG. 4A as metal silicide layers) also reduce the reflection of electrons at these interfaces compared to normal metal layers. Second, the M-I-I-M tunnel emitter exhibits a higher differential conductivity and a narrow energy spread of the emitted electrons than a simple M-I-M emitter structure. Third, the low barrier height between the Fermi energy level of the metal and the conduction band edge of the insulator reduces electron reflection and elastic electron scattering. The details of the above-mentioned improvement factors will be described soon.

  The development of improved thin film transistors has led to some important recognition by the applicant. Specifically, the Applicant has recognized and fully analyzed the physics of gain limiting processes in thin film transistors based on the combination of non-insulator and insulator layers, and strategies to overcome these gain limiting mechanisms. It was. It has been recognized that the current gain of hot electron transistors has the following four mechanisms: 1) hot electron scattering at the base electrode; 2) base-collector leakage current; 3) energy distribution of injected hot electrons. And 4) quantum mechanical reflection at the electrode-barrier interface.

  Each of these four mechanisms will be described with reference to FIGS. FIG. 5 includes the components of the energy band diagram 200 of the NI-IN-IN hot-transistor transistor shown in FIG. 2 along with the four gain limiting mechanisms described above. The gain limiting mechanism shown in FIG. 5 includes a hot electron scattering effect 505 at the base (represented by a downward arrow and a box number 1), a base-collector leakage current 510 (a horizontal arrow and a box number 2). At the electrode-barrier interface, and the energy distribution spread 520 of the injected hot electrons (represented by the arrow pair on each side of the electron energy distribution curve 221 and the box number 3). Quantum mechanical reflections (represented by curved arrows and box number 4).

  Hot electron scattering 505 at the base electrode is elastic scattering due to electron-electron interaction and electron-phonon interaction. Such elastic scattering reduces the number of hot electrons that have sufficient energy to overcome the collector barrier. As is known, the scattering probability increases rapidly with increasing electron energy above the Fermi level.

This hot electron scattering problem is caused by low tunnels such as niobium (Nb) -niobium pentoxide (Nb ₂ O ₅ ), tantalum (Ta) -titanium oxide (TiO ₂ ), and Ta-tantalum oxide (Ta ₂ O ₅ ). This can be solved by using a barrier (eg, less than 2 eV) and using a semi-metallic base electrode such as a metal silicide. The conventional MIMIM structure uses a high barrier oxide such as aluminum oxide (Nb ₂ O ₅ ), for example, which significantly limited the current gain unless completely cooled. . The probability that injected hot electrons traverse the base electrode ballistically without being scattered is given by the base transport coefficient α _B :

ここで、ｘ_Ｂはベース電極の厚さ、Ｌ_Ｂはベース電極を形成する材料における平均自由工程（単位はｎｍ／ｅＶ^２）であり、そしてＶ_ｅはフェルミ準位より高いホットエレクトロン・エネルギーである。金属におけるＬ_Ｂの典型値は２０ｎｍ／ｅＶ^２程度である。故に、例えば、１０ｎｍのベース電極を横断する０．３ｅＶのホットエレクトロンは、およそα_Ｂ〜０．１４のベース輸送係数を有することになる。本出願人は半金属におけるホットエレクトロン散乱長に関する如何なる公表データも認識していないが、半金属における自由電子濃度（およそ１０^２２ｃｍ^−３）は金属と比較して低いため、半金属の散乱長は従来の金属におけるそれよりも長いものであると考えられる。半金属における電子−フォノン散乱率及び欠陥散乱率は検討されておらず、先述の効果は更なる実験的検討により定量化されるべきである。

Where x _B is the thickness of the base electrode, L _B is the mean free path in the material forming the base electrode (unit is nm / eV ² ), and V _e is the hot electron energy higher than the Fermi level. is there. Typical values of _{L B} in the metal is about 20 nm / eV ^2. Thus, for example, a 0.3 eV hot electron traversing a 10 nm base electrode will have a base transport coefficient of approximately [alpha] _{B to} 0.14. Although the Applicant is not aware of any published data on hot electron scattering lengths in metalloids, the free metal concentration in metalloids (approximately 10 ²² cm ⁻³ ) is low compared to metals, so that Is considered to be longer than that of conventional metals. The electron-phonon scattering rate and defect scattering rate in semimetals have not been studied, and the effects described above should be quantified by further experimental investigation.

  The second, base-collector leakage current 510 (or dark current) problem is when cold electrons in the base electrode tunnel through the collector barrier to the collector electrode if the collector barrier energy band height is too low. This is due to the fact that there is, and vice versa. This extraneous tunnel current constitutes a base-collector leakage current and reduces the current gain of the transistor.

  The problem of base-collector leakage current can be solved by appropriately selecting the height, width and shape of the energy band of the collector barrier. The choice of collector barrier energy band height is a trade-off between reducing hot electron scattering (requires low barrier height) and reducing base-collector tunnel current (requires high barrier height). . Applicants have used a device model and have found that a collector barrier having an energy band height in the range of 0.3 eV to 0.8 eV provides an excellent tradeoff between these two competing factors. Also, the problem of base-collector leakage current can naturally be mitigated by using a lower collector barrier energy band height, as previously described with reference to the hot electron scattering problem. This is because the quantum mechanical image force can be increased by using a low dielectric constant material.

Similarly, the choice of collector barrier energy band thickness is a trade-off between device speed and leakage current. Thicker barriers result in lower leakage current, but ballistic electron transport time across the barrier will increase. That is, it takes longer time for hot electrons traveling at a ballistic velocity between 10 ⁷ and 10 ⁸ cm / s to cross the 20 nm barrier than to cross the 5 nm barrier. A further problem is when ballistic electrons scatter and become thermal kinetics down to the conduction band edge of the barrier. Since the barriers used in devices according to the present invention generally comprise amorphous material, the mobility of electronic conduction (ie drift and diffusion) is very low. Thus, the time for a given electron to reach the collector electrode will increase significantly if the electron is in thermal motion. Therefore, the thickness of the barrier should be selected to minimize the probability of collision due to thermal kinetics.

  Furthermore, the energy band shape of the collector barrier has a great influence on the passing probability of hot electrons. Similarly, since the effective barrier energy band height is approximately equal to the average value of the barrier energy band height, the barrier energy band shape affects the base-collector leakage current. Therefore, leakage current should also be considered in selecting an appropriate barrier energy band shape for the passage of hot electrons. This point will be described in detail in the appropriate place below.

  A third problem with the energy distribution spread 520 of injected hot electrons is due to the fact that electrons tunneling through the emitter barrier do not have unique energy. That is, the electrons emerging from the emitter barrier are hot electrons having a spread of energy. Very hot (ie, high energy) electrons have a much greater elastic scattering probability, while relatively cold (ie, low energy) electrons have a low collector barrier passage probability, thus reducing transistor gain. Result.

  Hot electron energy spread can be resolved by including a double insulator structure in the emitter barrier. Details of the various double insulator structures are described in the aforementioned 784 and 185 patents. FIG. 6A illustrates narrowing the distribution of emitted electrons, where the theoretical hot electron distribution from a single insulator emitter is compared to that of an emitter containing a double insulator structure. FIG. 6A shows a comparison of the energy distribution of hot electrons injected from a single insulator M-I-M emitter and a double insulator M-I-I-M emitter. FIG. 6A has a composite graph 600 that includes a first graph 601A and a second graph 601B. The top of the graph 600 has a first x-axis 602A corresponding to distance and a y-axis 604A corresponding to energy for a single insulator MIM emitter energy band diagram 610A. The y-axis 604A and the second x-axis 615A corresponding to the current are axes for the current-energy distribution curve 620A. Similarly, the lower portion of the graph 600 has a first x-axis 602B corresponding to distance and a y-axis 604B corresponding to energy for the double insulator M-I-I-M emitter energy band diagram 610B. ing. A current-energy distribution curve 620B is shown on the y-axis 604B and the second x-axis 615B. As can be seen by comparing current-energy distribution curves 620A and 620B, the double insulator structure of the emitter produces a much narrower current / energy distribution peak. The narrow distribution of hot electrons from the emitter containing the double insulator structure results in an increase in current gain.

  With continued reference to FIG. 6A, the narrow electron distribution due to the emitter including the double insulator structure is one of the N-I-I-N-I-N transistors, such as frequency multipliers and short pulse generators. It can also be useful in some non-traditional applications. The NI-IN diode structure provides the additional benefit of low current with reverse bias, which can be useful in switching applications. Low current characteristics at reverse bias can be further promoted by using a thin rugged emitter metal. The thin rugged emitter metal can be formed, for example, by sputtering at a high voltage and a low cathode voltage. FIG. 6B shows an example of such an uneven collector electrode, and the illustrated transistor 650 has a double insulator emitter barrier (first insulator layer 654 and second insulator layer 656). ) And the collector electrode 658 is shown as having stepped irregularities on the side away from the collector barrier 118.

  The fourth, hot electron quantum mechanical reflection 530 problem at the non-insulator-insulator interface, is the most challenged problem to solve among the four gain limiting mechanisms. According to Non-Patent Document 11, the oscillation transmission of hot electrons is experimentally observed in a palladium (Pd) -silicon dioxide (SiO2) -silicon (Si) structure. Applicants have generally recognized that suppression of the quantum mechanical reflection problem requires a reduction in the contrast of the wave function across the thin film transistor device. Applicants propose a two-pillar approach to solve this important problem, as will be explained in detail shortly thereafter.

The first approach is the contrast of the wave function between the base and collector electrodes and the collector barrier, ie the conduction band edge of the electrode (below the Fermi level by EeV) and that of the insulator (top of the collector barrier). Is based on the use of semi-metallic base and collector electrodes in order to minimize the energy difference between. For example, typical metals such as aluminum and copper have a conductor edge about 10 eV below the Fermi level. For example, certain other metals such as niobium and silver have conductor edges about 5 eV below the Fermi level, so these metals are more preferred for use in the transistor of the present invention. Furthermore, since metal silicide has a carrier concentration of approximately 10 ²² cm ⁻³ , extrapolating this information, it is estimated that metal silicide has a conduction band depth of only 1 eV to 2 eV.

  FIG. 7 shows the influence of the conduction band depth on the hot electron passage rate T (E). FIG. 7 is a composite graph 700 combining hot electron pass rate curves calculated for various conduction band depth values. The inset illustrates the model used for the calculation, ie, a square barrier 710 with the first electrode 720 and the second electrode 740 on the sides. In this calculation, it is assumed that the barrier has a thickness of 4 nm and an energy band height of 0.77 eV. It is assumed that the Fermi energy of the electrode is at E = 0 eV. The numbers given in the legend correspond to the conduction band depth (Ec, unit is eV) below the Fermi level of the electrode. From FIG. 7, it can be seen that by reducing the conduction band depth from 1 eV to 2 eV, the reflection of electrons observed as the vibration depth in the figure is reduced to an acceptable value.

A further advantage of using metal silicides for the electrodes is that they are compatible with standard integrated circuit processes. The tradeoff for using semi-metallic base and collector materials rather than conventional metals is an increase in base electrode resistance. Increasing the base electrode resistance decreases the maximum transmission frequency f _max of the transistor given by:

ここで、ｆ_Ｔはトランジスタの遮断周波数（エミッタ接合容量とバイアス状態でのエミッタ微分抵抗とで決定される）、Ｒ_Ｂは小信号ベース信号であり、Ｃ_Ｃはコレクタ接合容量である。半金属性ベース電極を用いる場合、ベース電極として半金属のより厚い層を用いること、及び／又は例えばタングステン等の高導電率金属の薄い層を付加することによりベース抵抗は低減され得る。しかしながら、何れの方法もトランジスタの利得を幾分低下させるものである。なぜなら、それらはベース電極内で散乱されるホットエレクトロンを増加させる傾向にあるとともに、従来の金属と半金属層との界面はホットエレクトロンを付加的に反射するからである。

Here, f _T cut-off frequency of the transistor (as determined by the emitter differential resistance at the emitter junction capacitance and bias state), R _B is a small signal base signal, C _C is the collector junction capacitance. When using a semi-metallic base electrode, the base resistance can be reduced by using a thicker layer of semi-metal as the base electrode and / or by adding a thin layer of a high conductivity metal such as tungsten. However, both methods somewhat reduce the transistor gain. This is because they tend to increase hot electrons scattered in the base electrode and the conventional metal-metalloid interface additionally reflects hot electrons.

In this regard, transistor operation can be limited to operation at one of the oscillation peaks as shown in FIG. In addition, ferromagnetic insulators and / or metals may be used in conjunction with the emitter or collector region to enhance hot electron collection and differential resistance R _S and provide electromagnetic feedback. The differential resistance _RS is a resistance at a bias point as viewed from an input, for example, the oscillation voltage Vcos (wt).

  The multi-layer metal approach may be further improved to create a quarter-wave anti-reflection layer between the conventional metal layer of the base electrode and the collector barrier. Furthermore, if the thickness of the semi-metallic layer and the conduction band depth are selected so that the interference effect of the three layers has a tendency to zero hot electron reflection at a certain energy, the transistor's accordingly The gain can be increased.

A second approach to reducing quantum mechanical reflection is based on utilizing the slope of the collector barrier energy band. For example, a “shaped” barrier can be obtained by changing the composition of the barrier rather than physical shaping of the oxide conductor edge. The tilt-controlled energy band, for example, gradually changes the collector oxide from a low barrier material to a high barrier material and again to a low barrier material (eg, Nb ₂ O ₅ -Nb _2x Ta _2-2x O ₅ -ta ₂ O ₅₎ may be implemented by Rukoto. Although this approach has been successfully applied to III-V semiconductor transistor structures, the applicant has never seen or applied this approach to non-semiconductor transistor technology.

  FIG. 8, in conjunction with FIG. 7, compares the gradient effects of different types of collector barriers. As shown in the inset of FIG. 7, the composite graph 700 represents the hot electron pass rate curves calculated for square barriers of various conduction band depths. FIG. 8 shows a composite graph 800 that combines hot electron pass curves calculated for parabolic barriers with various conduction band depth values. The inset illustrates the model used for the calculation, ie, a parabolic barrier 810 with the first electrode 820 and the second electrode 840 on the sides. In FIG. 8, as shown in the legend, the pass rate of the square barrier energy band is compared with that of the parabolic barrier energy band. FIG. 8 shows that the parabolic slope of the collector barrier significantly reduces hot electron reflection compared to the square collector barrier case.

  FIG. 9 compares the effects of differently tilted collector barriers. In FIG. 9, as shown in the legend, the pass rates of electrons passing through structures containing square, parabolic, semiparabolic, circular, semicircular, linearly inclined, and semilinearly inclined barrier energy bands are compared. ing. An example of a rectangular barrier structure is shown, for example, in the inset of FIG. 7, a parabolic barrier energy band is shown in the inset of FIG. 8, and a rounded structure is shown in FIG. 4A. FIG. 9 includes a graph showing tunnel probability as a function of electron energy for various collector barrier shapes. A conductor offset of 0 eV and a barrier height of 0.4 eV are assumed. The notation “half” assumes that only the leading edge (ie, base electrode side) edge of the collector barrier is formed. From FIG. 9, it can be seen that tilting one side of the collector barrier energy band suppresses vibration, but tilting both sides of the collector barrier energy band causes a significant reduction in quantum mechanical reflection. Ideally, hot electron reflection is most significantly suppressed by tilting the conduction band edge of the barrier energy band from the metal conduction band edge to the maximum barrier energy band height and then back to the minimum height. . The closest approach in actual device manufacturing is to tilt the energy band of the barrier material from the lowest possible energy.

  As explained in the section on reducing base-collector leakage current, the quantum mechanical reflection of hot electrons is naturally mitigated by using a lower barrier energy band. This effect is due to the quantum mechanical image force that can be enhanced by using, for example, an insulator with a low dielectric constant. The use of insulators with similar electron affinity but different dielectric constants can also contribute to the adjustment of the conduction band slope or field of the entire thin film transistor structure.

  Hot electron quantum mechanical reflection can be further reduced by incorporating an insulator with an electron-tunnel mass close to one. Using such materials results in reducing the base-collector dark current while reducing the vibration depth of the tunnel probability and at the same time increasing the vibration frequency, thereby increasing the average tunnel probability over the entire energy range. It becomes.

  More broadly, the applicant's general consideration in the manufacture of efficient and fast thin film transistor devices is to consider wave function matching across the thin film layer group as ballistic electrons traverse the device. I came to realize that there was. In other words, by selecting appropriate materials and manufacturing techniques in forming the various thin film layers, the manipulation of the wave function of each thin film layer and the electron reflection at the interface between each layer can be adjusted as desired. . For example, because a particular material is used in a thin film transistor structure, it can be selected because the material exhibits the desired dielectric properties or chemical composition of the layer. The wave function of a given thin film layer can, for example, tilt the composition of that layer (eg, to achieve a parabolic energy band shape), or apply or generate a magnetic field (eg, in the case of a ferromagnet). Or by adding a surface texture to the layer. Similarly, by providing a double insulator structure, for example in the emitter barrier, a narrower distribution of emitted electrons (ie, electrons closer to monochromatic energy) can be realized in the transistor. The recognition that adjustment of certain characteristics of thin film transistors, such as electron energy distribution width and electron reflection at the interface, can be manipulated by considering wave function matching is significant for thin film transistor prior art. Progress. Also, Fermi level pinning and trap distribution at the base electrode-collector barrier interface and the collector barrier-collector electrode interface can be used to help minimize conduction band discontinuities.

  As a supplement to the tunnel hot electron transistor according to the present invention described above, a thin film tunnel transistor based on hot hole transport will be described in detail.

  FIG. 3 shows an energy band diagram of the MIMIM hot hole transistor. Compared to the hot electron transistor shown in FIG. 2, the energy band is reversed. That is, the barrier height for the tunneling holes is the energy difference between the Fermi energy of the metal and the valence band edge of the insulator.

  With continued reference to FIG. 3, an energy band diagram 300 corresponding to a NINN-IN hot transistor structure is illustrated. Various portions of the energy band diagram 300 include the emitter electrode 310, the base electrode 312, the collector electrode 314, the emitter barrier structure 316 and the collector barrier structure 318 that form an NINN hot hole transistor. It corresponds to various layers. Hot holes 320 are emitted from the emitter electrode, overcome the collector barrier, and are collected at the collector electrode.

  In order to realize the above device as illustrated in FIG. 3, the difference between the work function of the metal and the electron affinity of the insulator is the difference between the band gap of the insulator plus the electron affinity and the work function of the metal. Should be made larger. Alternatively, an external control technique may be used to suppress electron tunneling.

  In accordance with the technique of the present invention, several improvements to the basic MIMIM hot hole transistor (as illustrated in FIG. 3) can be realized. For example, incorporating a double insulator structure in the emitter barrier produces the same effect as described above with reference to hot electron transistors. In addition, a double insulator structure may also be included in the collector barrier, which can help reduce base-collector leakage current and increase hot hole transmission. Further, tilting the collector barrier energy band reduces hot hole reflection at the non-insulator-insulator interface. Also, hot hole reflections can be minimized by proper selection of base and collector electrode materials, as in hot electron devices.

  The main difference between hot electron devices and hot hole devices is that in hot electron devices, electrons tunnel from the conduction band of the metal to the conduction band of the insulator. In the case of hot holes, the holes tunnel from the conduction band of the metal to the valence band of the collector barrier.

  Subsequently, two methods for manufacturing a thin film transistor according to the present invention, namely, 1) a stack process and 2) a planar process will be described.

  The first method, called the stack process, involves depositing the entire MIxMxIxM transistor stack in a single vacuum deposition system. As noted above, the “M” layer referred to herein may be any suitable non-insulator, including, for example, a metal or a bond between a metal and a non-metal. The layers can be deposited by a variety of conventional methods such as, but not limited to, thermal evaporation, sputtering, chemical vapor deposition, and atomic layer epitaxy. Cluster means may be used to perform various depositions in separate chambers without exposing the structure to the atmosphere. The laminate process is believed to be the most controllable in layer thickness, composition and cleanliness. Laminate processes can be subdivided into two areas: materials and processing. The material challenge is to deposit the stack, optionally using various deposition methods to create the desired electronic interface. The processing challenge is a development process that allows patterning and making contacts to the desired layer that may be embedded in the middle layer of the stack. If it is ensured that the area to be cut is resistant to intermediate processing, it may be possible to divide the transistor product or stack into multiple stacks.

  The layer group of the most basic form stack includes emitter metal, emitter-base oxide, base metal, base-collector oxide, collector metal. Since the top surface of the collector metal is exposed to the atmosphere after deposition, a milling process is performed in-situ in a subsequent process in order to remove a natural oxide film or contamination formed on the top of the collector metal. Unless used in situ), an oxidation resistant material such as NbN should be used to cover the collector metal. The base metal must be made thin with respect to the hot electron mean free path (approximately 100 nm, depending on the electron energy and the base metal). The base metal must also be a “dug out” of the stack, so that the base metal is brought into contact with an external circuit. An etch stop layer may be incorporated to facilitate the scraping process to the base layer. Furthermore, the base layer must not be oxidized when exposed. This can be achieved by incorporating a cap layer (eg, NbN). A thin (approximately 1 to 5 nm) emitter oxide may incorporate multiple adjacent oxides (or metals) to facilitate the emission of a single energy electron beam. Thick (and 4 to 20 nm) collector oxide may incorporate multiple adjacent oxides or silicides to reduce the reflection of emitted hot electrons while minimizing base-collector bias current. . Note that although the emitter, base, and collector are all described as metals, they may be metalloids, silicides, semiconductors, superconductors, or superlattices. Similarly, the emitter-base oxide and collector-base oxide need not be limited to conventional oxides.

  The manufacturing process described below utilizes single stack deposition, reactive ion etching RIE, and lift-off techniques to form a patterned metal layer. Patterned metal layers can also be formed by chemical etching, reactive ion etching, scraping and other techniques. Various substrates can be used to fabricate MIxMxIxM transistors, and silicon substrates are used in the processes described below. 10A-10X outline a typical device manufacturing process as follows.

  1. Thorough substrate cleaning, eg using standard SPM, SC1, BOE, SC2 sequences.

  2. Thermal oxidation of substrates less than 1 μm to provide electrical isolation between MIxMxIxM transistors and silicon substrates.

3. Emitter contact pad formation (for electrical connection to the device):
a. Lithography to define contact pad shape:
i. Undercoat liquid (HMDS) is spin-coated at 6000 rpm for 30 seconds,
ii. Spin coating the resist at 6000 rpm for 30 seconds (time and spin speed depends on the specific resist used),
iii. Pre-bake the resist layer on a hot plate at 110 ° C. for 60 seconds (time and temperature depend on the specific resist used),
iv. Expose the resist layer for 18 seconds (exposure time depends on the specific resist used and the resist thickness),
v. Develop the resist layer with developer (4: 1 DI water to developer) for a predetermined time (development time depends on the particular resist and developer used),
vi. Rinse the developer with DI water.
vii. O ₂ plasma cleaning to clean resist openings;
b. Thermal vapor deposition of a bonding layer that functions as a scratch-proof metal. This allows the device to be probed electrically;
c. Thermal evaporation of a contact layer (35 nm gold) which prevents contact oxidation and promotes ohmic contact to the emitter layer of the stack;
d. Lift-off to remove excess material:
i. Lift off with acetone on a low speed spinner,
ii. Ultrasonic bath with acetone (if necessary to enhance lift-off),
iii. Lift off with acetone on spinner,
iv. Wash with isopropyl alcohol on the spinner,
v. Spin dry;
Depending on the desired size of the transistor and the lithographic performance, this step may be divided into multiple steps. For example, large interconnects may be patterned using standard optical lithography and connections from transistors to these interconnects may be formed using electron beam lithography.

  4). Deposition of MIxMxIxM transistor stack. The transistor stack may be deposited on the entire wafer or on a specific area of the wafer defined by the lift-off process. The laminate shown below presents an example of a laminate that is deposited by a single vacuum deposition means.

a. Nb emitter metal (80 nm)-selected for emitter-base oxide barrier properties, ability to RIE in CF ₄ / O ₂ , edge oxide formation capability, and excellent adhesion to emitter contacts . This metal is deposited, for example, by direct sputtering.

b. Nb ₂ O ₅ / Ta ₂ O ₅ Emitter—Base Oxide (2 nm / 2 nm) —This II structure provides narrow-width emission electrons, RIE etching capability in CF ₄ / O ₂ , and ease of reactive sputtering. Bring.

c. Nb / NbN / Cr / Nb base metal (3 nm / 1 nm / 3 nm / 3 nm) —this base metal incorporates Nb on the outer edge, barrier properties of the emitter-base oxide and base-collector oxide, It is selected for its ability to cut RIE within CF ₄ / O ₂ and the ability to form edge oxides. A Cr layer functioning as an RIE etch stop layer is disposed in the base metal, allowing the RIE etch to stop exactly on the base metal and allowing the edges to be easily oxidized. NbN provides an oxidation resistant contact for the base electrode after Cr is removed. This metal is deposited, for example, by direct sputtering. The nitride can be formed by nitrogen plasma, reactive sputtering or direct sputtering.

d. Nb ₂ O ₅ base-collector oxide (10 nm) —allows passage of hot electrons arriving from the emitter while reducing base-collector current due to bias applied or generated across the collector oxide Therefore, a low and wide collector oxide is used. Changing the oxide composition to obtain a non-steep metal-oxide interface is preferred to reduce the reflection of hot electrons impinging on the barrier. This oxide is deposited, for example, by reactive sputtering.

e. Nb / NbN collector metal (20 nm / 1 nm)-The collector metal has barrier properties with the collector oxide, RIE cutting ability in CF ₄ / O ₂ , and good compatibility with NbN, which is a stable nitride Selected. This metal is deposited, for example, by direct sputtering. The nitride can be formed by plasma, reactive sputtering or direct sputtering.

5). Collector-Defining Metal Deposition—The collector-defining metal is used to provide a mask for the RIE etch and itself defines the size of the collector-base side of the transistor. A lift-off process using Cr / Au (5 nm / 35 nm) can be used. Au is resilient to RIE etching and provides excellent electrical contact to the transistor and external probe / pad. A 50: 1 H ₂ O: HF dip can be used to remove any oxide that may be generated on top of the NbN in the pretreatment step.

6). Collector-base RIE-cutting—The transistor stack is etched down to the Cr etch stop layer in the base metal using a CF ₄ / O ₂ RIE system.

  7). Etch Stop Layer Removal—Using dry or wet chemical etching, the Cr metal etch stop layer in the base not protected by the collector-base structure is removed, exposing the base NbN layer.

  8). Emitter-defined metal deposition-Aluminum is deposited on the stack (including the collector portion) using a lift-off technique to define the emitter-base size. Al functions as an etching mask.

  9. RIE etching of the emitter-base portion of the stack.

  10. Edge Oxidation-Emitter and base metal edges can now be oxidized for protection and passivation. This can be accomplished by oxide deposition or the use of oxygen plasma.

  11. Removal of Al Etching Mask—The Al etching mask is easily removed using AZ400K.

12. A base contact metal is deposited using a lift-off process. Cr / Au (5 nm / 180 nm) is deposited on top of the exposed base NbN. A 50: 1 H ₂ O: HF dip can be used to remove any oxide that may be generated on top of the NbN in the pretreatment step. This process may also include a collector metal contact that extends the collector contact to an external circuit or probe pad.

  The resulting structure places the emitter at the bottom of the stack and the collector at the top of the stack. This is not inevitable and the emitter and collector arrangement may be reversed. Depending on the deposition technique used, a certain order may be advantageous.

  A second fabrication method, called the planar process, involves fabricating the rest of the transistor structure after patterning the base contacts and collector or emitter contacts on the substrate. The advantage of this method is that it is not necessary to etch down to a thin base metal, resulting in a process with fewer steps. The disadvantage of this method is that the deposition of the MIMIM stack is divided into two stages, so that one interface of the transistor structure is exposed to the surrounding atmosphere, thereby causing this interface and possibly the native oxide on the exposed surface. It can be contaminated. 11A-11I outline the following typical device manufacturing process.

1. 1. Surface cleaning of silicon (or polysilicon) substrate 2. Patterning of base and collector (or emitter) electrode metal on silicon surface. 3. Wafer annealing for diffusing electrode metal into silicon and forming metal silicide. 4. Wafer etching to remove remaining metal while leaving conductive silicide wiring on silicon surface. 5. Deposition and patterning of collector oxide on the surface above the collector electrode 6. Pattern base and collector contacts (typically gold) to the sides of the transistor structure. 7. Deposition of base metal / emitter oxide / emitter metal stack onto the surface. 8. Patterning of the etching mask underlying the base electrode directly above the transistor junction 9. Etch away remaining stack, leaving base-oxide-emitter stack just above collector and across base electrode. 10. Removal of etching mask 11. Patterning a thick emitter contact layer (typically gold) centered above the collector contact Etch remaining emitter metal to emitter oxide using emitter contact layer as mask.

  Subsequently, some uses of the metal-insulator thin film transistor will be described. In addition to normal applications as linear amplifiers, oscillators or switches, some aspects of hot electron / hot hole transistors that may be useful in new applications are rather described.

1. Linear Amplifier / Oscillator The obvious use of these transistors is a linear amplifier. FIG. 12A shows an equivalent circuit diagram of a linear amplifier 1200 including a hot electron transistor according to the present invention and a hot hole transistor according to the present invention in a push-pull configuration. This can be useful as a power amplifier, a low noise amplifier or an oscillator in a high frequency circuit. A push-pull amplifier configuration can be realized using both hot electron devices and hot hole devices. Because these devices are thin films and very fast, they have been integrated with, for example, flexible electronics, low loss or microwave circuits on flexible substrates, and silicon CMOS or III-V optoelectronics Applications can be found in hybrid circuits.

2. SPDT switch An interesting feature of hot electron (Hole) transistors is that they have a non-zero turn-on voltage because the emitted electrons must have sufficient energy to overcome the collector barrier. Since most emitted electrons have an energy approximately equal to that of the base-emitter voltage, the turn-on threshold is approximately equal to this barrier height. Therefore, most of the emitter current flows to the collector contact at a base-emitter voltage greater than the threshold, but at a base-emitter voltage less than the threshold, the emitter current cannot flow across the collector barrier and flows out to the base contact. Thus, the hot electron transistor functions as a single-pole double-throw (SPDT) switch. FIG. 12B shows an equivalent circuit diagram of an example of such a device, and FIGS. 12C and 12D show energy band diagrams for different switching states.

3. Negative Differential Resistance Amplifier / Oscillator As described above, the emitter current is switched from the base to the collector as the base-emitter voltage increases. As the current begins to switch, the result is a negative differential resistance between the base and the emitter. As is well known, negative differential resistance (NDR) can be utilized for amplification and oscillation. FIG. 12E shows an equivalent circuit diagram of such a device.

4). Multivibrator The concept of multivibrator is derived from the SPDT concept described above. With appropriate feedback from the collector to the base, the transistor can be caused to oscillate output current between the base and the collector with the emitter as the common electrode. FIG. 12F shows an equivalent circuit diagram of such a device. For simplicity, the bias circuit is not shown in FIG. 12F.

5). Nonlinear Amplifier / Pulse Generator As noted above, hot electron transistors have a turn-on threshold when the emitted electrons have sufficient energy to overcome the collector barrier. Typically, it is desired that the linear amplifier has a uniform gain response and that the transistor must be fully biased with a voltage above the threshold. However, sometimes nonlinear gains encounter useful applications. One such application is for short pulse generators.

When the transistor is biased at the turn-on threshold (described above), the current gain goes from zero to its maximum value and the transistor response is very non-linear. The oscillating input voltage between the base and emitter then creates a series of short current spikes at the collector output. This is because the gain is highest for input voltages above the threshold and zero for voltages below the threshold. If this current spike sequence is converted to a low voltage swing signal and fed back to the nonlinear amplifier at the appropriate voltage level, the resulting output spike becomes even narrower. Here, an appropriate voltage level means that the swing of the input signal must not exceed the gain saturation point of the transistor, otherwise the signal spike will not be narrowed. The limit at which the output spike can be narrowed is equal to 1 / (2πf _max ) and can be as short as 100 fs depending on the base resistance for today's MIMIM transistor structures. The ultimate limit is 1 / (2πf _T ).

6). Frequency multiplier In a linear amplifier, for uniform gain response, the effect of oscillatory quantum mechanical reflection at the collector barrier is sought to be minimized. However, in certain applications, such as frequency multiplication, it may be desirable to take advantage of such sharp changes in gain. In this case, it is impossible to reduce the gain oscillation due to the quantum mechanical reflection of hot electrons. When the input base-emitter voltage is swept across one or more of these oscillations, an output signal at a multiple of the input frequency is generated. Therefore, when an oscillation input voltage having a voltage fluctuation sufficiently equal to one period of gain oscillation is applied, the output signal has a frequency twice the input frequency. If the input voltage is swept across two gain oscillations, the output will be four times the input frequency.

  FIG. 12G shows an equivalent circuit diagram of a common emitter 1400 based on these principles. The common emitter 1400 operates as an NDK amplifier when based on the NDR region. Whether it is a linear or non-linear application depends on the operating point of the transistor. The common emitter 1400 also operates as a frequency multiplier by properly selecting the transistor design. A common collector configuration or a common base configuration is possible as well. A separate group of parts may include RF transmission line elements. A matching circuit may be placed in front of the load and / or may follow the signal source. Furthermore, filter amplifiers and / or cascade amplifiers are possible. Also, as an IR (infrared) (or terahertz or microwave) detector, the device can operate by using such an input.

  FIG. 12H shows an equivalent circuit diagram of an oscillator with a varactor diode (so that the oscillation is voltage controlled). Various configurations are possible, such as series, Colpitts, Hartley, clap, common emitter, base or collector.

7). Nonlinear Rectifier / Mixer with Gain Similar to the application described above, a relatively sharp turn-on response of the transistor can be utilized to provide high nonlinearity for rectification and mixing applications. The transistor should be biased at the turn-on threshold and the input signal should be between base and emitter. The output signal is a collector current. The “sharpness” of turn-on nonlinearity, and thus the efficiency of rectification or mixing, is greatly limited by the width of the hot electron distribution from the emitter. In this case, the MIIM emitter structure is more advantageous than the MIM emitter. The base-collector bias voltage also affects non-linearity, and the higher the voltage (the collector is positive with respect to the base), the sharper the turn-on.

  The transistor adds power gain to the signal thanks to the bias voltage.

  A further advantage of this rectifier / mixer device over conventional two-terminal diodes is that the input and output impedances can be different and adjusted to match the impedance of a particular source and load. As an example, there is a case where an input is coupled to a 200Ω antenna as a signal source and a 50Ω transmission line is driven as a load.

  Also, gain oscillation due to quantum mechanical reflection at the collector may be utilized to provide non-linearity. Biasing the transistor with a falling peak in gain will result in a negative differential resistance.

  FIG. 12I shows an equivalent circuit diagram of the mixer 1500 based on such a principle. The mixer 1500 has input matching and output matching. One significant advantage provided by mixer 1500 over a diode mixer is gain.

8). Infrared detector with gain This application is similar to the matching / mixer application described above, except that photon-assisted tunneling is expected to dominate over classical rectification for infrared input signals That is. Thus, the base-emitter voltage can be reduced below the turn-on threshold by as much as the photon energy. The lower the bias, the lower the base-emitter diode has a lower DC bias current and hence lower shot noise. Again, the signal power gain is determined by the ratio of the base-collector bias voltage to the base-emitter bias voltage.

  Although each embodiment has been illustrated with various components each having a particular orientation, the present invention takes various specific configurations with various components arranged in various positions and directions. Getting is to be understood. Further, the methods described herein can be subjected to an unlimited number of changes. For example, by forming the above-described transistor device on a flexible substrate, it can be used that the transistor device according to the present invention has good compatibility with a low-temperature substrate. Other modifications include, but are not limited to, an MIMIMIM emitter structure in the transistor, an MIIM emitter / collector structure in the transistor, N -MN base electrode, use of multiple insulator layers for collector barrier, application of various matching / filter / bias configurations, various logic circuits based on the above switches (eg NAND, NOR, inverter, etc.) ) And connection of the antenna as input / output to various applications. Also, a thin metal may be used in the collector barrier so that a voltage can be applied in the collector barrier and to adjust the conduction band shape of the barrier by applying an external voltage. FIG. 13 shows an example of such a configuration and includes an energy band diagram for a transistor configuration with a three-layer collector barrier 1602. The three-layer collector barrier 1602 includes a first insulator layer 1604, a metal layer 1606, and a second insulator layer 1608. By applying an external voltage (not shown) to the metal layer 1606, the overall shape of the energy band of the collector barrier 1602 can be adjusted as desired. This technique of using a thin metal can also provide further shaping control of the conduction band of the barrier when applied in the normal direction of the conduction direction. The presented examples are therefore to be regarded as illustrative rather than restrictive, and the invention is not limited to the details given herein, but can be varied within the scope of the appended claims It is.

  Roughly summarized, this specification discloses the following. The hot electron transistor has an emitter electrode, a base electrode and a collector electrode, and a first tunnel structure disposed between the emitter electrode and the base electrode and functioning as an electron transport layer there. The first tunnel structure includes at least a first amorphous insulator layer and another second insulator layer so that electron transport includes transport by tunneling. The transistor further includes a second tunnel structure disposed between the base electrode and the collector electrode. The second tunnel structure functions as a transport layer by ballistic transport between at least a part of the electrons and the base electrode and the collector electrode, so that the part of the electrons is collected at the collector electrode. A related method for reducing electron reflection at an interface in a thin film transistor is also disclosed.

  More broadly summarized, the present specification discloses a transistor adapted to receive at least one input signal, the transistor being an emitter electrode, a base electrode separated from the emitter electrode; At least a portion of the input signal is provided between the emitter electrode and the base electrode, whereby electrons are emitted from the emitter electrode toward the base electrode, the emitter electrode and the base A first tunnel structure arranged between the emitter electrode and the base electrode and configured to function as an electron transport layer to and from the emitter electrode and the base electrode. A first tunnel structure including at least a first amorphous layer so as to include at least partly; A collector electrode spaced from the source electrode; and between the base electrode and the collector electrode, disposed between the base electrode and the collector electrode and at least a portion of the electrons emitted by the emitter electrode; A second tunnel structure configured to function as a transport layer by ballistic transport, thereby having the second tunnel structure in which the part of the electrons can be collected by the collector electrode.

FIG. 6 is a partial cross-sectional view showing a junction transistor element disclosed in US Pat. It is an energy band figure corresponding to the hot electron transistor which concerns on this invention. It is an energy band figure corresponding to the hot hole transistor which concerns on this invention. It is an energy band figure corresponding to other one Embodiment of the hot electron transistor which concerns on this invention. It is the figure which superimposed the equivalent circuit diagram on the hot electron transistor partial elevation which concerns on this invention. FIG. 4 is an energy band diagram corresponding to one embodiment of a hot electron transistor according to the present invention, illustrating various gain limiting mechanisms to be solved to obtain a practical device. In order to contrast the influence of the inclusion of a double insulator structure on the electron energy distribution of electrons emitted from the emitter barrier, the two energy band diagrams are compared. 1 is a partial cross-sectional view showing a transistor element according to the present invention having an emitter barrier with a double insulator structure and an uneven collector electrode. FIG. 5 is a composite graph for illustrating the difference in tunnel probability as a function of electron energy for square collector barriers having various conduction band depths ranging from 0.5 eV to 10 eV. 6 is a composite graph to illustrate the difference in tunnel probability as a function of electron energy for parabolic and square (“SQ”) collector barriers with various conduction band depths ranging from 0 eV to 2 eV. 6 is a composite graph for illustrating the difference in tunnel probability as a function of electron energy for various collector barrier geometries assuming a 0 eV conduction band offset at a barrier height of 0.4 eV. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view which shows the process included in the laminated body process for manufacturing one Embodiment of the hot electron transistor which concerns on this invention. It is a fragmentary sectional view showing the process included in the plane process for manufacturing other one embodiment of the hot electron transistor concerning the present invention. It is a fragmentary sectional view showing the process included in the plane process for manufacturing other one embodiment of the hot electron transistor concerning the present invention. It is a fragmentary sectional view showing the process included in the plane process for manufacturing other one embodiment of the hot electron transistor concerning the present invention. It is a fragmentary sectional view showing the process included in the plane process for manufacturing other one embodiment of the hot electron transistor concerning the present invention. It is a fragmentary sectional view showing the process included in the plane process for manufacturing other one embodiment of the hot electron transistor concerning the present invention. It is a fragmentary sectional view showing the process included in the plane process for manufacturing other one embodiment of the hot electron transistor concerning the present invention. It is a fragmentary sectional view showing the process included in the plane process for manufacturing other one embodiment of the hot electron transistor concerning the present invention. It is a fragmentary sectional view showing the process included in the plane process for manufacturing other one embodiment of the hot electron transistor concerning the present invention. It is a fragmentary sectional view showing the process included in the plane process for manufacturing other one embodiment of the hot electron transistor concerning the present invention. 1 is an equivalent circuit diagram of a linear amplifier based on a hot electron transistor and a hot hole transistor according to the present invention. FIG. FIG. 3 is an equivalent circuit diagram of a switch based on a hot electron transistor according to the present invention. FIG. 12D is an energy band diagram illustrating the operation in one state of the switch of FIG. 12B. FIG. 12D is an energy band diagram illustrating an operation in another state of the switch of FIG. 12B. 1 is an equivalent circuit diagram of an oscillator with a negative differential resistance (NDR) based on a hot electron transistor according to the present invention. FIG. FIG. 3 is an equivalent circuit diagram of a multivibrator based on a hot electron transistor according to the present invention. 2 is an equivalent circuit diagram of a positively biased common emitter based on a hot electron transistor according to the present invention. FIG. FIG. 4 is an equivalent circuit diagram of an oscillator including a varactor diode (for oscillation voltage control) based on a hot electron transistor according to the present invention. FIG. 3 is an equivalent circuit diagram of a mixer having input matching and output matching based on a hot electron transistor according to the present invention. It is an energy band figure which illustrates combined use with a double insulator structure and the metal layer structure in a collector barrier.

Claims (13)

A hot electron transistor adapted to receive at least one input signal, comprising:
An emitter electrode;
A base electrode spaced from the emitter electrode, wherein at least a portion of the input signal is provided between the emitter electrode and the base electrode, whereby electrons are emitted from the emitter electrode toward the base electrode; Base electrode;
A first tunnel structure disposed between the emitter electrode and the base electrode and configured to function as an electron transport layer between and to the emitter electrode and the base electrode, At least a first amorphous insulator layer, and arranged to be directly adjacent to and cooperating with the first amorphous insulator layer, such that the transport includes at least partially transport by tunneling A first tunnel structure comprising a patterned second insulator layer;
A collector electrode separated from the base electrode; and at least a portion of electrons emitted from the emitter electrode, disposed between the base electrode and the collector electrode, between the base electrode and the collector electrode A second tunnel structure configured to function as a transport layer by ballistic transport, whereby the part of the electrons can be collected by the collector electrode;
Having a transistor.   The transistor of claim 1, wherein at least a selected one of the base electrode and the collector electrode is at least partially formed of a semimetal.   The transistor of claim 1, wherein at least a selected one of the base electrode and the collector electrode is at least partially formed of metal silicide.   The transistor of claim 1, wherein at least a selected one of the base electrode and the collector electrode is at least partially formed of a metal nitride.   The second tunnel structure is configured to exhibit a first value of hot electron reflection and has a shaped barrier energy band characteristic, whereby the first value of hot electron reflection is shaped. 2. The transistor of claim 1, wherein the transistor is lower than a second value of hot electron reflection exhibited by the second tunnel structure having no barrier energy band characteristics.   6. The transistor of claim 5, wherein the shaped barrier energy band characteristic includes a parabolic slope of the second tunnel structure.   The emitter electrode is configured to exhibit a given Fermi level and the first tunnel structure is configured to exhibit a given conduction band that differs from the given Fermi level by less than 2 eV. However, the transistor according to claim 1. A transistor adapted to receive at least one input signal, comprising:
An emitter electrode;
A base electrode spaced from the emitter electrode, wherein at least a portion of the input signal is provided between the emitter electrode and the base electrode, whereby electrons are emitted from the emitter electrode toward the base electrode; Base electrode;
A first tunnel structure disposed between the emitter electrode and the base electrode and configured to function as an electron transport layer between and to the emitter electrode and the base electrode, A first tunnel structure including at least a first amorphous layer such that the transport includes at least partially transport by tunneling;
A collector electrode spaced from the base electrode; and at least some of the electrons disposed between the base electrode and the collector electrode and emitted by the emitter electrode between the base electrode and the collector electrode A second tunnel structure configured to function as a transport layer by ballistic transport, whereby the part of the electrons can be collected by the collector electrode;
Have
The second tunnel structure is configured to exhibit a first value of hot electron reflection and has a shaped barrier energy band characteristic, whereby the first value of hot electron reflection is shaped. The transistor being lower than the second value of hot electron reflection exhibited by the second tunnel structure having no barrier energy band characteristics.   9. The transistor of claim 8, wherein the shaped barrier energy band characteristic includes a parabolic slope of the second tunnel structure. A hot electron transistor comprising a plurality of layers, comprising a plurality of interfaces defined between them and ballistic electrons transported between them, wherein the plurality of layers have at least a first layer and a second layer. The first and second layers are adjacent to each other and define a first interface therebetween, whereby at least a portion of the ballistic electrons are reflected at the first interface. A method for reducing the reflection of electrons at least at the first interface in a transistor comprising:
Configuring the first layer to exhibit a first selected wave function; and a second selected wave function such that a first proportion of the ballistic electrons are reflected at the first interface. Configuring the second layer to show:
Have
The first ratio is greater than the second ratio of the ballistic electrons reflected at the first interface in the absence of the second layer configured to exhibit the second selected wave function. Smaller way.   11. The method of claim 10, wherein the second layer exhibits a given energy band structure, and the step of constructing the second layer includes tilting the energy band structure into a particular shape.   11. The method of claim 10, wherein the second layer has at least one plane and the step of constructing the second layer includes adding surface texture to the plane. A linear amplifier adapted to receive at least one input signal:
Hot electron transistor:
A first emitter electrode;
A first base electrode separated from the first emitter electrode, wherein at least a first portion of the input signal is provided between the first emitter electrode and the first base electrode, thereby A first base electrode from which electrons are emitted from the first emitter electrode toward the first base electrode;
Arranged between the first emitter electrode and the first base electrode and configured to function as an electron transport layer between and to the first emitter electrode and the first base electrode The first amorphous insulator layer, and at least partially adjacent to the first amorphous insulator layer, such that electron transport at least partially includes tunneling transport. A first tunnel structure comprising a second insulator layer disposed and configured to cooperate with
A first collector electrode separated from the first base electrode; and at least of electrons emitted from the first emitter electrode, disposed between the first base electrode and the first collector electrode. A second tunnel structure configured to act as a transport layer by ballistic transport between a portion of the first base electrode and the first collector electrode, whereby the one of the electrons A second tunnel structure in which a portion is enabled to be collected by the first collector electrode;
A hot electron transistor having: and a hot hole transistor:
A second emitter electrode,
A second base electrode separated from the second emitter electrode, wherein at least a second portion of the input signal is provided between the second emitter electrode and the second base electrode, thereby A second base electrode in which holes are emitted from the second emitter electrode toward the second base electrode;
Arranged between the second emitter electrode and the second base electrode so as to function as a hole transport layer between and to the second emitter electrode and the second base electrode A third tunnel structure configured, wherein at least a third amorphous insulator layer and directly to the third amorphous insulator layer so that hole transport at least partially includes tunneling transport; A third tunnel structure including a fourth insulator layer disposed adjacent and configured to cooperate therewith;
A second collector electrode separated from the second base electrode; and a hole disposed between the second base electrode and the second collector electrode, the holes emitted from the second emitter electrode A fourth tunnel structure configured to function as a transport layer by ballistic transport between at least a portion of the second base electrode and the second collector electrode, whereby the holes; A fourth tunnel structure in which the portion is collected by the second collector electrode;
A hot hole transistor having:
Have
A linear amplifier in which the hot electron transistor and the hot hole transistor are configured in a push-pull amplifier configuration.

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