JP2007318645A - Subtraction circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that subtraction processing has been performed after converting each current signal to a voltage signal, in a subtraction circuit of a pickup device in the conventional technology; that the first operational amplifier 5 and the second operational amplifier 6 are required for converting voltages of the first photoelectric current IP1, and the second photoelectric current IP2, respectively; and that, therefore, a large layout area has been required for the subtraction circuit. <P>SOLUTION: The subtraction circuit of the pickup device forms a subtraction signal by reversing a predetermined photoelectric current using a current mirror, and can perform subtraction processing with a current signal as is. Accordingly, only one amplifier is sufficient for voltage conversion regardless of the number of light receiving elements. Therefore, a layout area necessary for a subtraction circuit can be reduced. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a subtracting circuit, and more particularly to a subtracting circuit used in a pickup device.

  In general, the pickup device has not only a function of reading data from an optical disc but also a function of detecting an error in the track direction. An error signal based on the error in the track direction is output as a difference in the amount of light received by each light receiving element when a light spot is incident on the plurality of light receiving elements. For example, as shown in FIG. 3 (a), when the light spot 4 is uniformly incident on the first light receiving element 1 and the second light receiving element 2, the received light amount of each light receiving element becomes equal, resulting in an error. No signal is detected. On the other hand, as shown in FIG. 3B or FIG. 3C, when the incident position of the light spot 4 is shifted, the amount of light received by the first light receiving element 1 and the second light receiving element 2 is shifted. There is a difference between the two, and this difference is output as an error signal.

  FIG. 4 is a block diagram of a subtracting circuit that outputs the difference between the amounts of light received by the two light receiving elements. In the subtraction circuit according to the prior art, a photocurrent is output as a current signal from each light receiving element. Each photocurrent is subjected to voltage conversion and then subjected to signal processing in a voltage mode. Hereinafter, the subtraction circuit according to the prior art will be described in detail.

  First, the first light receiving element 1 and the second light receiving element 2 output a first photocurrent IP1 and a second photocurrent IP2, respectively, according to the amount of received light. As such a light receiving element, for example, a photodiode is used.

  Next, the first photocurrent IP1 and the second photocurrent IP2 are converted into the first voltage signal VP1 and the second voltage signal VP2 by the first operational amplifier 5 and the second operational amplifier 6, respectively. The The gains of the first voltage signal VP1 and the second voltage signal VP2 are set by a feedback resistor R2 of the first operational amplifier 5 and a feedback resistor R3 of the second operational amplifier 6, respectively.

  Next, the voltage signal VP1 is input to the non-inverting input of the third operational amplifier 7. The voltage signal VP2 is input to the inverting input of the third operational amplifier 7. That is, in the third operational amplifier 7, since the first voltage signal VP1 is input to the non-inverting input, it is signal-processed as an addition signal, and the second voltage signal VP2 is input to the inverting input, and is subtracted. Signal processing is performed as a signal. As a result of such signal processing, the third operational amplifier 7 outputs an error signal based on the difference in the amount of light received by the first light receiving element 1 and the second light receiving element 2.

As related technical literatures, for example, the following patent literatures can be cited.
JP-A-7-147023 JP-A-11-340925

  As described above, in the subtraction circuit according to the prior art, the subtraction process is performed after the current signal is converted into the voltage signal. Therefore, in order to convert the first photocurrent IP1 and the second photocurrent IP2 into voltage signals, the first operational amplifier 5 and the second operational amplifier 6 are required.

  Further, the number of light receiving elements necessary for error detection is not limited to two, and more light receiving elements may be used. In this case, the layout area occupied by the subtraction circuit is further increased.

  However, the recent demand for low power consumption and low cost has been increasing, and it has been necessary to reduce the number of elements constituting the subtraction circuit according to the prior art.

  In view of the above, the subtraction circuit according to the present invention includes a first light receiving element, a second light receiving element, an inversion circuit that inverts a photocurrent output from the second light receiving element, and the first light receiving element. A difference current between a first current output from the first light receiving element and a second current output from the inversion circuit, which is synthesized at a connection point between the output of the element and the output of the inversion circuit, And an operational amplifier for converting to voltage.

  The inversion circuit includes a current mirror.

  The gain of the operational amplifier is set according to a feedback resistance of the operational amplifier.

  In the subtraction circuit according to the present invention, since the subtraction signal is formed using the inverting circuit, the subtraction processing can be performed without converting the voltage signal. For this reason, voltage conversion requires only the subtracted current, and the number of operational amplifiers can be reduced.

  Further, by providing the inverting circuit with a mirror circuit, the number of elements required for the inverting circuit can be reduced.

  Moreover, since the gain of the operational amplifier can be set according to the feedback resistance of the operational amplifier, the gain of the operational amplifier can be easily changed according to the order.

  Hereinafter, a subtraction circuit according to the present invention will be described in detail with reference to the drawings.

  FIG. 1 shows a block diagram of a subtraction circuit according to the present invention. In the subtraction circuit according to the present invention, a photocurrent is output as a current signal from each light receiving element. Each photocurrent is converted into a voltage signal after being signal-processed as it is. Hereinafter, the subtraction circuit according to the present invention will be specifically described.

  First, the first light receiving element 1 and the second light receiving element 2 output a first photocurrent IP11 and a second photocurrent IP2, respectively, according to the amount of received light. As such a light receiving element, for example, a photodiode is used.

  Next, the second photocurrent IP2 is inverted by a current mirror including a transistor Q1 and a transistor Q2.

  That is, the first photocurrent IP1 functions as an addition signal, and the second photocurrent IP2 functions as a subtraction signal. Then, the addition signal and the subtraction signal are subtracted with the current signal as it is.

  Next, the subtracted sum signal IP3 is input to the inverting input of the voltage conversion amplifier 3 and converted into a voltage signal. That is, the voltage conversion amplifier 3 outputs a voltage signal V1 corresponding to the difference in the amount of received light between the first light receiving element 1 and the second light receiving element 2.

  Here, the gain of the voltage conversion amplifier 3 is set by the feedback resistor R 1 of the voltage conversion amplifier 3. Hereinafter, voltage conversion of the sum signal IP3 will be described in detail.

  FIG. 2 is a circuit diagram specifically showing the voltage conversion amplifier 3 in the subtraction circuit. In such a circuit diagram, the transistor Q3 corresponds to the non-inverting input of the voltage conversion amplifier 3, and the transistor Q4 corresponds to the inverting input of the voltage conversion amplifier 3. A resistor R1 in FIG. 2 corresponds to the feedback resistor R1 of the voltage conversion amplifier 3 in FIG.

  This circuit operates so that the base voltage (reference voltage Vref) applied to the transistor Q3 is equal to the base voltage applied to the transistor Q4.

  That is, when the base voltage of the transistor Q4 becomes higher than the base voltage (reference voltage Vref) of the transistor Q3, the transistor Q3 and the transistor Q4 are differentially connected, so that the collector current of the transistor Q3 decreases. As a result, the collector current of the transistor Q4 increases. Then, the output current of the current mirror circuit composed of the transistors Q5 and Q6 decreases. For this reason, the base current of the transistor Q7 forming the emitter follower circuit decreases. Here, since the transistor Q7 amplifies the base current, the emitter current of the transistor Q7 also decreases due to the decrease in the base current. The emitter current of the transistor Q7 is fed back to the base of the transistor Q4 via the feedback resistor R1. That is, the feedback current is voltage-converted by the feedback resistor R1, and the base voltage of the transistor Q4 decreases due to the decrease in the emitter current of the transistor Q7. Therefore, when the base voltage of the transistor Q4 becomes higher than the base voltage (reference voltage Vref) of the transistor Q3, the base voltage of the transistor Q4 tends to decrease. Similarly, when the base voltage of the transistor Q4 is lower than the base voltage (reference voltage Vref) of the transistor Q3, the base voltage of the transistor Q4 tends to increase.

  That is, as described above, negative feedback is applied to the base of the transistor Q4, so that the circuit of FIG. 2 is in an equilibrium state, and the base voltage of the transistor Q4 is equal to the base voltage (reference voltage Vref) of the transistor Q3. Will be equal.

  Therefore, when no light is incident on the first light receiving element 1 and the second light receiving element 2, the reference voltage Vref is output from the output terminal OUT of the voltage conversion amplifier 3.

  On the other hand, when the first light receiving element 1 is irradiated with light, the first photocurrent IP1 is output. Further, when the second light receiving element 2 is irradiated with light, the second photocurrent IP2 is output. The sum signal IP3 of the first photocurrent IP1 and the second photocurrent IP2 inverted by the current mirror composed of the transistor Q1 and the transistor Q2 is the base of the transistor Q4 and the feedback Applied between the resistor R1. Here, as described above, the base voltage of the transistor Q4 is suppressed to be constant (reference voltage Vref). Accordingly, the sum signal IP3 flows through the feedback resistor R1 and is converted into the voltage signal V1. That is, the gain of the voltage conversion amplifier 3 is determined by the feedback resistor R1.

  As described above, in the subtraction circuit according to the present invention, since a predetermined photocurrent is inverted using the current mirror to obtain a subtraction signal, the subtraction process can be performed with the current signal as it is. Therefore, it is sufficient to install one amplifier necessary for voltage conversion regardless of the number of light receiving elements. For this reason, the layout area required for the subtraction circuit can be reduced.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiment but by the scope of claims for patent, and all modifications within the meaning and scope equivalent to the scope of claims for patent are included.

  For example, in the subtraction circuit according to this embodiment, the case where there are two light receiving elements has been described, but the present invention can be applied regardless of the number of light receiving elements. In this case, a light receiving element that outputs a subtraction signal may be connected via a current mirror.

The block diagram of the subtraction circuit which concerns on embodiment of this invention is shown. The circuit diagram of the subtraction circuit which concerns on embodiment of this invention is shown. The top view for demonstrating the use of a subtraction circuit is shown. The block diagram of the subtraction circuit which concerns on a prior art is shown.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 1st light receiving element 2 2nd light receiving element 3 Voltage conversion amplifier 4 Light spot 5 1st operational amplifier 6 2nd operational amplifier 7 3rd operational amplifier R1 Feedback resistor IP1 1st photocurrent IP2 2nd photocurrent IP3 Sum signal V1 Voltage signal

Claims (3)

A first light receiving element;
A second light receiving element;
An inverting circuit for inverting the photocurrent output from the second light receiving element;
The first current output from the first light receiving element and the second current output from the inversion circuit are combined at the connection point between the output of the first light receiving element and the output of the inversion circuit. And an operational amplifier that converts a difference current from the voltage into a voltage.   The subtracting circuit according to claim 1, wherein the inverting circuit includes a current mirror.   The subtraction circuit according to claim 1, wherein the gain of the operational amplifier is set according to a feedback resistance of the operational amplifier.