JP2007281305A - Integrated circuit for wireless communication - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor circuit for wireless communication with good antenna gain and efficiency even if an antenna is miniaturized. <P>SOLUTION: The semiconductor chip 1 for CMOS wireless communication includes: a high frequency signal input-output line 11 that is formed on active surface 10 (shown on the upper side of the figure); a pattern 21 of the antenna formed on deactivation surface 20 (shown on the lower side of the figure); and a Via Hole 31 formed by making holes on a wafer 30 beforehand to penetrate through the active surface 10 and the deactivation surface 20, and by filling a metallic conductor to the holes, wherein the semiconductor chip is configured by connecting the high frequency signal input-output line 11 formed on the active surface 10 with a feeding point 21b of the antenna 21 formed on the deactivation surface 20 through the Via Hole 31. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an integrated circuit for wireless communication, and in particular, wireless radio identification (RF-ID), short-range wireless transmission technology such as Bluetooth (registered trademark), small wireless communication such as wireless LAN and UWB. The present invention relates to an integrated circuit for wireless communication applicable to the above.

  In wireless communication using radio frequency identification (RF-ID), short-range wireless transmission technology such as Bluetooth (registered trademark), wireless LAN, UWB, etc., miniaturization of semiconductor circuits for wireless communication has progressed. However, how to miniaturize the antenna part is a technical issue.

  In Patent Document 1 below, a planar antenna is formed on a semi-insulating or insulating substrate in order to prevent downsizing of the device and to perform small-sized microwave transmission / reception without assembling and adjustment, and a part of the substrate. A semiconductor integrated circuit in which an amplifier is formed in a semiconductor layer is disclosed.

  In Patent Document 2 below, a transistor and an antenna are integrally formed on the same semiconductor substrate in order to easily increase the power and are small and to suppress a high-frequency loss, and an input electrode or an output electrode of the transistor and an electrode of the antenna are formed. A high-frequency semiconductor device that is directly connected without an extraction electrode or connected to each other through an impedance matching circuit is disclosed.

  In Patent Document 3 below, in order to reduce the size and simplification of a high-frequency transmission / reception device used for an automobile laser or the like, a dielectric substrate constituting a planar circuit on which a high-frequency circuit is mounted and a dielectric substrate constituting a planar antenna Are connected directly to the front and back of the base plate, and the high-frequency signal lines of both are connected by a coaxial line penetrating the conductor plate.

  The following Patent Document 4 includes an IC chip and an antenna coil that is formed on the active surface or the back surface of the IC chip and connected to an internal circuit of the IC chip for performing data communication by non-contact communication. A semiconductor device is disclosed. Also, an IC chip, an antenna coil formed on the back surface of the IC chip and connected to the IC chip for performing data communication by non-contact communication, connected to one end of the antenna coil, and connected to the IC chip A first through hole formed; one end of connection means formed on the back surface of the IC chip and connected to the other end of the antenna coil; and connected to the other end of the connection means; And the antenna coil is connected to the internal circuit of the IC chip via the first through hole, the connection means, and the second through hole. An apparatus is disclosed.

JP-A-61-182302 JP-A 63-279620 JP 2000-59140 A JP 2005-93867 A

By the way, the conventional technique has the following problems. First, since the antenna size is proportional to λg / 2 or λg / 4, it is difficult to reduce the size. Here, λg is a wavelength within the tube, and the wavelength is shortened by the surrounding dielectric, and λg = λ / √ε _eff . Further, λ is a wavelength in a vacuum free space, and ε _eff is an effective relative dielectric constant.

Second, when the antenna is made smaller, the antenna gain and efficiency are degraded accordingly. Since the antenna is a kind of resonator, the size may be λg / n (n is a positive integer) even if it is not λg / 2 or λg / 4. Functions and can be reduced in size, but in this case, the Q value is lowered, so that the antenna gain and efficiency are remarkably deteriorated. Further, even when the effective relative permittivity ε _eff is remarkably increased to reduce the size, the capacitance component increases and the Q value similarly decreases.

  Third, the wiring connection between the antenna and the semiconductor circuit for wireless communication becomes a more difficult and costly process as the semiconductor circuit becomes smaller.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a semiconductor circuit for wireless communication that achieves miniaturization of the space occupied by the total of the antenna and the wireless communication semiconductor. It is another object of the present invention to provide a semiconductor circuit for wireless communication with good antenna gain and efficiency even when the antenna is downsized. It is another object of the present invention to provide a wireless communication semiconductor circuit in which an antenna and a wireless communication semiconductor can be easily joined. Another object of the present invention is to provide a semiconductor circuit for wireless communication in which the temperature characteristics of the antenna are stable. It is another object of the present invention to provide a semiconductor circuit for wireless communication that can prevent the radiated magnetic flux of the antenna from affecting the semiconductor characteristics even if the antenna is downsized.

  In order to solve the above-described problems, a wireless communication semiconductor circuit according to the present invention includes an active surface in which a high-frequency signal input / output line is formed and a pattern of the antenna in a wireless communication integrated circuit incorporating an antenna. A hole formed in the wafer in advance and filled with a metal conductor in the hole so as to penetrate the active surface and the non-active surface, and a non-active surface formed on the non-active surface. The high-frequency signal input / output line formed on the active surface is connected to the feeding point of the antenna formed on the active surface via the via hole.

  The via hole is pre-drilled with a special electric discharge process called laser, etching, or photo-excited electrolytic polishing, and then a metal conductor is inserted into the hole using a metal filling technique such as plating or a molten metal suction method. It is formed by filling.

  By forming the antenna pattern by a thin film process such as vapor deposition / sputtering, a fine line shape (loop antenna, spiral antenna, meander antenna, etc.) is made possible.

  The integrated circuit for wireless communication according to the present invention can achieve a reduction in the space occupied by the sum of the antenna and the wireless communication semiconductor. Even if the antenna is downsized, the antenna gain and efficiency are good. In addition, the antenna and the wireless communication semiconductor can be easily joined. In addition, the temperature characteristics of the antenna are stable. Further, even if the antenna is downsized, the influence of the radiated magnetic flux of the antenna on the semiconductor characteristics can be prevented.

  The best mode for carrying out the present invention will be described below with reference to the drawings. This embodiment is a CMOS wireless communication semiconductor chip having a configuration in which an antenna is built in a CMOS wireless communication module. The present invention is applied to radio communication using radio frequency identification (RF-ID), short-range radio transmission technology such as Bluetooth (registered trademark), wireless LAN, UWB, and the like.

  As shown in a cross section in FIG. 1, a CMOS wireless communication semiconductor chip 1 includes a high-frequency signal input / output line 11 formed on an active surface 10 shown on the upper side of the paper and an inactive surface shown on the lower side of the paper. A hole is formed in the wafer 30 in advance so as to penetrate the antenna pattern 21 formed on the substrate 20, the active surface 10 and the inactive surface 20, and a metal conductor is filled in the hole. (Via Hole) 31, and the high-frequency signal input / output line 11 formed on the active surface 10 via the via hole 31 is connected to the feeding point 21 b of the antenna 21 formed on the inactive surface 20. Connected.

  Specifically, an antenna pattern 21 is provided on a non-active surface 20 of a CMOS wireless communication semiconductor chip, and a high-frequency signal input / output (RF I / O) of a CMOS front-end circuit on the active surface 10 of the semiconductor chip. The antenna feed line 22a of the via hole 31 extending through the semiconductor chip 1 from the terminal 11a reaches the antenna pattern 21 and is connected thereto. The via hole 31 is pre-drilled with a special electric discharge process called laser, etching, or photoexcited electrolytic polishing, and then a metal is filled into the hole by a metal filling technique such as plating or a molten metal suction method. It is formed by filling a conductor. The via diameter is about 5-50 μm.

The high frequency signal input / output (RF I / O) terminal 11a and the high frequency signal input / output line 11 are made of, for example, polysilicon metal. The high-frequency signal input / output line 11 and the RF I / O terminal 11a constitute a CMOS front-end circuit. High-frequency signal input-output line 11 and RF I / O terminal 11a is insulated as required by the insulating film 12 made of silicon oxide SiO _2. The substrate 30 is an n-type substrate and is made of silicon Si. The RF I / O terminal 11a includes an input signal terminal Vin and an output signal terminal Vout. A power supply voltage terminal VDD is also provided on the active surface side.

  FIG. 2 is an external perspective view of the semiconductor chip 1 for CMOS wireless communication. The semiconductor inactive surface 20 is shown on the upper side and the semiconductor active surface 10 is shown on the lower side. The antenna pattern 21 on the inactive surface 20 is a meander antenna. One end is a free end (open) 21a, and the other end is a feed point 21b for connecting to a feed line.

  The antenna pattern 21 is a metal thin film formed by vapor deposition, sputtering, etc., patterned by photolithography, and plated to obtain the conductor thickness.

  3 and 4 show the shapes of the spiral antenna 23 and the loop antenna 24 formed on the semiconductor inactive surface 20. The spiral antenna 23 of FIG. 3 is formed in a spiral shape from the innermost feeding point 23a, and a free end (open) 23b is formed on the outermost circumference. The loop antenna 24 shown in FIG. 4 has an antenna formed in a loop from the innermost feeding point 24a, and a ground end 24b is formed on the outermost circumference.

  If necessary, the antenna pattern can be formed into a multilayer antenna pattern by applying polyimide and the like with a spin coater and baking it to form an insulating layer.

  With respect to the line shape and coil shape such as the spiral antenna 23, meander antenna 21, and loop antenna 24, the pattern line width and line spacing can be reduced to about 10 μm by the above-described method. This means that an inductor having a small conductor cross section and a large number of turns, that is, an antenna having a high inductance and a high Q value can be formed in a small area.

Hereinafter, the thin film spiral inductor 23 will be described with reference to FIG. The square spiral inductance L _s [H] is expressed by the following expression when the pattern line width W = the line interval S.
L _s [H] = 8.5 × 10 ⁻¹⁰ D _o × n ^5/3
= 8.5 × 10 ^-10 A ・ W ^-5/3
Here, D _o [cm] is the outer peripheral side length, and D _i [cm] is the inner peripheral side length. Further, n represents the number of turns, W [cm] represents the line width, S [cm] represents the line spacing, and A [cm ² ] represents the coil surface area.

For example, if the line width W and the line spacing S are both 10 μm spiral inductors, an inductance of 150 turns can be formed in a 6 mm square space. Then
L _s [H] = 8.5 × 10 ⁻¹⁰ D _o × n ^5/3 = 8.5 × 10 ⁻¹⁰ × 0.6 × 150 ^5/3 , which corresponds to a high inductance of about 2 μH, and the line length is about 1.8 m, and the relative permittivity of Si (silicon) single crystal is about 12. If the effective relative permittivity of this spiral inductor is set to 10, then the following formula (1) is obtained, and RF used for transportation-related purposes, etc. -It will function as a 13.56MHz λg / 4 antenna that can be used for ID. Further, since the inductance is high, the Q value can be increased to about 100.

  Of course, it is easy to increase the operating frequency of the antenna simply by shortening the inductor length, and it is also possible to reduce the frequency by applying the aforementioned multilayer technology (polyimide etc. with a spin coater and baking) If an insulating layer is formed and a multilayer antenna pattern is used, this is possible without changing the antenna outline. As described above, the IC with a built-in antenna, which is a specific example of the integrated circuit for wireless communication according to the present invention, can be used in a wide variety of frequency ranges with a small outer shape.

  In addition, since the antenna pattern is formed by the same process as that of semiconductors such as sputtering and photolithography, the extra equipment investment is small and the processing dimensional accuracy of all processes is increased.

  This prevents a problem such as a conventional antenna and semiconductor junction position accuracy, which will be described with reference to FIG. FIG. 6 is a diagram for explaining the connection between the conventional antenna substrate 100 and the semiconductor circuit 110 for wireless communication. A meander antenna pattern 101 is formed on an antenna substrate 100 such as LTCC or FR-4. In general, flip-chip connection is performed via gold or solder bumps formed on an IC. However, since the dimensional accuracy of the substrate is low, mounting equipment having an image processing function is essential for alignment. Still, since there is a limit in alignment, it becomes a limitation of downsizing and narrowing of an IC pad. Moreover, reinforcement of an under film etc. is needed for the improvement of joining strength.

  These problems of bonding position accuracy can be prevented by increasing the processing dimensional accuracy of all processes according to the embodiment of the present invention.

  Of course, the use of a non-active surface (back surface) on which a circuit of the semiconductor chip is not formed has a high use efficiency of the space on the semiconductor chip, which is advantageous for downsizing. The conventional IC with a built-in antenna has a low space utilization efficiency. For example, a monolithic microwave integrated circuit (MMIC) with a built-in antenna has a configuration in which an antenna is provided on the same semiconductor active surface as the circuit, and the efficiency of use of the IC space is not good. Naturally, in the hybrid microwave integrated circuit (HMIC), both the circuit and the antenna become larger, so the space utilization efficiency is not good.

  Furthermore, the Si single crystal has a relative dielectric constant of about 12, which is higher than that of the resin material, and it is smaller than the conventional method in which a polyimide layer is applied on the active surface of a semiconductor and an antenna is formed thereon. It is advantageous. Further, since the relative dielectric constant of the Si single crystal has very little temperature dependence, the antenna characteristics are also stable over a wide temperature range. Conventionally, there has been an example in which an antenna is formed of a resin insulating film (such as polyimide) and a thin film conductor on an IC active surface. Resins such as polyimide have a low relative dielectric constant and cannot be expected to be miniaturized by shortening the wavelength, have a high dielectric loss tangent, have high transmission loss at high frequencies, and have temperature dependence of characteristics such as dielectric constant Is high and lacks stability.

  Further, in the semiconductor chip for CMOS wireless communication (IC with built-in antenna) 1 of the present embodiment, since there is no antenna on the active surface 10 side of the semiconductor, it is mounted on the substrate 40 by flip chip mounting as shown in FIG. Is also possible. In FIG. 7, an example in which a CMOS wireless communication semiconductor chip 1 as a communication module is provided on a mother board (portion corresponding to a host for the module) with an inactive surface (an antenna pattern) 20 as an upper surface and a lower surface is bump-connected. Show.

  In the present invention, since the distance between the RF I / O end 11 of the semiconductor circuit for wireless communication and the antenna feeding point 21b can be shortened by using the via hole 31, a matching circuit is not necessary between them. For example, a matching circuit composed of an inductor and a capacitor can be formed on the active surface 10 or the inactive surface 20 of the semiconductor by a thin film process similar to that of the antenna. FIG. 8 is a sectional view showing the matching circuit 50 on the IC active surface 10 side. The elements constituting the matching circuit 50 are an inductor L and a capacitor C that can be formed by a copper polyimide process. Specifically, spiral inductors, meander lines, interdigital capacitors, interlayer capacitors, MIM capacitors, and the like. FIG. 9 is a cross-sectional view showing the matching circuit 50 on the IC inactive surface 10 side. The elements constituting the matching circuit 50 are an inductor L and a capacitor C that can be formed by a copper polyimide process. Further, the inductor can be formed in a thin film process when forming the antenna pattern.

  Further, by forming a magnetic film 60 as shown in FIG. 10 between the line-shaped, coil-shaped antenna and the semiconductor non-active surface on the semiconductor non-active surface, the inductance of the antenna is increased and the Q value is increased. In addition, the magnetic flux can be prevented from affecting the characteristics of the semiconductor. In FIG. 10, a spiral antenna is formed on the non-active surface 20. The magnetic film is formed in the PI and prevents the flow of magnetic flux from entering the semiconductor portion.

  Usually, in a coil having a spiral shape or the like, the generated magnetic flux generates inductive coupling with a peripheral circuit or a component, and causes noise such as crosstalk to the peripheral circuit. Therefore, it is essential to dispose the peripheral circuit away from the coil-shaped antenna, which hinders the miniaturization and thinning of the RF ID and the like (see FIG. 11). As shown in FIG. 10, by disposing the magnetic film 60 and removing the semiconductor circuit part from the magnetic flux passage path, the IC with a built-in antenna that is not easily affected by the coil antenna even if it is downsized, and the same are mounted. A small electronic device can be formed.

It is sectional drawing of the semiconductor chip for CMOS radio | wireless communication used as embodiment of this invention. It is an external appearance perspective view of the semiconductor chip for CMOS radio | wireless communication. It is a figure which shows the shape of a spiral antenna. It is a figure which shows the shape of a loop antenna. It is a figure for demonstrating a thin film spiral inductor. It is a figure for demonstrating the connection of the conventional antenna board | substrate and the semiconductor circuit for radio | wireless communication. It is a figure which shows the state which mounted the semiconductor chip for CMOS radio | wireless communication on the board | substrate by flip chip mounting. It is sectional drawing which shows the matching circuit by the side of IC active surface. It is sectional drawing which shows the matching circuit by the side of IC inactive surface. It is a figure for demonstrating the effect of the magnetic body film formed in the non-active surface side of the semiconductor chip for CMOS radio | wireless communication. It is a figure for demonstrating the state when not forming a magnetic film in the non-active surface side of the semiconductor chip for CMOS radio | wireless communication.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 CMOS wireless communication semiconductor chip, 10 Active surface side, 11 High frequency signal input / output line, 12 Insulating film, 20 Inactive surface side, 21 Antenna pattern, 30 n-type substrate, 31 Via hole

Claims (4)

In an integrated circuit for wireless communication with a built-in antenna,
A high-frequency signal input / output line formed on the active surface;
An antenna pattern formed on the non-active surface;
A hole is formed in the wafer in advance so as to penetrate the active surface and the inactive surface, and a via hole formed by filling the hole with a metal conductor, and
An integrated circuit for radio communication, wherein the high-frequency signal input / output line formed on the active surface is connected to the feeding point of the antenna formed on the non-active surface via the via hole.   2. The integrated circuit for wireless communication according to claim 1, wherein the antenna pattern on the non-active surface is formed by a thin film process.   The impedance matching circuit pattern inserted between the high-frequency input / output line on the active surface and the antenna feeding point on the inactive surface is formed on the active surface or the inactive surface. An integrated circuit for wireless communication as described.   2. The wireless communication integrated circuit according to claim 1, wherein a magnetic film is formed between the inactive surface and the antenna pattern.

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