JP2007281228A - Terminal group manufacturing method of circuit board - Google Patents

Terminal group manufacturing method of circuit board Download PDF

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JP2007281228A
JP2007281228A JP2006106128A JP2006106128A JP2007281228A JP 2007281228 A JP2007281228 A JP 2007281228A JP 2006106128 A JP2006106128 A JP 2006106128A JP 2006106128 A JP2006106128 A JP 2006106128A JP 2007281228 A JP2007281228 A JP 2007281228A
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solder
terminals
connecting portion
terminal group
terminal
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JP4936771B2 (en
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Takashi Fujimura
隆士 藤村
Kazuo Inoue
和夫 井上
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Nippon Mektron KK
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Nippon Mektron KK
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a terminal group manufacturing method of a circuit board which equalizes thickness of solder precoat layer formed on each terminal front surface in the terminal group even for the terminals with narrow pitch, in the method of forming a solder precoat layer on the front surface of the terminal group consisting of two or more terminals for mounting components prepared in the circuit board. <P>SOLUTION: An interconnect portion 10 composed of the same material as the material of terminals 2a and 2b is formed beforehand so as to connect respectively the terminals 2a and 2b which face each other on an insulating substrate 1. A solder layer 5 is formed on the surface of the terminal group including this interconnect portion 10. A solder precoat layer 6 is formed by heating and melting this solder layer 5, and then the unnecessary portion between the terminals 2a and 2b is cut and removed. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は回路基板に設けられた部品実装用の複数個の端子からなる端子群の製造方法に関するものであり、特に、端子群の表面に形成されるはんだプリコート層の厚みを均一化する端子群製造方法に関するものである。   The present invention relates to a method for manufacturing a terminal group comprising a plurality of terminals for component mounting provided on a circuit board, and more particularly, a terminal group for uniformizing the thickness of a solder precoat layer formed on the surface of the terminal group. It relates to a manufacturing method.

回路基板に設けられた部品実装用端子に電子部品の接続部を載置してはんだ付けする際に、はんだ付けの作業性を向上させるために、複数の端子からなる端子群に予めはんだプリコート層を形成することが知られている。このはんだプリコート層は、端子群の表面にペースト状はんだを印刷用メタルマスクを用いて印刷し、該ペースト状はんだを加熱溶融(以下フュージングと称する)して形成するか、あるいは、はんだめっき等によってはんだ層を形成し、該はんだ層にフラックスを塗布した後にフュージングすることにより形成される。   In order to improve the soldering workability when placing the connection part of the electronic component on the component mounting terminal provided on the circuit board and soldering, a solder precoat layer is previously formed on the terminal group composed of a plurality of terminals. Is known to form. The solder precoat layer is formed by printing paste solder on the surface of the terminal group using a printing metal mask and heating and melting the paste solder (hereinafter referred to as fusing), or by solder plating or the like. It is formed by forming a solder layer, fusing the solder layer and then fusing.

ペースト状はんだを印刷してはんだプリコート層を形成する方法では、狭いピッチの端子群の場合、ペースト状はんだのにじみやダレにより、隣接する端子間が繋がってしまうことがある。この状態でフュージングを行うと、はんだが溶融したときに隣接する端子間で均一に分離せず、はんだプリコート層の厚みにばらつきが発生し易い。また、端子周囲を覆うカバーレイの位置ずれによっても、はんだプリコート層の厚みが不均一となることもある。   In a method of forming a solder precoat layer by printing paste solder, in the case of a terminal group with a narrow pitch, adjacent terminals may be connected due to bleeding or sagging of the paste solder. When fusing is performed in this state, when the solder is melted, the adjacent terminals are not uniformly separated, and the thickness of the solder precoat layer tends to vary. Further, the thickness of the solder precoat layer may become non-uniform due to the positional deviation of the cover lay covering the periphery of the terminal.

図17〜図20は、ペースト状はんだを印刷してフュージングを行うまでの過程を示す説明図である。図17は絶縁基板1の上に相対峙する端子2a,2bが複数組並列して配置された端子群を示し、端子長さ方向(図の左右方向)にカバーレイ3がずれた状態を示している。同図に示す端子2a,2bは端子長さが0.3mmで、カバーレイ3が0.1mmずれた状態で貼り合わせてある。従って、カバーレイ3の開口部3aから露出する左側端子2aの長さが0.2mm、右側端子2bの長さが0.4mmとなり、左右端子面積の差が2倍になってしまう。   17-20 is explanatory drawing which shows the process until it prints and pastes a paste-form solder. FIG. 17 shows a terminal group in which a plurality of sets of terminals 2a and 2b facing each other on the insulating substrate 1 are arranged in parallel, and shows a state in which the cover lay 3 is displaced in the terminal length direction (left-right direction in the figure). ing. The terminals 2a and 2b shown in the figure are bonded together with a terminal length of 0.3 mm and a cover lay 3 shifted by 0.1 mm. Therefore, the length of the left terminal 2a exposed from the opening 3a of the cover lay 3 is 0.2 mm, the length of the right terminal 2b is 0.4 mm, and the difference between the left and right terminal areas is doubled.

この状態では、図18に示すように印刷用メタルマスク4の左側開口部4aがカバーレイ3の上にまで及んでいるため、ペースト状はんだ5を印刷すると、図19に示すようにカバーレイ3の上面にまでペースト状はんだ5が印刷されてしまう。印刷されるペースト状はんだ5の量は、前記開口部4a,4bの大きさで決まるため、カバーレイ3のずれに関係なく同じ量が印刷される。従って、図20に示すようにフュージングを行うと、面積が狭い端子2aでは、はんだプリコート層6aの厚みが厚くなり、逆に面積が広い端子2bでは、はんだプリコート層6bの厚みが薄くなる。この結果、はんだプリコート層6a,6bの厚みが不均一になる。   In this state, as shown in FIG. 18, the left opening 4a of the printing metal mask 4 extends over the cover lay 3, so when the paste solder 5 is printed, the cover lay 3 as shown in FIG. The paste-like solder 5 is printed on the upper surface of the sheet. Since the amount of the paste solder 5 to be printed is determined by the size of the openings 4a and 4b, the same amount is printed regardless of the displacement of the cover lay 3. Therefore, when fusing is performed as shown in FIG. 20, the thickness of the solder precoat layer 6a is increased in the terminal 2a having a small area, and conversely, the thickness of the solder precoat layer 6b is decreased in the terminal 2b having a large area. As a result, the thicknesses of the solder precoat layers 6a and 6b are not uniform.

ICやコネクター等の部品を実装する際、図21(a)に示すように、はんだプリコート層6の厚みが均等であれば、同図(b)に示すように、部品を上方から圧接しながらはんだを溶融したときに、それぞれの端子2ではんだプリコート層6が均等な厚みとなって、良好な接続が得られる。   When mounting a component such as an IC or a connector, as shown in FIG. 21A, if the thickness of the solder precoat layer 6 is uniform, the component is pressed from above as shown in FIG. 21B. When the solder is melted, the solder precoat layer 6 has an equal thickness at each terminal 2 and a good connection is obtained.

これに対して、図22(a)に示すように、はんだプリコート層6の厚みにばらつきがあると、はんだプリコート層6が上方の部品端子に接続している端子2cと、接続していない端子2dが発生する。従って、同図(b)に示すように、部品を上方から圧接しながらはんだを溶融したときに、上下の間隙が広い端子の接続を取ろうとして、部品をさらに押し込む必要があり、はんだプリコート層6の厚みが厚い端子2cでは、はんだがはみ出して隣接の端子とショートする可能性がある。このため、安定した接続を取ることができないという不具合があった。   On the other hand, as shown in FIG. 22 (a), when the thickness of the solder precoat layer 6 varies, the terminal 2c in which the solder precoat layer 6 is connected to the upper component terminal and the terminal that is not connected. 2d occurs. Therefore, as shown in FIG. 5B, when the solder is melted while pressing the component from above, it is necessary to push the component further in order to connect the terminals having a wide upper and lower gap, and the solder precoat layer In the thick terminal 2c, the solder may protrude and short-circuit with an adjacent terminal. For this reason, there was a problem that a stable connection could not be established.

一般的に、フレキシブル回路基板では、ベース材としてポリイミド等のフィルムを使用することが多く、この場合は温度や湿度によって寸法の収縮が起きる。このため、カバーレイを貼り合わせるときに位置ずれが発生し易く、その結果、端子が露出している面積が大きく変化してしまう。端子面積が小さければ、この影響が非常に大きいものになってしまう。また、フュージング時にも温度や湿度の影響で収縮を起こすことから、形成された回路との位置合わせが不安定になっている。従って、はんだプリコート層の厚みを均一に形成しにくい要因となっている。ここで、一般的にカバーレイを形成するには、必要な部分への絶縁インクの印刷による手法や、予め開口が形成された絶縁フィルムを接着する手法や、感光性の絶縁インクの塗布またはフィルム状の感光性絶縁樹脂のラミネートに続く露光、現像、熱処理による手法などが採用される。   In general, a flexible circuit board often uses a film of polyimide or the like as a base material. In this case, shrinkage of dimensions occurs due to temperature and humidity. For this reason, a positional shift is likely to occur when the coverlay is bonded, and as a result, the area where the terminals are exposed changes greatly. If the terminal area is small, this effect becomes very large. In addition, since the shrinkage occurs due to the influence of temperature and humidity during fusing, the alignment with the formed circuit is unstable. Therefore, it is a factor that it is difficult to form a uniform thickness of the solder precoat layer. Here, in general, in order to form a cover lay, a method by printing an insulating ink on a necessary portion, a method of bonding an insulating film in which an opening is formed in advance, a coating or film of photosensitive insulating ink A method by exposure, development, heat treatment, etc. following the lamination of the photosensitive insulating resin in the form of a tape is employed.

一方、はんだめっきによってはんだ層を形成し、このはんだ層をフュージングしてはんだプリコート層を形成する方法であっても、電流密度分布のばらつきによってワーク内ではんだ層の厚みが不均一となることもあり、前述したペースト状はんだを印刷する方法と同様に、はんだプリコート層の厚みを均一に形成しにくい要因となっている。   On the other hand, even if the solder layer is formed by solder plating and the solder pre-coating layer is formed by fusing the solder layer, the thickness of the solder layer may be non-uniform in the workpiece due to variations in the current density distribution. There is a factor that makes it difficult to form a uniform thickness of the solder precoat layer, similar to the method of printing paste solder described above.

部品を押し込まざるを得ないときの、はんだのはみ出しによるショートを防止する方法としては、端子の一部にはんだと融合しないスリット状の領域を形成し、横幅の広い端子部分と、スリット状の領域によって分割された横幅の狭い端子部分とに分けることで、余剰の溶融はんだがスリット状の領域に流れ込むようにしたものが知られている(例えば、特許文献1参照)。   As a method to prevent short-circuiting due to protrusion of solder when parts have to be pushed in, a slit-like area that does not fuse with solder is formed in a part of the terminal, a wide terminal part, and a slit-like area It is known that excessive molten solder flows into a slit-like region by dividing the terminal portion into narrow terminal portions divided by (see, for example, Patent Document 1).

また、絶縁基板上にはんだ耐熱性を有する感光性樹脂製マスクを設け、該マスクを露光することにより開口部を形成し、この開口部にペースト状はんだを埋め込んでリフローすることにより、接続端子上にはんだプリコート層を形成した後に、前記感光性樹脂製マスクを溶解除去する方法も知られている(例えば、特許文献2参照)。
特許第3496308号公報 特開平10−322007号公報
In addition, a photosensitive resin mask having solder heat resistance is provided on the insulating substrate, an opening is formed by exposing the mask, and a paste solder is embedded in the opening to perform reflow, thereby providing a connection on the connection terminal. There is also known a method of dissolving and removing the photosensitive resin mask after a solder precoat layer is formed (see, for example, Patent Document 2).
Japanese Patent No. 3496308 JP-A-10-322007

カバーレイの位置ずれ等から、はんだプリコート層の厚みが均一でない場合、図22に示すように、部品を必要以上に押し込むことになり、はんだがはみ出して隣接の端子とショートする危険がある等、従来は安定した接続を取ることができないという不具合があった。   If the thickness of the solder precoat layer is not uniform due to misalignment of the coverlay, etc., as shown in FIG. 22, the parts will be pushed more than necessary, and there is a risk that the solder will protrude and short to the adjacent terminals, etc. Conventionally, there has been a problem that a stable connection cannot be established.

特許文献1記載の発明は、余剰の溶融はんだがスリット状の領域に流れ込むようにしてあるが、はんだプリコート層の厚みを均等にするようにはなっておらず、逆にスリット状領域を形成することによって端子に狭隘部が生じ、この狭隘部のはんだが薄くなり、厚みがばらつく要因にもなる 。   In the invention described in Patent Document 1, excess molten solder flows into the slit-shaped region, but the thickness of the solder precoat layer is not uniform, and conversely, the slit-shaped region is formed. As a result, a narrow portion is formed in the terminal, and the solder of the narrow portion becomes thin, which causes a variation in thickness.

特許文献2記載の発明は、感光性樹脂製マスクに開口部を設け、ここにペースト状はんだを埋め込んではんだプリコート層を形成した後に、前記感光性樹脂製マスクを除去するので、工数が多くなってコスト高となる。また、はんだプリコート層の厚みをより簡単に均一化することができず、従来は外観検査により厚みを確認して、差が大きい場合には手直しを行っている。このため、品質および作業効率が良好ではなかった。   In the invention described in Patent Document 2, an opening is provided in a photosensitive resin mask, and after the solder precoat layer is formed by embedding paste solder therein, the photosensitive resin mask is removed. Cost. In addition, the thickness of the solder precoat layer cannot be equalized more easily. Conventionally, the thickness is confirmed by visual inspection, and if the difference is large, the thickness is reworked. For this reason, quality and work efficiency were not good.

そこで、本発明は、回路基板に設けられた部品実装用の複数個の端子からなる端子群の表面にはんだプリコート層を形成する方法において、狭ピッチの端子に対しても端子群内のそれぞれの端子表面に形成されるはんだプリコート層の厚みを均一化する端子群の製造方法を提供することを目的とする。   Accordingly, the present invention provides a method for forming a solder precoat layer on the surface of a terminal group consisting of a plurality of terminals for mounting components provided on a circuit board, and each of the terminals in the terminal group is also applied to a narrow pitch terminal. It aims at providing the manufacturing method of the terminal group which equalizes the thickness of the solder precoat layer formed in a terminal surface.

本発明は上記目的を達成するために提案されたものであり、請求項1記載の発明は、回路基板に設けられた部品実装用の複数個の端子からなる端子群であって、該端子群の表面にはんだプリコート層を形成する方法において、前記端子群には相対峙する端子相互間をそれぞれ接続する前記端子と同一材質からなる連結部が予め形成されており、この連結部を含む前記端子群の表面にはんだ層を設け、このはんだ層を加熱溶融してはんだプリコート層を形成し、然る後に、前記端子相互間の不要部分を切断除去することを特徴とする回路基板の端子群製造方法を提供する。   The present invention has been proposed in order to achieve the above object, and the invention according to claim 1 is a terminal group comprising a plurality of terminals for mounting components provided on a circuit board, the terminal group comprising: In the method of forming a solder precoat layer on the surface of the terminal, a connecting portion made of the same material as the terminal for connecting the terminals facing each other is formed in advance in the terminal group, and the terminal including the connecting portion is formed. A circuit board terminal group manufacturing, characterized in that a solder layer is provided on the surface of the group, the solder layer is heated and melted to form a solder precoat layer, and then unnecessary portions between the terminals are cut and removed. Provide a method.

この構成によれば、回路基板に設けられた端子群の相対峙する端子相互間がそれぞれ前記端子と同一材質からなる連結部にて接続され、双方の端子と連結部が一体の平面をなしている。この端子と連結部の表面にペースト状はんだの印刷やはんだめっきを行えば、端子と連結部の表面は段差がなくて一体の平面であるため、この平面にほぼ同一厚みのはんだ層が形成される。このはんだ層をフュージングすれば、それぞれの端子と連結部の平面部全体にはんだが流れ込み、前記平面部全体に亘って、均一厚みのはんだプリコート層が形成される。そして、前記端子群の相対峙する端子相互間の不要部分を切断除去することにより、前記連結部近傍がなくなって、均一厚みのはんだプリコート層を有する端子がそれぞれ離間して端子群が形成される。   According to this configuration, the mutually facing terminals of the terminal group provided on the circuit board are connected to each other by the connecting portions made of the same material as the terminals, and both the terminals and the connecting portions form an integral plane. Yes. If paste-like solder printing or solder plating is performed on the surface of the terminal and the connecting portion, the surface of the terminal and the connecting portion is an integral flat surface without a step, and therefore a solder layer having substantially the same thickness is formed on this flat surface. The When this solder layer is fused, the solder flows into the entire flat portion of each terminal and connecting portion, and a solder precoat layer having a uniform thickness is formed over the entire flat portion. Then, by cutting and removing unnecessary portions between the mutually facing terminals of the terminal group, the vicinity of the connecting portion is eliminated, and terminals having a solder precoat layer having a uniform thickness are separated from each other to form a terminal group. .

請求項2記載の発明は、回路基板に設けられた部品実装用の複数個の端子からなる端子群であって、該端子群の表面にはんだプリコート層を形成する方法において、前記端子群には相対峙する端子相互間をそれぞれ接続する前記端子と同一材質からなる第1の連結部と、隣接する第1の連結部相互間をそれぞれ接続する前記端子および第1の連結部と同一材質からなる第2の連結部が予め形成されており、これら第1および第2の連結部を含む前記端子群の表面にはんだ層を設け、このはんだ層を加熱溶融してはんだプリコート層を形成し、然る後に、前記端子相互間の不要部分を切断除去することを特徴とする回路基板の端子群製造方法を提供する。   The invention according to claim 2 is a terminal group composed of a plurality of terminals for mounting components provided on a circuit board, wherein a solder precoat layer is formed on the surface of the terminal group. The first connecting part made of the same material as the terminal for connecting the terminals facing each other and the terminal and the first connecting part for connecting the adjacent first connecting parts respectively made of the same material A second connecting portion is formed in advance, a solder layer is provided on the surface of the terminal group including the first and second connecting portions, and the solder layer is heated and melted to form a solder precoat layer. After that, an unnecessary portion between the terminals is cut and removed, and a method for manufacturing a terminal group of a circuit board is provided.

この構成によれば、回路基板に設けられた端子群の相対峙する端子相互間がそれぞれ前記端子と同一材質からなる第1の連結部にて接続され、双方の端子と第1の連結部が一体の平面をなしている。また、隣接する第1の連結部相互間がそれぞれ前記端子および第1の連結部と同一材質からなる第2の連結部にて接続され、第1の連結部と第2の連結部が一体の平面をなしている。前記相対峙する端子と第1の連結部と第2の連結部の表面にペースト状はんだの印刷やはんだめっきを行えば、各端子と第1および第2の連結部の表面は段差がなくて一体の平面であるため、この平面にほぼ同一厚みのはんだ層が形成される。   According to this configuration, the mutually opposing terminals of the terminal group provided on the circuit board are connected to each other by the first connecting portion made of the same material as the terminals, and both the terminals and the first connecting portion are connected to each other. It is an integral plane. Adjacent first connecting portions are connected to each other by a second connecting portion made of the same material as the terminal and the first connecting portion, and the first connecting portion and the second connecting portion are integrated. It is flat. If paste solder printing or solder plating is performed on the surfaces of the terminals facing each other, the first connecting portion, and the second connecting portion, the surface of each terminal and the first and second connecting portions has no step. Since it is an integral plane, a solder layer having substantially the same thickness is formed on this plane.

このはんだ層をフュージングすれば、各端子と第1および第2の連結部の平面部全体にはんだが流れ込み、前記平面部全体に亘って、ほぼ均一厚みのはんだプリコート層が形成される。第1の連結部と第2の連結部の接続部分近傍(交差部分)では、双方の回路の幅により面積が大きくなるため、はんだプリコート層の厚みがわずかに厚くなるが、前記端子群の相対峙する端子相互間の不要部分を切断除去することにより、前記交差部分がなくなって、均一厚みのはんだプリコート層を有する端子がそれぞれ離間して端子群が形成される。   When this solder layer is fused, the solder flows into the entire flat portion of each terminal and the first and second connecting portions, and a solder precoat layer having a substantially uniform thickness is formed over the entire flat portion. In the vicinity of the connecting portion (intersection portion) between the first connecting portion and the second connecting portion, the area increases due to the width of both circuits, so the thickness of the solder precoat layer is slightly increased. By cutting and removing unnecessary portions between the opposing terminals, the crossing portions are eliminated, and terminals having a solder precoat layer having a uniform thickness are separated from each other to form a terminal group.

請求項3記載の発明は、上記第1の連結部であって、該第1の連結部と第2の連結部の接続部分近傍に開口部を設けたことを特徴とする請求項2記載の回路基板の端子群製造方法を提供する。   Invention of Claim 3 is said 1st connection part, Comprising: The opening part was provided in the connection part vicinity of this 1st connection part and 2nd connection part, Claim 2 characterized by the above-mentioned. A method for manufacturing a terminal group of a circuit board is provided.

この構成によれば、上記第1の連結部と第2の連結部の接続部分近傍(交差部分)に開口部を設けたことにより、該交差部分の面積が大きくならない。従って、該交差部分のはんだ層の厚みが厚くならず、他の平面部とほぼ同じ厚みで、より一層均一した厚みのはんだプリコート層が形成される。   According to this configuration, since the opening is provided in the vicinity (intersection) of the connection portion between the first connection portion and the second connection portion, the area of the intersection portion does not increase. Accordingly, the thickness of the solder layer at the intersecting portion is not increased, and a solder precoat layer having a more uniform thickness is formed with substantially the same thickness as the other flat portions.

請求項4記載の発明は、上記第1の連結部であって、上記端子群の最外側縁部に切欠部を設けたことを特徴とする請求項2記載の回路基板の端子群製造方法を提供する。   According to a fourth aspect of the present invention, there is provided the circuit board terminal group manufacturing method according to the second aspect, wherein the first connecting portion is provided with a notch at an outermost edge of the terminal group. provide.

この構成によれば、上記端子群の最外側にある第1の連結部の外側縁部に切欠部を設けたことにより、最外側にある第1の連結部と第2の連結部の接続部近傍(交差部分)の面積が大きくならない。従って、該交差部分のはんだ層の厚みが厚くならず、他の平面部とほぼ同じ厚みで、より一層均一した厚みのはんだプリコート層が形成される。   According to this configuration, by providing a notch in the outer edge of the first connecting portion located on the outermost side of the terminal group, the connecting portion between the first connecting portion and the second connecting portion located on the outermost side. The area of the neighborhood (intersection) does not increase. Accordingly, the thickness of the solder layer at the intersecting portion is not increased, and a solder precoat layer having a more uniform thickness is formed with substantially the same thickness as the other flat portions.

請求項5記載の発明は、上記第1の連結部であって、上記端子群の最外側縁部に凸部を設けたことを特徴とする請求項2記載の回路基板の端子群製造方法を提供する。   According to a fifth aspect of the present invention, there is provided the terminal group manufacturing method for a circuit board according to the second aspect, wherein the first connecting portion is provided with a convex portion at an outermost edge portion of the terminal group. provide.

この構成によれば、上記端子群の最外側にある第1の連結部の外側縁部に凸部を設けたことにより、最外側にある第1の連結部と第2の連結部の接続部分近傍(交差部分)のはんだが外側縁部の凸部に流れ、該交差部分のはんだ層の厚みが厚くならず、他の平面部とほぼ同じ厚みで、より一層均一した厚みのはんだプリコート層が形成される。   According to this configuration, by providing a convex portion on the outer edge of the first connecting portion located on the outermost side of the terminal group, a connecting portion between the first connecting portion located on the outermost side and the second connecting portion. The solder in the vicinity (intersection) flows to the convex part of the outer edge, and the thickness of the solder layer at the intersection does not increase. It is formed.

請求項6記載の発明は、上記端子の回路幅を回路パターンよりも幅広に形成し、且つ、端子相互間の連結部の回路幅を上記端子よりも幅狭に形成したことを特徴とする請求項1または2記載の回路基板の端子群製造方法を提供する。   The invention according to claim 6 is characterized in that the circuit width of the terminal is formed wider than the circuit pattern, and the circuit width of the connecting portion between the terminals is formed narrower than the terminal. A circuit board terminal group manufacturing method according to Item 1 or 2 is provided.

この構成によれば、上記端子の回路幅を回路パターンならびに連結部の回路幅よりも広くしたことにより、相対峙する端子部分のみではんだ層が厚くなり、該端子部分で均一した厚みのはんだプリコート層が形成される。   According to this configuration, by making the circuit width of the terminal wider than the circuit width of the circuit pattern and the connecting portion, the solder layer is thickened only at the terminal portions facing each other, and the solder precoat having a uniform thickness at the terminal portions. A layer is formed.

本発明によれば、端子間の寸法やカバーレイにずれが発生したとしても、これらの寸法ずれに影響されることなく、はんだプリコート層をより均一な厚みに形成することが可能となり、実装部品の接続が容易かつ確実に行えるようになり、回路基板製造における品質ならびに生産効率を大幅に向上させることができる。   According to the present invention, it is possible to form the solder precoat layer with a more uniform thickness without being affected by these dimensional deviations even if the dimensions between the terminals and the coverlay are displaced. Can be easily and reliably connected, and the quality and production efficiency in circuit board manufacture can be greatly improved.

以下、本発明に係る回路基板の端子群製造方法について、好適な実施例をあげて説明する。回路基板に設けられた部品実装用の複数個の端子からなる端子群の表面にはんだプリコート層を形成する方法において、狭ピッチの端子に対しても端子群内のそれぞれの端子表面に形成されるはんだプリコート層の厚みを均一化するという目的を達成するために、本発明は前記端子群には相対峙する端子相互間をそれぞれ接続する連結部が予め形成されており、この連結部を含む前記端子群の表面にはんだ層を設け、このはんだ層を加熱溶融してはんだプリコート層を形成し、然る後に、前記端子相互間の不要部分を切断除去することにより実現した。   Hereinafter, a method for producing a terminal group of a circuit board according to the present invention will be described with reference to preferred embodiments. In a method of forming a solder precoat layer on the surface of a terminal group consisting of a plurality of terminals for mounting components provided on a circuit board, a narrow pitch terminal is formed on each terminal surface in the terminal group. In order to achieve the object of making the thickness of the solder precoat layer uniform, the present invention includes a connecting portion for connecting the terminals facing each other in advance in the terminal group, and including the connecting portion. This was realized by providing a solder layer on the surface of the terminal group, heating and melting the solder layer to form a solder precoat layer, and then cutting and removing unnecessary portions between the terminals.

なお、説明の都合上、図17〜図22の従来技術で説明したものと同一構成部分は各実施例においても同一符号を使用するものとする。   For convenience of explanation, the same components as those described in the prior art of FIGS. 17 to 22 are denoted by the same reference numerals in each embodiment.

先ず、図1〜図5に従って実施例1について説明する。図1は絶縁基板1の上に相対峙する端子2a,2bが複数組並列して配置された端子群を示し、該端子群には各端子2a,2b相互間を接続する連結部10が予め形成されている。この連結部10は前記端子2a,2bと同一材質からなっている。絶縁基板1の表面にはカバーレイ3を貼り付けてあり、該カバーレイ3に設けた開口部3aから前記端子群の各端子2a,2bおよび連結部10が露出しており、他の回路パターン部分はカバーレイ3にて被蔽されている。   First, Example 1 is demonstrated according to FIGS. FIG. 1 shows a terminal group in which a plurality of sets of terminals 2a and 2b facing each other on an insulating substrate 1 are arranged in parallel, and a connecting portion 10 for connecting the terminals 2a and 2b to each other is connected to the terminal group in advance. Is formed. The connecting portion 10 is made of the same material as the terminals 2a and 2b. A cover lay 3 is affixed to the surface of the insulating substrate 1, and the terminals 2a, 2b and the connecting portion 10 of the terminal group are exposed from the opening 3a provided in the cover lay 3, and other circuit patterns are provided. The part is covered with a coverlay 3.

カバーレイの開口部3aから破線の位置までが、本来の端子2a,2bの長さを示している。仮に、カバーレイ3の貼り付け位置がずれて、開口部3aから破線の位置までの長さが左右で異なったとしても、後述するように、端子2a,2bおよび連結部10の全体にはんだが流れ込むため、均一した厚みではんだプリコート層6が形成される。   The length of the original terminals 2a and 2b is shown from the cover lay opening 3a to the position of the broken line. Even if the attachment position of the cover lay 3 is shifted and the length from the opening 3a to the position of the broken line is different on the left and right, as will be described later, solder is applied to the entire terminals 2a and 2b and the connecting portion 10. In order to flow in, the solder precoat layer 6 is formed with a uniform thickness.

図2は印刷用メタルマスク4を示し、前記各端子2a,2bおよび連結部10の位置に対応して開口部4cが設けられている。ペースト状はんだ5を印刷すると、前記印刷用メタルマスクの開口部4cにペースト状はんだが印刷され、図3に示すように、印刷用メタルマスク4を取り外すと、前記カバーレイの開口部3a内の各端子2a,2bおよび連結部10の上にペースト状のはんだ層5が設けられる。   FIG. 2 shows the printing metal mask 4, and an opening 4 c is provided corresponding to the positions of the terminals 2 a and 2 b and the connecting portion 10. When the paste-like solder 5 is printed, the paste-like solder is printed in the opening 4c of the printing metal mask. When the printing metal mask 4 is removed as shown in FIG. 3, the inside of the opening 3a of the coverlay is removed. A paste-like solder layer 5 is provided on each of the terminals 2a and 2b and the connecting portion 10.

この状態ではんだ層をフェージングすれば、図4に示すように、カバーレイの開口部3a内の各端子2a,2bおよび連結部10の上に、はんだプリコート層6が形成される。万一、前記印刷用メタルマスクの開口部4cが他の部分にまではみ出して、カバーレイ3の上面や端子2a,2bおよび連結部10以外部分にまで印刷されてしまったとしても、フュージングすることにより、各端子2a,2bおよび連結部10の全体にはんだが流れ込むので、均一厚みのプリコート層6を形成することができる。   If the solder layer is faded in this state, as shown in FIG. 4, the solder precoat layer 6 is formed on the terminals 2 a and 2 b and the connecting portion 10 in the opening 3 a of the coverlay. Even if the opening 4c of the metal mask for printing protrudes to other parts and is printed on the upper surface of the cover lay 3 or the parts other than the terminals 2a and 2b and the connecting part 10, fusing is performed. As a result, the solder flows into the terminals 2a, 2b and the entire connecting portion 10, so that the precoat layer 6 having a uniform thickness can be formed.

このように、カバーレイ3にずれが生じたとしても、カバーレイの開口部3aの位置ずれに関係なく、はんだプリコート層6を形成することが可能となる。そして、図5に示すように、相対峙する端子2a,2b相互間の不要部分をプレス打ち抜きなどの手段で切断除去することにより、前記連結部10がなくなり、除去部分11を挟んで均一厚みのはんだプリコート層6を有する端子2a,2bがそれぞれ離間して形成される。   Thus, even if the cover lay 3 is displaced, the solder precoat layer 6 can be formed regardless of the positional displacement of the cover lay opening 3a. Then, as shown in FIG. 5, by removing unnecessary portions between the terminals 2a and 2b that are opposed to each other by means of press punching or the like, the connecting portion 10 is eliminated, and a uniform thickness is provided across the removed portion 11. The terminals 2a and 2b having the solder precoat layer 6 are formed apart from each other.

斯くして、相対峙する端子2a,2b間を連結部10によって繋ぐことで、カバーレイ3の位置ずれによる端子面積の変化(面積差)が発生することがなくなり、均一厚みのはんだプリコート層6を有する端子群が形成され、部品実装が安定して行えるため回路基板の生産性の向上に寄与できる。   Thus, by connecting the terminals 2a, 2b facing each other by the connecting portion 10, a change in the terminal area (area difference) due to the positional deviation of the cover lay 3 does not occur, and the solder precoat layer 6 having a uniform thickness. Since a terminal group having the above is formed and component mounting can be stably performed, it is possible to contribute to improvement of circuit board productivity.

なお、図4〜図5では、はんだの表面張力を説明するため、はんだプリコート層6の両端部側(カバーレイの開口部3aの縁部側)が極端に丸みをおびて記載されているが、双方の端子2a,2bのはんだプリコート層6の厚み(最厚部分)が等しいので、部品実装時にはんだがはみ出して隣接する他の端子に接触するようなことはない。   4 to 5, in order to explain the surface tension of the solder, both end portions of the solder precoat layer 6 (edge side of the opening 3a of the cover lay) are extremely rounded. Since the thickness (the thickest portion) of the solder precoat layer 6 of both the terminals 2a and 2b is equal, the solder does not protrude and come into contact with other adjacent terminals when mounting the components.

次に、図6〜図8に従って実施例2について説明する。図6は絶縁基板1の上に相対峙する端子2a,2bが複数組並列して配置された端子群を示し、該端子群には各端子2a,2b相互間を接続する第1の連結部12と、隣接する第1の連結部12,12相互間を接続する第2の連結部13が予め形成されておいる。この第1の連結部12と第2の連結部13は前記端子2a,2bと同一材質からなっている。絶縁基板1の表面にはカバーレイ3を貼り付けてあり、該カバーレイ3に設けた開口部3aから前記端子群の各端子2a,2bおよび第1の連結部12と第2の連結部13が露出しており、他の回路パターン部分はカバーレイ3にて被蔽されている。   Next, Example 2 will be described with reference to FIGS. FIG. 6 shows a terminal group in which a plurality of sets of terminals 2a and 2b facing each other on the insulating substrate 1 are arranged in parallel, and the terminal group includes a first connecting portion for connecting the terminals 2a and 2b to each other. 12 and the 2nd connection part 13 which connects between the adjacent 1st connection parts 12 and 12 are formed previously. The first connecting portion 12 and the second connecting portion 13 are made of the same material as the terminals 2a and 2b. A cover lay 3 is affixed to the surface of the insulating substrate 1, and the terminals 2 a and 2 b of the terminal group, the first connecting portion 12, and the second connecting portion 13 are opened from the opening 3 a provided in the cover lay 3. Are exposed, and other circuit pattern portions are covered with a coverlay 3.

図7は印刷用メタルマスク4を示し、図2のように端子および連結部の形状に合わせてもよいが、ここでは前記カバーレイの開口部3aに対応して一括開口した開口部4dが設けられている。ペースト状はんだ5を印刷すると、前記印刷用メタルマスクの開口部4dの全体にペースト状はんだ5が印刷される。印刷用メタルマスク4を取り外して、はんだ層をフェージングすれば、各端子2a,2bおよび第1の連結部12と第2の連結部13の平面部全体にはんだが流れ込み、図8に示すように、各端子2a,2bおよび第1の連結部12と第2の連結部13の上に、ほぼ均一厚みのはんだプリコート層6が形成される。   FIG. 7 shows the metal mask 4 for printing, and it may be adapted to the shape of the terminal and the connecting part as shown in FIG. 2, but here, an opening 4d that is collectively opened corresponding to the opening 3a of the coverlay is provided. It has been. When the paste-like solder 5 is printed, the paste-like solder 5 is printed over the entire opening 4d of the printing metal mask. If the metal mask 4 for printing is removed and the solder layer is fading, the solder flows into the entire flat portions of the terminals 2a and 2b and the first connecting portion 12 and the second connecting portion 13, as shown in FIG. The solder precoat layer 6 having a substantially uniform thickness is formed on each of the terminals 2a and 2b and the first connecting portion 12 and the second connecting portion 13.

このように、相対峙する端子2a,2b間に第1の連結部12を設けるだけではなく、隣接する第1の連結部12,12間の相互を接続する第2の連結部13を設けることにより、フュージング時に溶融したはんだが、対峙または隣接した端子間の平面部で移動することから、より一層均一厚みのはんだプリコート層6を形成することが可能となる。図示は省略するが、実施例1と同様に、相対峙する端子2a,2b相互間の不要部分をプレス打ち抜きなどの手段で切断除去することにより、前記第1の連結部12および第2の連結部13がなくなり、均一厚みのはんだプリコート層6を有する端子2a,2bがそれぞれ離間して形成される。   In this way, not only the first connecting portion 12 is provided between the terminals 2a and 2b facing each other, but also the second connecting portion 13 that connects the adjacent first connecting portions 12 and 12 is provided. Thus, the solder melted at the time of fusing moves on the flat portion between the opposing terminals or adjacent terminals, so that it is possible to form the solder precoat layer 6 having a more uniform thickness. Although not shown, as in the first embodiment, unnecessary portions between the terminals 2a and 2b facing each other are cut and removed by means such as press punching, whereby the first connecting portion 12 and the second connecting portion. The portions 13 are eliminated, and the terminals 2a and 2b having the solder precoat layer 6 having a uniform thickness are formed apart from each other.

なお、第1および第2の連結部12,13の回路幅は、端子2a,2bの回路幅の30%から150%までが適当である。接続する回路幅により第1および第2の連結部12,13の接続部分近傍(交差部分)の面積が端子2a,2b部分よりも大きくなるため、はんだプリコート層6の厚みが交差部分でやや厚くなる。実験例では、端子2a,2bの回路幅が0.25mm、第1および第2の連結部12,13の回路幅が0.25mmの場合、交差部分の厚みは端子部の厚み40μmに対し、60μmとやや厚くなることを確認した。しかし、前述したように、第1の連結部12と第2の連結部13は打ち抜いて除去するため、部品実装において悪影響を及ぼすことはない。   The circuit width of the first and second connecting portions 12 and 13 is suitably 30% to 150% of the circuit width of the terminals 2a and 2b. Since the area in the vicinity of the connection portion (intersection portion) of the first and second connecting portions 12 and 13 becomes larger than the terminal 2a and 2b portions depending on the circuit width to be connected, the thickness of the solder precoat layer 6 is slightly thick at the intersection portion. Become. In the experimental example, when the circuit width of the terminals 2a and 2b is 0.25 mm and the circuit width of the first and second connecting portions 12 and 13 is 0.25 mm, the thickness of the intersection is 60 μm with respect to the thickness of the terminal portion of 40 μm. It was confirmed that it became a little thicker. However, as described above, since the first connecting portion 12 and the second connecting portion 13 are punched and removed, there is no adverse effect on component mounting.

次に、図9〜図10に従って実施例3について説明する。実施例3は実施例2の変形例である。図9に示すように、絶縁基板1の上に相対峙する端子2a,2bが複数組並列して配置するとともに、各端子2a,2b相互間を接続する第1の連結部12と、隣接する第1の連結部12,12相互間を接続する第2の連結部13が予め形成されている。さらに、前記第1の連結部12の略中央部、すなわち第2の連結部13との接続部分近傍(交差部分)に開口部14を設けて、該交差部分の回路を一部除去する。   Next, Example 3 will be described with reference to FIGS. The third embodiment is a modification of the second embodiment. As shown in FIG. 9, a plurality of sets of terminals 2a and 2b facing each other on the insulating substrate 1 are arranged in parallel and adjacent to the first connecting portion 12 that connects the terminals 2a and 2b. The 2nd connection part 13 which connects between the 1st connection parts 12 and 12 is formed previously. Further, an opening 14 is provided in the approximate center of the first connecting portion 12, that is, in the vicinity of the connecting portion with the second connecting portion 13 (crossing portion), and a part of the circuit at the crossing portion is removed.

この開口部14は丸形のほか三角形や四角形など多角形であってもよい。なお、最外側の交差部分には前記開口部14ではなく、第2の連結部13との接続部分の反対側すなわち最外側縁部に切欠部15を設けてもよい。前記開口部14の大きさは、交差部分の面積の10%から80%程度の面積が適当である。   The opening 14 may be a polygon such as a triangle or a quadrangle in addition to a round shape. In addition, you may provide the notch 15 in the outermost crossing part on the opposite side of the connection part with the 2nd connection part 13, ie, the outermost edge part instead of the said opening part 14. FIG. The size of the opening 14 is suitably about 10% to 80% of the area of the intersection.

実施例2の場合と同様に、印刷用メタルマスク4を使用してカバーレイの開口部3a部分にペースト状はんだ5を印刷し、印刷用メタルマスク4を取り外して、はんだ層をフェージングすれば、各端子2a,2bおよび第1の連結部12と第2の連結部13の平面部全体にはんだが流れ込み、図10に示すように、各端子2a,2bおよび第1の連結部12と第2の連結部13の上に、ほぼ均一厚みのはんだプリコート層6が形成される。   As in the case of Example 2, if the paste solder 5 is printed on the opening 3a portion of the coverlay using the printing metal mask 4, the printing metal mask 4 is removed, and the solder layer is faded, Solder flows into the entire flat portions of the terminals 2a and 2b and the first connecting portion 12 and the second connecting portion 13, and as shown in FIG. 10, the terminals 2a and 2b and the first connecting portion 12 and the second connecting portion 13 A solder precoat layer 6 having a substantially uniform thickness is formed on the connecting portion 13.

このように、第1の連結部12と第2の連結部13の交差部分に開口部14または切欠部15を設けたことにより、交差部分の面積が端子部分よりも大きくならない。従って、該交差部分のはんだ層が厚くならず、他の平面部とほぼ同じ厚みで、より一層均一した厚みのはんだプリコート層6が形成される。   Thus, by providing the opening 14 or the notch 15 at the intersection of the first coupling portion 12 and the second coupling portion 13, the area of the intersection does not become larger than the terminal portion. Therefore, the solder layer at the intersecting portion does not become thick, and the solder precoat layer 6 having a more uniform thickness is formed with substantially the same thickness as the other flat portions.

そして、端子2a,2b相互間の不要部分を切断除去することにより、前記第1の連結部12および第2の連結部13がなくなり、均一厚みのはんだプリコート層6を有する端子2a,2bがそれぞれ離間して形成される。   Then, by cutting and removing unnecessary portions between the terminals 2a and 2b, the first connecting portion 12 and the second connecting portion 13 are eliminated, and the terminals 2a and 2b having the uniform thickness solder precoat layer 6 are respectively provided. They are formed apart.

次に、図11〜図12に従って実施例4について説明する。実施例4は実施例2のさらなる変形例である。図11に示すように、絶縁基板1の上に相対峙する端子2a,2bが複数組並列して配置するとともに、各端子2a,2b相互間を接続する第1の連結部12と、隣接する第1の連結部12,12相互間を接続する第2の連結部13が予め形成されている。さらに、最外側の第1の連結部12には、第2の連結部13との接続部分の反対側すなわち最外側縁部に凸部16を設けてある。   Next, a fourth embodiment will be described with reference to FIGS. The fourth embodiment is a further modification of the second embodiment. As shown in FIG. 11, a plurality of sets of terminals 2a and 2b facing each other on the insulating substrate 1 are arranged in parallel and adjacent to the first connecting portion 12 that connects the terminals 2a and 2b. The 2nd connection part 13 which connects between the 1st connection parts 12 and 12 is formed previously. Further, the outermost first connecting portion 12 is provided with a convex portion 16 on the opposite side of the connecting portion with the second connecting portion 13, that is, the outermost edge.

実施例2の場合と同様に、印刷用メタルマスク4を使用してカバーレイの開口部3a部分にペースト状はんだ5を印刷し、印刷用メタルマスク4を取り外して、はんだ層をフェージングすれば、各端子2a,2bおよび第1の連結部12と第2の連結部13の平面部全体にはんだが流れ込み、各端子2a,2bおよび第1の連結部12と第2の連結部13の上に、ほぼ均一厚みのはんだプリコート層6が形成される。   As in the case of Example 2, if the paste solder 5 is printed on the opening 3a portion of the coverlay using the printing metal mask 4, the printing metal mask 4 is removed, and the solder layer is faded, Solder flows into the entire flat portions of the terminals 2a, 2b and the first connecting portion 12 and the second connecting portion 13, and on the terminals 2a, 2b, the first connecting portion 12 and the second connecting portion 13, respectively. The solder precoat layer 6 having a substantially uniform thickness is formed.

実施例2で前述したように、第1および第2の連結部12,13の交差部分の面積が端子2a,2b部分よりも大きくなるため、はんだプリコート層6の厚みが交差部分でやや厚くなるが、本実施例のように、最外側にある交差部分の外側に前記凸部16を設けたことにより、はんだが凸部16へ流れ込んで、最外側の交差部分とその他の交差部分とで、はんだの厚さがほぼ等しくなる。   As described above in the second embodiment, since the area of the intersecting portion of the first and second connecting portions 12 and 13 is larger than that of the terminals 2a and 2b, the thickness of the solder precoat layer 6 is slightly thick at the intersecting portion. However, as in this embodiment, by providing the convex portion 16 outside the intersecting portion on the outermost side, the solder flows into the convex portion 16, and the outermost intersecting portion and the other intersecting portions, Solder thickness is almost equal.

また、図12に示すように、前記第1の連結部12と第2の連結部13との交差部分に開口部14を設けて、該交差部分の回路を一部除去した回路基板においても、最外側の交差部分に、第2の連結部13との接続部分の反対側すなわち最外側縁部に凸部16を設ける。   In addition, as shown in FIG. 12, even in a circuit board in which an opening 14 is provided at the intersection of the first coupling portion 12 and the second coupling portion 13 and a circuit at the intersection is partially removed, A convex portion 16 is provided on the outermost crossing portion on the opposite side of the connecting portion with the second connecting portion 13, that is, the outermost edge portion.

図11の場合と同様に、カバーレイの開口部3a部分にペースト状はんだ5を印刷した後に、はんだ層をフェージングすれば、各端子2a,2bおよび第1の連結部12と第2の連結部13の平面部全体にはんだが流れ込み、各端子2a,2bおよび第1の連結部12と第2の連結部13の上にほぼ均一厚みのはんだプリコート層6が形成される。   As in the case of FIG. 11, if the solder layer is faded after the paste-like solder 5 is printed on the opening 3a portion of the coverlay, the terminals 2a and 2b, the first connecting portion 12 and the second connecting portion The solder flows into the entire plane portion 13, and the solder precoat layer 6 having a substantially uniform thickness is formed on each of the terminals 2 a and 2 b, the first connecting portion 12 and the second connecting portion 13.

この場合も、前記交差部分に開口部14を設けたことにより、該交差部分のはんだ層が厚くならず、さらに、最外側の交差部分の外側に前記凸部16を設けたことにより、はんだが凸部16へ流れ込むため、より一層均一した厚みのはんだプリコート層6が形成される。   Also in this case, by providing the opening 14 at the intersecting portion, the solder layer at the intersecting portion does not become thick, and further, by providing the convex portion 16 outside the outermost intersecting portion, the solder can be obtained. Since it flows into the convex part 16, the solder precoat layer 6 having a more uniform thickness is formed.

そして、図11および図12の何れの場合でも、交差部分のはんだ層が他の実施例に比較して薄くなることにより、端子2a,2b相互間の不要部分を打ち抜くときに、打ち抜き型が交差部分のはんだプリコート層に局部的に当たるのを防止できる。   In either case of FIG. 11 and FIG. 12, the punching die intersects when the unnecessary portion between the terminals 2a and 2b is punched because the solder layer at the intersecting portion is thinner than in the other embodiments. It is possible to prevent local contact with the solder precoat layer.

次に、図13〜図14に従って実施例5について説明する。実施例5は実施例4の変形例である。図13に示すように、絶縁基板1の上に相対峙する端子2a,2bが複数組並列して配置するとともに、各端子2a,2b相互間を接続する第1の連結部12と、隣接する第1の連結部12,12相互間を接続する第2の連結部13が予め形成されている。さらに、前記端子2a,2bの回路幅を回路パターンよりも広くするとともに、第1の連結部12と第2の連結部13の回路幅を端子2a,2bよりも狭く形成する。   Next, Example 5 will be described with reference to FIGS. The fifth embodiment is a modification of the fourth embodiment. As shown in FIG. 13, a plurality of sets of terminals 2a and 2b facing each other on the insulating substrate 1 are arranged in parallel and adjacent to the first connecting portion 12 that connects the terminals 2a and 2b. The 2nd connection part 13 which connects between the 1st connection parts 12 and 12 is formed previously. Further, the circuit widths of the terminals 2a and 2b are made wider than the circuit pattern, and the circuit widths of the first connecting part 12 and the second connecting part 13 are made narrower than the terminals 2a and 2b.

実施例4の場合と同様に、印刷用メタルマスク4を使用してカバーレイの開口部3a部分にペースト状はんだ5を印刷し、印刷用メタルマスク4を取り外して、はんだ層をフェージングすれば、各端子2a,2bおよび第1の連結部12と第2の連結部13の平面部全体にはんだが流れ込んではんだプリコート層6が形成される。   As in the case of Example 4, if the paste-like solder 5 is printed on the opening 3a portion of the coverlay using the printing metal mask 4, the printing metal mask 4 is removed, and the solder layer is faded, Solder flows into the terminals 2a and 2b and the entire flat portion of the first connecting portion 12 and the second connecting portion 13 to form the solder precoat layer 6.

本実施例では、端子2a,2bの回路幅を回路パターンよりも広く、カバーレイの開口部3aから端子2a,2bまでの部分と、第1の連結部12と第2の連結部13を幅狭に形成してあるので、幅狭部分でははんだ層が薄くなり、カバーレイ3がずれたとしても、その影響をより小さくすることができる。すなわち、端子2a,2bのみではんだ層が厚くなり、該端子部分で均一した厚みのはんだプリコート層6が形成される。また端子2a,2b相互間は切断除去されるが、この除去部分11のはんだ量を少なくすることができ、不要部分におけるはんだの無駄を省くことが可能である。   In the present embodiment, the circuit width of the terminals 2a and 2b is wider than the circuit pattern, and the width from the cover lay opening 3a to the terminals 2a and 2b, the first connecting portion 12 and the second connecting portion 13 is wide. Since it is formed narrowly, even if the solder layer becomes thin in the narrow portion and the cover lay 3 is displaced, the influence can be further reduced. That is, the solder layer is thickened only by the terminals 2a and 2b, and the solder precoat layer 6 having a uniform thickness is formed at the terminal portions. Further, the terminals 2a and 2b are cut and removed, but the amount of solder in the removed portion 11 can be reduced, and waste of solder in unnecessary portions can be eliminated.

次に、図15〜図16に従って実施例6について説明する。実施例1〜実施例5は、何れも端子2a,2bおよび連結部(10または12,13)にプリコート層6を形成した後に、端子2a,2b相互間の不要部分を打ち抜いて除去するが、多層回路基板などでは、外層基板の不要部分を打ち抜くことにより、内層基板の回路も打ち抜かれてしまうため、回路設計に大きな制約を受けてしまうことが多い。そこで、不要部分をハーフカットすることによって、外層基板の不要部分のみを除去する。   Next, Example 6 will be described with reference to FIGS. In each of Examples 1 to 5, after the precoat layer 6 is formed on the terminals 2a and 2b and the connecting portion (10 or 12, 13), unnecessary portions between the terminals 2a and 2b are punched and removed. In a multilayer circuit board or the like, a circuit on the inner layer board is also punched by punching an unnecessary portion of the outer layer board, and thus circuit design is often greatly restricted. Therefore, only unnecessary portions of the outer layer substrate are removed by half-cutting unnecessary portions.

例えば、図15に示すように、多層回路基板の外層基板20に、実施例1において説明したような端子群が形成されている場合、不要部分として除去すべき箇所に対応して中空部21が形成された接着部材22で、前記外装基板20を内層基板23に積層しておく。   For example, as shown in FIG. 15, when the terminal group as described in the first embodiment is formed on the outer layer substrate 20 of the multilayer circuit board, the hollow portion 21 corresponds to the portion to be removed as an unnecessary portion. The exterior substrate 20 is laminated on the inner layer substrate 23 with the formed adhesive member 22.

すなわち、相対峙する端子2a,2bおよび連結部10にはんだ層を印刷し、フェージングによってプリコート層6を形成した後に、端子2a,2b間の除去部分11に沿って外装基板20をハーフカットすれば、図16に示すように、前記接着部材22の中空部21がハーフカットの逃げとなり、内層基板23を傷損させることなくして、外層基板20の不要部分のみを除去することができる。斯くして、不要部分の除去による回路設計の制約を最小限に抑えることができる。   That is, after the solder layer is printed on the opposing terminals 2a and 2b and the connecting portion 10 and the precoat layer 6 is formed by fading, the exterior substrate 20 is half cut along the removed portion 11 between the terminals 2a and 2b. As shown in FIG. 16, the hollow portion 21 of the adhesive member 22 becomes a half-cut relief, and only the unnecessary portion of the outer layer substrate 20 can be removed without damaging the inner layer substrate 23. Thus, circuit design restrictions due to removal of unnecessary portions can be minimized.

ここで、前記中空部21に、フッ素樹脂シートや、離型剤処理を表面に施した可撓性絶縁シートなどの接着しないシート部材を載置すると、ハーフカットの際の下当てシートとなるので、安定したハーフカットができるとともに、万一、切断深さに狂いが生じても、内装基板を防護する防護シートにもなり、好適である。   Here, when a non-adhesive sheet member such as a fluororesin sheet or a flexible insulating sheet subjected to a release agent treatment is placed on the hollow portion 21, a sheet for lowering is formed during half-cutting. In addition to being able to perform stable half-cutting, it is also suitable as a protective sheet that protects the interior substrate even if the cutting depth is distorted.

なお、本発明は、本発明の精神を逸脱しない限り種々の改変を為すことができ、そして、本発明が該改変されたものに及ぶことは当然である。   It should be noted that the present invention can be variously modified without departing from the spirit of the present invention, and the present invention naturally extends to the modified ones.

本発明に係る実施例1の製造過程を示す説明図。Explanatory drawing which shows the manufacture process of Example 1 which concerns on this invention. 本発明に係る実施例1の製造過程を示す説明図。Explanatory drawing which shows the manufacture process of Example 1 which concerns on this invention. 本発明に係る実施例1の製造過程を示す説明図。Explanatory drawing which shows the manufacture process of Example 1 which concerns on this invention. 本発明に係る実施例1の製造過程を示す説明図。Explanatory drawing which shows the manufacture process of Example 1 which concerns on this invention. 本発明に係る実施例1の製造過程を示す説明図。Explanatory drawing which shows the manufacture process of Example 1 which concerns on this invention. 本発明に係る実施例2の製造過程を示す説明図。Explanatory drawing which shows the manufacture process of Example 2 which concerns on this invention. 本発明に係る実施例2の製造過程を示す説明図。Explanatory drawing which shows the manufacture process of Example 2 which concerns on this invention. 本発明に係る実施例2の製造過程を示す説明図。Explanatory drawing which shows the manufacture process of Example 2 which concerns on this invention. 本発明に係る実施例3の製造過程を示す説明図。Explanatory drawing which shows the manufacture process of Example 3 which concerns on this invention. 本発明に係る実施例3の製造過程を示す説明図。Explanatory drawing which shows the manufacture process of Example 3 which concerns on this invention. 本発明に係る実施例4の製造過程を示す説明図。Explanatory drawing which shows the manufacture process of Example 4 which concerns on this invention. 本発明に係る実施例4の製造過程を示す説明図。Explanatory drawing which shows the manufacture process of Example 4 which concerns on this invention. 本発明に係る実施例5の製造過程を示す説明図。Explanatory drawing which shows the manufacture process of Example 5 which concerns on this invention. 本発明に係る実施例5の製造過程を示す説明図。Explanatory drawing which shows the manufacture process of Example 5 which concerns on this invention. 本発明に係る実施例6の製造過程を示す説明図。Explanatory drawing which shows the manufacture process of Example 6 which concerns on this invention. 本発明に係る実施例6の製造過程を示す説明図。Explanatory drawing which shows the manufacture process of Example 6 which concerns on this invention. 従来の製造過程での不具合を示す説明図。Explanatory drawing which shows the malfunction in the conventional manufacturing process. 従来の製造過程での不具合を示す説明図。Explanatory drawing which shows the malfunction in the conventional manufacturing process. 従来の製造過程での不具合を示す説明図。Explanatory drawing which shows the malfunction in the conventional manufacturing process. 従来の製造過程での不具合示す説明図。Explanatory drawing which shows the malfunction in the conventional manufacturing process. 従来の製造過程で実装部品との接続が良好な状態を示す説明図。Explanatory drawing which shows a state with a favorable connection with mounting components in the conventional manufacturing process. 従来の製造過程で実装部品との接続が不良な状態を示す説明図。Explanatory drawing which shows a state with a bad connection with mounting components in the conventional manufacturing process.

符号の説明Explanation of symbols

1 絶縁基板
2,2a,2b 端子
3 カバーレイ
3a 開口部
4 印刷用メタルマスク
4a,4b,4c,4d 開口部
5 ペースト状はんだ
6,6a,6b はんだプリコート層
10 連結部
11 除去部
12 第1の連結部
13 第2の連結部
14 開口部
15 切欠部
16 凸部
20 外層基板
21 中空部
22 接着部材
23 内層基板

DESCRIPTION OF SYMBOLS 1 Insulating board 2, 2a, 2b Terminal 3 Coverlay 3a Opening 4 Printing metal mask 4a, 4b, 4c, 4d Opening 5 Paste-like solder 6, 6a, 6b Solder precoat layer 10 Connection part 11 Removal part 12 1st Connecting portion 13 Second connecting portion 14 Opening portion 15 Notch portion 16 Convex portion 20 Outer layer substrate 21 Hollow portion 22 Adhesive member 23 Inner layer substrate

Claims (6)

回路基板に設けられた部品実装用の複数個の端子からなる端子群であって、該端子群の表面にはんだプリコート層を形成する方法において、
前記端子群には相対峙する端子相互間をそれぞれ接続する前記端子と同一材質からなる連結部が予め形成されており、
この連結部を含む前記端子群の表面にはんだ層を設け、このはんだ層を加熱溶融してはんだプリコート層を形成し、
然る後に、前記端子相互間の不要部分を切断除去することを特徴とする回路基板の端子群製造方法。
In a method of forming a solder precoat layer on a surface of a terminal group comprising a plurality of terminals for mounting components provided on a circuit board,
The terminal group is formed in advance with a connecting portion made of the same material as the terminal for connecting the terminals facing each other.
A solder layer is provided on the surface of the terminal group including the connecting portion, the solder layer is heated and melted to form a solder precoat layer,
Thereafter, an unnecessary portion between the terminals is cut and removed.
回路基板に設けられた部品実装用の複数個の端子からなる端子群であって、該端子群の表面にはんだプリコート層を形成する方法において、
前記端子群には相対峙する端子相互間をそれぞれ接続する前記端子と同一材質からなる第1の連結部と、隣接する第1の連結部相互間をそれぞれ接続する前記端子および第1の連結部と同一材質からなる第2の連結部が予め形成されており、
これら第1および第2の連結部を含む前記端子群の表面にはんだ層を設け、このはんだ層を加熱溶融してはんだプリコート層を形成し、
然る後に、前記端子相互間の不要部分を切断除去することを特徴とする回路基板の端子群製造方法。
In a method of forming a solder precoat layer on a surface of a terminal group comprising a plurality of terminals for mounting components provided on a circuit board,
The terminal group includes a first connecting portion made of the same material as the terminal that connects the terminals facing each other, and the terminal and the first connecting portion that connect the adjacent first connecting portions, respectively. And a second connecting portion made of the same material is formed in advance,
A solder layer is provided on the surface of the terminal group including the first and second connecting portions, the solder layer is heated and melted to form a solder precoat layer,
Thereafter, an unnecessary portion between the terminals is cut and removed.
上記第1の連結部であって、該第1の連結部と第2の連結部の接続部分近傍に開口部を設けたことを特徴とする請求項2記載の回路基板の端子群製造方法。   3. The method for manufacturing a terminal group of a circuit board according to claim 2, wherein an opening is provided in the vicinity of a connection portion of the first connecting portion and the first connecting portion and the second connecting portion. 上記第1の連結部であって、上記端子群の最外側縁部に切欠部を設けたことを特徴とする請求項2記載の回路基板の端子群製造方法。   3. The method of manufacturing a terminal group of a circuit board according to claim 2, wherein a cutout portion is provided in the outermost edge portion of the terminal group as the first connecting part. 上記第1の連結部であって、上記端子群の最外側縁部に凸部を設けたことを特徴とする請求項2記載の回路基板の端子群製造方法。   3. The method for manufacturing a terminal group of a circuit board according to claim 2, wherein a convex portion is provided on the outermost edge of the terminal group as the first connecting part. 上記端子の回路幅を回路パターンよりも幅広に形成し、且つ、端子相互間の連結部の回路幅を上記端子よりも幅狭に形成したことを特徴とする請求項1または2記載の回路基板の端子群製造方法。

3. The circuit board according to claim 1, wherein a circuit width of the terminal is formed wider than a circuit pattern, and a circuit width of a connecting portion between the terminals is formed narrower than the terminal. Terminal group manufacturing method.

JP2006106128A 2006-04-07 2006-04-07 Circuit board terminal group manufacturing method Expired - Fee Related JP4936771B2 (en)

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CN2007100904082A CN101052279B (en) 2006-04-07 2007-04-06 Method of manufacturing terminal set of circuit basic plate

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Citations (2)

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Publication number Priority date Publication date Assignee Title
JPH08167771A (en) * 1994-12-13 1996-06-25 Sony Corp Soldering method and printed wiring board
JPH10322007A (en) * 1997-05-21 1998-12-04 Ibiden Co Ltd Manufacture of printed board

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Publication number Priority date Publication date Assignee Title
JPH08167771A (en) * 1994-12-13 1996-06-25 Sony Corp Soldering method and printed wiring board
JPH10322007A (en) * 1997-05-21 1998-12-04 Ibiden Co Ltd Manufacture of printed board

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