JP2007275209A5

JP2007275209A5 -

Info

Publication number: JP2007275209A5
Application number: JP2006103754A
Authority: JP
Filing date: 2006-04-05
Publication date: 2009-05-21

Claims

A gaming machine,
A main control board for controlling the progress of the game;
A payout control board that controls payout of game balls or game medals based on payout commands that are commands related to payout of game balls or game medals transmitted from the main control board;
With
The main control board is
A main control board serial transmission unit that serially transmits commands to the payout control board at a low communication speed that is not affected by electrical noise,
A main control board parallel reception port which is a part of general-purpose parallel ports in the main control board;
With
The payout control board is:
A payout control board serial receiving unit that receives commands serially at a low communication speed not affected by electrical noise from the main control board;
A payout control board parallel transmission port which is a part of the general-purpose parallel ports in the payout control board;
A payout control board central processing unit for repeatedly executing a fixed-time interrupt process and performing a process related to the payout;
With
The dispensing control board serial receiving unit
A reception shift register that has a storage capacity of 1 byte, converts a serially transmitted command from the main control board into parallel data, and stores the parallel data;
A reception buffer register for receiving and storing a command stored in the reception shift register when the storage state is 1 byte and the storage state is clear;
With
The payout control board is:
In response to a set signal output from the payout control board central processing unit, a buffer clear unit that clears the reception buffer register,
The payout command is serially transmitted from the main control board serial transmission unit to the payout control board serial reception unit and stored in the reception buffer register.
When the payout control board central processing unit reads the payout command stored in the reception buffer register, it outputs the set signal to the buffer clear unit, and further determines that the payout command has been normally received. In this case, a payout command confirmation signal is output via the payout control board parallel transmission port,
The payout command confirmation signal is transmitted in parallel from the payout control board parallel transmission port to the main control board parallel reception port.
Gaming machine.

A gaming machine according to claim 1,
  The main control board is
    From the payout control board, a main control board serial receiving unit that receives commands serially at a low communication speed not affected by electrical noise,
    A main control board parallel transmission port which is a part of general-purpose parallel ports in the main control board;
    A main control board central processing unit for repeatedly executing a fixed-time interrupt process and performing a process related to the control of the progress of the game;
  With
  The payout control board is:
    A payout control board serial transmission unit that serially transmits commands to the main control board at a low communication speed that is not affected by electrical noise,
    A payout control board parallel receiving port which is a part of general purpose parallel ports in the payout control board;
  With
  The payout control board central processing unit detects a predetermined operation state of the gaming machine, and outputs an operation state command that is a command indicating the operation state via the payout control board serial transmission unit,
  The operation state command is serially transmitted from the payout control board serial transmission unit to the main control board serial reception unit,
  When the main control board central processing unit determines that the operation state command has been received normally, it outputs an operation state command confirmation signal via the main control board parallel transmission port,
  The operation state command confirmation signal is transmitted in parallel from the main control board parallel transmission port to the payout control board parallel reception port.
Gaming machine.

A gaming machine according to claim 1,
The payout control board serial receiver, and a general-purpose parallel port in the payout control board;
The buffer clear unit is integrated on one chip,
Gaming machine.