JP2007273511A - Semiconductor device and its fabrication process - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device in which only a high frequency current flowing a part of the internal line can be suppressed selectively. <P>SOLUTION: The semiconductor device 1 comprises a semiconductor substrate 2, an insulating layer 3 formed on the semiconductor substrate 2, a magnetic body 10 buried in a partial region Rf of the insulating layer 3 to reach the surface thereof, and a metallization 5 buried in the insulating layer 3 to penetrate the magnetic body 10. The magnetic body 10 covers the entire circumference of the metallization 5 in the partial region Rf. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof. In particular, the present invention relates to a semiconductor device having an internal wiring through which a high-frequency current flows, and a method for manufacturing the semiconductor device based on a semiconductor process.

  In recent years, with the miniaturization and high performance of electronic devices, the response speed and operating frequency of semiconductor devices such as LSIs used in the electronic devices are becoming higher and higher. As a result, a high frequency current flows through the internal wiring of the semiconductor device. The electromagnetic radiation noise generated by this high-frequency current not only causes electromagnetic interference (EMI) to other equipment, but also adversely affects its own circuit operation. Therefore, it is desired to reduce electromagnetic radiation noise as much as possible. In order to reduce electromagnetic radiation noise, it is necessary to suppress high-frequency current flowing in the internal wiring of the semiconductor device.

  Patent Document 1 describes a multilayer printed wiring board. The multilayer printed wiring board is composed of one or more signal wiring layers, a power supply wiring layer, and a ground layer. The power supply wiring layer is sandwiched between two ground layers. The periphery of the power supply wiring is surrounded by a magnetic material.

  The semiconductor device described in Patent Document 2 includes a mounting substrate, a semiconductor chip mounted on the mounting substrate, and a spiral inductor formed on the semiconductor chip. The semiconductor chip including the spiral inductor is sealed with a magnetic resin material on the mounting substrate.

  Patent Document 3 describes a multilayer circuit board having a strip line. According to the multilayer circuit board, the stripline conductor film is disposed in the multilayer substrate composed of a plurality of dielectric layers so as to be sandwiched between the dielectric layers. In addition, a ground conductor film is formed in the horizontal direction and the vertical direction so as to surround the dielectric layer sandwiching the strip line conductor film.

  Patent Document 4 describes a thin film magnetic memory device. The thin film magnetic memory device includes an antenna unit for transmitting and receiving radio waves to the outside. The inductance wiring constituting the antenna unit has a metal wiring and a magnetic film. The magnetic film is formed corresponding to the lower surface portion of the metal wiring, or the lower surface portion and the side surface portion thereof. The magnetic film is manufactured not in a dedicated manufacturing process but in the original manufacturing process of the thin film magnetic memory device.

  Patent Document 5 describes a magnetic storage device. The magnetic storage device includes a wiring that generates a write magnetic field and a storage element that uses a magnetic material in which information is written by the write magnetic field. The memory layer of the memory element is formed so as to surround the periphery of the wiring facing the memory element.

JP 2000-183540 A JP 2003-68941 A JP-A-8-78912 Japanese Patent Laid-Open No. 2003-243631 JP 2004-247624 A

  An object of the present invention is to provide a semiconductor device capable of selectively suppressing only a high-frequency current flowing in a part of internal wiring and a method for manufacturing the same.

  Another object of the present invention is to provide a technique capable of preventing metal ions contained in a magnetic material from being mixed into a semiconductor in a semiconductor process.

  Still another object of the present invention is to provide a semiconductor device having a magnetic body for suppressing high-frequency current at a desired position and preventing deterioration of electrical characteristics due to mixing of metal ions.

  [Means for Solving the Problems] will be described below using the numbers and symbols used in [Best Mode for Carrying Out the Invention]. These numbers and symbols are added in parentheses in order to clarify the correspondence between the description of [Claims] and [Best Mode for Carrying Out the Invention]. However, these numbers and symbols should not be used for the interpretation of the technical scope of the invention described in [Claims].

  In a first aspect of the present invention, a method for manufacturing a semiconductor device is provided. The manufacturing method includes (A) a step of forming a wiring structure on the semiconductor substrate (2) by a semiconductor process (previous step). The wiring structure is embedded in the insulating layer (3) formed on the semiconductor substrate (2) and a partial region (Rf) of the insulating layer (3), and is exposed on the surface of the insulating layer (3). And a metal wiring (5) embedded in the insulating layer (3) so as to penetrate the sacrificial layer (4). The sacrificial layer (4) is made of a soluble material.

  In the manufacturing method according to the present invention, (B) after the previous step, the sacrificial layer (4) is removed using a solvent or the like, and a cavity is formed in the partial region (Rf) in the insulating layer (3). (6) After the step of forming (C) and the step (B), a magnetic material (which covers the entire circumference of a part of the metal wiring (5) by filling the cavity (6) with a magnetic material ( 10).

  In the step (A), the sacrificial layer (4) may be formed so as to be exposed on the surface of the insulating layer (3) at a plurality of locations (OP1, OP2). Further, the sacrificial layer (4) may be formed so that the shape of the surface of the insulating layer (3) is substantially the same as the shape of the partial region (Rf) in a plane parallel to the surface. The sacrificial layer (4) may be formed so as to penetrate the semiconductor substrate (2) and the insulating layer (3).

  The sacrificial layer (4) formed in the step (A) includes the first sacrificial layer (4) embedded in the first region (Rf1) of the insulating layer (3) and the second region of the insulating layer (3). And a second sacrificial layer (4) embedded in (Rf2). In that case, in the step (B), the first cavity (6-1) and the second cavity (6-2) are formed in the first region (Rf1) and the second region (Rf2), respectively. The step (C) includes (C1) a step of forming the first magnetic body (10-1) by filling the first cavity (6-1) with the first magnetic material, and (C2) the first step. And filling the second cavity (6-2) with the second magnetic material to form the second magnetic body (10-2). The first magnetic material and the second magnetic material may be different. The first magnetic material and the second magnetic material may be the same.

  The manufacturing method according to the present invention further includes (D) a step of providing an insulator (20) on the insulating layer (3) so as to cover the magnetic body (10) exposed on the surface of the insulating layer (3). May be.

  The manufacturing method according to the present invention further includes (E) another magnetic body (3) on the insulating layer (3) so as to be connected to at least a part of the magnetic body (10) exposed on the surface of the insulating layer (3). 30) may be provided. The composition of the magnetic body (10) and the composition of the other magnetic body (30) may be different from each other.

  In a second aspect of the present invention, a semiconductor device (1) is provided. The semiconductor device (1) is embedded in a semiconductor substrate (2), an insulating layer (3) formed on the semiconductor substrate (2), and a partial region (Rf) of the insulating layer (3). A magnetic body (10) reaching the surface of the insulating layer (3), and a metal wiring (5) embedded in the insulating layer (3) so as to penetrate the magnetic body (10). The magnetic body (10) covers the entire circumference of the metal wiring (5) in the partial region (Rf).

  The magnetic body (10) may penetrate the semiconductor substrate (2) and the insulating layer (3). In the magnetic body (10), a magnetic material and a soluble material may be mixed. Preferably, the magnetic body (10) is formed by a wet ferrite method.

  The metal wiring (5) is, for example, a power supply wiring or an I / O wiring.

  The magnetic body (10) is embedded in the first magnetic body (10-1) embedded in the first region (Rf1) of the insulating layer (3) and the second region (Rf2) of the insulating layer (3). And the second magnetic body (10-2). The composition of the first magnetic body (10-1) and the composition of the second magnetic body (10-2) may be different from each other.

  The semiconductor device (1) according to the present invention may further include an insulator (20) formed so as to cover the magnetic body (10) on the surface of the insulating layer (3).

  The semiconductor device (1) according to the present invention may further include another magnetic body (30) provided on the insulating layer (3). The other magnetic body (30) is connected to at least a part of the magnetic body (10) on the surface of the insulating layer (3). The composition of the magnetic body (10) and the composition of the other magnetic body (30) may be different from each other.

  According to the semiconductor device of the present invention, the magnetic body is provided so as to cover only a part of the metal wiring (internal wiring). The magnetic body is formed so as to cover the entire circumference of the metal wiring in the partial section. The high frequency magnetic field generated by the high frequency current flowing through the metal wiring is continuously absorbed by the magnetic material. As a result, electromagnetic radiation noise is reduced, and high-frequency current flowing through the metal wiring is effectively suppressed.

  In addition, the high-frequency current is suppressed only in the metal wiring covered with the magnetic material. Therefore, it is possible to prevent a situation where the high-speed / high-frequency signal is not transmitted due to the influence of the magnetic material even to the signal wiring through which the high-speed / high-frequency signal should pass. That is, the present invention can be applied only to a specific circuit, and only a high-frequency current flowing in a part of the internal wiring can be selectively suppressed. Only high-frequency current of a desired circuit can be limitedly suppressed without obstructing the propagation of required high-speed and high-frequency signals.

  Furthermore, according to the present invention, deterioration of electrical characteristics of a manufactured semiconductor device is prevented. The reason is as follows. If the magnetic material is formed in a semiconductor process (previous process), there is a risk that metal ions such as Fe, Ni, Mn, and Zn contained in the magnetic material are mixed as impurities into the silicon substrate or the like. Such impurities, especially metal ions, greatly deteriorate the electrical characteristics of the semiconductor. However, according to the present invention, in the semiconductor process (previous process), a sacrificial layer made of a soluble material is formed in the region where the magnetic material is formed. After the semiconductor process, the sacrificial layer is removed with a solvent or the like, and the vacant region is filled with a magnetic material. Therefore, in the semiconductor process, the metal ions contained in the magnetic material are prevented from entering the semiconductor. According to the semiconductor device manufactured in this way, deterioration of electrical characteristics due to the mixing of metal ions is prevented.

  A semiconductor device and a manufacturing method thereof according to embodiments of the present invention will be described with reference to the accompanying drawings.

1. 1. First embodiment 1-1. Structure FIGS. 1A and 1B are cross-sectional views showing the structure of the semiconductor device 1 according to the first embodiment. FIG. 1A shows a cross-sectional structure along line AA ′ in FIG. 1B, and FIG. 1B shows a cross-sectional structure along line BB ′ in FIG. 1A. In the figure, the XY plane is defined as a plane parallel to the substrate, and the Z direction is defined as a direction orthogonal to the substrate surface.

  As shown in FIGS. 1A and 1B, a wiring structure is formed on a semiconductor substrate 2 exemplified by a silicon substrate. Specifically, the insulating layer 3 is formed on the semiconductor substrate 2, and the metal wiring 5 is embedded in the insulating layer 3. The metal wiring 5 is a signal wiring through which high-frequency current flows, and is, for example, an internal power supply wiring or an I / O wiring.

  In addition, a magnetic body 10 is embedded in a partial region Rf of the insulating layer 3. As shown in FIG. 1A, the metal wiring 5 penetrates the magnetic body 10 in the X direction. The magnetic body 10 plays a role of suppressing high-frequency current flowing through the metal wiring 5. As shown in FIG. 1B, the magnetic body 10 covers the entire circumference of the metal wiring 5 in the region Rf. That is, the magnetic body 10 completely covers the upper surface, the bottom surface, and the side surface of a partial section of the metal wiring 5. Thereby, the high frequency current which flows through the metal wiring 5 is suppressed effectively.

  As will be described in detail later in Section 1-2, the magnetic body 10 according to the present embodiment is formed by filling the cavity 6 in the insulating layer 3 with a magnetic material. A wet ferrite method is used for filling the magnetic material. In order to fill the cavity 6 with the magnetic material, it is necessary that the cavity 6 reaches the surface of the insulating layer 3 and that at least one opening OP is provided on the surface of the insulating layer 3. Therefore, the magnetic body 10 formed by filling the magnetic material also reaches the surface of the insulating layer 3. For example, in FIGS. 1A and 1B, the magnetic body 10 is exposed on the surface of the insulating layer 3 at two locations OP1 and OP2. It can be said that the opening OP on the surface of the insulating layer 3 and the magnetic body 10 reaching the opening OP have a structure unique to the manufacturing method according to the present invention.

1-2. Manufacturing Method Next, a manufacturing method of the semiconductor device according to the present embodiment will be described with reference to the flowchart shown in FIG.

Step S10: Pre-process (semiconductor process)
A pre-process (semiconductor process) is executed, and a preliminary wiring structure is formed on the silicon wafer (semiconductor substrate) 2. An example of the process for forming the preliminary wiring structure is shown in FIGS. 3 to 7 correspond to FIG. 1B and show a cross-sectional structure in the YZ plane.

  First, as shown in FIG. 3, first, an insulating layer 3 a is formed on the silicon wafer 2. The insulating layer 3a is a layer that becomes a base of the wiring structure.

  Next, as shown in FIG. 4, an insulating layer 3b and a sacrificial layer 4b are formed on the insulating layer 3a. The sacrificial layer 4b is made of a soluble material. For example, a resin made of hexafluoropropylene is used as the soluble material. The sacrificial layer 4b is formed in a region Rf where the magnetic body 10 is to be formed. The insulating layer 3b and the sacrificial layer 4b may be formed by a photolithography technique using a predetermined mask. The sacrificial layer 4b is a layer that covers the bottom surface of the metal wiring described later.

  Next, as shown in FIG. 5, an insulating layer 3c is formed on the insulating layer 3b. Also, a sacrificial layer 4c and a metal wiring 5 are formed on the sacrificial layer 4b. The sacrificial layer 4c is formed so as to sandwich the metal wiring 5 in the region Rf. That is, the sacrificial layer 4 c is a layer that covers the side surface of the metal wiring 5. The insulating layer 3c, the sacrificial layer 4c, and the metal wiring 5 may be formed by a photolithography technique using a predetermined mask.

  Next, as shown in FIG. 6, an insulating layer 3d is formed on the insulating layer 3c. A sacrificial layer 4 d is formed on the sacrificial layer 4 c and the metal wiring 5. The sacrificial layer 4 d is a layer that covers the upper surface of the metal wiring 5. The insulating layer 3d and the sacrificial layer 4d may be formed by a photolithography technique using a predetermined mask.

  Next, as shown in FIG. 7, an insulating layer 3e is formed on the insulating layer 3d. A sacrificial layer 4e is formed on the sacrificial layer 4d. The sacrificial layer 4e is a layer for forming the above-described openings OP1 and OP2, and the planar shape thereof is designed to be the same as the desired openings OP1 and OP2. That is, the sacrificial layer 4e is formed by using a mask having a pattern of desired openings OP1 and OP2.

  As described above, by repeating the lamination process, a preliminary wiring structure in which the metal wiring 5 and the sacrificial layer 4 (4b to 4e) are embedded in the insulating layer 3 (3a to 3e) is obtained. The sacrificial layers 4b to 4e are connected to each other and form a region in the insulating layer 3. The metal wiring 5 is formed so as to penetrate the certain region. The certain region corresponds to a region where the magnetic body 10 according to the present invention is formed, and is filled with a soluble material instead of the magnetic material. Since the soluble material (sacrificial layer 4) is exposed on the surface of the insulating layer 3, the sacrificial layer 4 can be removed by using a solvent or the like. As the soluble material, a material that dissolves at a predetermined temperature or a material that dissolves with a chemical may be used. For example, a resin made of hexafluoropropylene is used as the soluble material.

Step S20: Magnetic body formation process After step S10 (previous process) is completed, the magnetic body formation process according to the present invention is executed. First, the sacrificial layer 4 made of a soluble material is etched and removed (step S21). For example, the above-described hexafluoropropylene is dissolved by injecting tetrahydrofuran as a solvent from the opening OP. Similarly, the waste liquid may be discharged from the opening OP.

  As a result, the structure shown in FIGS. 8A and 8B is obtained. FIG. 8A shows a cross-sectional structure in the XZ plane, and corresponds to FIG. 1A. On the other hand, FIG. 8B shows a cross-sectional structure in the YZ plane, and corresponds to FIG. 1B. As shown in FIGS. 8A and 8B, as a result of the removal of the sacrificial layer 4, a cavity 6 is formed in the insulating layer 3. That is, a cavity 6 (space) for forming the magnetic body 10 is secured in a partial region Rf in the insulating layer 3. The cavity 6 reaches the surface of the insulating layer 3, and openings OP 1 and OP 2 are formed on the surface of the insulating layer 3. At least one opening OP is sufficient, but when there are a plurality of openings OP1 and OP2 as shown in FIG. 8A, the above-described solvent injection and waste liquid discharge are smoothly realized, which is preferable.

  Subsequently, the formed cavity 6 is filled with a magnetic material (step S22). The filling of the magnetic material is realized by, for example, the “wet ferrite method”. Specifically, ferrite can be precipitated by keeping the aqueous solution containing ferrous ions weakly acidic and oxidizing the solution. Since ferrite precipitates from ions dissolved in the aqueous solution, it is possible to generate ferrite densely even in a fine space. In this way, the cavity 6 is filled with ferrite, which is a magnetic material. The composition of the ferrite can be freely adjusted by controlling the metal ions, the type of oxidant, pH and temperature contained in the aqueous solution.

  As a result of the filling of the magnetic material, the structure shown in FIGS. 1A and 1B is obtained. That is, the magnetic body 10 embedded in the insulating layer 3 in the partial region Rf is obtained. The magnetic body 10 covers the entire circumference of the metal wiring 5 in the partial region Rf. For example, the magnetic body 10 is formed so as to cover a 5 mm long section of the metal wiring 5.

  If the function as a semiconductor integrated circuit is not hindered, it is not necessary to completely remove the soluble material (sacrificial layer 4) in step S21. A soluble material may remain in a part of the cavity 6. In that case, in the magnetic body 10 (cavity 6) of the manufactured semiconductor device, the magnetic material and the soluble material are mixed. It can be said that such a composition is also a characteristic unique to the manufacturing method according to the present invention.

Step S30: Post-process After step S20 is completed, a general “post-process” is performed. Thereby, individual semiconductor chips are obtained. The semiconductor chip is mounted on a printed board and encapsulated with resin.

1-3. Effect According to the semiconductor device 1 according to the present embodiment, the magnetic body 10 is provided so as to cover only a part of the metal wiring 5 (internal wiring). The magnetic body 10 is formed so as to cover the entire circumference of the metal wiring 5 in the partial section. A high frequency magnetic field generated by a high frequency current flowing through the metal wiring 5 is continuously absorbed by the magnetic body 10. As a result, electromagnetic radiation noise is reduced, and high-frequency current flowing through the metal wiring 5 is effectively suppressed.

  Further, the high-frequency current is suppressed only in the metal wiring 5 covered with the magnetic body 10. Therefore, it is possible to prevent a situation where the high-speed / high-frequency signal is not transmitted due to the influence of the magnetic material even to the signal wiring through which the high-speed / high-frequency signal should pass. That is, the present invention can be applied only to a specific circuit, and only a high-frequency current flowing in a part of the internal wiring can be selectively suppressed. Only high-frequency current of a desired circuit can be limitedly suppressed without obstructing the propagation of required high-speed and high-frequency signals.

  FIG. 9 shows the frequency dependence of the transmission characteristic (transmittance) S21. FIG. 9 shows a curve of the transmission characteristic S21 related to the magnetic material sample 1400L. Further, regarding the magnetic body model A and the magnetic body model B in which the electrical constant is partially idealized, the curve of the transmission characteristic S21 is also shown. The section of the metal wiring 5 covered with the magnetic body 10 is set to 5 mm. FIG. 9 shows that the high frequency current is effectively suppressed by the magnetic body 10. FIG. 10 shows the dependence of the transmission characteristic (transmittance) S21 on the magnetic section. Here, the frequency is fixed at 200 MHz. From FIG. 10, it can be seen that if the section of about several mm is covered with the magnetic body 10, the effect of suppressing the high-frequency current is sufficiently obtained.

  Furthermore, according to the present embodiment, deterioration of the electrical characteristics of the manufactured semiconductor device 1 is prevented. The reason is as follows. If the magnetic body 10 is formed in a semiconductor process (previous process), there is a risk that metal ions such as Fe, Ni, Mn, and Zn contained in the magnetic material are mixed as impurities into the silicon substrate or the like. Such impurities, especially metal ions, greatly deteriorate the electrical characteristics of the semiconductor. In addition, there is a risk of damage to the semiconductor by acid and alkali solutions.

  However, according to the present embodiment, the magnetic body 10 is not formed in the semiconductor process (previous process). Instead, the sacrificial layer 4 made of a soluble material is formed in the region 6 where the magnetic body 10 is formed. After the semiconductor process, the sacrificial layer 4 is removed with a solvent or the like, and the vacant region 6 is filled with a magnetic material. Therefore, in the semiconductor process, the metal ions contained in the magnetic material are prevented from entering the semiconductor. That is, impurity contamination in the semiconductor process can be avoided. According to the semiconductor device 1 manufactured in this way, deterioration of electrical characteristics due to the mixing of metal ions is prevented.

  The present invention can be applied to a micro region. For example, the present invention can be applied to only a part of the internal power supply wiring and I / O wiring of a semiconductor integrated circuit. As a result, it is possible to selectively suppress only unnecessary high-frequency currents in a part of the internal power supply wiring and I / O wiring.

2. Second Embodiment FIGS. 11A and 11B show the structure of a semiconductor device 1 according to a second embodiment. FIG. 11A shows a cross-sectional structure in the XZ plane, and corresponds to FIG. 1A. On the other hand, FIG. 11B shows a cross-sectional structure in the YZ plane, and corresponds to FIG. 1B. In the present embodiment, descriptions overlapping with those of the first embodiment are omitted as appropriate.

  According to the present embodiment, instead of providing two small openings OP1 and OP2, one large opening OP is provided. The magnetic body 10 is exposed on the surface of the insulating layer 3 in the large opening OP. For example, in FIGS. 11A and 11B, the shape of the magnetic body 10 on the surface of the insulating layer 3 is substantially the same as the shape of the region Rf on the XY plane.

  The manufacturing method of the semiconductor device 1 according to the present embodiment is as follows. In step S <b> 10 described above, the sacrificial layer 4 is formed to have the same structure as the magnetic body 10. In step S20 described above, the sacrificial layer 4 is dissolved and removed. According to the present embodiment, the large opening OP is provided. Therefore, the additional effect that the injection of the solvent and the removal of the waste liquid are facilitated can be obtained.

3. Third Embodiment FIGS. 12A and 12B show the structure of a semiconductor device 1 according to a third embodiment. FIG. 12A shows a cross-sectional structure in the XZ plane, and corresponds to FIG. 1A. On the other hand, FIG. 12B shows a cross-sectional structure in the YZ plane, and corresponds to FIG. 1B. In the present embodiment, descriptions overlapping with those of the first embodiment are omitted as appropriate.

  According to the present embodiment, the magnetic body 10 is formed so as to penetrate the insulating layer 3 and the semiconductor substrate 2. That is, the magnetic body 10 reaches not only the surface of the insulating layer 3 but also the surface (back surface) of the semiconductor substrate 2. Therefore, openings OP1 and OP2 are formed on the surfaces of the insulating layer 3 and the semiconductor substrate 2, respectively.

  The manufacturing method of the semiconductor device 1 according to the present embodiment is as follows. In step S <b> 10 described above, the sacrificial layer 4 is formed to have the same structure as the magnetic body 10. In step S20 described above, the sacrificial layer 4 is dissolved and removed. According to the present embodiment, the openings OP1 and OP2 are provided above and below. Accordingly, the flow becomes smooth, and it is possible to efficiently inject the solvent and discharge the waste liquid. Furthermore, when the magnetic material is filled, the chemical solution is exchanged without stagnation, and the magnetic body 10 can be generated uniformly.

4). Fourth Embodiment FIGS. 13A and 13B show the structure of a semiconductor device 1 according to a fourth embodiment. FIG. 13A shows a cross-sectional structure in the XZ plane, and corresponds to FIG. 1A. On the other hand, FIG. 13B shows a cross-sectional structure in the YZ plane, and corresponds to FIG. 1B. In the present embodiment, descriptions overlapping with the above-described embodiments are omitted as appropriate.

  According to the present embodiment, a plurality of magnetic bodies 10-1 and 10-2 are provided. The first magnetic body 10-1 is embedded in the first region Rf 1 of the insulating layer 3, and the second magnetic body 10-2 is embedded in the second region Rf 2 of the insulating layer 3. For example, in FIGS. 13A and 13B, each magnetic body 10 has the same structure as that of the third embodiment, and is formed so as to penetrate the insulating layer 3 and the semiconductor substrate 2. Therefore, openings OP11 and OP21 are formed on the surface of the insulating layer 3, and openings OP12 and OP22 are formed on the surface of the semiconductor substrate 2. The metal wiring 5 penetrates both magnetic bodies 10-1 and 10-2.

  The manufacturing method of the semiconductor device 1 according to the present embodiment is as follows. In step S10 described above, the two sacrificial layers 4 are formed so as to have the same structure as the two magnetic bodies 10-1 and 10-2. In the above-described step S20, these sacrificial layers 4 are dissolved and removed. As a result, a first cavity 6-1 and a second cavity 6-2 are formed in each of the first region Rf1 and the second region Rf2. Then, the first magnetic body 10-1 is formed by filling the first cavity 6-1 with the first magnetic material. Also, the second magnetic body 10-2 is formed by filling the second cavity 6-2 with the second magnetic material.

  The first magnetic material and the second magnetic material may be different. In that case, the composition of the formed first magnetic body 10-1 and the composition of the second magnetic body 10-2 are different from each other. In this case, it is possible to suppress high-frequency currents in different frequency bands by adjusting the composition. That is, by combining a plurality of magnetic bodies 10, it is possible to suppress high-frequency currents in a plurality of frequency bands with respect to a certain metal wiring 5.

  Further, the first magnetic material and the second magnetic material may be the same or similar. In that case, the composition of the formed first magnetic body 10-1 and the composition of the second magnetic material 10-2 are the same or similar. In this case, a quantitative effect is expected. For example, depending on the situation around a certain metal wiring 5, there may be a case where a sufficient length cannot be secured as a section covered with the magnetic body 10. In that case, it is possible to obtain a desired effect with respect to the metal wiring 5 by providing the magnetic body 10 in different places.

5). Fifth Embodiment FIGS. 14A and 14B show the structure of a semiconductor device 1 according to a fifth embodiment. FIG. 14A shows a cross-sectional structure in the XZ plane, and corresponds to FIG. 1A. On the other hand, FIG. 14B shows a cross-sectional structure in the YZ plane, and corresponds to FIG. 1B. In the present embodiment, descriptions overlapping with the above-described embodiments are omitted as appropriate.

  The semiconductor device 1 according to the present embodiment further includes an insulator 20 formed on the insulating layer 3. The insulator 20 is formed so as to cover the magnetic body 10 on the surface of the insulating layer 3.

  The manufacturing method of the semiconductor device 1 according to the present embodiment is as follows. First, the magnetic body 10 which covers a part of the metal wiring 5 is formed by the same process as the above-described embodiment (steps S10 and S20). Thereafter, an insulator 20 is formed on the insulating layer 3 so as to cover the magnetic body 10 exposed on the surface of the insulating layer 3. In this case, the magnetic body 10 is prevented from being damaged by the subsequent chemical treatment. That is, an additional effect that the deterioration of the function of the magnetic body 10 is prevented can be obtained.

6). Sixth Embodiment FIGS. 15A and 15B show the structure of a semiconductor device 1 according to a sixth embodiment. FIG. 15A shows a cross-sectional structure in the XZ plane, and corresponds to FIG. 1A. On the other hand, FIG. 15B shows a cross-sectional structure in the YZ plane, and corresponds to FIG. 1B. In the present embodiment, descriptions overlapping with the above-described embodiments are omitted as appropriate.

  The semiconductor device 1 according to the present embodiment further includes a magnetic body 30 formed on the insulating layer 3. The magnetic body 30 is in contact with at least a part of the magnetic body 10 described above on the surface of the insulating layer 3. The magnetic body 30 may cover only a part of the surface of the insulating layer 3 or may cover the entire surface thereof.

  The manufacturing method of the semiconductor device 1 according to the present embodiment is as follows. First, the magnetic body 10 which covers a part of the metal wiring 5 is formed by the same process as the above-described embodiment (steps S10 and S20). Thereafter, a magnetic body 30 is additionally formed so as to be connected to at least a part of the magnetic body 10 exposed on the surface of the insulating layer 3.

  According to the present embodiment, the positional limitation of the current suppression effect is weakened, but the current suppression effect can be easily added. For example, the compositions of the magnetic body 10 and the magnetic body 30 are the same or similar. In that case, the current suppression effect by the same magnetic body is added. Further, the composition of the magnetic body 10 and the composition of the magnetic body 30 may be different from each other. In that case, the current suppression effect with respect to a different frequency is added easily.

  Note that the above-described embodiments may be combined. In that case, a combination effect can be obtained.

FIG. 1A is a cross-sectional view showing the structure of the semiconductor device according to the first embodiment of the present invention. FIG. 1B is a cross-sectional view showing the structure of the semiconductor device according to the first embodiment of the present invention. FIG. 2 is a flowchart showing a manufacturing process of the semiconductor device according to the present embodiment. FIG. 3 is a cross-sectional view showing the manufacturing process of the semiconductor device according to the present embodiment. FIG. 4 is a cross-sectional view showing the manufacturing process of the semiconductor device according to the present embodiment. FIG. 5 is a cross-sectional view showing the manufacturing process of the semiconductor device according to the present embodiment. FIG. 6 is a cross-sectional view showing the manufacturing process of the semiconductor device according to the present embodiment. FIG. 7 is a cross-sectional view showing the manufacturing process of the semiconductor device according to the present embodiment. FIG. 8A is a cross-sectional view showing the manufacturing process of the semiconductor device according to the present embodiment. FIG. 8B is a cross-sectional view showing the manufacturing process of the semiconductor device according to the present embodiment. FIG. 9 is a graph showing the frequency dependence of the transmission characteristics. FIG. 10 is a graph showing the dependence of the transmission characteristics on the magnetic section. FIG. 11A is a cross-sectional view showing the structure of the semiconductor device according to the second embodiment of the present invention. FIG. 11B is a cross-sectional view showing the structure of the semiconductor device according to the second embodiment of the present invention. FIG. 12A is a cross-sectional view showing the structure of the semiconductor device according to the third embodiment of the present invention. FIG. 12B is a cross-sectional view showing the structure of the semiconductor device according to the third embodiment of the present invention. FIG. 13A is a cross-sectional view showing the structure of the semiconductor device according to the fourth embodiment of the present invention. FIG. 13B is a cross-sectional view showing the structure of the semiconductor device according to the fourth exemplary embodiment of the present invention. FIG. 14A is a cross-sectional view showing the structure of the semiconductor device according to the fifth embodiment of the present invention. FIG. 14B is a sectional view showing the structure of the semiconductor device according to the fifth embodiment of the present invention. FIG. 15A is a cross-sectional view showing the structure of the semiconductor device according to the sixth embodiment of the present invention. FIG. 15B is a cross-sectional view showing the structure of the semiconductor device according to the sixth embodiment of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Semiconductor substrate (silicon wafer)
3, 3a, 3b, 3c, 3d, 3e Insulating layer 4, 4b, 4c, 4d, 4e Sacrificial layer 5 Metal wiring 6 Cavity 10 Magnetic body 20 Insulator 30 Magnetic body OP Opening portion Rf region

Claims (20)

(A) forming a wiring structure on a semiconductor substrate;
Here, the wiring structure is
An insulating layer formed on the semiconductor substrate;
A sacrificial layer embedded in a partial region of the insulating layer and exposed on the surface of the insulating layer;
Metal wiring embedded in the insulating layer so as to penetrate the sacrificial layer,
The sacrificial layer is made of a soluble material,
(B) After the step (A), by removing the sacrificial layer, forming a cavity in the partial region in the insulating layer;
(C) After the step (B), forming a magnetic body that covers the entire circumference of a part of the metal wiring by filling the cavity with a magnetic material. A method of manufacturing a semiconductor device according to claim 1,
In the step (A), the sacrificial layer is formed so as to be exposed on the surface of the insulating layer at a plurality of locations. A method of manufacturing a semiconductor device according to claim 1,
In the step (A), the sacrificial layer is formed so that the shape on the surface is substantially the same as the shape of the partial region in a plane parallel to the surface. A method of manufacturing a semiconductor device according to claim 1,
In the step (A), the sacrificial layer is formed so as to penetrate the semiconductor substrate and the insulating layer. A method of manufacturing a semiconductor device according to claim 1,
The sacrificial layer is
A first sacrificial layer embedded in a first region of the insulating layer;
A second sacrificial layer embedded in a second region of the insulating layer;
In the step (B), a first cavity and a second cavity are formed in each of the first region and the second region,
The step (C)
(C1) forming a first magnetic body as the magnetic body by filling the first cavity with a first magnetic material;
(C2) forming a second magnetic body as the magnetic body by filling the second cavity with a second magnetic material. A method for manufacturing a semiconductor device. A method of manufacturing a semiconductor device according to claim 5,
The method of manufacturing a semiconductor device, wherein the first magnetic material and the second magnetic material are different. A method of manufacturing a semiconductor device according to claim 5,
The method of manufacturing a semiconductor device, wherein the first magnetic material and the second magnetic material are the same. A method for manufacturing a semiconductor device according to claim 1,
Furthermore, (D) It has the process of providing an insulator on the said insulating layer so that the said magnetic body exposed on the surface of the said insulating layer may be covered. The manufacturing method of a semiconductor device. A method for manufacturing a semiconductor device according to claim 1,
Further, (E) a method of manufacturing a semiconductor device, comprising the step of providing another magnetic body on the insulating layer so as to be connected to at least part of the magnetic body exposed on the surface of the insulating layer. A method of manufacturing a semiconductor device according to claim 9,
The composition of the magnetic body and the composition of the other magnetic body are different from each other. A semiconductor substrate;
An insulating layer formed on the semiconductor substrate;
A magnetic body embedded in a partial region of the insulating layer and reaching the surface of the insulating layer;
Metal wiring embedded in the insulating layer so as to penetrate the magnetic body,
The said magnetic body has covered the perimeter of the said metal wiring in the said one part semiconductor device. The semiconductor device according to claim 11,
The said magnetic body has penetrated the said semiconductor substrate and the said insulating layer. Semiconductor device. A semiconductor device according to claim 11 or 12,
A semiconductor device in which a magnetic material and a soluble material are mixed in the magnetic body. A semiconductor device according to claim 11,
The magnetic body is a semiconductor device formed by a wet ferrite method. The semiconductor device according to claim 11, wherein
The metal wiring is a power supply wiring. The semiconductor device according to claim 11, wherein
The metal wiring is an I / O wiring semiconductor device. A semiconductor device according to any one of claims 11 to 16,
The magnetic body is
A first magnetic body embedded in a first region of the insulating layer;
A second magnetic body embedded in the second region of the insulating layer,
The composition of the first magnetic body and the composition of the second magnetic body are different from each other. A semiconductor device according to any one of claims 11 to 17,
A semiconductor device further comprising an insulator formed on the surface of the insulating layer so as to cover the magnetic body. A semiconductor device according to any one of claims 11 to 17,
Furthermore, another magnetic body provided on the insulating layer,
The other magnetic body is connected to at least a part of the magnetic body on a surface of the insulating layer. The semiconductor device according to claim 19, wherein
The composition of the magnetic body and the composition of the other magnetic body are different from each other.

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