JP2007268704A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2007268704A5 JP2007268704A5 JP2007046717A JP2007046717A JP2007268704A5 JP 2007268704 A5 JP2007268704 A5 JP 2007268704A5 JP 2007046717 A JP2007046717 A JP 2007046717A JP 2007046717 A JP2007046717 A JP 2007046717A JP 2007268704 A5 JP2007268704 A5 JP 2007268704A5
- Authority
- JP
- Japan
- Prior art keywords
- layer
- structural layer
- structural
- microstructure
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims 9
- 229910052751 metal Inorganic materials 0.000 claims 8
- 239000002184 metal Substances 0.000 claims 8
- 238000004519 manufacturing process Methods 0.000 claims 5
- 239000000758 substrate Substances 0.000 claims 4
- 238000004381 surface treatment Methods 0.000 claims 4
- 230000001678 irradiating Effects 0.000 claims 3
- 239000011800 void material Substances 0.000 claims 3
- 239000000463 material Substances 0.000 claims 2
- 238000007788 roughening Methods 0.000 claims 2
- 229910052782 aluminium Inorganic materials 0.000 claims 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminum Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims 1
- 229910021419 crystalline silicon Inorganic materials 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 claims 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims 1
- 229910052750 molybdenum Inorganic materials 0.000 claims 1
- 239000011733 molybdenum Substances 0.000 claims 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims 1
- 239000010936 titanium Substances 0.000 claims 1
- 229910052719 titanium Inorganic materials 0.000 claims 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims 1
- 229910052721 tungsten Inorganic materials 0.000 claims 1
- 239000010937 tungsten Substances 0.000 claims 1
Claims (8)
前記第１の構造層に空隙を介して対向し、且つ一部が前記第１の構造層に固定されている第２の構造層と、を有し、
前記第１の構造層及び前記第２の構造層は少なくとも一方が変位可能であり、
前記空隙を介して前記第２の構造層に対向する前記第１の構造層の第１の面は、複数の凸部が設けられており、
前記空隙を介して前記第１の構造層に対向する前記第２の構造層の第２の面は、複数の凸部が設けられており、
前記第１の面及び前記第２の面は、互いに粗さが異なることを特徴とする微小構造体。 A first structural layer;
A second structural layer facing the first structural layer through a gap and a part of which is fixed to the first structural layer,
At least one of the first structural layer and the second structural layer can be displaced,
The first surface of the first structural layer facing the second structural layer through the gap is provided with a plurality of convex portions,
The second surface of the second structural layer facing the first structural layer through the gap is provided with a plurality of convex portions,
The microstructure according to claim 1, wherein the first surface and the second surface have different roughness .
前記微小構造体は、第１の構造層と、前記第１の構造層に空隙を介して対向し、且つ一部が前記第１の構造層に固定されている第２の構造層と、を有し、
前記半導体素子は、半導体層と、前記半導体層上にゲート絶縁層を介して設けられたゲート電極層と、を有し、
前記第１の構造層は、前記半導体層と同じ材料から形成され、
前記第２の構造層の一部は、前記ゲート絶縁層と同じ材料から形成され、
前記第１の構造層及び前記第２の構造層は少なくとも一方が変位可能であり、
前記空隙を介して前記第２の構造層に対向する前記第１の構造層の第１の面は、複数の凸部が設けられており、
前記空隙を介して前記第１の構造層に対向する前記第２の構造層の第２の面は、複数の凸部が設けられており、
前記第１の面及び前記第２の面は、互いに粗さが異なることを特徴とする半導体装置。 A microstructure provided on the same substrate, and a semiconductor element,
The microstructure includes a first structural layer, and a second structural layer that is opposed to the first structural layer through a gap and is partially fixed to the first structural layer. Have
The semiconductor element includes a semiconductor layer, and a gate electrode layer provided on the semiconductor layer via a gate insulating layer,
The first structural layer is formed of the same material as the semiconductor layer,
A part of the second structural layer is formed of the same material as the gate insulating layer,
Before the first structural layer and the second structural layer SL is at least one of displaceably,
The first surface of the first structural layer that faces the second structural layer through the gap is provided with a plurality of convex portions,
The second surface of the second structural layer facing the first structural layer via the gap is provided with a plurality of convex portions,
The semiconductor device according to claim 1, wherein the first surface and the second surface have different roughness .
前記微小構造体の前記第１の構造層及び前記半導体素子の半導体層は、結晶質珪素膜であることを特徴とする半導体装置。 In claim 2 ,
The semiconductor device, wherein the first structure layer of the microstructure and the semiconductor layer of the semiconductor element are crystalline silicon films.
前記第１の構造層に粗面処理を施し、
前記第１の構造層上に金属層を形成し、
前記金属層に粗面処理を施して犠牲層を形成し、
前記第１の構造層上および前記犠牲層上に第２の構造層を形成し、
前記犠牲層を除去して空隙部を形成することを特徴とする微小構造体の作製方法。 Forming a first structural layer on the substrate;
Roughening the first structural layer;
Forming a metal layer on the first structural layer;
A sacrificial layer is formed by roughening the metal layer ,
Forming a second structural layer on the first structural layer and the sacrificial layer;
A method for manufacturing a microstructure, wherein the sacrificial layer is removed to form a void.
前記第１の構造層にレーザビームを照射することによって粗面処理を施し、
前記第１の構造層上に金属層を形成し、
前記金属層にレーザビームを照射することによって粗面処理を施して犠牲層を形成し、
前記第１の構造層上および前記犠牲層上に第２の構造層を形成し、
前記犠牲層を除去して空隙部を形成することを特徴とする微小構造体の作製方法。 Forming a first structural layer on the substrate;
A rough surface treatment is performed by irradiating the first structural layer with a laser beam,
Forming a metal layer on the first structural layer;
A sacrificial layer is formed by performing a rough surface treatment by irradiating the metal layer with a laser beam ,
Forming a second structural layer on the first structural layer and the sacrificial layer;
A method for manufacturing a microstructure, wherein the sacrificial layer is removed to form a void.
前記第１の構造層にレーザビームを照射することによって粗面処理を施し、
前記第１の構造層上に金属層を形成し、
前記金属層を加熱処理することによって粗面処理を施して犠牲層を形成し、
前記第１の構造層上および前記犠牲層上に第２の構造層を形成し、
前記犠牲層を除去して空隙部を形成することを特徴とする微小構造体の作製方法。 Forming a first structural layer on the substrate;
A rough surface treatment is performed by irradiating the first structural layer with a laser beam,
Forming a metal layer on the first structural layer;
A sacrificial layer is formed by subjecting the metal layer to a rough surface treatment by heat treatment ,
Forming a second structural layer on the first structural layer and the sacrificial layer;
A method for manufacturing a microstructure, wherein the sacrificial layer is removed to form a void.
前記金属層を、タングステン、モリブデン、又はチタンを用いて形成することを特徴とする微小構造体の作製方法。 In claim 4 or claim 5 ,
A method for manufacturing a microstructure , wherein the metal layer is formed using tungsten, molybdenum, or titanium.
前記金属層を、アルミニウムを用いて形成することを特徴とする微小構造体の作製方法。 In claim 4 or claim 6 ,
A method for manufacturing a microstructure , wherein the metal layer is formed using aluminum.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007046717A JP5178026B2 (en) | 2006-03-10 | 2007-02-27 | MICROSTRUCTURE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING MICROSTRUCTURE |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006066786 | 2006-03-10 | ||
| JP2006066786 | 2006-03-10 | ||
| JP2007046717A JP5178026B2 (en) | 2006-03-10 | 2007-02-27 | MICROSTRUCTURE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING MICROSTRUCTURE |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2007268704A JP2007268704A (en) | 2007-10-18 |
| JP2007268704A5 true JP2007268704A5 (en) | 2010-04-02 |
| JP5178026B2 JP5178026B2 (en) | 2013-04-10 |
Family
ID=38672023
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007046717A Expired - Fee Related JP5178026B2 (en) | 2006-03-10 | 2007-02-27 | MICROSTRUCTURE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING MICROSTRUCTURE |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP5178026B2 (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2008124372A2 (en) | 2007-04-04 | 2008-10-16 | Qualcomm Mems Technologies, Inc. | Eliminate release etch attack by interface modification in sacrificial layers |
| JP4853530B2 (en) | 2009-02-27 | 2012-01-11 | 株式会社豊田中央研究所 | Microdevice having movable part |
| JP6587870B2 (en) * | 2015-09-01 | 2019-10-09 | アズビル株式会社 | Micromechanical device and manufacturing method thereof |
| JP6646018B2 (en) * | 2016-09-02 | 2020-02-14 | ダイセルポリマー株式会社 | Roughening method for metal compacts |
| CN113764261B (en) * | 2020-10-15 | 2023-08-22 | 腾讯科技（深圳）有限公司 | Hollow bridge structure and manufacturing method thereof, superconducting quantum chip and manufacturing method thereof |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3489273B2 (en) * | 1995-06-27 | 2004-01-19 | 株式会社デンソー | Manufacturing method of semiconductor dynamic quantity sensor |
| JP3050163B2 (en) * | 1997-05-12 | 2000-06-12 | 日本電気株式会社 | Microactuator and manufacturing method thereof |
| JP3592535B2 (en) * | 1998-07-16 | 2004-11-24 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
| JP3855598B2 (en) * | 2000-05-11 | 2006-12-13 | セイコーエプソン株式会社 | Optical switching unit, optical switching device, optical guide, method for manufacturing optical switching unit, and video display device |
| US6531331B1 (en) * | 2002-07-16 | 2003-03-11 | Sandia Corporation | Monolithic integration of a MOSFET with a MEMS device |
| JP2004212637A (en) * | 2002-12-27 | 2004-07-29 | Fuji Photo Film Co Ltd | Optical modulator and plane display element |
| FR2857002B1 (en) * | 2003-07-04 | 2005-10-21 | Commissariat Energie Atomique | METHOD OF DESOLIDARIZING A USEFUL LAYER AND COMPONENT OBTAINED THEREBY |
| JP2007021713A (en) * | 2005-06-17 | 2007-02-01 | Semiconductor Energy Lab Co Ltd | Semiconductor device and its manufacturing method |
-
2007
- 2007-02-27 JP JP2007046717A patent/JP5178026B2/en not_active Expired - Fee Related
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2008311621A5 (en) | ||
| ATE482471T1 (en) | METHOD FOR CLEANING A SOLAR CELL SURFACE OPENING USING A SOLAR ETCHING PASTE | |
| WO2009108752A3 (en) | Laser-induced structuring of substrate surfaces | |
| ATE445912T1 (en) | SOLAR CELL MARKING METHOD AND SOLAR CELL | |
| JP2007268704A5 (en) | ||
| JP2009135453A5 (en) | ||
| JP2009260295A5 (en) | Method of manufacturing semiconductor substrate | |
| JP2011100981A5 (en) | Method for manufacturing semiconductor device | |
| JP2008177553A5 (en) | ||
| JP2008311633A5 (en) | ||
| JP2008077074A5 (en) | ||
| JP2012513312A5 (en) | ||
| JP2011044517A5 (en) | ||
| JP2009135455A5 (en) | ||
| FR2984599B1 (en) | PROCESS FOR PRODUCING A SEMICONDUCTOR MICRO- OR NANO-FILM, SEMICONDUCTOR STRUCTURE COMPRISING SUCH A MICRO- OR NAN-WIRE, AND METHOD FOR PRODUCING A SEMICONDUCTOR STRUCTURE | |
| JP2014505369A5 (en) | ||
| JP2009238741A5 (en) | Method for manufacturing light emitting device | |
| JP2008270780A5 (en) | ||
| JP2010103510A5 (en) | Method for manufacturing semiconductor device and semiconductor device | |
| JP2012054540A5 (en) | Method of manufacturing SOI substrate | |
| JP2008252068A5 (en) | ||
| JP2010103515A5 (en) | ||
| JP2019137880A5 (en) | ||
| ATE501523T1 (en) | SELECTIVE FORMATION OF A COMPOUND CONTAINING A SEMICONDUCTOR MATERIAL AND A METAL MATERIAL IN A SUBSTRATE USING A GERMANIUM OXIDE LAYER | |
| JP2009049143A5 (en) |