JP2007265756A - Light-emitting device, its manufacturing method, and electronic equipment - Google Patents

Light-emitting device, its manufacturing method, and electronic equipment Download PDF

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Publication number
JP2007265756A
JP2007265756A JP2006088306A JP2006088306A JP2007265756A JP 2007265756 A JP2007265756 A JP 2007265756A JP 2006088306 A JP2006088306 A JP 2006088306A JP 2006088306 A JP2006088306 A JP 2006088306A JP 2007265756 A JP2007265756 A JP 2007265756A
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JP
Japan
Prior art keywords
light emitting
electrode
auxiliary wiring
element group
light
Prior art date
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Granted
Application number
JP2006088306A
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Japanese (ja)
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JP4702136B2 (en
Inventor
Takehiko Kubota
岳彦 窪田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
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Seiko Epson Corp
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Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP2006088306A priority Critical patent/JP4702136B2/en
Priority to US11/683,112 priority patent/US7491975B2/en
Priority to KR1020070029297A priority patent/KR20070097331A/en
Priority to TW096110644A priority patent/TW200802841A/en
Priority to CNA2007100884892A priority patent/CN101047201A/en
Publication of JP2007265756A publication Critical patent/JP2007265756A/en
Application granted granted Critical
Publication of JP4702136B2 publication Critical patent/JP4702136B2/en
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80Constructional details
    • H10K59/805Electrodes
    • H10K59/8052Cathodes
    • H10K59/80524Transparent cathodes, e.g. comprising thin metal layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/80Constructional details
    • H10K50/805Electrodes
    • H10K50/82Cathodes
    • H10K50/828Transparent cathodes, e.g. comprising thin metal layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00Electroluminescent light sources
    • H05B33/12Light sources with substantially two-dimensional radiating surfaces
    • H05B33/26Light sources with substantially two-dimensional radiating surfaces characterised by the composition or arrangement of the conductive material used as an electrode
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301Details of OLEDs
    • H10K2102/302Details of OLEDs of OLED structures
    • H10K2102/3023Direction of light emission
    • H10K2102/3026Top emission
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/122Pixel-defining structures or layers, e.g. banks

Abstract

<P>PROBLEM TO BE SOLVED: To attain both improvement of an aperture ratio and restraint of voltage fall in a cathode. <P>SOLUTION: A plurality of light-emitting elements E are aligned at an element array part A over an X-direction and a Y-direction. Each light-emitting element E contains a first electrode 21, a second electrode 22, and a light-emitting layer 23 intercalated between the both electrodes. An auxiliary wiring 27, formed of a material with a resistivity lower than that of the second electrode 22, is electrically connected with the second electrode 22 of each light-emitting element E. A gap S1 between an i-th line and an (i+1)th line is wider than that S2 between the (i+1)th line and an (i+2)th line. The auxiliary wiring 27 exists in extension in an X-direction within the gap S1. No auxiliary wirings 27 are formed in the gap S2. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、有機発光ダイオード素子などの発光素子を利用した発光装置の構造に関する
The present invention relates to a structure of a light emitting device using a light emitting element such as an organic light emitting diode element.

多数の発光素子をマトリクス状に配列した発光装置が従来から提案されている。各発光
素子は、第1電極および第2電極と両電極間に介在する発光層とを含む。特許文献1には
、複数の発光素子にわたって連続する光透過性の導電膜が第2電極とされたトップエミッ
ション型の発光装置において、各発光素子の間隙に補助配線を形成した構成が開示されて
いる。補助配線は、第2電極よりも抵抗率が低い導電材料によって形成される。この構成
によれば、第2電極が高抵抗な材料で形成された場合であっても第2電極における電圧降
下が低減されるから、各発光素子に印加される電圧が均一化されて各々の階調のムラが抑
制される。
特開2002−352963号公報
Conventionally, a light-emitting device in which a large number of light-emitting elements are arranged in a matrix has been proposed. Each light emitting element includes a first electrode, a second electrode, and a light emitting layer interposed between the two electrodes. Patent Document 1 discloses a configuration in which an auxiliary wiring is formed in a gap between light emitting elements in a top emission type light emitting device in which a light transmissive conductive film continuous over a plurality of light emitting elements is used as a second electrode. Yes. The auxiliary wiring is formed of a conductive material having a lower resistivity than the second electrode. According to this configuration, even when the second electrode is formed of a high-resistance material, the voltage drop in the second electrode is reduced, so that the voltage applied to each light emitting element is made uniform and each voltage is reduced. Gradation unevenness is suppressed.
JP 2002-352963 A

補助配線の材料として採用される低抵抗な金属の殆どは遮光性を有する。したがって、
発光素子からみて光出射側(光取出側)に補助配線が配置された構成においては、複数の
発光素子が配列された領域のうち各発光素子による放射光が実際に出射する面積の割合(
以下「開口率」という)が補助配線によって制約されるという問題がある。補助配線の線
幅を削減すれば高い開口率を維持することも可能ではあるが、この場合には補助配線の抵
抗値の増加によって第2電極の電圧降下の抑制が不充分となる可能性がある。
Most of the low resistance metals used as the material for the auxiliary wiring have a light shielding property. Therefore,
In the configuration in which the auxiliary wiring is arranged on the light emission side (light extraction side) when viewed from the light emitting element, the ratio of the area where the emitted light from each light emitting element is actually emitted in the region where the plurality of light emitting elements are arranged (
(Hereinafter referred to as “aperture ratio”) is limited by the auxiliary wiring. If the line width of the auxiliary wiring is reduced, it is possible to maintain a high aperture ratio. In this case, however, the increase in the resistance value of the auxiliary wiring may cause insufficient suppression of the voltage drop of the second electrode. is there.

また、補助配線の位置に誤差が発生した場合でも補助配線と発光素子とが重複しないよ
うに、補助配線が形成される設計上の領域と各発光素子との間隙にスペース(以下「マー
ジン領域」という)を確保する場合がある。マージン領域には補助配線も発光素子も形成
されないから、開口率の向上と電圧降下の充分な抑制との両立はいっそう困難となる。以
上の事情を考慮して、本発明は、開口率の向上と第2電極における電圧降下の抑制とを両
立させるという課題の解決を目的としている。
In addition, even if an error occurs in the position of the auxiliary wiring, a space (hereinafter referred to as “margin area”) is provided between the design area where the auxiliary wiring is formed and each light emitting element so that the auxiliary wiring and the light emitting element do not overlap. May be secured). Since neither the auxiliary wiring nor the light emitting element is formed in the margin region, it is more difficult to achieve both improvement in aperture ratio and sufficient suppression of voltage drop. In view of the above circumstances, an object of the present invention is to solve the problem of achieving both improvement in aperture ratio and suppression of voltage drop in the second electrode.

以上の課題を解決するために、本発明に係る発光装置は、第1電極と第2電極との間に
発光層が介在する複数の発光素子を第1方向(例えば図2のX方向)に配列した複数の素
子群(例えば各行に属する発光素子の集合)が第1方向と交差する第2方向に並列された
素子アレイ部と、第2電極よりも抵抗率が低い材料によって形成されて各発光素子の第2
電極に電気的に接続される補助配線とを具備し、補助配線は、複数の素子群のうち相互に
隣接する第1の素子群(例えば図2の第i行)と第2の素子群(例えば図2の第(i+1)行
)との間隙にて第1の方向に延在し、第2の素子群に対して第1の素子群とは反対側に隣
接する第3の素子群(例えば図2の第(i+2)行)と第2の素子群との間隙には形成されな
い。
In order to solve the above problems, a light-emitting device according to the present invention includes a plurality of light-emitting elements having a light-emitting layer interposed between a first electrode and a second electrode in a first direction (for example, the X direction in FIG. 2). A plurality of arrayed element groups (for example, a set of light-emitting elements belonging to each row) are formed by an element array portion arranged in parallel in a second direction intersecting the first direction, and a material having a resistivity lower than that of the second electrode. Second of light emitting element
An auxiliary wiring electrically connected to the electrode, and the auxiliary wiring includes a first element group (for example, the i-th row in FIG. 2) and a second element group ( For example, a third element that extends in the first direction with a gap from the (i + 1) th row in FIG. 2 and is adjacent to the second element group on the opposite side of the first element group. It is not formed in the gap between the group (for example, the (i + 2) th row in FIG. 2) and the second element group.

本発明においては、第2の素子群と第3の素子群との間隙に補助配線が形成されないか
ら、素子アレイ部の総ての素子群の間隙に補助配線が形成された構成と比較して、素子ア
レイ部のうち補助配線が形成される領域やマージン領域の面積を低減することが可能であ
る。したがって、開口率の向上と補助配線の低抵抗化との両立が容易となる。例えば、補
助配線の線幅を維持しながら開口率を向上させ、あるいは開口率を維持しながら補助配線
の線幅を拡大(低抵抗化)することができる。
In the present invention, since no auxiliary wiring is formed in the gap between the second element group and the third element group, the auxiliary wiring is formed in the gap between all the element groups in the element array section. The area of the element array portion where the auxiliary wiring is formed and the area of the margin region can be reduced. Therefore, it becomes easy to improve both the aperture ratio and the resistance of the auxiliary wiring. For example, the aperture ratio can be improved while maintaining the line width of the auxiliary wiring, or the line width of the auxiliary wiring can be increased (low resistance) while maintaining the aperture ratio.

本発明の好適な態様において、第1の素子群の各発光素子と第2の素子群の各発光素子
との間隔(例えば図2における幅B1の間隙S1)は、第2の素子群の各発光素子と第3の
素子群の各発光素子との間隔(例えば図2における幅B2の間隙S2)よりも広い。この態
様によれば、各素子群が等間隔に配置された構成と比較して、補助配線の抵抗を低減しな
がら開口率を高い水準に維持することが可能となる。
In a preferred embodiment of the present invention, the distance between each light emitting element of the first element group and each light emitting element of the second element group (for example, the gap S1 having a width B1 in FIG. 2) The distance between the light emitting element and each light emitting element in the third element group (for example, the gap S2 having the width B2 in FIG. 2) is wider. According to this aspect, it is possible to maintain the aperture ratio at a high level while reducing the resistance of the auxiliary wiring as compared with the configuration in which the element groups are arranged at equal intervals.

他の態様において、第2電極は、複数の発光素子にわたって連続に形成され、補助配線
は、第2電極の直下または直上に(すなわち第2電極との間に絶縁層が介在することなく
)形成されて当該第2電極に面接触する。この構成によれば、第2電極と補助配線とが両
者間の絶縁層のコンタクトホールを介して導通する構成と比較して、第2電極と補助配線
とを確実に導通させることができる。また、第2電極と補助配線とを導通させるコンタク
トホールが不要となるから、発光装置の製造工程の簡素化や製造コストの低減が実現され
る。
例えば、各発光素子の第1電極が配置された基板の面上に形成されて第1電極に対応し
た開口部を有する隔壁層を具備し、発光層は、開口部の内側に位置する部分を含み、第2
電極は、開口部の内側にて発光層を挟んで第1電極に対向する部分と、隔壁層の表面を覆
う部分とを含み、補助配線は、隔壁層と第2電極との間に介在する。以上の構成によれば
、補助配線が第2電極に覆われるから、外気や水分の付着に起因した補助配線の腐食を防
止することが可能である。
In another aspect, the second electrode is formed continuously over the plurality of light emitting elements, and the auxiliary wiring is formed immediately below or immediately above the second electrode (that is, without an insulating layer interposed between the second electrode). And is in surface contact with the second electrode. According to this configuration, the second electrode and the auxiliary wiring can be reliably conducted as compared to the configuration in which the second electrode and the auxiliary wiring are conducted through the contact hole of the insulating layer therebetween. Further, since a contact hole for conducting the second electrode and the auxiliary wiring is not required, the manufacturing process of the light emitting device can be simplified and the manufacturing cost can be reduced.
For example, the light emitting layer includes a partition layer formed on the surface of the substrate on which the first electrode of each light emitting element is disposed and having an opening corresponding to the first electrode, and the light emitting layer has a portion located inside the opening. Including, second
The electrode includes a portion facing the first electrode across the light emitting layer inside the opening and a portion covering the surface of the partition layer, and the auxiliary wiring is interposed between the partition layer and the second electrode. . According to the above configuration, since the auxiliary wiring is covered with the second electrode, it is possible to prevent corrosion of the auxiliary wiring due to adhesion of outside air or moisture.

本発明の好適な態様において、各発光素子は、第1方向に沿って長尺状に形成される。
換言すると、補助配線は、各発光素子の長手方向に沿って延在する。この態様によれば、
各発光素子の短手方向に沿って補助配線が延在する構成と比較して、各発光素子から補助
配線に至る電流の経路幅(例えば図5の幅W)が容易に確保されるから、発光素子から補
助配線までの区間における抵抗値を低減することができる。なお、この態様の具体例は第
2実施形態として後述される。
In a preferred aspect of the present invention, each light emitting element is formed in an elongated shape along the first direction.
In other words, the auxiliary wiring extends along the longitudinal direction of each light emitting element. According to this aspect,
Compared to the configuration in which the auxiliary wiring extends along the short direction of each light emitting element, the current path width from each light emitting element to the auxiliary wiring (for example, the width W in FIG. 5) is easily ensured. The resistance value in the section from the light emitting element to the auxiliary wiring can be reduced. A specific example of this aspect will be described later as a second embodiment.

本発明の具体的な態様においては、各発光素子に供給される電流を制御する複数の駆動
トランジスタと、複数の駆動トランジスタを被覆する絶縁層(例えば図3の第2絶縁層F
2)とが設けられ、複数の発光素子は、絶縁層の面上に配置され、各発光素子の第1電極
は、絶縁層に形成されたコンタクトホールを介して駆動トランジスタに電気的に接続され
る。
この態様において、第1の素子群および第2の素子群の各々に属する各発光素子に対応
したコンタクトホールは、当該素子群の各発光素子からみて補助配線側、より具体的には
当該素子群に属する各発光素子の補助配線側の周縁と補助配線における当該発光素子側の
周縁との間隙(例えば図2におけるマージン領域M)に形成される。この態様においては
、発光素子が存在しない補助配線の側方の領域にコンタクトホールが形成されるから、開
口率を低下させることなく、コンタクトホールの拡大によって第1電極と駆動トランジス
タとを良好に接続することが可能である。
さらに好適な態様において、コンタクトホールは、第1方向に沿って長尺状に形成され
る。この態様によれば、コンタクトホールについて充分な面積が確保されるから、第1電
極と駆動トランジスタとの接続部の抵抗を低減するともに両者の導通の不良を抑制するこ
とができる。
In a specific aspect of the present invention, a plurality of driving transistors for controlling the current supplied to each light emitting element and an insulating layer covering the plurality of driving transistors (for example, the second insulating layer F in FIG. 3).
2), the plurality of light emitting elements are disposed on the surface of the insulating layer, and the first electrode of each light emitting element is electrically connected to the driving transistor through a contact hole formed in the insulating layer. The
In this aspect, the contact hole corresponding to each light emitting element belonging to each of the first element group and the second element group is formed on the auxiliary wiring side as viewed from each light emitting element of the element group, more specifically, the element group. Is formed in a gap (for example, margin region M in FIG. 2) between the peripheral edge on the auxiliary wiring side of each light emitting element and the peripheral edge on the light emitting element side in the auxiliary wiring. In this embodiment, since the contact hole is formed in the side region of the auxiliary wiring where no light emitting element is present, the first electrode and the driving transistor are well connected by expanding the contact hole without reducing the aperture ratio. Is possible.
In a further preferred aspect, the contact hole is formed in an elongated shape along the first direction. According to this aspect, since a sufficient area is secured for the contact hole, it is possible to reduce the resistance of the connection portion between the first electrode and the drive transistor and to suppress poor conduction between them.

別の観点からすると、本発明に係る発光装置の特徴は、第1電極と第2電極との間に発
光層が介在する複数の発光素子を第1方向に配列した複数の素子群が第1方向と交差する
第2方向に並列された素子アレイ部と、第2電極よりも抵抗率が低い材料によって形成さ
れて各発光素子の第2電極に電気的に接続される複数の補助配線とを具備し、補助配線は
、相互に隣接する2以上の素子群ごとに素子アレイ部を区分した各単位(例えば図2にお
ける偶数行とそのY方向の正側に隣接する奇数行との組)の間隙にて第1方向に延在し、
各単位に属する各素子群の間隙には形成されないという構成にある。すなわち、複数の素
子群を単位として1本の補助配線が形成されるから、開口率の向上と補助配線の低抵抗化
との両立が容易となる。
From another viewpoint, the light emitting device according to the present invention is characterized in that a plurality of element groups in which a plurality of light emitting elements having a light emitting layer interposed between a first electrode and a second electrode are arranged in a first direction are first. An element array unit arranged in parallel in a second direction intersecting the direction, and a plurality of auxiliary wirings formed of a material having a lower resistivity than the second electrode and electrically connected to the second electrode of each light emitting element Auxiliary wiring is provided for each unit (for example, a set of an even-numbered row in FIG. 2 and an odd-numbered row adjacent to the positive side in the Y direction) in which the element array section is divided into two or more element groups adjacent to each other. Extending in the first direction with a gap,
There is a configuration in which it is not formed in the gap between each element group belonging to each unit. That is, since one auxiliary wiring is formed in units of a plurality of element groups, it is easy to improve both the aperture ratio and the resistance of the auxiliary wiring.

本発明に係る発光装置は各種の電子機器に利用される。この電子機器の典型例は、発光
装置を表示装置として利用した機器である。この種の電子機器としては、パーソナルコン
ピュータや携帯電話機などがある。もっとも、本発明に係る発光装置の用途は画像の表示
に限定されない。例えば、光線の照射によって感光体ドラムなどの像担持体に潜像を形成
するための露光装置(露光ヘッド)、液晶装置の背面側に配置されてこれを照明する装置
(バックライト)、あるいは、スキャナなどの画像読取装置に搭載されて原稿を照明する
装置など各種の照明装置など、様々な用途に本発明の発光装置を適用することができる。
The light emitting device according to the present invention is used in various electronic devices. A typical example of this electronic device is a device that uses a light emitting device as a display device. Examples of this type of electronic device include a personal computer and a mobile phone. However, the use of the light emitting device according to the present invention is not limited to image display. For example, an exposure device (exposure head) for forming a latent image on an image carrier such as a photosensitive drum by irradiation of light, a device (backlight) that is arranged on the back side of the liquid crystal device and illuminates it, or The light emitting device of the present invention can be applied to various uses such as various illumination devices such as a device that illuminates a document by being mounted on an image reading device such as a scanner.

本発明は、以上の各態様に係る発光装置を製造する方法としても特定される。この製造
方法は、第1電極と第2電極との間に発光層が介在する複数の発光素子を第1方向に配列
した複数の素子群が第1方向と交差する第2方向に並列された素子アレイ部と、各発光素
子の第2電極に電気的に接続される補助配線とを具備する発光装置を製造する方法であっ
て、複数の素子群のうち相互に隣接する第1の素子群と第2の素子群との間隙に対向する
領域(例えば図4の領域RA)が開口し、第2の素子群に対して第1の素子群とは反対側
に隣接する第3の素子群と第2の素子群との間隙に対向する領域(例えば図4の領域RB
3)を遮蔽するマスクを用意する過程と、第2電極よりも抵抗率が低い材料をマスクを介
して蒸着することで補助配線を形成する過程とを含む。
The present invention is also specified as a method of manufacturing the light emitting device according to each of the above aspects. In the manufacturing method, a plurality of element groups in which a plurality of light emitting elements having a light emitting layer interposed between a first electrode and a second electrode are arranged in a first direction are arranged in parallel in a second direction intersecting the first direction. A method for manufacturing a light emitting device comprising an element array section and an auxiliary wiring electrically connected to a second electrode of each light emitting element, wherein the first element groups adjacent to each other among a plurality of element groups A region facing the gap between the first element group and the second element group (for example, an area RA in FIG. 4) is opened, and a third element group adjacent to the second element group on the side opposite to the first element group Region facing the gap between the first element group and the second element group (for example, region RB in FIG. 4)
3) including a process of preparing a mask for shielding, and a process of forming auxiliary wiring by depositing a material having a lower resistivity than the second electrode through the mask.

以上の方法に使用されるマスクは、第2の素子群と第3の素子群との間隙に対向する領
域が遮蔽されているから、総ての素子群の間隙に対向する領域が開口したマスクと比較し
て機械的な強度が高い。したがって、マスクの変形(撓み)に起因した補助配線の誤差や
マスクの破損を抑制することが可能である。
In the mask used in the above method, the area facing the gap between the second element group and the third element group is shielded, so that the area facing the gap between all the element groups is opened. Compared with high mechanical strength. Therefore, it is possible to suppress the error of the auxiliary wiring and the damage of the mask due to the deformation (deflection) of the mask.

<A:第1実施形態>
<発光装置の構成>
図1は、本発明に係る発光装置の電気的な構成を示す回路図である。発光装置は、複数
の単位回路(画素回路)Uが配列された素子アレイ部Aを具備する。素子アレイ部Aには
、X方向に延在する複数の走査線12と、X方向と直交するY方向に延在する複数のデー
タ線14とが形成される。各単位回路Uは、走査線12とデータ線14との各交差に対応
した位置に配置される。したがって、複数の単位回路Uは、X方向およびY方向にわたっ
てマトリクス状に配列する。
<A: First Embodiment>
<Configuration of light emitting device>
FIG. 1 is a circuit diagram showing an electrical configuration of a light emitting device according to the present invention. The light emitting device includes an element array portion A in which a plurality of unit circuits (pixel circuits) U are arranged. In the element array portion A, a plurality of scanning lines 12 extending in the X direction and a plurality of data lines 14 extending in the Y direction orthogonal to the X direction are formed. Each unit circuit U is arranged at a position corresponding to each intersection of the scanning line 12 and the data line 14. Accordingly, the plurality of unit circuits U are arranged in a matrix over the X direction and the Y direction.

ひとつの単位回路Uは、電源線16(電源電圧VEL)から接地線18(接地電圧Gnd)
に至る経路上に配置された駆動トランジスタTdrと発光素子Eとを含む。発光素子Eは、
相互に対向する第1電極21と第2電極22との間に有機EL(Electro Luminescence)
材料の発光層23を介在させた有機発光ダイオード素子である。発光素子Eは、発光層2
3に流れる電流(以下「駆動電流」という)Ielに応じた輝度に発光する。第1電極(陽
極)21は発光素子Eごとに相互に離間して形成される。第2電極(陰極)22は、複数
の発光素子Eにわたって連続に形成されて接地線18に導通する。ただし、接地電位Gnd
を基準として負極性の電圧が第2電極22に供給される構成としてもよい。
One unit circuit U includes a power line 16 (power voltage VEL) to a ground line 18 (ground voltage Gnd).
Drive transistor Tdr and light emitting element E arranged on the path to The light emitting element E is
Organic EL (Electro Luminescence) between the first electrode 21 and the second electrode 22 facing each other
It is an organic light emitting diode element with a light emitting layer 23 of material interposed. The light emitting element E includes the light emitting layer 2
3 emits light with a luminance corresponding to current Iel (hereinafter referred to as “drive current”) Iel. The first electrodes (anodes) 21 are formed so as to be separated from each other for each light emitting element E. The second electrode (cathode) 22 is formed continuously over the plurality of light emitting elements E and is electrically connected to the ground line 18. However, ground potential Gnd
The negative electrode voltage may be supplied to the second electrode 22 with reference to the above.

駆動トランジスタTdrは、駆動電流Ielの電流量をゲートの電圧に応じて制御するpチ
ャネル型のトランジスタである。駆動トランジスタTdrのドレインは発光素子Eの第1電
極21に接続される。各単位回路Uにおける駆動トランジスタTdrのソースは電源線16
に対して共通に接続される。駆動トランジスタTdrのゲートとソース(電源線16)との
間には容量素子Cが介挿される。また、駆動トランジスタTdrのゲートとデータ線14と
の間には両者の電気的な接続を制御する選択トランジスタTslが介在する。
The drive transistor Tdr is a p-channel transistor that controls the amount of drive current Iel according to the gate voltage. The drain of the drive transistor Tdr is connected to the first electrode 21 of the light emitting element E. The source of the drive transistor Tdr in each unit circuit U is the power supply line 16
Are connected in common. A capacitive element C is interposed between the gate and source (power supply line 16) of the drive transistor Tdr. A selection transistor Tsl for controlling the electrical connection between the gate of the driving transistor Tdr and the data line 14 is interposed.

以上の構成において、走査線12に供給される走査信号Gに応じて選択トランジスタT
slがオン状態に変化すると、発光素子Eに指定された階調に応じたデータ電圧Sがデータ
線14から選択トランジスタTslを経由して駆動トランジスタTdrのゲートに供給される
。このときにデータ電圧Sに応じた電荷が容量素子Cに蓄積されるから、選択トランジス
タTslがオフ状態に変化しても、駆動トランジスタTdrのゲートはデータ電圧Sに維持さ
れる。したがって、発光素子Eにはデータ電圧Sに応じた駆動電流Ielが継続的に供給さ
れる。
In the above configuration, the selection transistor T according to the scanning signal G supplied to the scanning line 12.
When sl changes to the on state, the data voltage S corresponding to the gradation designated for the light emitting element E is supplied from the data line 14 to the gate of the driving transistor Tdr via the selection transistor Tsl. At this time, the electric charge corresponding to the data voltage S is accumulated in the capacitive element C, so that the gate of the drive transistor Tdr is maintained at the data voltage S even when the selection transistor Tsl is turned off. Therefore, the drive current Iel corresponding to the data voltage S is continuously supplied to the light emitting element E.

次に、図2および図3を参照して素子アレイ部Aの具体的な構成を説明する。図2は、
素子アレイ部Aの構成を示す平面図であり、図3は、図2におけるIII−III線からみた断
面図である。なお、図2や図3においては、走査線12やデータ線14や選択トランジス
タTslといった各要素の図示が適宜に省略されている。また、以下で参照する各図におい
ては、説明の便宜のために、各要素の寸法の比率を実際の装置から適宜に異ならせてある
Next, a specific configuration of the element array portion A will be described with reference to FIGS. FIG.
It is a top view which shows the structure of the element array part A, FIG. 3 is sectional drawing seen from the III-III line | wire in FIG. In FIGS. 2 and 3, the elements such as the scanning line 12, the data line 14, and the selection transistor Tsl are appropriately omitted. In each drawing referred to below, for the convenience of explanation, the ratio of dimensions of each element is appropriately changed from an actual apparatus.

図3に示すように、駆動トランジスタTdrや発光素子Eといった図1の各要素は基板1
0の面上に形成される。基板10は、ガラスやプラスチックなど各種の絶縁材料からなる
板材である。なお、本実施形態の発光装置は発光素子Eからの放射光が基板10とは反対
側に出射するトップエミッション型であるから、基板10に光透過性は要求されない。
As shown in FIG. 3, each element in FIG. 1 such as the drive transistor Tdr and the light emitting element E is a substrate 1.
It is formed on the 0 plane. The substrate 10 is a plate material made of various insulating materials such as glass and plastic. In addition, since the light-emitting device of this embodiment is a top emission type in which the radiated light from the light-emitting element E is emitted to the side opposite to the substrate 10, the substrate 10 is not required to have light transmittance.

基板10の面上には駆動トランジスタTdrが配置される。駆動トランジスタTdrは、基
板10の表面に半導体材料によって形成された半導体層31と、ゲート絶縁層F0を挟ん
で半導体層31(チャネル領域)に対向するゲート電極32とを含む。ゲート電極32は
第1絶縁層F1に覆われる。駆動トランジスタTdrのソース電極33およびドレイン電極
35は、第1絶縁層F1の面上に形成されるとともに第1絶縁層F1のコンタクトホールを
介して半導体層31(ソース領域・ドレイン領域)に導通する。駆動トランジスタTdrが
形成された基板10の表面は第2絶縁層F2に覆われる。第1絶縁層F1や第2絶縁層F2
はSiO2などの絶縁材料で形成された膜体である。
A drive transistor Tdr is disposed on the surface of the substrate 10. The drive transistor Tdr includes a semiconductor layer 31 formed of a semiconductor material on the surface of the substrate 10 and a gate electrode 32 facing the semiconductor layer 31 (channel region) with the gate insulating layer F0 interposed therebetween. The gate electrode 32 is covered with the first insulating layer F1. The source electrode 33 and the drain electrode 35 of the driving transistor Tdr are formed on the surface of the first insulating layer F1 and are electrically connected to the semiconductor layer 31 (source region / drain region) through the contact hole of the first insulating layer F1. . The surface of the substrate 10 on which the driving transistor Tdr is formed is covered with the second insulating layer F2. 1st insulating layer F1 and 2nd insulating layer F2
Is a film body formed of an insulating material such as SiO 2 .

図2および図3に示すように、第2絶縁層F2の面上には第1電極21が発光素子Eご
とに相互に離間して形成される。第1電極21は、Y方向を長手とする長方形状の電極で
あり、第2電極22よりも仕事関数が高い光反射性の導電材料によって形成される。図2
および図3に示すように、第1電極21は、第2絶縁層F2を厚さ方向に貫通するコンタ
クトホールCHを介して駆動トランジスタTdrのドレイン電極35に電気的に接続される
As shown in FIGS. 2 and 3, the first electrodes 21 are formed on the surface of the second insulating layer F2 so as to be separated from each other for each light emitting element E. The first electrode 21 is a rectangular electrode whose longitudinal direction is the Y direction, and is formed of a light reflective conductive material having a work function higher than that of the second electrode 22. FIG.
As shown in FIG. 3, the first electrode 21 is electrically connected to the drain electrode 35 of the driving transistor Tdr through a contact hole CH that penetrates the second insulating layer F2 in the thickness direction.

第1電極21が形成された第2絶縁層F2の表面には隔壁層25が形成される。図2お
よび図3に示すように、隔壁層25は、第1電極21と重なり合う各領域に開口部251
(隔壁層25を厚さ方向に貫通する孔)が形成された絶縁性の膜体である。図2に示すよ
うに、Z方向からみると開口部251の内周縁はその全周にわたって第1電極21の周縁
(輪郭線)よりも内側に位置する。すなわち、第1電極21は開口部251を介して隔壁
層25から露出する。なお、以上のように第1電極21の周縁は実際には隔壁層25に覆
われるが、図2においては第1電極21の外形が便宜的に実線で図示されている。
A partition layer 25 is formed on the surface of the second insulating layer F2 on which the first electrode 21 is formed. As shown in FIGS. 2 and 3, the partition wall layer 25 has an opening 251 in each region overlapping the first electrode 21.
This is an insulating film body in which (a hole penetrating the partition wall layer 25 in the thickness direction) is formed. As shown in FIG. 2, when viewed from the Z direction, the inner peripheral edge of the opening 251 is located inside the peripheral edge (contour line) of the first electrode 21 over the entire periphery. That is, the first electrode 21 is exposed from the partition wall layer 25 through the opening 251. As described above, the periphery of the first electrode 21 is actually covered with the partition wall layer 25, but in FIG. 2, the outer shape of the first electrode 21 is shown by a solid line for convenience.

発光層23は、隔壁層25が形成された第2絶縁層F2の全域を被覆するように複数の
発光素子Eにわたって連続に形成される。すなわち、発光層23は、開口部251の内側
に入り込んで第1電極21に接触する部分(すなわち実際に発光する部分)と隔壁層25
の面上に位置する部分とを含む。第1電極21は発光素子Eごとに相互に離間して形成さ
れるから、発光層23が複数の発光素子Eにわたって連続するとは言っても、発光層23
の輝度は各第1電極21の電圧に応じて発光素子Eごとに個別に制御される。なお、発光
層23による発光を促進または効率化するための各種の機能層(正孔注入層、正孔輸送層
、電子注入層、電子輸送層、正孔ブロック層、電子ブロック層)が発光層23に積層され
た構成としてもよい。
The light emitting layer 23 is continuously formed over the plurality of light emitting elements E so as to cover the entire region of the second insulating layer F2 on which the partition layer 25 is formed. That is, the light emitting layer 23 enters the inside of the opening 251 and comes into contact with the first electrode 21 (that is, the part that actually emits light) and the partition layer 25.
And a portion located on the surface. Since the first electrode 21 is formed so as to be separated from each other for each light emitting element E, the light emitting layer 23 is continuous even though the light emitting layer 23 is continuous over the plurality of light emitting elements E.
Is controlled individually for each light emitting element E according to the voltage of each first electrode 21. Various functional layers (a hole injection layer, a hole transport layer, an electron injection layer, an electron transport layer, a hole block layer, and an electron block layer) for promoting or improving the light emission by the light emitting layer 23 are the light emitting layers. It is good also as a structure laminated | stacked on 23. FIG.

図3に示すように、第2電極22は、複数の発光素子Eにわたって連続に形成されて発
光層23と隔壁層25とを覆う電極である。すなわち、第2電極22は、開口部251の
内側にて発光層23を挟んで第1電極21に対向する部分と隔壁層25の面上に位置する
部分とを含む。図2および図3に示すように、第1電極21と第2電極22と発光層23
との積層のうちZ方向からみて開口部251の内周縁の内側に位置する部分(すなわち第
1電極21から第2電極22に駆動電流Ielが流れる領域)が発光素子Eである。発光層
23のうち隔壁層25と重なり合う領域は、第1電極21と第2電極22との間に介在す
る隔壁層25によって電流が遮断されるから発光しない。すなわち、隔壁層25は、各発
光素子Eの輪郭線を画定する手段として機能する。
As shown in FIG. 3, the second electrode 22 is an electrode that is formed continuously over the plurality of light emitting elements E and covers the light emitting layer 23 and the partition layer 25. That is, the second electrode 22 includes a portion facing the first electrode 21 with the light emitting layer 23 sandwiched inside the opening 251 and a portion located on the surface of the partition layer 25. As shown in FIGS. 2 and 3, the first electrode 21, the second electrode 22, and the light emitting layer 23.
The portion located inside the inner periphery of the opening 251 in the Z direction (that is, the region where the drive current Iel flows from the first electrode 21 to the second electrode 22) is the light emitting element E. A region of the light emitting layer 23 that overlaps with the partition layer 25 does not emit light because current is blocked by the partition layer 25 interposed between the first electrode 21 and the second electrode 22. That is, the partition layer 25 functions as a means for demarcating the outline of each light emitting element E.

第2電極22は、ITO(Indium Tin Oxide)やIZO(Indium Zinc Oxide)といっ
た光透過性の導電材料によって形成される。したがって、発光層23から基板10とは反
対側に出射した光と発光層23から基板10側に出射して第1電極21の表面で反射した
光とは第2電極22を透過して出射する。すなわち、本実施形態の発光装置はトップエミ
ッション型である。
The second electrode 22 is formed of a light transmissive conductive material such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). Therefore, the light emitted from the light emitting layer 23 to the opposite side of the substrate 10 and the light emitted from the light emitting layer 23 toward the substrate 10 and reflected by the surface of the first electrode 21 are transmitted through the second electrode 22 and emitted. . That is, the light emitting device of this embodiment is a top emission type.

ところで、光透過性の導電材料の多くは抵抗率が高いから、この種の材料によって形成
された第2電極22は高抵抗となってその面内における電圧降下が顕著となる。したがっ
て、各発光素子Eに印加される電圧が第2電極22の面内(X−Y平面内)の位置に応じ
て相違し、この結果として各発光素子Eの輝度にムラが発生する場合がある。以上のよう
な光量のバラツキを抑制するために、本実施形態においては、第2電極22の導電性を補
助するための補助配線27が形成される。補助配線27は、第2電極22よりも抵抗率が
低い導電材料(例えばアルミニウム)によって形成されて第2電極22に導通する。本実
施形態の補助配線27は第2電極22と隔壁層25との間(第2電極22の直下)に形成
される。
By the way, since many of the light-transmitting conductive materials have high resistivity, the second electrode 22 formed of this kind of material has a high resistance, and the voltage drop in the surface becomes remarkable. Therefore, the voltage applied to each light emitting element E differs depending on the position in the plane of the second electrode 22 (in the XY plane), and as a result, the luminance of each light emitting element E may be uneven. is there. In order to suppress such a variation in the amount of light, in the present embodiment, an auxiliary wiring 27 for assisting the conductivity of the second electrode 22 is formed. The auxiliary wiring 27 is formed of a conductive material (for example, aluminum) having a lower resistivity than the second electrode 22 and is electrically connected to the second electrode 22. The auxiliary wiring 27 of the present embodiment is formed between the second electrode 22 and the partition wall layer 25 (directly below the second electrode 22).

次に、図2および図3を参照しながら各要素の具体的なレイアウトについて詳述する。
図2には、第i行から第(i+3)行までの各行に属する3列分の発光素子Eが図示されてい
る。第i行および第(i+2)行は偶数行であり、第(i+1)行および第(i+3)行は奇数行である
Next, a specific layout of each element will be described in detail with reference to FIGS.
FIG. 2 shows three columns of light-emitting elements E belonging to each row from the i-th row to the (i + 3) -th row. The i-th row and the (i + 2) -th row are even rows, and the (i + 1) -th row and the (i + 3) -th row are odd rows.

図2に示すように、偶数行の各発光素子EとそのY方向の正側に隣接する奇数行の各発
光素子Eとの間隙S1(幅B1)は、奇数行の各発光素子EとそのY方向の正側に隣接する
偶数行の各発光素子Eの間隙S2(幅B2)よりも広い(B1>B2)。補助配線27は、間
隙S1内にてX方向に延在するように形成され、間隙S2には形成されない。例えば、第i
行と第(i+1)行との間隙S1および第(i+2)行と第(i+3)行との間隙S1の各々には補助配線
27が形成され、第(i+1)行と第(i+2)行との間隙S2には補助配線27が存在しない。す
なわち、奇数行とそのY方向の正側に隣接する偶数行の2行を単位として素子アレイ部A
を区分すると、Y方向に隣接する各単位の間隙には補助配線27が形成され、ひとつの単
位に属する各行の間隙には補助配線27が存在しない。以上のように本実施形態において
は、複数行(2行)ごとに1本の割合で補助配線27が形成される。
As shown in FIG. 2, the gap S1 (width B1) between each light-emitting element E in the even-numbered row and each light-emitting element E in the odd-numbered row adjacent to the positive side in the Y direction is equal to each light-emitting element E in the odd-numbered row. It is wider (B1> B2) than the gap S2 (width B2) between the light emitting elements E in even rows adjacent to the positive side in the Y direction. The auxiliary wiring 27 is formed so as to extend in the X direction within the gap S1, and is not formed in the gap S2. For example, i
An auxiliary wiring 27 is formed in each of the gap S1 between the row and the (i + 1) th row and the gap S1 between the (i + 2) th row and the (i + 3) th row, and the (i + 1) th row. The auxiliary wiring 27 does not exist in the gap S2 between the row and the (i + 2) th row. That is, the element array unit A is composed of an odd row and an even row adjacent to the positive side in the Y direction as a unit.
, The auxiliary wiring 27 is formed in the gap between the units adjacent in the Y direction, and the auxiliary wiring 27 does not exist in the gap between the rows belonging to one unit. As described above, in the present embodiment, the auxiliary wiring 27 is formed at a rate of one for each of a plurality of rows (two rows).

補助配線27が形成される位置には製造技術上の理由から誤差が発生する場合がある。
例えば、マスクを介した蒸着(詳細は後述する)によって補助配線27を形成する場合に
は、マスクの寸法の誤差や基板10とマスクとの位置合わせの誤差に起因して補助配線2
7が所期の位置(設計上の位置)とは相違する位置に形成される場合がある。補助配線2
7の位置に誤差がある場合でも補助配線27と発光素子EとがZ方向からみて重複しない
ように、本実施形態においては、補助配線27の設計上の位置とその幅方向(Y方向)の
両側に隣接する発光素子Eとの各間隙にはマージン領域Mが確保される。図2および図3
に示すように、マージン領域Mは、補助配線27のうち発光素子E側の周縁と当該発光素
子Eのうち補助配線27側の周縁(開口部251の内周縁)とに挟まれた領域である。
An error may occur at the position where the auxiliary wiring 27 is formed for reasons of manufacturing technology.
For example, when the auxiliary wiring 27 is formed by vapor deposition through a mask (details will be described later), the auxiliary wiring 2 is caused by an error in the dimension of the mask or an alignment error between the substrate 10 and the mask.
7 may be formed at a position different from the intended position (designed position). Auxiliary wiring 2
In this embodiment, the auxiliary wiring 27 and the light emitting element E are not overlapped when viewed from the Z direction even in the case where there is an error in the position 7, in the present embodiment, the design position of the auxiliary wiring 27 and its width direction (Y direction). Margin regions M are secured in the gaps between the light emitting elements E adjacent to both sides. 2 and 3
2, the margin region M is a region sandwiched between the peripheral edge on the light emitting element E side of the auxiliary wiring 27 and the peripheral edge of the light emitting element E on the auxiliary wiring 27 side (inner peripheral edge of the opening 251). .

補助配線27は2行ごとに1本の割合で形成されるから、マージン領域Mは偶数行とそ
のY方向の正側の奇数行との間隙S1のみに確保され、奇数行とそのY方向の正側の偶数
行との間隙S2には存在しない。図2および図3に示すように、各発光素子Eの第1電極
21と駆動トランジスタTdrとを導通させるコンタクトホールCHは、当該発光素子Eと
これに隣接する補助配線27との間のマージン領域M内に、補助配線27が延在するX方
向に沿って長尺状に形成される。したがって、発光素子Eとこれに対応したコンタクトホ
ールCHとのY方向の配置は奇数行と偶数行とで反対となる。すなわち、偶数行において
は発光素子EからみてY方向の正側にコンタクトホールCHが位置するのに対し、奇数行
においては発光素子EからみてY方向の負側にコンタクトホールCHが位置する。換言す
ると、相互に隣接する奇数行と偶数行との各発光素子Eのレイアウトは、両行間にてX方
向に延在する軸線Tに関して線対称となる。
Since the auxiliary wiring 27 is formed at a rate of one for every two rows, the margin region M is secured only in the gap S1 between the even-numbered row and the odd-numbered row on the positive side in the Y-direction, and the odd-numbered row and the Y-direction in the Y-direction. It does not exist in the gap S2 with the even-numbered row on the positive side. As shown in FIGS. 2 and 3, the contact hole CH for conducting the first electrode 21 of each light emitting element E and the driving transistor Tdr is a margin region between the light emitting element E and the auxiliary wiring 27 adjacent thereto. In M, the auxiliary wiring 27 is formed in a long shape along the X direction in which it extends. Therefore, the arrangement of the light emitting elements E and the corresponding contact holes CH in the Y direction is opposite between the odd rows and the even rows. That is, the contact hole CH is located on the positive side in the Y direction when viewed from the light emitting element E in the even-numbered rows, whereas the contact hole CH is located on the negative side in the Y direction when viewed from the light emitting elements E in the odd rows. In other words, the layout of the light emitting elements E in the odd and even rows adjacent to each other is line-symmetric with respect to the axis T extending in the X direction between the two rows.

以上に説明したように、本実施形態においては2行ごとに1本の補助配線27が形成さ
れるから、全行の間隙に補助配線27が形成された構成(以下「従来構成」という)と比
較して、発光素子Eが分布する領域(素子アレイ部A)のうち補助配線27の形成やマー
ジン領域Mの確保に必要となる総面積が削減(単純には半分に削減)される。したがって
、開口率の維持と補助配線27の低抵抗化との両立が容易であるという利点がある。例え
ば、素子アレイ部Aの開口率を従来構成と同等に維持するとすれば、補助配線27の本数
や各々に対応するマージン領域Mの面積が削減された分だけ、各補助配線27の線幅を従
来構成よりも広く確保することができる。あるいは、各補助配線27の線幅を従来構成と
同等に維持するとすれば、素子アレイ部Aの全体に占める補助配線27やマージン領域M
の面積が削減された分だけ、各発光素子Eの面積を広く確保して従来構成よりも開口率を
増加させることができる。そして、駆動電流Ielの電流量が従来構成と同等であるとすれ
ば、開口率の増加によって各発光素子Eの光量を増大させることが可能となる。また、発
光装置から所期の光量を出射させるために各発光素子Eに供給すべき電気エネルギ(駆動
電流Iel)が開口率の増加によって低減されるから、電気エネルギの供給に起因した劣化
を抑制して発光素子Eが長寿命化されるという利点もある。
As described above, in the present embodiment, one auxiliary wiring 27 is formed for every two rows, so that the configuration in which the auxiliary wiring 27 is formed in the gaps of all the rows (hereinafter referred to as “conventional configuration”) and In comparison, the total area required for forming the auxiliary wiring 27 and securing the margin region M in the region where the light emitting element E is distributed (element array portion A) is reduced (simply reduced in half). Therefore, there is an advantage that it is easy to maintain the aperture ratio and reduce the resistance of the auxiliary wiring 27. For example, if the aperture ratio of the element array portion A is maintained to be the same as that of the conventional configuration, the line width of each auxiliary wiring 27 is reduced by the amount of the auxiliary wiring 27 and the area of the margin region M corresponding to each. It can be secured wider than the conventional configuration. Alternatively, if the line width of each auxiliary wiring 27 is maintained to be the same as that of the conventional configuration, the auxiliary wiring 27 and the margin area M occupying the entire element array portion A.
Therefore, the area of each light emitting element E can be secured wider and the aperture ratio can be increased as compared with the conventional configuration. If the current amount of the drive current Iel is equivalent to that of the conventional configuration, the light amount of each light emitting element E can be increased by increasing the aperture ratio. In addition, since the electrical energy (drive current Iel) to be supplied to each light emitting element E in order to emit a desired amount of light from the light emitting device is reduced by increasing the aperture ratio, deterioration due to the supply of electrical energy is suppressed. Thus, there is an advantage that the life of the light emitting element E is extended.

奇数行とそのY方向の正側の偶数行との間隙S2(幅B2)は発光に寄与しない領域(い
わゆるデッドスペース)となる。したがって、全行の各発光素子EがY方向に沿って等し
い間隔B1で配列する構成とすれば、素子アレイ部Aにおける開口率が制約されるという
問題がある。本実施形態においては間隙S2が間隙S1よりも狭い(B2<B1)。したがっ
て、各発光素子EがY方向に沿って等しい間隔B1に配列された構成と比較して、開口率
の増加を容易に実現することができる。
A gap S2 (width B2) between the odd-numbered row and the even-numbered row on the positive side in the Y direction is a region that does not contribute to light emission (so-called dead space). Therefore, if the light emitting elements E in all rows are arranged at equal intervals B1 along the Y direction, there is a problem that the aperture ratio in the element array portion A is restricted. In the present embodiment, the gap S2 is narrower than the gap S1 (B2 <B1). Therefore, an increase in the aperture ratio can be easily realized as compared with the configuration in which the light emitting elements E are arranged at equal intervals B1 along the Y direction.

ところで、第1電極21の表面のうちコンタクトホールCHと重なり合う部位には、コ
ンタクトホールCHの形状を反映した窪みが現れる。したがって、コンタクトホールCH
と重なり合うように発光素子Eが形成された構成(すなわち開口部251の内側にコンタ
クトホールCHが存在する構成)においては、コンタクトホールCHに対向する領域とそ
れ以外の領域とで発光層23の膜厚が相違し、これによって各発光素子Eの輝度の均一性
が損なわれる場合がある。また、第1電極21の表面の窪みにて発光素子Eからの出射光
が散乱することも輝度の不均一性の原因となる。これに対し、本実施形態においては、Z
方向からみてコンタクトホールCHとは重なり合わないように発光素子Eが形成される。
すなわち、第1電極21のうち窪みのない平坦面の表面のみに発光素子Eの発光層23が
形成されるから、各発光素子Eの輝度を均一化することが可能である。
Incidentally, a recess reflecting the shape of the contact hole CH appears in a portion of the surface of the first electrode 21 overlapping the contact hole CH. Therefore, contact hole CH
In the configuration in which the light-emitting element E is formed so as to overlap with (that is, the configuration in which the contact hole CH exists inside the opening 251), the region of the light-emitting layer 23 is divided into a region facing the contact hole CH and the other regions. The thickness is different, which may impair the luminance uniformity of each light emitting element E. In addition, scattering of the emitted light from the light emitting element E in the depression on the surface of the first electrode 21 also causes unevenness in luminance. On the other hand, in this embodiment, Z
The light emitting element E is formed so as not to overlap with the contact hole CH when viewed from the direction.
That is, since the light emitting layer 23 of the light emitting element E is formed only on the flat surface of the first electrode 21 having no depression, the luminance of each light emitting element E can be made uniform.

また、マージン領域Mの外側にコンタクトホールCHが形成された構成においては、コ
ンタクトホールCHの面積を増加させるほど発光素子Eの面積が縮小して開口率が低下す
るという問題がある。これに対し、本実施形態においては、本来的に発光に寄与しない(
すなわち発光素子Eが形成されない)マージン領域M内にコンタクトホールCHが形成さ
れるから、発光素子Eの面積を縮小することなくコンタクトホールCHの面積を充分に確
保することが可能である。例えば図2のようにコンタクトホールCHをX方向に長尺状に
形成することで、第1電極21と駆動トランジスタTdrとの接触抵抗を低下させるととも
に両者間の導通の不良を抑制できるという利点がある。
Further, in the configuration in which the contact hole CH is formed outside the margin region M, there is a problem that as the area of the contact hole CH is increased, the area of the light emitting element E is reduced and the aperture ratio is reduced. On the other hand, in the present embodiment, it does not inherently contribute to light emission (
That is, since the contact hole CH is formed in the margin region M (where the light emitting element E is not formed), it is possible to sufficiently secure the area of the contact hole CH without reducing the area of the light emitting element E. For example, as shown in FIG. 2, the contact hole CH is formed in an elongated shape in the X direction, thereby reducing the contact resistance between the first electrode 21 and the drive transistor Tdr and suppressing the conduction failure between the two. is there.

<発光装置の製造方法>
次に、本実施形態に係る発光装置を製造する方法のうち補助配線27を形成する工程に
ついて説明する。本実施形態の補助配線27は、マスクを利用した蒸着(真空蒸着)によ
って形成される。なお、補助配線27以外の要素の形成には総ての公知な技術が採用され
る。
<Method for manufacturing light emitting device>
Next, the process of forming the auxiliary wiring 27 in the method for manufacturing the light emitting device according to the present embodiment will be described. The auxiliary wiring 27 of this embodiment is formed by vapor deposition (vacuum vapor deposition) using a mask. It should be noted that all known techniques are employed for forming elements other than the auxiliary wiring 27.

図4は、補助配線27を形成する工程を説明するための断面図(図3に対応する断面)
である。図4に示すように、補助配線27の形成に先立って蒸着用のマスク50が用意さ
れる。マスク50は、領域RAが開口するとともにそれ以外の領域RBを遮蔽する形状に
作成される。領域RAは、補助配線27が形成される領域と対向するようにX方向に沿っ
て延在するスリット状の領域である。すなわち、領域RAは、偶数行(第i行や第(i+2)
行)とそのY方向の正側に隣接する奇数行(第(i+1)行や第(i+3)行)との間隙S1(より
詳細には間隙S1からマージン領域Mを除外した領域)に対向する領域である。一方、領
域RBは、領域RB1と領域RB2と領域RB3とを含む。領域RB1は、各発光素子Eに対
向する領域である。領域RB2は、マージン領域Mに対向する領域である。領域RB3は、
奇数行(第(i+1)行)とそのY方向の正側の偶数行(第(i+2)行)との間隙S2に対向する
幅B2の領域である。
FIG. 4 is a cross-sectional view for explaining a process of forming the auxiliary wiring 27 (cross section corresponding to FIG. 3).
It is. As shown in FIG. 4, a vapor deposition mask 50 is prepared prior to the formation of the auxiliary wiring 27. The mask 50 is formed in a shape that opens the region RA and shields the other region RB. The region RA is a slit-like region extending along the X direction so as to face the region where the auxiliary wiring 27 is formed. That is, the region RA is an even-numbered row (i-th row or (i + 2) th row).
Line) and an odd-numbered line (the (i + 1) th line or the (i + 3) th line) adjacent to the positive side in the Y-direction (more specifically, a region excluding the margin region M from the gap S1) ). On the other hand, the region RB includes a region RB1, a region RB2, and a region RB3. The region RB1 is a region facing each light emitting element E. The region RB2 is a region facing the margin region M. Region RB3 is
This is an area having a width B2 facing the gap S2 between the odd-numbered row ((i + 1) th row) and the even-numbered row ((i + 2) th row) on the positive side in the Y direction.

以上のマスク50を利用した蒸着によって補助配線27が形成される。すなわち、発光
層23が形成された段階(第2電極22の形成前)にある発光装置が真空中に配置され、
発光層23と対向するようにマスク50が配置される。そして、第2電極22よりも抵抗
率が低い導電材料の蒸気Vをマスク50側から発光装置に吹き付ける。以上の工程におい
て、マスク50の領域RBによって遮断された蒸気Vは発光装置に到達せず、マスク50
の領域RAを通過した蒸気Vが選択的に発光層23の表面に付着・堆積することで補助配
線27が図2の形状に形成される。
The auxiliary wiring 27 is formed by vapor deposition using the mask 50 described above. That is, the light emitting device in the stage where the light emitting layer 23 is formed (before the formation of the second electrode 22) is placed in a vacuum,
A mask 50 is disposed so as to face the light emitting layer 23. Then, a vapor V of a conductive material having a resistivity lower than that of the second electrode 22 is blown from the mask 50 side to the light emitting device. In the above process, the vapor V blocked by the region RB of the mask 50 does not reach the light emitting device, and the mask 50
The vapor V that has passed through the region RA is selectively attached and deposited on the surface of the light emitting layer 23, whereby the auxiliary wiring 27 is formed in the shape of FIG.

本実施形態の発光装置においては発光素子Eの2行ごとに1本の補助配線27が形成さ
れるから、図4に示すようにマスク50の領域RB3を開口させる必要はない。すなわち
、従来構成のように全行の間隙に補助配線27を形成する場合(マスク50の領域RAに
加えて領域RB3も開口する場合)と比較して、マスク50の機械的な強度を充分に維持
することができる。したがって、マスク50の変形(例えば自重による撓み)に起因した
補助配線27の寸法や位置の誤差を抑制することが可能である。
In the light emitting device of the present embodiment, since one auxiliary wiring 27 is formed for every two rows of the light emitting elements E, it is not necessary to open the region RB3 of the mask 50 as shown in FIG. That is, the mechanical strength of the mask 50 is sufficiently higher than when the auxiliary wiring 27 is formed in the gaps of all rows as in the conventional configuration (when the region RB3 is opened in addition to the region RA of the mask 50). Can be maintained. Therefore, it is possible to suppress an error in the size and position of the auxiliary wiring 27 caused by deformation of the mask 50 (for example, bending due to its own weight).

<B:第2実施形態>
次に、本発明の第2実施形態について説明する。なお、本実施形態のうち第1実施形態
と共通する要素については以上と同じ符号を付してその詳細な説明を適宜に省略する。
<B: Second Embodiment>
Next, a second embodiment of the present invention will be described. In the present embodiment, elements common to the first embodiment are denoted by the same reference numerals as those described above, and detailed description thereof is omitted as appropriate.

図5は、本実施形態に係る素子アレイ部Aの構成を示す平面図(図2に対応する平面図
)である。第1実施形態においては、補助配線27が発光素子Eの短辺(X方向)に沿っ
て延在する構成を例示した。これに対し、本実施形態における補助配線27は、図5に示
すように発光素子Eの長辺(Y方向)に沿って延在する。なお、図5においては、第j列
から第(j+3)列までの各列に属する3行分の発光素子Eが図示されている。第j列および
第(j+2)列は偶数列であり、第(j+1)列および第(j+3)列は奇数列である。
FIG. 5 is a plan view (a plan view corresponding to FIG. 2) showing the configuration of the element array portion A according to the present embodiment. In 1st Embodiment, the structure which the auxiliary wiring 27 extended along the short side (X direction) of the light emitting element E was illustrated. On the other hand, the auxiliary wiring 27 in the present embodiment extends along the long side (Y direction) of the light emitting element E as shown in FIG. In FIG. 5, three rows of light emitting elements E belonging to each column from the jth column to the (j + 3) th column are shown. The jth column and the (j + 2) th column are even columns, and the (j + 1) th column and the (j + 3) th column are odd columns.

図5に示すように、本実施形態においては複数列(2列)ごとに1本の補助配線27が
形成される。すなわち、第j列と第(j+1)列との間隙S1および第(j+2)列と第(j+3)列との
間隙S1(幅B1)にはY方向に延在する補助配線27が形成される一方、第(j+1)列と第(
j+2)列との間隙S2(幅B2(<B1))に補助配線27は形成されない。したがって、第
1実施形態と同様の効果が奏される。
As shown in FIG. 5, in this embodiment, one auxiliary wiring 27 is formed for each of a plurality of columns (two columns). That is, the gap S1 between the j-th column and the (j + 1) -th column and the gap S1 (width B1) between the (j + 2) -th column and the (j + 3) -th column are auxiliary elements extending in the Y direction. While the wiring 27 is formed, the (j + 1) th column and the (
The auxiliary wiring 27 is not formed in the gap S2 (width B2 (<B1)) with the j + 2) column. Therefore, the same effect as the first embodiment is achieved.

次に、各発光素子Eを通過した駆動電流Ielが補助配線27に流れ込むまでの区間の抵
抗値(以下「陰極側抵抗」という)について検討する。陰極側抵抗Rは、発光素子Eの周
縁から補助配線27までの距離Lに比例するとともに補助配線27が延在する方向に沿っ
た発光素子Eの寸法Wに反比例する(図2および図5参照)。第2実施形態においては発
光素子Eの長辺に沿って補助配線27が延在するから、発光素子Eの短辺に沿って補助配
線27が延在する第1実施形態と比較して寸法Wを充分に確保することができる。したが
って、本実施形態によれば第1実施形態と比較して陰極側抵抗Rが低減される。これによ
って第2電極22における電圧降下が抑制されるから、陰極側抵抗Rが高い場合と比較し
て、発光素子Eの駆動に必要な電源電圧VELを低下させることが可能となる。
Next, a resistance value (hereinafter referred to as “cathode side resistance”) in a section until the drive current Iel that has passed through each light emitting element E flows into the auxiliary wiring 27 will be examined. The cathode side resistance R is proportional to the distance L from the peripheral edge of the light emitting element E to the auxiliary wiring 27 and inversely proportional to the dimension W of the light emitting element E along the direction in which the auxiliary wiring 27 extends (see FIGS. 2 and 5). ). In the second embodiment, since the auxiliary wiring 27 extends along the long side of the light emitting element E, the dimension W is larger than that in the first embodiment in which the auxiliary wiring 27 extends along the short side of the light emitting element E. Can be secured sufficiently. Therefore, according to the present embodiment, the cathode side resistance R is reduced as compared with the first embodiment. As a result, the voltage drop at the second electrode 22 is suppressed, so that the power supply voltage VEL required for driving the light emitting element E can be reduced as compared with the case where the cathode side resistance R is high.

また、本実施形態においては発光素子Eの長辺に沿って補助配線27が延在するから、
ひとつの発光素子Eに対応したマージン領域Mが第1実施形態と比較して拡大され、これ
によってマージン領域M内のコンタクトホールCHの面積を増加させることが可能となる
。したがって、コンタクトホールCHの拡大に起因した開口率の低下を回避しながら、第
1電極21と駆動トランジスタTdrとを良好に導通させることができる。
In the present embodiment, since the auxiliary wiring 27 extends along the long side of the light emitting element E,
The margin region M corresponding to one light emitting element E is enlarged as compared with the first embodiment, and thereby the area of the contact hole CH in the margin region M can be increased. Therefore, the first electrode 21 and the drive transistor Tdr can be made to conduct well while avoiding a decrease in the aperture ratio due to the enlargement of the contact hole CH.

<C:第3実施形態>
次に、本発明の第3実施形態について説明する。なお、本実施形態のうち第1実施形態
と共通する要素については以上と同じ符号を付してその詳細な説明を適宜に省略する。
<C: Third Embodiment>
Next, a third embodiment of the present invention will be described. In the present embodiment, elements common to the first embodiment are denoted by the same reference numerals as those described above, and detailed description thereof is omitted as appropriate.

図6は、本実施形態に係る素子アレイ部Aの構成を示す平面図(図2に対応する平面図
)であり、図7は、図6におけるVII−VII線からみた断面図である。第1実施形態におい
ては補助配線27とコンタクトホールCHとが重なり合わない構成を例示した。これに対
し、本実施形態においては図6や図7に示すように、Z方向からみてコンタクトホールC
Hと重なり合うように補助配線27が形成される。すなわち、補助配線27は、隔壁層2
5の略全幅にわたって形成され、奇数行の各発光素子EのコンタクトホールCHとそのY
方向の正側に隣接する偶数行の各発光素子EのコンタクトホールCHとに重なり合う。な
お、奇数行とそのY方向の正側の偶数行との間隙に補助配線27が形成されない構成は第
1実施形態と同様である。また、補助配線27の周縁と発光素子Eの周縁との間隙(コン
タクトホールCHの周縁と発光素子Eとの間隙の一部)はマージン領域Mとなる。
6 is a plan view (plan view corresponding to FIG. 2) showing the configuration of the element array portion A according to the present embodiment, and FIG. 7 is a cross-sectional view taken along line VII-VII in FIG. In the first embodiment, the configuration in which the auxiliary wiring 27 and the contact hole CH do not overlap is illustrated. On the other hand, in this embodiment, as shown in FIGS. 6 and 7, the contact hole C is viewed from the Z direction.
An auxiliary wiring 27 is formed so as to overlap with H. That is, the auxiliary wiring 27 is connected to the partition wall layer 2.
5, the contact hole CH of each light-emitting element E in the odd-numbered row and its Y
It overlaps with the contact holes CH of the light emitting elements E in even rows adjacent to the positive side in the direction. The configuration in which the auxiliary wiring 27 is not formed in the gap between the odd-numbered row and the even-numbered row on the positive side in the Y direction is the same as in the first embodiment. Further, a gap between the peripheral edge of the auxiliary wiring 27 and the peripheral edge of the light emitting element E (a part of the gap between the peripheral edge of the contact hole CH and the light emitting element E) is a margin region M.

以上の構成によれば、第1実施形態と比較して補助配線27の抵抗値が低減されるから
、第2電極22における電圧降下を抑制するという効果はいっそう顕著となる。なお、図
6や図7においては第1実施形態の発光装置を変形した態様を例示したが、補助配線27
がコンタクトホールCHに重なり合うという構成は第2実施形態の発光装置にも同様に適
用される。
According to the above configuration, since the resistance value of the auxiliary wiring 27 is reduced as compared with the first embodiment, the effect of suppressing the voltage drop in the second electrode 22 becomes more remarkable. 6 and 7 exemplify a modification of the light emitting device of the first embodiment, the auxiliary wiring 27
Is overlapped with the contact hole CH, and the same applies to the light emitting device of the second embodiment.

また、補助配線27は遮光性を有するから、第1電極21の表面のうちコンタクトホー
ルCHと重なり合う部分の窪みに発光素子Eからの出射光や外光が到達したとしても、こ
の窪みにおける散乱光は補助配線27によって遮断されて外部には出射しない。したがっ
て、素子アレイ部Aの全体にわたって輝度の均一性が実現されるという利点もある。
In addition, since the auxiliary wiring 27 has a light shielding property, even if the light emitted from the light emitting element E or external light reaches the dent in the portion of the surface of the first electrode 21 that overlaps the contact hole CH, the scattered light in this dent. Is blocked by the auxiliary wiring 27 and does not exit to the outside. Therefore, there is also an advantage that luminance uniformity is realized over the entire element array portion A.

<D:変形例>
以上の各形態には様々な変形を加えることができる。具体的な変形の態様を例示すれば
以下の通りである。なお、以下の各態様を適宜に組み合わせてもよい。
<D: Modification>
Various modifications can be made to each of the above embodiments. An example of a specific modification is as follows. In addition, you may combine each following aspect suitably.

(1)変形例1
以上の各形態においては、2行(第2実施形態では2列)ごとに1本の割合で補助配線
27が形成された構成を例示したが、行数または列数と補助配線27との比率は適宜に変
更される。例えば、発光素子Eの3行(3列)以上を単位として1本の補助配線27が形
成される構成としてもよい。また、補助配線27が配置されるピッチ(相互に隣接する各
補助配線27の間隙に位置する発光素子Eの行数や列数)が素子アレイ部Aの全域にわた
って共通する必要は必ずしもなく、素子アレイ部A内の位置に応じて補助配線27の疎密
を相違させてもよい。
(1) Modification 1
In each of the above embodiments, the configuration in which the auxiliary wiring 27 is formed at the rate of one for every two rows (two columns in the second embodiment) is illustrated. However, the ratio between the number of rows or the number of columns and the auxiliary wiring 27 is illustrated. Are appropriately changed. For example, one auxiliary wiring 27 may be formed in units of three rows (three columns) or more of the light emitting elements E. Further, the pitch at which the auxiliary wirings 27 are arranged (the number of rows and columns of the light emitting elements E positioned in the gaps between the auxiliary wirings 27 adjacent to each other) does not necessarily have to be common throughout the entire element array portion A. Depending on the position in the array part A, the density of the auxiliary wirings 27 may be varied.

(2)変形例2
以上の各形態においては、複数の発光素子Eにわたって連続するように発光層23が形
成された構成を例示したが、発光層23が発光素子Eごとに分離された構成(例えば発光
層23が隔壁層25の開口部の内側のみに形成された構成)も採用される。また、隔壁層
25は適宜に省略される。
(2) Modification 2
In each of the above embodiments, the configuration in which the light emitting layer 23 is formed so as to be continuous over the plurality of light emitting elements E is exemplified. However, the configuration in which the light emitting layer 23 is separated for each light emitting element E (for example, the light emitting layer 23 is a partition wall). The configuration formed only inside the opening of the layer 25 is also employed. The partition layer 25 is omitted as appropriate.

(3)変形例3
以上の各形態における単位回路Uの具体的な構成は任意である。例えば、図1において
は発光素子Eの輝度がデータ線14の電圧値に応じて決定される電圧プログラミング方式
の回路を例示したが、発光素子Eの輝度がデータ線14の電流値に応じて決定される電流
プログラミング方式の回路としてもよい。また、以上の各形態においては駆動電流Ielが
駆動トランジスタTdrによって制御されるアクティブマトリクス方式の発光装置を例示し
たが、単位回路Uが能動素子を含まないパッシブマトリクス方式の発光装置にも本発明は
適用される。
(3) Modification 3
The specific configuration of the unit circuit U in each of the above embodiments is arbitrary. For example, FIG. 1 illustrates a voltage programming circuit in which the luminance of the light emitting element E is determined according to the voltage value of the data line 14, but the luminance of the light emitting element E is determined according to the current value of the data line 14. It may be a current programming circuit. In each of the above embodiments, the active matrix type light emitting device in which the driving current Iel is controlled by the driving transistor Tdr is exemplified. However, the present invention is also applied to a passive matrix type light emitting device in which the unit circuit U does not include an active element. Applied.

(4)変形例4
以上の各形態においては、隔壁層25と第2電極22との間に補助配線27が介在する
構成を例示したが、補助配線27が配置される位置は適宜に変更される。例えば、第2電
極22の上面(隔壁層25とは反対側の表面)に補助配線27が形成されてもよい。補助
配線27と第2電極22との間に絶縁層などの他層が介在しない構成(すなわち補助配線
27が第2電極22の直上または直下に形成された構成)によれば、補助配線27および
第2電極22の一方を他方に続いて形成することで双方が電気的に接続される。したがっ
て、例えば両者間に絶縁層が介在する構成(補助配線27と第2電極22とが絶縁層のコ
ンタクトホールを介して導通する構成)と比較して製造工程の簡素化や製造コストの低減
が実現される。
(4) Modification 4
In each of the above embodiments, the configuration in which the auxiliary wiring 27 is interposed between the partition wall layer 25 and the second electrode 22 is illustrated, but the position where the auxiliary wiring 27 is disposed is appropriately changed. For example, the auxiliary wiring 27 may be formed on the upper surface of the second electrode 22 (surface opposite to the partition wall layer 25). According to the configuration in which no other layer such as an insulating layer is interposed between the auxiliary wiring 27 and the second electrode 22 (that is, the configuration in which the auxiliary wiring 27 is formed immediately above or immediately below the second electrode 22), the auxiliary wiring 27 and By forming one of the second electrodes 22 following the other, both are electrically connected. Therefore, for example, compared with a configuration in which an insulating layer is interposed between them (a configuration in which the auxiliary wiring 27 and the second electrode 22 are conducted through a contact hole in the insulating layer), the manufacturing process is simplified and the manufacturing cost is reduced. Realized.

もっとも、発光層23よりも基板10側に補助配線27が形成されてもよい。例えば、
駆動トランジスタTdrのゲート電極32と同じ導電膜のパターニングによって補助配線が
形成され、第1絶縁層F1や第2絶縁層F2を貫通するコンタクトホールを介して第2電極
22に電気的に接続された構成も採用される。
However, the auxiliary wiring 27 may be formed closer to the substrate 10 than the light emitting layer 23. For example,
An auxiliary wiring is formed by patterning the same conductive film as the gate electrode 32 of the driving transistor Tdr, and is electrically connected to the second electrode 22 through a contact hole that penetrates the first insulating layer F1 and the second insulating layer F2. A configuration is also adopted.

(5)変形例5
以上の各形態においては有機EL材料からなる発光層23を含む発光素子Eを例示した
が、本発明における発光素子Eはこれに限定されない。例えば、無機EL材料からなる発
光層23を含む発光素子EやLED(Light Emitting Diode)素子など様々な発光素子E
を採用することができる。本発明における発光素子Eは、電気エネルギの供給(典型的に
は電流の供給)によって発光する素子であれば足り、その具体的な構造や材料の如何は不
問である。
(5) Modification 5
In each of the above embodiments, the light emitting element E including the light emitting layer 23 made of an organic EL material has been exemplified, but the light emitting element E in the present invention is not limited to this. For example, various light emitting elements E such as a light emitting element E including a light emitting layer 23 made of an inorganic EL material and an LED (Light Emitting Diode) element.
Can be adopted. The light-emitting element E in the present invention may be an element that emits light by supplying electric energy (typically supplying current), and its specific structure and material are not limited.

<E:応用例>
次に、本発明に係る発光装置を利用した電子機器について説明する。図8ないし図10
には、以上の何れかの形態に係る発光装置を表示装置として採用した電子機器の形態が図
示されている。
<E: Application example>
Next, an electronic apparatus using the light emitting device according to the present invention will be described. 8 to 10
The figure shows the form of an electronic apparatus that employs the light-emitting device according to any one of the above forms as a display device.

図8は、発光装置を採用したモバイル型のパーソナルコンピュータの構成を示す斜視図
である。パーソナルコンピュータ2000は、各種の画像を表示する発光装置Dと、電源
スイッチ2001やキーボード2002が設置された本体部2010とを具備する。発光
装置Dは有機発光ダイオード素子を発光素子Eとして使用しているので、視野角が広く見
易い画面を表示できる。
FIG. 8 is a perspective view showing the configuration of a mobile personal computer employing a light emitting device. The personal computer 2000 includes a light emitting device D that displays various images, and a main body 2010 on which a power switch 2001 and a keyboard 2002 are installed. Since the light emitting device D uses an organic light emitting diode element as the light emitting element E, it is possible to display an easy-to-see screen with a wide viewing angle.

図9は、発光装置を適用した携帯電話機の構成を示す斜視図である。携帯電話機300
0は、複数の操作ボタン3001およびスクロールボタン3002と、各種の画像を表示
する発光装置Dとを備える。スクロールボタン3002を操作することによって、発光装
置Dに表示される画面がスクロールされる。
FIG. 9 is a perspective view illustrating a configuration of a mobile phone to which the light emitting device is applied. Mobile phone 300
0 includes a plurality of operation buttons 3001 and scroll buttons 3002 and a light emitting device D that displays various images. By operating the scroll button 3002, the screen displayed on the light emitting device D is scrolled.

図10は、発光装置を適用した携帯情報端末(PDA:Personal Digital Assistant
s)の構成を示す斜視図である。情報携帯端末4000は、複数の操作ボタン4001お
よび電源スイッチ4002と、各種の画像を表示する発光装置Dとを備える。電源スイッ
チ4002を操作すると、住所録やスケジュール帳といった様々な情報が発光装置Dに表
示される。
FIG. 10 shows a personal digital assistant (PDA: Personal Digital Assistant) to which a light emitting device is applied.
It is a perspective view which shows the structure of s). The portable information terminal 4000 includes a plurality of operation buttons 4001, a power switch 4002, and a light emitting device D that displays various images. When the power switch 4002 is operated, various kinds of information such as an address book and a schedule book are displayed on the light emitting device D.

なお、本発明に係る発光装置が適用される電子機器としては、図8から図10に示した
機器のほか、デジタルスチルカメラ、テレビ、ビデオカメラ、カーナビゲーション装置、
ページャ、電子手帳、電子ペーパー、電卓、ワードプロセッサ、ワークステーション、テ
レビ電話、POS端末、プリンタ、スキャナ、複写機、ビデオプレーヤ、タッチパネルを
備えた機器等などが挙げられる。また、本発明に係る発光装置の用途は画像の表示に限定
されない。例えば、光書込型のプリンタや電子複写機といった画像形成装置においては、
用紙に形成されるべき画像に応じて感光体を露光する光ヘッド(書込ヘッド)が使用され
るが、この種の光ヘッドとしても本発明の発光装置は利用される。
Electronic devices to which the light emitting device according to the present invention is applied include digital still cameras, televisions, video cameras, car navigation devices, in addition to the devices shown in FIGS.
Examples include pagers, electronic notebooks, electronic paper, calculators, word processors, workstations, videophones, POS terminals, printers, scanners, copiers, video players, devices equipped with touch panels, and the like. Further, the use of the light emitting device according to the present invention is not limited to the display of images. For example, in an image forming apparatus such as an optical writing type printer or an electronic copying machine,
An optical head (writing head) that exposes a photoconductor according to an image to be formed on a sheet is used. The light emitting device of the present invention is also used as this type of optical head.

本発明の第1実施形態に係る発光装置の電気的な構成を示す回路図である。It is a circuit diagram which shows the electrical constitution of the light-emitting device which concerns on 1st Embodiment of this invention. 素子アレイ部の構成を示す平面図である。It is a top view which shows the structure of an element array part. 図2におけるIII−III線からみた断面図である。It is sectional drawing seen from the III-III line in FIG. 補助配線を形成する工程について説明するための断面図である。It is sectional drawing for demonstrating the process of forming auxiliary wiring. 第2実施形態における素子アレイ部の構成を示す平面図である。It is a top view which shows the structure of the element array part in 2nd Embodiment. 第3実施形態における素子アレイ部の構成を示す平面図である。It is a top view which shows the structure of the element array part in 3rd Embodiment. 図6におけるVII−VII線からみた断面図である。It is sectional drawing seen from the VII-VII line in FIG. 本発明に係る電子機器の形態(パーソナルコンピュータ)を示す斜視図である。It is a perspective view which shows the form (personal computer) of the electronic device which concerns on this invention. 本発明に係る電子機器の形態(携帯電話機)を示す斜視図である。It is a perspective view which shows the form (cellular phone) of the electronic device which concerns on this invention. 本発明に係る電子機器の形態(携帯情報端末)を示す斜視図である。It is a perspective view which shows the form (mobile information terminal) of the electronic device which concerns on this invention.

符号の説明Explanation of symbols

A……素子アレイ部、12……走査線、14……データ線、16……電源線、18……接
地線、U……単位回路、E……発光素子、Tdr……駆動トランジスタ、10……基板、F
0……ゲート絶縁層、F1……第1絶縁層、F2……第2絶縁層、21……第1電極、22
……第2電極、23……発光層、25……隔壁層、27……補助配線、M……マージン領
域。
A ... element array section, 12 ... scanning line, 14 ... data line, 16 ... power line, 18 ... ground line, U ... unit circuit, E ... light emitting element, Tdr ... drive transistor, 10 ... Substrate, F
0 …… Gate insulating layer, F1 …… First insulating layer, F2 …… Second insulating layer, 21 …… First electrode, 22
2nd electrode, 23 Light emitting layer, 25 Partition wall, 27 Auxiliary wiring, M Margin area.

Claims (12)

第1電極と第2電極との間に発光層が介在する複数の発光素子を第1方向に配列した複
数の素子群が前記第1方向と交差する第2方向に並列された素子アレイ部と、
前記第2電極よりも抵抗率が低い材料によって形成されて前記各発光素子の第2電極に
電気的に接続される補助配線とを具備し、
前記補助配線は、前記複数の素子群のうち相互に隣接する第1の素子群と第2の素子群
との間隙にて前記第1の方向に延在し、前記第2の素子群に対して前記第1の素子群とは
反対側に隣接する第3の素子群と前記第2の素子群との間隙には形成されない
ことを特徴とする発光装置。
An element array unit in which a plurality of element groups in which a plurality of light emitting elements having a light emitting layer interposed between a first electrode and a second electrode are arranged in a first direction are arranged in parallel in a second direction intersecting the first direction; ,
An auxiliary wiring formed of a material having a lower resistivity than the second electrode and electrically connected to the second electrode of each light emitting element;
The auxiliary wiring extends in the first direction by a gap between the first element group and the second element group adjacent to each other among the plurality of element groups, and the auxiliary wiring is connected to the second element group. Thus, the light emitting device is not formed in a gap between the third element group adjacent to the opposite side of the first element group and the second element group.
前記第1の素子群の各発光素子と前記第2の素子群の各発光素子との間隔は、前記第2
の素子群の各発光素子と前記第3の素子群の各発光素子との間隔よりも広い
請求項1に記載の発光装置。
The distance between each light emitting element of the first element group and each light emitting element of the second element group is the second
The light-emitting device according to claim 1, wherein the distance between each light-emitting element of the element group and each light-emitting element of the third element group is wider.
前記第2電極は、複数の発光素子にわたって連続に形成され、
前記補助配線は、前記第2電極の直下または直上に形成されて当該第2電極に面接触す

請求項1または請求項2に記載の発光装置。
The second electrode is continuously formed across a plurality of light emitting elements,
The light emitting device according to claim 1, wherein the auxiliary wiring is formed immediately below or immediately above the second electrode and is in surface contact with the second electrode.
前記各発光素子の第1電極が配置された基板の面上に形成されて前記第1電極に対応し
た開口部を有する隔壁層を具備し、
前記発光層は、前記開口部の内側に位置する部分を含み、
前記第2電極は、前記開口部の内側にて前記発光層を挟んで前記第1電極に対向する部
分と、前記隔壁層の表面を覆う部分とを含み、
前記補助配線は、前記隔壁層と前記第2電極との間に介在する
請求項3に記載の発光装置。
A partition layer formed on a surface of the substrate on which the first electrode of each light emitting element is disposed and having an opening corresponding to the first electrode;
The light emitting layer includes a portion located inside the opening,
The second electrode includes a portion facing the first electrode across the light emitting layer inside the opening, and a portion covering the surface of the partition layer,
The light emitting device according to claim 3, wherein the auxiliary wiring is interposed between the partition wall layer and the second electrode.
前記各発光素子は、前記第1方向に沿って長尺状に形成される
請求項3または請求項4に記載の発光装置。
The light emitting device according to claim 3, wherein each of the light emitting elements is formed in a long shape along the first direction.
前記各発光素子に供給される電流を制御する複数の駆動トランジスタと、
前記複数の駆動トランジスタを被覆する絶縁層とを具備し、
前記複数の発光素子は、前記絶縁層の面上に配置され、
前記各発光素子の第1電極は、前記絶縁層に形成されたコンタクトホールを介して前記
駆動トランジスタに電気的に接続される
請求項1から請求項5の何れかに記載の発光装置。
A plurality of drive transistors for controlling the current supplied to each light emitting element;
An insulating layer covering the plurality of driving transistors,
The plurality of light emitting elements are disposed on a surface of the insulating layer,
The light-emitting device according to claim 1, wherein the first electrode of each light-emitting element is electrically connected to the drive transistor through a contact hole formed in the insulating layer.
前記第1の素子群および前記第2の素子群の各々に属する各発光素子に対応したコンタ
クトホールは、当該素子群の各発光素子からみて前記補助配線側に形成される
請求項6に記載の発光装置。
The contact hole corresponding to each light emitting element belonging to each of the first element group and the second element group is formed on the auxiliary wiring side as viewed from each light emitting element of the element group. Light emitting device.
前記第1の素子群および前記第2の素子群の各々に属する各発光素子に対応したコンタ
クトホールは、当該素子群に属する各発光素子の前記補助配線側の周縁と前記補助配線に
おける当該発光素子側の周縁との間隙に形成される
請求項7に記載の発光装置。
The contact hole corresponding to each light emitting element belonging to each of the first element group and the second element group includes a peripheral edge on the auxiliary wiring side of each light emitting element belonging to the element group and the light emitting element in the auxiliary wiring. The light emitting device according to claim 7, wherein the light emitting device is formed in a gap with a peripheral edge on the side.
前記コンタクトホールは、前記第1方向に沿って長尺状に形成される
請求項6から請求項8の何れかに記載の発光装置。
The light emitting device according to claim 6, wherein the contact hole is formed in an elongated shape along the first direction.
第1電極と第2電極との間に発光層が介在する複数の発光素子を第1方向に配列した複
数の素子群が前記第1方向と交差する第2方向に並列された素子アレイ部と、
前記第2電極よりも抵抗率が低い材料によって形成されて前記各発光素子の第2電極に
電気的に接続される複数の補助配線とを具備し、
前記補助配線は、相互に隣接する2以上の素子群ごとに前記素子アレイ部を区分した各
単位の間隙にて前記第1方向に延在し、前記各単位に属する各素子群の間隙には形成され
ない
ことを特徴とする発光装置。
An element array unit in which a plurality of element groups in which a plurality of light emitting elements having a light emitting layer interposed between a first electrode and a second electrode are arranged in a first direction are arranged in parallel in a second direction intersecting the first direction; ,
A plurality of auxiliary wirings formed of a material having a lower resistivity than the second electrode and electrically connected to the second electrode of each light emitting element;
The auxiliary wiring extends in the first direction with a gap of each unit dividing the element array section for each of two or more element groups adjacent to each other, and in the gap of each element group belonging to each unit. A light emitting device which is not formed.
請求項1から請求項10の何れかに記載の発光装置を具備する電子機器。   An electronic apparatus comprising the light-emitting device according to claim 1. 第1電極と第2電極との間に発光層が介在する複数の発光素子を第1方向に配列した複
数の素子群が前記第1方向と交差する第2方向に並列された素子アレイ部と、前記各発光
素子の第2電極に電気的に接続される補助配線とを具備する発光装置を製造する方法であ
って、
前記複数の素子群のうち相互に隣接する第1の素子群と第2の素子群との間隙に対向す
る領域が開口し、前記第2の素子群に対して前記第1の素子群とは反対側に隣接する第3
の素子群と前記第2の素子群との間隙に対向する領域を遮蔽するマスクを用意する過程と

前記第2電極よりも抵抗率が低い材料を前記マスクを介して蒸着することで前記補助配
線を形成する過程と
を含む発光装置の製造方法。
An element array unit in which a plurality of element groups in which a plurality of light emitting elements having a light emitting layer interposed between a first electrode and a second electrode are arranged in a first direction are arranged in parallel in a second direction intersecting the first direction; A method of manufacturing a light emitting device comprising an auxiliary wiring electrically connected to the second electrode of each light emitting element,
A region facing the gap between the first element group and the second element group adjacent to each other among the plurality of element groups is opened. What is the first element group relative to the second element group? 3rd adjacent to the other side
Providing a mask for shielding a region facing the gap between the element group and the second element group;
Forming the auxiliary wiring by evaporating a material having a lower resistivity than that of the second electrode through the mask.
JP2006088306A 2006-03-28 2006-03-28 LIGHT EMITTING DEVICE AND ELECTRONIC DEVICE Active JP4702136B2 (en)

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JP2006088306A JP4702136B2 (en) 2006-03-28 2006-03-28 LIGHT EMITTING DEVICE AND ELECTRONIC DEVICE
US11/683,112 US7491975B2 (en) 2006-03-28 2007-03-07 Light-emitting device, method for making the same, and electronic apparatus
KR1020070029297A KR20070097331A (en) 2006-03-28 2007-03-26 Light-emitting device, method for making same, and electronic apparatus
TW096110644A TW200802841A (en) 2006-03-28 2007-03-27 Light-emitting device, method for making same, and electronic apparatus
CNA2007100884892A CN101047201A (en) 2006-03-28 2007-03-27 Luminescent device, manufacturing method thereof and electric device

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CN101047201A (en) 2007-10-03

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