JP2007260299A - Game machine - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the attractiveness of games by causing changes in the games in a game machine which executes the variable display of two pieces of identifying information from the establishment of separate execution requirements. <P>SOLUTION: The game machine is provided with a high base state that makes the second starter prize winning slot 14 easier to win and a low base state that makes the starter prize winning slot 14 harder to win. In the control to the low base state, the first reservation memory counts with the first reservation memory counter are displayed so as to be specifiable in a memory display area 9d of a variable display device 9. In the control to the high base state, total reservation memory counts (total of first and second reservation memory counts) with a total reservation memory counter are displayed so as to be specifiable. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention provides a first variable display that starts variable display of the first identification information and derives and displays a display result based on satisfaction of the first start condition of variable display after the first execution condition of variable display is satisfied. And a second variable display unit that starts variable display of the second identification information and derives and displays the display result based on the satisfaction of the second start condition of variable display after the second execution condition of variable display is satisfied And a gaming machine that shifts to a specific gaming state advantageous to the player when the specific display result is derived and displayed on either the first variable display unit or the second variable display unit.

  As a gaming machine, a game medium such as a game ball is launched into a game area by a launching device, and when a game medium wins a prize area such as a prize opening provided in the game area, a predetermined number of prize balls are paid out to the player. There is something to be done. Furthermore, a variable display device capable of variably displaying the identification information (also referred to as “fluctuation”) is provided, which is advantageous to the player when the display result of the variable display of the identification information becomes the specific display result in the variable display device. Some are configured to be controllable to a specific gaming state.

  The specific game state means a state advantageous to a player who is given a predetermined game value. Specifically, the specific gaming state is, for example, a state in which a special variable winning device is advantageous for a player who is likely to win a ball (a big hit gaming state), or a state in which a right to become advantageous for a player has occurred. In this state, a predetermined game value such as a state where conditions for paying out premium game media are easily established is given.

  In such a gaming machine, the fact that the display result in the variable display device that displays the special symbol as the identification information becomes a combination of specific display modes (specific display result) determined in advance is called “big hit”. When a big hit occurs, for example, the big winning opening is opened a predetermined number of times, and the game shifts to a big hit gaming state in which a hit ball is easy to win. And in each open period, if there is a prize for a predetermined number (for example, 10) of the big prize opening, the big prize opening is closed. And the number of times of opening the special winning opening is fixed to a predetermined number (for example, 15 rounds). Note that an opening time (for example, 29.5 seconds) is determined for each opening, and even if the number of winnings does not reach a predetermined number, the big winning opening is closed when the opening time elapses. Further, when a predetermined condition (for example, winning in a V zone provided in the big prize opening) is not established at the time when the big prize opening is closed, the big hit gaming state is configured to end. Sometimes.

  In the following Patent Document 1, a game including a variable display device capable of variably displaying two special symbols at the same time and variably displaying one notification symbol as identification information according to the progress of variable display of the two special symbols. A machine is disclosed. In this gaming machine, when variable display of two special symbols is proceeding simultaneously, variable display of a notification symbol corresponding to one of the special symbols in the variable display device based on a preset priority order. Is executed, and a stop symbol is derived and displayed when a variable display time (referred to as a fluctuation time) elapses. Further, in this gaming machine, the variable display device includes a display area for separately displaying the number of established start conditions (the number of reserved storages) for variable display of two special symbols, and a start condition for variable display of two special symbols. And a display area for displaying the number of established combinations (that is, the number of reserved storages for variable display of notification symbols). Then, each time the variable symbol special display and the notification symbol are started to be displayed, the reserved memory number is subtracted and displayed.

Japanese Patent Laying-Open No. 2005-185353 (0031, 0086, FIG. 3)

  In the gaming machine described in Patent Document 1, a game ball is awarded to a common start winning opening as the establishment of two special symbol start conditions. Then, which starting condition is established for the two special symbols is assigned to the one with the smaller number of established starting conditions when a winning to the start winning opening occurs. In such a configuration, the player only has to hit the game ball toward one start winning opening, so it is not interesting and it is not utilized that there are two special symbols. In addition, the gaming machine described in Patent Document 1 is configured to be controlled to a special gaming state such as a probability variation state or a time shortening variation state based on the fact that a big winning symbol has been won. The upper limit value of the number of reserved memories for variable display of the notification symbol is the same value in both the normal gaming state and the special gaming state. Therefore, the game may become monotonous.

  Accordingly, the present invention provides a gaming machine that can improve the interest of the game by changing the game in a gaming machine that executes variable display of two pieces of identification information based on the establishment of separate execution conditions. The purpose is to do.

  In the gaming machine according to the present invention, the first start condition for variable display is satisfied (for example, the first start condition for variable display after the first execution condition for variable display is satisfied (for example, the game ball has won the first start winning opening 13). The variable display of the first identification information (for example, the first special symbol, the first decorative symbol) is started based on the fact that the one special symbol and the first decorative symbol are not fluctuating or big hit, and the display result (for example, the stop symbol) ) And a first variable display section (for example, the first special symbol display 8a, the first decorative symbol display area 9b in the variable display device 9) and the second execution condition of the variable display are satisfied (for example, Based on the establishment of the second start condition of variable display (for example, the second special symbol and the second decorative symbol are not fluctuating or big hit) after the game ball has won the second start winning opening 14). Second identification information (for example, In the second variable display section (for example, the second special symbol display 8b and the variable display device 9) for starting the variable display of the second special symbol and the second decorative symbol and deriving and displaying the display result (for example, the stop symbol). A second decorative symbol display area 9c), which is advantageous to the player when a specific display result (for example, a big hit symbol) is derived and displayed on either the first variable display portion or the second variable display portion. A gaming machine (for example, a pachinko gaming machine 1) to be shifted to a gaming state (for example, a big hit gaming state), and a predetermined transition condition is satisfied (for example, Y in step S191 in the case of the probability variation state, and step S52 in the case of the short time state). , Y of S186, Y of S201), the first execution condition is controlled to a high base state (for example, the probability variation state and the short time state), and a predetermined end condition is satisfied (for example, the probability variation state). In the case of Y in step S184, Y in S201, Y in step S176, Y in S180, Y in S191, Y in S205) in the time-short state, the low base state (first execution condition is difficult to be satisfied) For example, game state transition control means for controlling to a normal game state (for example, steps S51, S53, S175, S177, S181, S185, S187, S194, S195, S202, S203, S206 in the game control microcomputer 560 are executed. Portion) and first counting means (for example, the first execution condition for which the first start condition is not satisfied (for example, the first pending storage number) is counted up to a first upper limit number (for example, 4) (for example, , A portion for executing S406 and S419 in the game control microcomputer 560) and the second start condition is satisfied. The second counting means (for example, steps S411 and S420 in the game control microcomputer 560 are executed) that counts the number of established second execution conditions (for example, the second reserved memory number) to the second upper limit number (for example, 4). And when the variable display of the first identification information on the first variable display unit based on the establishment of the first start condition is started, the display result of the variable display of the first identification information is used as the specific display result. First pre-determining means for determining whether or not (for example, a part for executing step S62 in the game control microcomputer 560) and second identification information in the second variable display unit based on the establishment of the second start condition When the variable display of the second identification information is started, the second pre-determining means for determining whether or not the display result of the variable display of the second identification information is the specific display result (for example, a game control game) A portion of the black computer 560 that executes the same process as the process of step S62 in the second special symbol process) and the determination result of the first pre-determining means, the first variable display unit displays the first identification information. First variable display execution means for executing variable display and deriving and displaying the display result on the first variable display section when a predetermined variable display time has elapsed (for example, steps S103 to S105 in the game control microcomputer 560, S107, S108a to S108c, S109a to S109c, S111, S112a to S112c, S113a to S113c, Steps S121 to S125, Steps S131, S132, Steps S141 and S142) Based on the result, the second variable display unit makes the second identification. The second variable display execution means for executing the variable display of the information and deriving and displaying the display result on the second variable display section when a predetermined variable display time has elapsed (for example, the second special display in the game control microcomputer 560) The same process as the process of steps S103-S105, S107, S108a-S108c, S109a-S109c, S111, S112a-S112c, S113a-S113c, steps S121-S125, steps S131, S132, steps S141, S142 in the symbol process. And a third variable that is easier to visually recognize than the first variable display unit and the second variable display unit when variable display of the first identification information or the second identification information is started. In the display section (for example, the background symbol display area 9a in the variable display device 9), the first When the variable display of the third identification information (for example, the background symbol) associated with the variable display of the identification information or the second identification information is executed and the predetermined variable display time has elapsed, the first identification information or the second identification information Third variable display executing means for deriving and displaying the display result associated with the display result of the variable display on the third variable display unit (for example, the part for executing step S707 in the production control microcomputer 100), and a low base When the state is controlled (for example, N in step S630a), second execution condition satisfaction number display means (for example, production) that displays the number of satisfied second execution conditions counted by the second counting means in an identifiable manner The portion of the control microcomputer 100 that executes steps S630b to S630e) and when it is controlled to the high base state (step S63) a) Y), the total number of establishments that displays the total number of establishments (for example, the total number of pending storages) obtained by summing the number of establishments counted by the first counting means and the number of establishments counted by the second counting means Means (for example, a part for executing steps S631 to S633 in the production control microcomputer 100).

  In addition, the gaming machine according to the present invention satisfies the first start condition of the variable display after the first execution condition of the variable display is satisfied (for example, the game ball has won the first start winning opening 13) (for example, The variable display of the first identification information (for example, the first special symbol, the first decorative symbol) is started based on the first special symbol and the first decorative symbol being neither fluctuating nor big hit, and the display result (for example, A first variable display section (for example, a first special symbol display 8a and a first decorative symbol display area 9b in the variable display device 9) for deriving and displaying a stop symbol) and a second variable display execution condition is established ( For example, the second start condition of variable display is established after the game ball has won the second start winning opening 14) (for example, the second special symbol and the second decorative symbol are not fluctuating or big hit) Based on the second identification information For example, a second variable display unit (for example, a second special symbol display 8b, a variable display device 9) that starts variable display of a second special symbol and a second decorative symbol and derives and displays a display result (for example, a stop symbol). The second decorative symbol display area 9c), and is advantageous to the player when a specific display result (for example, a big hit symbol) is derived and displayed on either the first variable display portion or the second variable display portion. A gaming machine (for example, a pachinko gaming machine 1) to be shifted to a specific gaming state (for example, a big hit gaming state), and a predetermined transition condition is satisfied (for example, Y in step S191 in the case of the probability variation state, step in the case of the short-time state) Control is made to a high base state (for example, a probability variation state and a time-short state) in which the first execution condition is easily satisfied when Y in S52, Y in S186, and Y in S201), and a predetermined end condition is satisfied (for example, Low base where the first execution condition is difficult to be satisfied when Y in step S184, Y in S201 in the case of a strange state, Y in step S176, Y in S180, Y in S191, Y in S205) in the short-time state Game state transition control means (for example, steps S51, S53, S175, S177, S181, S185, S187, S194, S195, S202, S203, S206 in the game control microcomputer 560 for controlling the state (for example, the normal game state). A first counting unit that counts the number of established execution conditions (for example, the first reserved storage number) up to a first upper limit number (for example, 4). (For example, the part for executing S406 and S419 in the game control microcomputer 560) and the second start condition is established. Second counting means (for example, steps S411 and S420 in the game control microcomputer 560) that counts the number of established second execution conditions (for example, the second reserved storage number) to the second upper limit number (for example, 4). And the variable identification display result of the first identification information when the variable display of the first identification information on the first variable display unit based on the establishment of the first start condition is started. First pre-determining means (for example, a part for executing step S62 in the game control microcomputer 560) and second in the second variable display unit based on the establishment of the second start condition. When starting the variable display of the identification information, a second pre-determining means for determining whether or not the display result of the variable display of the second identification information is to be a specific display result (for example, a game system) And the first special display process based on the determination result of the first predetermining means based on the second special symbol process in the microcomputer 560 and the determination result of the first predetermining means. The first variable display executing means for deriving and displaying the display result on the first variable display section when a predetermined variable display time has elapsed (for example, steps S103 to S105 in the game control microcomputer 560). , S107, S108a to S108c, S109a to S109c, S111, 112a to S112c, S113a to S113c, Steps S121 to S125, Steps S131, S132, Steps S141, S142) Based on the determination result, the second variable display unit The second variable display execution means for executing the variable display of the different information and deriving and displaying the display result on the second variable display section when the predetermined variable display time has elapsed (for example, the second variable display in the game control microcomputer 560 is the second display). Special symbol process processing similar to the processing of steps S103 to S105, S107, S108a to S108c, S109a to S109c, S111, 112a to S112c, S113a to S113c, steps S121 to S125, steps S131, S132, steps S141, S142 And when the variable display of the first identification information or the second identification information is started, the third variable display unit is easier to visually recognize than the first variable display unit and the second variable display unit. In the variable display section (for example, the background symbol display area 9a in the variable display device 9) The variable display of the third identification information (for example, background symbol) associated with the variable display of the first identification information or the second identification information is executed, and the first identification information or the second identification is performed when a predetermined variable display time has elapsed. A third variable display executing means for deriving and displaying the display result associated with the display result of the variable display of information on the third variable display section (for example, the portion executing step S707 in the production control microcomputer 100); The total number of establishments calculating means for calculating the total number of establishments obtained by adding the number of establishments counted by the first counting means and the number of establishments counted by the second counting means (for example, executing 630d and S632 in the production control microcomputer 100) Portion (see FIG. 100) and when the low base state is controlled (for example, N in step S630a in FIG. 100) Low-base-time execution condition establishment number display means (for example, a production control microcomputer) displays the execution condition establishment number up to a second upper limit number (for example, 4) among the total establishment number calculated by the stage. The portion that executes steps S630c and S630e in 100: see FIG. 100), and when the high base state is controlled (for example, Y in step S630a in FIG. 100), It is characterized by comprising high base execution condition establishment number display means (for example, a portion for executing steps S631 and S633 in the production control microcomputer 100: see FIG. 100) that can be specified.

  On the basis of the fact that the second pre-determining means has determined that the variable display display result is the specific display result, the second pre-determining means determines that the variable display display result is the specific display result. Forced non-specific display for determining that the display result of the variable display of the first identification information of the first variable display unit is not to be the specific display result during the specific period until the display result is derived and displayed by the variable display executing means. When the result determining means (for example, the part that executes step S60 in the game control microcomputer 560) and the second variable display unit are shifted to the specific game state based on the specific display result being derived and displayed. Restriction control means for executing predetermined control that does not satisfy the first start condition (for example, step S313 in the game control microcomputer 560) Portions for performing) and may be configured to include a.

  The first variable display execution means determines the determination result of the forced non-specific result determination means between the time when the specific display result is derived and displayed based on the determination result of the second prior determination means and the time when the specific gaming state ends. Variable display invalidating means for invalidating the variable display of the first identification information based on (for example, by updating the value of the first special symbol process flag or clearing the value of the first variable time timer) End the variable display: a portion for executing the processing of steps S127 to S129 and S141 in the game control microcomputer 560, and a portion for executing the processing of steps S824, S825, S826 and S803 in the production control microcomputer 100). It may be configured to include.

  The third variable display execution means starts the variable display of the first identification information on the first variable display section by the first variable display execution means and then starts the second variable display execution means on the second variable display section. The first variable display execution means is started within a specific time from the time when the variable display of the second identification information is started and the second variable display execution means derives and displays the specific display result as the display result on the second variable display section. Is a specific condition for deriving and displaying the display result on the first variable display section (for example, the background symbol is synchronized with the start of the variation of one of the decorative symbols until a predetermined time elapses after the variation of the other decorative symbol is started). When variation starts, the variation end timing of the other decorative symbol is later than the variation end timing of one decorative symbol (and background symbol), and the stop symbol of one decorative symbol is the jackpot symbol Being; figure 9), a specific condition determining means (for example, a portion of steps S643, S652-S658, S663, S672-S678 in the production control microcomputer 100) and a specific condition determining means are determined. When the variable display of the first identification information on the first variable display unit is terminated on the condition that it is determined that the specific condition is satisfied, the specific effect result corresponding to the specific display result is displayed in the third variable display unit. It may be configured to include specific effect result display means for executing the display control (for example, a portion of steps S953 to S9957, S964 to S967, and S981 to S985 in the effect control microcomputer 100).

  The third variable display execution means is associated with the variable display of the second identification information in the third variable display unit when the variable display of the second identification information is started when the low base state is controlled. The variable display of the third identification information is executed, and when a predetermined variable display time has elapsed, the display result associated with the display result of the variable display of the second identification information is derived and displayed on the third variable display unit ( For example, when the production control microcomputer 100 executes the variable display of the background symbols in the low base background symbol process in step S847) and is controlled to the high base state, the first identification information or the second identification is performed. When variable display of information is started, variable display of the third identification information associated with the variable display of the first identification information or the second identification information is executed in the third variable display unit, and a predetermined variable display time Passed The display result associated with the display result of the variable display of the first identification information or the second identification information is derived and displayed on the third variable display unit (for example, the production control microcomputer 100 uses the high base in step S848). It may be configured such that the background symbol variable display is performed in the background symbol process processing).

  According to the first aspect of the present invention, the first execution condition is controlled when the predetermined transition condition is satisfied, and the first execution condition is satisfied when the predetermined end condition is satisfied. A gaming state transition control means for controlling to a difficult low base state, a first counting means for counting the number of established first execution conditions that do not satisfy the first start condition to a first upper limit number, A second counting means for counting the number of established second execution conditions not established to a second upper limit number, and a second counting means counted by the second counting means when controlled to a low base state. A second execution condition establishment number display means for displaying the establishment number of the execution condition of 2 in an identifiable manner, and the establishment number counted by the first counting means and the second counting means when controlled to the high base state. Identifies the total number of formations totaled with the number of formations counted And the total number of established conditions display means, so that the ease of establishment of the first execution condition can be changed according to the gaming state, and the upper limit of the number of established execution conditions according to the gaming state The game can be changed and the game can be changed. As a result, the interest of the game can be improved.

  According to the second aspect of the present invention, the first execution condition is controlled when the predetermined transition condition is satisfied, and the first execution condition is satisfied when the predetermined end condition is satisfied. A gaming state transition control means for controlling to a difficult low base state, a first counting means for counting the number of established first execution conditions that do not satisfy the first start condition to a first upper limit number, A second counting means for counting the number of established second execution conditions not met to a second upper limit number, and the number of establishments counted by the first counting means and the establishment counted by the second counting means. A total number of establishments that calculates the total number of establishments obtained by adding together the numbers, and up to a second upper limit number of the total number of establishments calculated by the total number of establishments calculation unit when controlled to a low base state Low base that displays the number of established execution conditions in an identifiable manner A row condition fulfillment number display means and a high base execution condition fulfillment number display means for displaying the summation establishment number calculated by the summation establishment number calculation means when controlled to the high base state. Therefore, the easiness of establishment of the first execution condition can be changed according to the gaming state, and the upper limit of the established number of execution conditions that can be specified for the player is changed according to the gaming state. And the game can be changed. As a result, the interest of the game can be improved.

  According to the third aspect of the present invention, based on the fact that the second pre-determining unit has determined that the display result of the variable display is the specific display result, the second pre-deciding unit converts the display result of the variable display into the specific display result Then, after the determination, the display result of the variable display of the first identification information of the first variable display unit is not used as the specific display result during the specific period from when the determination is made until the display result is derived and displayed by the second variable display execution means. The first start condition is not satisfied when the forced non-specific display result determining means for determining and the specific display result is derived and displayed on the second variable display section and the state is shifted to the specific gaming state. And a regulation control means for executing predetermined control, so that the specific display result is derived and displayed on the first variable display section, and the specific display result is derived and displayed on the second variable display section. It and it is possible to prevent the occurrence at the same time.

  In the invention according to claim 4, the first variable display execution means is forced between the time when the specific display result is derived and displayed based on the determination result of the second pre-decision means and the time when the specific gaming state ends. Since the variable display invalidating means for invalidating the variable display of the first identification information based on the determination result of the non-specific result determining means is included, the variable display in the first variable display section is changed to the second variable display. The specific display result is derived and displayed on the display unit and can be invalidated in connection with the transition of the gaming state to the specific gaming state, and the specific display result is derived and displayed on the second variable display unit. Based on the variable display in the first variable display unit, it can be made difficult for the player to recognize.

  According to the fifth aspect of the present invention, the third variable display executing means is configured to perform the second variable display executing means after the first variable display executing means starts the variable display of the first identification information on the first variable display section. Due to this, the variable display of the second identification information is started on the second variable display section, and the second variable display execution means derives and displays the specific display result as the display result on the second variable display section within the specific time. In addition, the first variable display execution means determines whether or not a specific condition for deriving and displaying the display result on the first variable display section is satisfied, and the specific condition determination means determines that the specific condition is satisfied On the condition that the variable display of the first identification information on the first variable display unit is terminated, control for displaying a specific effect result corresponding to the specific display result on the third variable display unit is executed. A configuration including specific effect result display means; As a result, it is possible to prevent the player from being suddenly shifted to the specific gaming state before any notification regarding the variable display in the second variable display unit is given to the player, thereby causing the player to feel suspicious. Can not be. The third variable display executing means starts the display effect corresponding to the variable display of the first identification information on the first variable display section started by the first variable display executing means, and then performs the third variable display. It is sufficient to control the display of the specific effect result on the third variable display unit when the display effect is finished without changing the period of the display effect in the unit, and the control burden of the third variable display execution means is reduced. It can be prevented from increasing.

  According to the sixth aspect of the present invention, when the third variable display execution means is controlled to the low base state, the second variable display unit performs the second variable display when the variable display of the second identification information is started. The variable display of the third identification information associated with the variable display of the identification information is executed, and the display result associated with the display result of the variable display of the second identification information when the predetermined variable display time has elapsed When the variable display portion is derived and displayed and controlled to the high base state, when the variable display of the first identification information or the second identification information is started, the first identification information or Execute variable display of the third identification information associated with the variable display of the second identification information, and associate with the display result of the variable display of the first identification information or the second identification information when a predetermined variable display time has elapsed. Derived display results to the third variable display section In the low base state, the variable display of the third identification information only needs to be associated with the variable display of the second identification information, and the control burden of the third variable display execution unit is reduced. be able to.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

Embodiment 1 FIG.
First, the overall configuration of a pachinko gaming machine 1 that is an example of a gaming machine will be described. FIG. 1 is a front view of a pachinko gaming machine (bullet ball gaming machine) 1 as seen from the front. Note that a pachinko gaming machine is shown here as an example of a gaming machine, but the gaming machine according to the present invention is not limited to a pachinko gaming machine, for example, an image-type gaming machine, a coin gaming machine, a slot machine, and the like. Also good.

  The pachinko gaming machine 1 includes an outer frame (not shown) formed in a vertically long rectangular shape and a game frame attached to the inside of the outer frame so as to be openable and closable. Further, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape that is provided in the game frame so as to be opened and closed. The game frame includes a front frame (not shown) that can be opened and closed with respect to the outer frame, a mechanism plate (not shown) to which mechanism parts and the like are attached, and various parts (games to be described later) attached to them. A structure including the board 6).

  As shown in FIG. 1, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape. On the lower surface of the glass door frame 2 is a hitting ball supply tray (upper plate) 3. Under the hitting ball supply tray 3, there are provided a surplus ball receiving tray 4 for storing game balls that cannot be accommodated in the hitting ball supply tray 3, and a hitting operation handle (operation knob) 5 for firing the hitting ball. A game board 6 is detachably attached to the back surface of the glass door frame 2. The game board 6 is a structure including a plate-like body constituting the game board 6 and various components attached to the plate-like body. In addition, a game area 7 is formed on the front surface of the game board 6 in which a game ball that has been struck can flow down.

  In the vicinity of the center of the game area 7, there are a plurality of types of effect background symbols that can each be identified, a plurality of types of first effect symbols that can be identified, and a plurality of types of effects that can be identified. A variable display device 9 is provided that variably displays the second decorative symbols for use and derives and displays the display result. In this embodiment, the variable display device 9 is composed of a liquid crystal display device (LCD). The display area in the variable display device 9 includes a background symbol display area (area at the center of the screen) 9a for variably displaying the background symbol, and a first ornament symbol display area (the left corner of the screen) for variably displaying the first ornament symbol. Small area) 9b, a second decorative symbol display area (small area at the right corner of the screen) 9c for variably displaying the second decorative symbol, and the number of winning balls that have entered the start winning holes 13, 14, that is, reserved storage (It is also referred to as start memory or start winning memory.) It is divided into a memory display area (area at the bottom of the screen) 9d for displaying the number. As shown in FIG. 1, the memory display area 9d is provided with eight start memory display areas, and a maximum of eight reserved memory numbers (start memory numbers) can be displayed. In the example shown in FIG. 1, the background symbol display area 9a and the memory display area 9d are not separated by a boundary line, but may be separated by a boundary line.

  In the first decorative symbol display area 9b and the second decorative symbol display area 9c, for example, decorative symbols of numbers “0” to “9” are displayed and controlled so as to be variably displayed. Then, in the first decorative symbol display area 9b, the first effective execution condition of variable display is established (for example, when the hit ball wins the start winning opening 13 and wins, the number of reserved memories is a predetermined upper limit number ( The first start condition of variable display is established (when the first decorative symbol is not variably displayed and the first decorative symbol is not a big hit based on the big hit symbol) ) To start variable display of the first decorative design, and after a predetermined time has elapsed, the variable display is stopped and the display result is derived and displayed. Also, in the second decorative symbol display area 9c, the variable display second effective execution condition is satisfied (for example, when the hit ball wins the start winning opening 14 and wins, the reserved memory number is a predetermined upper limit number ( The second start condition of the variable display is satisfied (the second decorative symbol is not being variable displayed and the second decorative symbol is not a big hit based on the big hit symbol) ) To start variable display of the second decorative design, and after a predetermined time has elapsed, the variable display is stopped and the display result is derived and displayed.

  In the background symbol display area 9a, as shown in FIG. 1, display control is performed so that the left, middle, and right background symbols can be variably displayed. In this embodiment, the left, middle, and right background symbols are numbers from “0” to “9”, respectively. The variable display of the background symbol is executed in synchronization with the variable display of the first decorative symbol when the gaming state is a low base state described later. That is, after the first effective execution condition for variable display is satisfied, variable display of the background symbol is started based on the satisfaction of the first start condition for variable display, and after a predetermined time (the variation time of the first decorative symbol) has elapsed. The variable display is stopped and the display result is derived and displayed. On the other hand, when the game state is a high base state, which will be described later, the variable display of the background symbol is executed based on the establishment of the first effective execution condition and the establishment of the second effective execution condition. However, it does not always start in synchronization with the variable display of the first decorative symbol and the second decorative symbol. That is, variable display may be started when the first start condition is satisfied, or variable display may be started after a while after the first start condition is satisfied. Similarly, variable display may be started when the second start condition is satisfied, and variable display may be started after a while after the second start condition is satisfied. The condition under which the variable display of the background symbol in the high base state can be started is called a third start condition. The third start condition will be described later (see FIGS. 63, 66 to 69, etc.).

  As shown in FIG. 1, the area of the background symbol display area 9a includes the areas of the first ornament symbol display region 9b and the second ornament symbol display region 9c, the first special symbol hold memory display 18a, and the second special symbol hold. It is larger than the area of the memory display 18b. Therefore, the background symbol displayed in the background symbol display area 9a is the symbol that is most easily visible to the player than the decorative symbol or the special symbol. Therefore, the player pays the most attention to the background symbol.

  In the memory display area 9d, when the gaming state is the low base state, the display color changes every time the first effective execution condition is satisfied (that is, every time there is an effective start winning in the start winning opening 13) ( Each time the start memory number display area is increased by 1 (for example, the color is changed from blue display to red display) and the first start condition is satisfied (that is, each time the variable display of the first decorative symbol and the background symbol is started synchronously) In addition, the start memory number display area where the display color is changed is reduced by 1 (that is, the display color is restored to the original). Further, when the gaming state is in the high base state, in principle, every time the first effective execution condition and the second effective execution condition are satisfied (that is, every time there is an effective start winning in the start winning opening 13, 14). In addition, the start memory number display area where the display color changes is increased by one. However, when the gaming state is the high base state, an exception is that when the first invalid execution condition and the second invalid execution condition are satisfied (for example, the hit ball has won the start winning opening 13 or the starting winning opening 14). , Even if the number of reserved memories has reached a predetermined upper limit (4) when winning, this is called an invalid starting prize), the start memory number display area where the display color changes under certain conditions May be increased by one. In addition, when the gaming state is the high base state, the start memory number display area in which the display color is changed every time the third start condition is satisfied (that is, every time the variable display of the background symbol is started). Decrease by 1 (ie, restore the display color). Details of such display control of the number of reserved memories will be described later.

  In this embodiment, the number of stored background symbols is displayed in the memory display area 9d of the variable display device 9. However, the display (background symbol start-up) displays the number of stored background symbols. A storage display) may be provided separately from the variable display device 9.

  In this embodiment, when the gaming state is the low base state, the upper limit value of the number of reserved memories of the background symbol is set to “4”, and when the gaming state is the high base state, the upper limit value of the number of reserved memories of the background symbol is set. “8” (see FIG. 70). Here, the low base state means that in the normal symbol display 10, the probability that the stop symbol becomes a winning symbol is low, and the opening time in the variable winning ball apparatus 15 when the normal symbol becomes a winning symbol is short. The number of times is small. Specifically, it means a normal gaming state to be described later. On the other hand, the high base state means that, in the normal symbol display 10, the probability that the stop symbol is a winning symbol is higher than the normal state (low base state), and among the opening time and the number of opening times in the variable winning ball apparatus 15 One or both of them are higher than the normal state (low base state) (Note that the probability that the normal symbol stop symbol becomes a winning symbol does not change, and the opening time in the variable winning ball apparatus 15 is simply changed. And / or the number of opening times may be higher than the normal state (low base state). Specifically, it refers to the probability variation state and the short time state described later.

  In this embodiment, in the low base state, there is a low possibility (ratio) that a game ball will win the second start winning opening 14, so the upper limit value of the number of reserved symbols stored in the background symbol is small ("4"). When the gaming state is in the high base state, there is a high possibility (ratio) that a game ball will win the second start winning opening 14, so the upper limit value of the number of reserved symbols stored in the background symbol is large (“8”). It is said. Accordingly, of the eight start memory display areas provided in the memory display area 9d, four start memory display areas are used in the low base state (a maximum of four reserved memory numbers are displayed). In the high base state, eight start memory display areas are used (maximum eight stored memory numbers are displayed).

  Note that the upper limit value of the number of stored background symbols may be different. For example, the upper limit value may be “5” in the low base state, and the upper limit value may be “7” in the high base state.

  Note that winning means that a game ball has entered a predetermined area such as a winning opening. Deriving and displaying the display result means that the symbol is stopped and displayed (except for the stop before the so-called re-variation).

  A first special symbol display (special symbol display device) 8a and a second special symbol display 8b for variably displaying special symbols as identification information are provided on the upper portion of the variable display device 9. In this embodiment, the first special symbol display 8a and the second special symbol display 8b are each a simple and small display (for example, 7 segments) capable of variably displaying numbers “0” to “9”, for example. LED). The first special symbol display unit 8a and the second special symbol display unit 8b are more difficult to grasp whether the stop symbol is a jackpot symbol, whether it is a probability variation symbol or a non-probability variation symbol. You may be comprised so that many types of numbers may be variably displayed. Hereinafter, the identification information variably displayed on the first special symbol display 8a is referred to as a first special symbol, and the identification information variably displayed on the second special symbol display 8b is referred to as a second special symbol. In addition, the first special symbol and the second special symbol may be collectively referred to as a special symbol.

  The variable display device 9 variably displays the first decorative symbol as a decorative (production) symbol in the first decorative symbol display area 9b during the variable display time of the first special symbol by the first special symbol indicator 8a. I do. That is, the variable display of the first special symbol and the variable display of the first decorative symbol are synchronized, and when the variable display of the first special symbol is started, the variable display of the first decorative symbol is also started. When the special symbol variable display ends, the first decorative symbol variable display also ends. Further, during the variable display time of the second special symbol by the second special symbol display 8b, the second decorative symbol as a decorative symbol is variably displayed in the second decorative symbol display area 9c. That is, the variable display of the second special symbol and the variable display of the second decorative symbol are synchronized, and when the variable display of the second special symbol is started, the variable display of the second decorative symbol is also started. When the special symbol variable display ends, the second decorative symbol variable display also ends.

  The first special symbol display 8a that performs variable display of the first special symbol and the second special symbol display 8b that performs variable display of the second special symbol are mounted on the game control board (main board) 31. It is controlled by the microcomputer 560 for use. In addition, the variable display device 9 that performs variable display of the first decorative design and the second decorative design is controlled by an effect control microcomputer mounted on the effect control board.

  On the lower side of the first special symbol display 8a, the number of first execution conditions that are not satisfied (the number of effective winning balls that have entered the first start winning opening 13, that is, the storage memory (start It is also referred to as memory or start winning memory.) A first special symbol storage memory display 18a comprising four indicators for displaying the number) is provided. The first special symbol storage memory display 18a increases the number of indicators that are turned on by one every time there is an effective start winning that has entered the first start winning opening 13. Then, every time the variable display of the first special symbol display 8a is started, the number of indicators to be turned on is reduced by one. In addition, below the second special symbol display 8b, the number of fulfilled second execution conditions not fulfilling the second start condition (the number of effective winning balls that have entered the second start winning opening 14, that is, holding memory). A second special symbol storage memory display 18b comprising four displays for displaying (number) is provided. The second special symbol storage memory display 18b increases the number of indicators that are turned on by one every time there is an effective start winning that has entered the second start winning opening 14. Then, every time the variable display of the second special symbol display 8b is started, the number of indicators to be turned on is reduced by one. In this example, a display (special symbol reservation storage display) for displaying the number of reserved memories is provided separately from the variable display device 9. For example, a part of the display area of the variable display device 9 is provided. A special symbol hold storage display area may be used.

  In this embodiment, the first special symbol hold memory indicator 18a displays the number of reserved memories for the variable display of the first special symbol indicator 8a, and the second special symbol hold memory indicator 18b displays the second special symbol display. The number of reserved memories for the variable display of the display 8b is displayed, and the number of reserved storage for the variable display of the first special symbol display 8a and the variable display of the second special symbol display 8b (upper limit value 4 or 8) is displayed. The memory display area 9d of the variable display device 9 is configured to display collectively.

  In this embodiment, the upper limit value of the number of reserved memories of the first special symbol reserved memory display 18a is set to 4, and the upper limit value of the number of reserved memories of the second special symbol reserved memory display 18b is set to 4. The upper limit value may be a smaller value or a larger value. In this case, the upper limit value of the number of reserved symbols stored in the background symbol displayed in the memory display area 9d of the variable display device 9 is also set to a small value or a large value accordingly. For example, in the low base state, the value is the same as the upper limit value of the number of reserved symbols stored in the special symbol, and in the high base state, the value of the upper limit value of the number of reserved symbols stored in the special symbol × 2.

  As described above, in this embodiment, the first decorative design is displayed in the small area at the left corner of the screen of the variable display device 9, the second decorative design is displayed in the small area at the right corner of the screen, and the bottom of the screen The number of reserved memories is displayed on the side, and the background symbol is displayed in the approximate center of the screen. The first decorative symbol corresponds to the first special symbol on the first special symbol indicator 8a (not only when the symbols of both symbols are completely matched, but also when the symbols of both symbols are out of meaning, the non-probable big hit ( The case where the contents of the normal jackpot) match the probability variation jackpot is also included.), The second decorative symbol corresponds to the second special symbol in the second special symbol display 8b.

  When the background symbol is in the low base state, when the stop symbol of the first decorative symbol is out of place, the background symbol is out of place (the left, middle and right background symbols are not aligned with the same symbol), and the first decorative symbol When the stop symbol of is a big hit symbol, it is a big hit (the background symbols on the left, middle and right are aligned with the same symbol), and when the stop symbol of the first decorative symbol is a probable big hit symbol, it is a probable big hit symbol (Left, middle and right background symbols are aligned with the same probability variation (for example, 777)).

  In addition, when the background symbol is in the high base state, if the stop symbol of the two decorative symbols is out of place, the background symbol is out of place (the left middle right background symbol is not aligned with the same symbol), When one of the stop symbols of the decorative symbol becomes a big hit symbol, it becomes a big hit (the background symbols on the left, middle and right are in the same state), and one of the stop symbols of the two decorative symbols is probable When it is a big hit symbol, it becomes a probable big hit (the background symbols in the middle left and right are aligned with the same probability variable symbol (for example, 777)). According to such a screen display, it can be seen that there are eight reserved memory numbers for one symbol (background symbol). Therefore, even if two symbols are variably displayed in parallel, the player may simply pay attention to one symbol, and the impression that the screen looks complicated or the progress of the game It is possible to avoid giving the player a complicated impression.

  A first start winning opening 13 is provided below the variable display device 9. The game ball won in the first start winning opening 13 is guided to the back of the game board 6 and detected by the first start opening switch 13a.

  A variable winning ball device 15 having a second starting winning port 14 through which a game ball can be won is provided directly below the first starting winning port 13. The game ball that has won the second start winning opening 14 is guided to the back of the game board 6 and detected by the second start opening switch 14a. The variable winning ball device 15 is opened by a solenoid 16. When the variable winning ball device 15 is in the open state, the game ball can be won (or easier to win) in the second start winning port 14, which is advantageous to the player.

  In this embodiment, as shown in FIG. 1, a variable winning ball apparatus that opens and closes only at the second starting winning opening 14 is provided. However, the first starting winning opening 13 and the second starting winning opening 14 may be provided with a variable winning ball apparatus that performs an opening / closing operation. Moreover, you may provide the 1st start winning opening 13 and the 2nd starting winning opening 14 in the position which left | separated. For example, the first start winning opening 13 may be provided on the lower left side of the variable display device 9, and the second starting winning opening 14 may be provided on the lower right side of the variable display device 9. Even in such a case, a variable winning ball apparatus may be provided only at one start winning opening.

  Below the second start winning opening 14, a specific gaming state (a big hit gaming state) that occurs when a specific display result (big hit symbol) is derived and displayed on the first special symbol display 8a or the second special symbol display 8b. ), A special variable winning ball apparatus which is opened by the solenoid 21 is provided. The special variable winning ball apparatus includes an opening / closing plate 20 and forms a large winning opening. The game ball that has entered the big prize opening is detected by the count switch 23.

  A normal symbol display 10 is provided below the variable display device 9. The normal symbol display 10 variably displays a plurality of types of identification information (for example, “◯” and “x”) called normal symbols.

  When the game ball passes through the gate 32 and is detected by the gate switch 32a, the variable display of the normal symbol display 10 is started. In this embodiment, variable display is performed by alternately lighting the left and right lamps (a symbol can be visually recognized when the lamp is lit). For example, if the left lamp is lit when the variable display ends, it is a hit. When the stop symbol on the normal symbol display 10 is a predetermined symbol (winning symbol), the variable winning ball device 15 is opened for a predetermined number of times. That is, the state of the variable winning ball device 15 changes from a disadvantageous state to a player's advantageous state when the normal symbol is a winning symbol. In the vicinity of the normal symbol display 10, a normal symbol holding storage display 41 having a display unit with four LEDs for displaying the number of winning balls that have passed through the gate 32 is provided. Each time there is a game ball passing to the gate 32, the normal symbol hold memory display 41 increments the LED to be turned on by one. Then, every time variable display on the normal symbol display 10 is started, the number of LEDs to be lit is reduced by one.

  In this embodiment, one normal symbol display 10 and one variable winning ball device 15 are provided. However, when two variable winning ball devices are provided (the first start winning port 13 is also variable). When a winning ball device is provided), two normal symbol displays may be provided.

  A decorative lamp 25 blinkingly displayed during the game is provided around the left and right of the game area 7 of the game board 6, and an out port 26 into which a hit ball that has not won a prize is taken in at the bottom. In addition, two speakers 27 that utter sound effects and sounds as predetermined sound outputs are provided on the left and right upper portions outside the game area 7. A top frame lamp 28a, a left frame lamp 28b, and a right frame lamp 28c provided on the front frame are provided at the outer periphery upper portion, the outer periphery left portion, and the outer periphery right portion of the game area 7. Also, a prize ball lamp 51 that is turned on when there is a remaining number of prize balls is provided in the vicinity of the left frame lamp 28b, and a ball break lamp 52 that is turned on when the supply ball is cut is provided in the vicinity of the right frame lamp 28c. Is provided.

  In the gaming machine, a ball striking device (not shown) that drives a driving motor in response to a player operating the batting operation handle 5 and uses the rotational force of the driving motor to launch a gaming ball to the gaming area 7. ) Is provided. A game ball launched from the ball striking device enters the game area 7 through a ball striking rail formed in a circular shape so as to surround the game area 7, and then descends the game area 7.

  Regardless of whether the gaming state is the low base state or the high base state, when the game ball enters the first start winning opening 13 and is detected by the first start opening switch 13a, variable display of the first special symbol can be started. If it is in a state (for example, the end of the big hit game or the previous variable display is completed and the first start condition is satisfied), the variable display (variation) of the first special symbol is started on the first special symbol display 8a. At the same time, variable display of the first decorative symbol is started in the first decorative symbol display area 9b of the variable display device 9. If the variable display of the first special symbol cannot be started, it is displayed on the first special symbol storage display 18a on the condition that the number of reserved memories of the first special symbol has not reached the upper limit (four). The number of reserved memories displayed in the memory display area 9d of the variable display device 9 is increased by one on the condition that the number of reserved memories stored in the background symbol has not reached the upper limit (8). (The start memory number display area where the display color changes is increased by one). As will be described later, when the number of reserved memories of the first special symbol reaches the upper limit value, the number of reserved memories displayed on the first special symbol reserved memory display 18a is not increased, but the variable display device The number of reserved storages displayed in the nine memory display areas 9d may be increased.

  Also, in any case where the gaming state is the low base state or the high base state, if the game ball enters the second start winning opening 14 and is detected by the second start opening switch 14a, the variable display of the second special symbol is displayed. If it is in a startable state (for example, if the big hit game has ended or the previous variable display has ended and the second start condition has been satisfied), the second special symbol display unit 8b can display the second special symbol (variation). Is started, and variable display of the second decorative symbol is started in the second decorative symbol display area 9c of the variable display device 9. If the variable display of the second special symbol cannot be started, it is displayed on the second special symbol storage display 18b on the condition that the number of reserved memories of the second special symbol has not reached the upper limit (four). The number of reserved memories displayed in the memory display area 9d of the variable display device 9 is increased by one on the condition that the number of reserved memories stored in the background symbol has not reached the upper limit (8). (The start memory number display area where the display color changes is increased by one). As will be described later, when the number of reserved memories of the second special symbol has reached the upper limit, the number of reserved memories displayed on the second special symbol reserved memory display 18b is not increased, but the variable display device The number of reserved storages displayed in the nine memory display areas 9d may be increased.

  The variable display of the first special symbol on the first special symbol display 8a and the variable display of the first decorative symbol in the first decorative symbol display area 9b of the variable display device 9 are stopped when a predetermined time has elapsed. When the first special symbol at the time of stoppage becomes a jackpot symbol (specific display result), the game shifts to a jackpot gaming state. That is, the special variable winning ball apparatus (large winning opening) is opened until a predetermined period (for example, 29 seconds) elapses or until a predetermined number (for example, 10) of game balls wins the large winning opening. One round in the big hit gaming state is a period until a certain period of time has passed after the big winning opening is opened or until a predetermined number (for example, ten) of hit balls wins the big winning opening. When a predetermined number of game balls have won the big winning opening, or when a certain period has passed since the opening of the big winning opening, a continuation right is generated and the special variable winning ball apparatus is opened again. The generation of the continuation right is allowed a predetermined number of times (for example, 15 rounds). Note that a V winning area may be provided in the grand prize opening, and the continuation right may be generated on condition that the hit ball has won the V winning area while the big prize opening is open.

  If it is decided to change the stop symbol when the first special symbol on the first special symbol display 8a is stopped to the jackpot symbol (probability display result: probability variation symbol) with probability variation, Of the normal state (also referred to as a normal gaming state) and the short-time state (a time shortening state that is a gaming state in which the variation time of special symbols and decorative symbols is shortened, a special gaming state that is a gaming state advantageous to the player) It becomes a more advantageous state for the player in a higher probability change state (an example of a special gaming state advantageous for the player) than that of the example. In addition, when the stop symbol of the first special symbol is determined as the probability variation symbol and is controlled to the probability variation state, that is, when the probability variation state is entered, the first special symbol in the first special symbol display 8a becomes the big hit symbol. Not only will the probability increase, but the probability that the second special symbol in the second special symbol display 8b will be a big hit symbol also increases. In other words, not only the jackpot determination based on the first start prize but also the jackpot determination based on the second start prize is determined to be a jackpot with a higher probability than in the normal state.

  Further, the variable display of the second special symbol on the second special symbol display 8b and the variable display of the second decorative symbol in the second decorative symbol display area 9c of the variable display device 9 are stopped when a predetermined time has elapsed. When the second special symbol at the time of stoppage becomes a jackpot symbol (specific display result), the game shifts to a jackpot gaming state. That is, the special variable winning ball device (large winning opening) is opened until a predetermined period elapses or until a predetermined number (for example, 10) of game balls wins the winning line. It should be noted that one round in the big hit gaming state is a period until a predetermined period elapses after the grand prize opening is opened or until a predetermined number (for example, 10) of hitting balls wins the big prize opening. When a predetermined number of game balls have won the big winning opening, or when a certain period has passed since the opening of the big winning opening, a continuation right is generated and the special variable winning ball apparatus is opened again. The generation of the continuation right is allowed a predetermined number of times (for example, 15 rounds). Note that a V winning area may be provided in the grand prize opening, and the continuation right may be generated on condition that the hit ball has won the V winning area while the big prize opening is open.

  When the second special symbol display unit 8b decides to change the stop symbol at the time when the second special symbol fluctuates to a jackpot symbol with a probability variation (special display result: probability variation symbol such as “7”). Is controlled to a special gaming state in which the probability of the next big hit is higher than the probability in the normal state and the short time state. That is, it becomes a more advantageous state for the player in a probable change state. In addition, when the stop symbol of the second special symbol is determined to be a probable variation symbol and is controlled to the special gaming state after the big hit gaming state, there is a probability that the second special symbol on the second special symbol display 8b becomes a big hit symbol. In addition to the increase, the probability that the first special symbol in the first special symbol display 8a becomes a big hit symbol also increases. In other words, not only the jackpot determination based on the second start prize but also the jackpot determination based on the first start prize is determined to be a jackpot with a higher probability than in the normal state.

  In the probability variation state as the special gaming state, as described above, the stop symbols of the first special symbol and the second special symbol that are variably displayed on the first special symbol display 8a and the second special symbol display 8b are jackpot symbols ( The probability of becoming a specific display result (for example, an odd number of 0 to 9) is higher than the normal state and the short-time state. Further, in the normal symbol display 10, the probability that the stop symbol becomes a winning symbol is increased from the normal state, and one or both of the opening time and the number of times of opening in the variable winning ball apparatus 15 are increased from the normal state. This is a more advantageous state for the player. Furthermore, in this embodiment, the variable display time (fluctuation time) of the first special symbol and the second special symbol in the first special symbol display 8a and the second special symbol display 8b is shortened compared to the normal gaming state. . In that case, variable display of special symbols is frequently executed.

  In the probability variation state, the variable symbol display time (variation time) of the normal symbol on the normal symbol display 10 may be shorter than that in the normal state. In that case, the start winning to the second start winning opening 14 is likely to occur, the number of variable display of the second special symbol on the second special symbol display 8b within a predetermined period increases, and the second special symbol becomes The possibility of becoming a big hit symbol is higher than the normal state, and it becomes a more advantageous state for the player.

  When the jackpot symbol is stopped and displayed on the first special symbol display 8a, the jackpot symbol is also stopped and displayed on the first decorative symbol display area 9b of the variable display device 9, and further on the background symbol display area 9a of the variable display device 9 The background symbols are stopped and displayed in a state where the left middle right background symbols are aligned. When the jackpot symbol is stopped and displayed on the second special symbol display 8b, the jackpot symbol is also stopped and displayed on the second decorative symbol display area 9c of the variable display device 9, and further on the background symbol display area 9a of the variable display device 9 The background symbols are stopped and displayed in a state where the left middle right background symbols are aligned. Hereinafter, the stop display in the state where the left middle right background symbols are aligned in the background symbol display area 9a of the variable display device 9 is expressed as a jackpot symbol of the background symbol is displayed.

  Further, when the probability variable symbol is stopped and displayed on the first special symbol display 8a, the probability variable symbol is also stopped and displayed in the first decorative symbol display area 9b of the variable display device 9, and further the background symbol display area of the variable display device 9 is displayed. In 9a, the background symbols (for example, “7”, “7”, “7”) reminiscent of the probability variation symbols are stopped and displayed. When the probability variable symbol is stopped and displayed on the second special symbol display 8b, the probability variable symbol is also stopped and displayed on the second decorative symbol display area 9c of the variable display device 9, and further on the background symbol display area 9a of the variable display device 9 Background symbols (for example, “7”, “7”, “7”) reminiscent of a probable variable symbol are stopped and displayed.

  Next, the reach display mode (reach) will be described. The reach display mode (reach) in this embodiment is that variable display (variable display) is performed for background symbols that have not yet stopped when the stopped background symbols constitute part of the jackpot symbol. This is a state in which all or part of the background symbols are synchronously displayed while constituting all or part of the jackpot symbol.

  For example, a background symbol (for example, “7”) that is a part of the jackpot symbol is stopped and displayed in the left and right display regions of the left, middle, and right display regions in the background symbol display region 9a of the variable display device 9. In the displayed state, the display area in the middle is still in a variable display state, and all or some of the symbols in the display area are synchronously displayed while forming all or part of the jackpot symbol. The state (for example, the state in which the variable display is performed on all of the left, middle, and right display areas and the variable display is always performed in a state where the same symbols are arranged) is the reach display mode or reach.

  In addition, during the reach, an unusual performance is performed with a lamp or sound. The effect and the reach display mode in the variable display device 9 are called reach effects. Further, in the case of reach, a character (an effect display imitating a person or the like, which is different from the design) is displayed, or the background of the variable display device 9 (a ground color or pattern different from the design and the character). The display mode (for example, color) may be changed.

  Next, game state transition will be described. In this embodiment, if a probable big hit occurs in the normal gaming state or the short time state, the gaming state is shifted from the normal gaming state or the short time state to the probable state. The probability variation state is continued until the number of fluctuations after the probability variation big hit occurs (after it is determined that the probability variation big hit is reached) reaches a predetermined number of times (for example, a number between 50 and 150 times). When the predetermined number of times that the probability variation state can be continued is changed, if the number of variations exceeds a specific number (for example, 100 times), the probability variation state is shifted to the normal gaming state. If the number of fluctuations does not exceed the specific number, the state is shifted from the probability variation state to the time reduction state. The short-time state is continued until the number of fluctuations after the end of the probable big hit becomes a specific number. The probability variation state may be continued until the next big hit occurs. Further, when the probability variation state is configured to continue a predetermined number of times (for example, 50 to 150 times), after the predetermined number of fluctuations, the time-short state is continued until the next big hit occurs. There may be.

  Here, as described above, the time-short state is a gaming state in which the probability that a big hit will not occur does not increase, but the variable symbol display time (fluctuation time) of the special symbol is shorter than the normal gaming state. By shortening the special symbol variable display time, the special symbol variable display is frequently executed, and the possibility of occurrence of jackpot per predetermined time is increased. Further, in the short time state, in the normal symbol display 10, the probability that the stop symbol becomes a winning symbol is higher than the normal state, and one or both of the opening time and the number of times of opening in the variable winning ball device 15 are in the normal state. It will be more advantageous for the player. In the short time state, the normal symbol variable display time (variation time) on the normal symbol display 10 may be shorter than that in the normal game state. In that case, the number of times the variable winning ball apparatus 15 is released per predetermined time is increased, which is more advantageous for the player.

  When the probability variation big hit occurs in the probability variation state, the probability variation state is continued for a new predetermined number of times (for example, a number between 50 and 150 times). If a non-probable big hit (usually big hit) occurs in the probabilistic state, the state changes from the probabilistic state to the time-short state. The time reduction state is continued until a predetermined number of times (for example, 100 times) after the occurrence of the uncertain change big hit.

  When it is determined that the probability variation state is to be ended by lottery in the probability variation state (see step S46 described later), the number of variations at that time exceeds a specific number (for example, 100 times) after the probability variation big hit occurs. If this is the case, a transition is made from the probability changing state to the normal gaming state. If the specific number of times is not exceeded, the state is shifted from the probability variation state to the time reduction state. The short-time state is continued until the number of fluctuations after occurrence of a probable big hit becomes a specific number.

  If a non-probable big hit occurs in the short time state, the normal time gaming state is shifted from the short time state. In addition, when the fluctuation for the number of times that the time-saving state can be continued is completed, the time-saving state is shifted to the normal gaming state. Also, even if a normal big hit occurs in the normal gaming state, the gaming state remains the normal gaming state.

  FIG. 2 is a block diagram showing an example of the circuit configuration of the main board (game control board) 31. 2 also shows the payout control board 37, the effect control board 80, and the like. A game control microcomputer (corresponding to a game control means) 560 for controlling the pachinko gaming machine 1 according to a program is mounted on the main board 31. The game control microcomputer 560 includes a ROM 54 for storing a game control (game progress control) program and the like, a RAM 55 as storage means used as a work memory, a CPU 56 for performing control operations in accordance with the program, and an I / O port unit 57. including. In this embodiment, the ROM 54 and the RAM 55 are built in the game control microcomputer 560. That is, the game control microcomputer 560 is a one-chip microcomputer. The one-chip microcomputer only needs to include at least RAM 55 in addition to the CPU 56, and the ROM 54 may be external or internal. The I / O port unit 57 may be externally attached.

  In the game control microcomputer 560, the CPU 56 executes control in accordance with the program stored in the ROM 54, so that the game control microcomputer 560 (or CPU 56) executes (or performs processing) hereinafter. Specifically, the CPU 56 executes control according to a program. The same applies to microcomputers mounted on substrates other than the main substrate 31.

  Further, an input driver circuit 58 for supplying detection signals from the gate switch 32a, the first start port switch 13a, the second start port switch 14a, and the count switch 23 to the game control microcomputer 560 is also mounted on the main board 31 and is variable. An output circuit 59 for driving the solenoid 16 for opening and closing the winning ball apparatus 15 and the solenoid 21 for opening and closing the special variable winning ball apparatus according to a command from the game control microcomputer 560 is also mounted on the main board 31 and is used for game control when the power is turned on. A system reset circuit (not shown) for resetting the microcomputer 560 and an information output circuit (not shown) for outputting an information output signal such as jackpot information indicating the occurrence of a jackpot gaming state to an external device such as a hall computer. Are mounted on the main board 31. The main board 31 is also provided with a test signal output circuit (not shown) for outputting a test signal to the outside of the gaming machine.

  In this embodiment, the effect control means (configured by the effect control microcomputer) mounted on the effect control board 80 receives the effect control command from the game control microcomputer 560 via the relay board 77. The display control of the variable display device 9 that receives and variably displays the decorative design and the background design is performed.

  Further, the game control microcomputer 560 performs display control of the first special symbol display 8a for variably displaying the first special symbol and the second special symbol display 8b for variably displaying the second special symbol. In addition, the game control microcomputer 560 performs display control of the normal symbol display 10 that variably displays normal symbols. Further, the game control microcomputer 560 includes a first special symbol hold memory indicator 18a for displaying the number of reserved memories of the first special symbol and a second special symbol hold memory indicator for displaying the number of reserved memories of the second special symbol. In addition to performing the display control of 18b, the display control of the normal symbol hold storage display 41 for displaying the number of reserved symbols of the normal symbol is also performed.

  FIG. 3 is a block diagram illustrating a circuit configuration example of the relay board 77, the effect control board 80, the lamp driver board 35, and the audio output board 70. In the example shown in FIG. 3, the lamp driver board 35 and the audio output board 70 are not equipped with a microcomputer, but may be equipped with a microcomputer. Further, without providing the lamp driver board 35 and the audio output board 70, only the effect control board 80 may be provided for effect control.

  The effect control board 80 has an effect control microcomputer 100 including an effect control CPU 101 and a RAM. The RAM may be externally attached. In the effect control board 80, the effect control CPU 101 operates in accordance with a program stored in a built-in or external ROM (not shown), and receives a capture signal from the main board 31 input via the relay board 77 ( In response to the (effect control INT signal), an effect control command is received via the input driver 102 and the input port 103. Further, the effect control CPU 101 causes the VDP (video display processor) 109 to perform display control of the variable display device 9 using the LCD based on the effect control command.

  The effect control command and the effect control INT signal are first input to the input driver 102 on the effect control board 80. The input driver 102 passes the signal input from the relay board 77 only in the direction toward the inside of the effect control board 80 (does not pass the signal in the direction from the inside of the effect control board 80 to the relay board 77). It is also a unidirectional circuit as a regulating means.

  As a signal direction regulating means, the signal inputted from the main board 31 is allowed to pass through the relay board 77 only in the direction toward the effect control board 80 (the signal is not passed in the direction from the effect control board 80 to the relay board 77). The unidirectional circuit 74 is mounted. For example, a diode or a transistor is used as the unidirectional circuit. FIG. 3 illustrates a diode. A unidirectional circuit is provided for each signal. Furthermore, since the effect control command and the effect control INT signal are output from the main board 31 via the output port 571 that is a unidirectional circuit, the signal from the relay board 77 toward the inside of the main board 31 is restricted. That is, the signal from the relay board 77 does not enter the inside of the main board 31 (the game control microcomputer 560 side). The output port 571 is a part of the I / O port unit 57 shown in FIG. Further, a signal driver circuit that is a unidirectional circuit may be further provided outside the output port 571 (on the relay board 77 side).

  Further, the effect control CPU 101 outputs a signal for driving the lamp to the lamp driver board 35 via the input / output port 105. The effect control CPU 101 outputs sound number data to the audio output board 70 via the input / output port 104.

  In the lamp driver board 35, a signal for driving the lamp is input to the lamp driver 352 via the input / output driver 351. The lamp driver 352 amplifies a signal for driving the lamp and supplies the amplified signal to each lamp provided on the frame side such as the top frame lamp 28a, the left frame lamp 28b, and the right frame lamp 28c. Further, it is supplied to a decorative lamp 25 provided on the frame side.

  In the voice output board 70, the sound number data is input to the voice synthesis IC 703 via the input / output driver 702. The voice synthesizing IC 703 generates voice and sound effects corresponding to the sound number data and outputs them to the amplifier circuit 705. The amplification circuit 705 outputs an audio signal obtained by amplifying the output level of the speech synthesis IC 703 to a level corresponding to the volume set by the volume 706 to the speaker 27. The voice data ROM 704 stores control data corresponding to the sound number data. The control data corresponding to the sound number data is a collection of data indicating the sound effect or sound output mode in a time series in a predetermined period (for example, a decorative symbol variation period).

  The signal for driving the lamp and the sound number data are communicated between the effect control CPU 101, the lamp driver board 35, and the audio output board 70 in such a way that a response signal is transmitted from the signal receiving side to the transmitting side. Communication).

  The effect control CPU 101 reads necessary data from a character ROM (not shown) in accordance with the received effect control command. The character ROM stores character image data frequently used among images displayed on the variable display device 9, specifically, a person, a character, a figure, a symbol, or the like (including decorative designs) in advance. Is. The effect control CPU 101 outputs the data read from the character ROM to the VDP 109. The VDP 109 executes display control based on the data input from the effect control CPU 101.

  In this embodiment, a VDP 109 that performs display control of the variable display device 9 is mounted on the effect control board 80. The VDP 109 has an address space independent of the production control microcomputer 100, and maps a VRAM therein. The VRAM is a buffer memory for expanding image data generated by the VDP 109. Then, the VDP 109 outputs the image data in the VRAM to the variable display device 9. Note that the number of VDPs corresponding to the number of variable display devices may be mounted on the effect control board 80.

  In this embodiment, an effect control board 80, an audio output board 70, and a lamp driver board 35 are provided as boards on which a circuit for controlling the effect device is mounted. It may be mounted on one substrate. Further, a first effect control board (display control board) on which a circuit for controlling the variable display device 9 is mounted, and a second circuit on which other effect devices (lamp, LED, speaker 27, etc.) are mounted. You may make it provide two board | substrates with this production control board. In this embodiment, the game control microcomputer 560 directly transmits a command to the effect control microcomputer 100, but other boards (for example, the audio output board 70 and the lamp shown in FIG. It may be transmitted to the production control microcomputer 100 in the production control board 80 via the driver board 35 and the like. In that case, the command may simply pass through another board, or a control means such as a microcomputer is mounted on the audio output board 70 or the lamp driver board 35, and the control means receives the command. Control related to voice control and lamp control is executed, and the received command is transmitted to the production control microcomputer 100 that controls the variable display device 9 as it is or, for example, by changing it to a simplified command. May be. In addition, when two boards, the first effect control board and the second effect control board, are provided, a command related to the effect from the game control microcomputer 560 is transmitted to the second effect control board, A command is transmitted as it is from the second effect control board to the first effect control board, or is transmitted after processing (for example, changing the command form or contents, simplifying, or selecting only necessary commands). You may comprise.

  FIG. 4 is a block diagram showing a circuit configuration of the main board 31 and signal lines of an effect control command transmitted from the main board 31 to the effect control board 80. As shown in FIG. 4, in this embodiment, the game control microcomputer 560 mounted on the main board 31 relays the effect control command using the eight signal lines CD0 to CD7 for transmitting the effect control signal. This is transmitted to the effect control board 80 via the board 77. In addition, a signal line of an effect control INT signal (strobe signal) for instructing to take in an effect control command is also wired between the main board 31 and the effect control board 80.

  As shown in FIG. 4, wiring from various switches is connected to the main board 31. In FIG. 4, only the first start port switch 13a and the second start port switch 14a are shown. However, the main board 31 is used to receive a prize for a game ball in a special variable winning ball device which is a big winning port. The wiring from the switch for detection is also connected. Furthermore, the main board 31 is connected to a solenoid 16 for opening / closing the variable winning ball apparatus 15 and wirings to the solenoid 21 for opening / closing the special variable winning ball apparatus.

  The game control microcomputer 560 operates in accordance with a clock circuit 501, a reset controller 502 that functions as system reset means, random number circuits 503a and 503b, a ROM 54 that stores a game control program, a RAM 55 that is used as a work memory, and a program CPU 56, CTC 504 that sends an interrupt request signal to CPU 56, serial communication circuit 505 that performs asynchronous serial communication with payout control board 37 and effect control board 80, and I / O port unit 57 are incorporated.

  In this embodiment, the serial communication circuit is used for communication with a microcomputer on a board (for example, the payout control board 37) different from the board (for example, the main board 31) on which the microcomputer incorporating the serial communication circuit 505 is mounted. Although the case where 505 is used will be described, the serial communication circuit 505 may perform serial communication with another microcomputer included in the board on which the microcomputer incorporating the serial communication circuit 505 is mounted. For example, when two microcomputers having the same configuration are mounted on the same substrate, serial communication circuits built in the microcomputers may perform serial communication with each other.

The clock circuit 501 outputs a reference clock signal CLK having a predetermined period generated by dividing the system clock signal by 2 ⁷ (= 128) to the random number circuits 503a and 503b. When a low level signal is input for a predetermined period, the reset controller 502 outputs a predetermined initialization signal to the CPU 56 and the random number circuits 503a and 503b to reset the game control microcomputer 560.

  Further, in this embodiment, as shown in FIG. 4, the game control microcomputer 560 is equipped with two random number circuits 503a and 503b having different ranges of random value values that can be generated. The random number circuit 503a is a random number circuit (hereinafter also referred to as a 12-bit random number circuit) that generates a 12-bit pseudo-random number. The 12-bit random number circuit 503a has a function of generating a random number having a value in a range that can be generated by 12 bits (that is, a range from 0 to 4095). The random number circuit 503b is a random number circuit (hereinafter also referred to as a 16-bit random number circuit) that generates a 16-bit pseudo-random number. The 16-bit random number circuit 503b has a function of generating a random number having a value in a range that can be generated in 16 bits (that is, a range from 0 to 65535). In this embodiment, the case where the game control microcomputer 560 includes two random number circuits is described. However, the game control microcomputer 560 may include three or more random number circuits. In this embodiment, when the 12-bit random number circuit 503a and the 16-bit random number circuit 503b are comprehensively expressed, or when indicating either the 12-bit random number circuit 503a or the 16-bit random number circuit 503b, This is called a random number circuit 503.

  Next, the configuration of the random number circuit 503 will be described. FIG. 5 is a block diagram illustrating a configuration example of the random number circuit 503. In this embodiment, the basic configurations of the 12-bit random number circuit 503a and the 16-bit random number circuit 503b are the same. As shown in FIG. 5, the random number circuit 503 includes a counter 521, a comparator 522, a count value permutation changing circuit 523, a clock signal output circuit 524, a count value update signal output circuit 525, a random value read signal output circuit 526, a random number update. A system selection signal output circuit 527, a selector 528, a random number circuit activation signal output circuit 530, a random value storage circuit 531, an inversion circuit 532, a latch signal generation circuit 533, and a timer circuit 534 are included.

  In this embodiment, the random number circuit 503 determines whether or not the display result of variable display of a plurality of types of identification information is a specific display result (for example, the first special symbol display 8a and the second special symbol display 8b). To determine whether or not the display symbol combination is a jackpot symbol combination). When the CPU 56 determines that the specific display result is based on the random number generated by the random number circuit 503, the CPU 56 shifts the gaming state to a specific gaming state (for example, a big hit gaming state) advantageous to the player. Note that the random number generated by the random number circuit 503 may be used as a determination random number other than the jackpot symbol, such as a variation pattern determination random number for determining a variation pattern of a special symbol.

  The counter 521 receives the predetermined signal selected by the selector 528 and outputs a count value C in response to the signal input from the selector 528. In this case, the counter 521 inputs a predetermined initial value, cyclically updates the count value C from the initial value to a predetermined final value according to a certain rule, and outputs it. Further, when the count value C is updated to the final value, the counter 521 outputs a notification signal indicating that the count value C has been updated to the final value to the CPU 56. In this embodiment, when a notification signal is output from the counter 521, the CPU 56 updates the initial value.

  In this embodiment, every time a signal is input from the selector 528 (every time a rising edge in the signal from the selector 528 is input), the counter 521 increments the count value C from “0” to “4095” by one. Count up. Further, when the counter 521 counts up the count value C to “4095”, the counter 521 outputs a notification signal indicating that the count value C has been updated to the final value to the CPU 56. Then, the CPU 56 inputs a notification signal from the counter 521 and updates the initial value. Then, the counter 521 counts up the count value C again from the initial value updated by the CPU 56 to “4095”. Further, when counting up to “4095”, the counter 521 starts counting from “0” again. Then, the counter 521 outputs a notification signal to the CPU 56 when it counts up to a value (final value) immediately before the updated initial value. In this embodiment, the comparator 522 outputs a notification signal to the counter 521 when all count values are input, as will be described later. In this case, when the notification signal is input from the comparator 522, the counter 521 resets the count value to “0”.

  The comparator 522 determines whether the input count value is larger than the random number maximum value set in the random number maximum value setting register 535, and the count value is larger than the random number maximum value (exceeded the random number maximum value). ), A notification signal may be output to the counter 521. In this case, for example, when the comparator 522 determines that the count value exceeds the random number maximum value, the notification signal is output to the counter 521 before the clock signal output circuit 524 next outputs the random number generation clock signal SI1. . For example, consider a case where the random number maximum value “256” is set in the random number maximum value setting register 535. In this case, when the counter 521 counts up from “0” to “256” and further outputs the count value “257”, the comparator 522 determines that the input count value “257” exceeds the random number maximum value “256”. Determine and output a notification signal to the counter 521. When the notification signal is input from the comparator 522, the counter 521 updates the count value to “258” and outputs it without waiting for the input of the random number generation clock signal SI1 from the clock signal output circuit 524. By repeatedly executing the above processing, the comparator 522 determines that the count value exceeds the random number maximum value while inputting the count value “257” to “4095”, and stores the count value in the repeat counter 521. Output a notification signal. The counter 521 repeatedly updates and outputs the count value without waiting for the input of the random number generation clock signal SI1 from the clock signal output circuit 524 while the notification signal is input from the comparator 522. By doing so, until the clock signal output circuit 524 next outputs the random number generation clock signal SI1, the count value is controlled to be counted up from “257” to “4095” at a high speed, Control is performed so that random numbers from “257” to “4095” are skipped (not stored in the random value storage circuit 531).

  The count value permutation change circuit 523 includes a count value permutation change register (RSC) 536, an update rule selection register (RRC) 542, and an update rule memory 543. The count value permutation change register 536 stores count value permutation change data “01h” for changing the permutation (order of arrangement from the initial value to the final value), which is the update order of the count value C counted up by the counter 521. . When the numerical value permutation change data “01h” is stored in the count value permutation change register 536, the count value permutation change circuit 523 displays the count value C permutation that the counter 521 counts up and updates. The permutation is changed to a different permutation from when “01h” is not stored. “H” indicates a hexadecimal number. In this case, when the numerical value permutation change data “01h” is stored, the count value permutation changing circuit 523 switches the update rule used for changing the permutation of the count values. In addition, when the counter 521 starts updating the count value after switching the update rule used for changing the count value permutation, the count value permutation change data of the count value permutation change register 536 is initialized from “01h” by the CPU 56. The value is returned to “0 (= 00h)” (cleared).

  Instead of clearing the count value permutation data by the CPU 56, the count value permutation data may be cleared on the random number circuit 503 side. For example, when the register value is set in the update rule selection register (RRC) 542 based on the count value permutation change data “01h” being written in the count value permutation change register 536, the count value permutation change circuit 523 The register value of the count value permutation change register 536 may be cleared.

  FIG. 6 is an explanatory diagram illustrating an example of the update rule selection register (RRC) 542. The update rule selection register 542 is a register that sets an update rule used for rearranging the order of count values output from the counter 521 (changing the permutation). In this embodiment, an update rule used for changing the permutation of count values output from the counter 521 is set by setting a register value in the update rule selection register 542. As shown in FIG. 6, the update rule selection register 542 is an 8-bit register, and the initial value is set to “0 (= 00h)”. The update rule selection register 542 is configured in a state where bits 0 to 3 can be written and read. In addition, the update rule selection register 542 is configured in a state where bits 4 to 7 cannot be written or read. Therefore, even if control is performed to write values to bits 4 to 7 of the update rule selection register 542, it is invalid, and all the values read from bits 4 to 7 are “0 (= 0000b)”. “B” indicates a binary number.

  The value (register value) of the update rule selection register 542 is changed from “0 (= 00h)” to “15” in response to the count value permutation change data “01h” being written in the count value permutation change register 536. (= 0Fh) ”is updated cyclically. That is, each time the count value permutation data “01h” is written to the count value permutation change register 536, the register value of the update rule selection register 542 is incremented from “0” by “1” to become “15”. Return to "0".

  FIG. 7 is an explanatory diagram illustrating an example of the update rule memory 543. As illustrated in FIG. 7, the update rule memory 543 stores the value (register value) of the update rule selection register 542 and the count value update rule in association with each other. In the example shown in FIG. 7, for example, when the register value 1 is set in the update rule selection register 542, it can be seen that the permutation of the count values output by the counter 521 is changed using the update rule B. In FIG. 7, the update rule A is the same update rule as that by which the counter 521 updates the count value C, and is stored in the update rule memory 543 in association with the register value “0”. Also, in the update rule memory 543, update rules B to P different from the update rule in which the counter 521 updates the count value C are stored in association with the register values “1” to “15”.

  When the count value permutation change data “01h” is written in the count value permutation change register 536, the count value permutation change circuit 523 first counts from the counter 521 until the final count value “4095” is first input. The count value is output as it is according to the currently set update rule. The count value permutation changing circuit 523 changes the count value update rule when the final value “4095” of the count value is input from the counter 521. When the initial value is changed by the CPU 56, the count value permutation changing circuit 523 inputs the final value after the change (the value immediately before the initial value) from the counter 521, and updates the count value. Will be changed.

  The count value permutation change circuit 523 selects an update rule corresponding to the register value of the update rule selection register 542 from the update rule memory 543, and sets it as an update rule used for changing the count value permutation. The count value permutation change circuit 523 changes the permutation from the initial value of the count value to the final value according to the set update rule when the counter 521 starts updating the count value again in order from the initial value “0”. To do. When the initial value is changed by the CPU 56, the count value permutation changing circuit 523 starts counting in accordance with the set update rule when the counter 521 starts updating the count value in order from the changed initial value. The permutation from the initial value to the final value will be changed. Then, the count value permutation change circuit 523 outputs a count value according to the changed permutation.

  In this embodiment, when the maximum random number to be generated is limited by setting the maximum random number in a random number maximum value setting register 535 described later, the count value permutation changing circuit 523 counts The value C is limited to the maximum random number or less, and the permutation is changed and output. For example, it is assumed that the random number maximum value “256” is set in the random number maximum value setting register 535, and the count value permutation changing circuit 523 changes the update rule A to the update rule B to change the count value permutation. Shall. In this case, the count value permutation changing circuit 523 changes the count value permutation to “256 → 255” according to the update rule B based on the random number maximum value “256” set in the random number maximum value setting register 535 of the comparator 522. → → → 0 "and output.

  As described above, when the count value permutation change data “01h” is written in the count value permutation change register 536, the count value permutation change circuit 523 changes the update rule to use the permutation of the count value C. Change and output. Therefore, the randomness of the random number generated by the random number circuit 503 can be improved.

  FIG. 8 is an explanatory diagram illustrating an example in which the count value permutation changing circuit 523 changes the permutation of count values output from the counter 521. As shown in FIG. 8, the CPU 56 writes the count value permutation change data “01h” into the count value permutation change register 536 at a predetermined timing. Then, 1 is added to the register value of the update rule selection register 542. For example, the register value of the update rule selection register 542 is updated from “0” to “1”. When the register value is updated, the count value permutation changing circuit 523 updates the “update rule A” corresponding to the register value “0” before the update until the final value “4095” of the count value is input from the counter 521 for the first time. The count value is updated according to "." At this time, the count value permutation changing circuit 523 outputs the count values in a permutation of “0 → 1 →... → 4095” according to the update rule A.

  When the final value “4095” of the count value is input from the counter 521, the count value permutation changing circuit 523 selects “update rule B” corresponding to the updated register value “1” from the update rule memory 543. To set. When the count value permutation changing circuit 523 starts to input the count values after the initial value “0” from the counter 521 again, the count value permutation changing circuit 523 changes the permutation of the count values according to the selected “update rule B” and outputs it. In this embodiment, the count value permutation changing circuit 523 changes the permutation from “0 → 1 →... → 4095” to “4095 → 4094 →... → 0” and outputs the count value.

  Thereafter, the count value permutation change register 536 is reset in response to the count value permutation change circuit 523 starting the count value updating operation in accordance with the updated update rule, as will be described later. Then, until the next count value permutation change data “01h” is written to the count value permutation change register 536, the count value permutation change circuit 523 counts the permutation as “4095 → 4094 →. Continue to output values.

  When the count value permutation change data “01h” is written again to the count value permutation change register 536 by the CPU 56, the register value of the count value permutation change register 536 is updated from “1” to “2”. When the final value “4095” of the count value is input from the counter 521, the count value permutation changing circuit 523 selects and sets “update rule C” corresponding to the register value “2” from the update rule memory 543. . When the count value permutation changing circuit 523 starts to input the count value after the initial value “0” again from the counter 521, the count value permutation changing circuit 523 updates and outputs the count value permutation in accordance with the “update rule C” selected and set. In this embodiment, the count value permutation changing circuit 523 changes the permutation from “4095 → 4094 →... → 0” to “1 → 3 →... → 4095 → 0 →. Output the count value.

  As described above, the count value permutation register 536 is reset, and then the count value permutation data “01h” is written again into the count value permutation change register 536, whereby the permutation of the count values can be further changed.

  FIG. 9 is an explanatory diagram illustrating an example of the count value permutation change register (RSC) 536. The count value permutation change register 536 is a register that sets count value permutation change data “01h” for changing the permutation of count values counted up by the counter 521. As shown in FIG. 9, the count value permutation change register 536 is a readable 8-bit register, and the initial value is set to “0 (= 00h)”. Further, count value permutation change register 536 is configured such that only bit 0 can be written and read. That is, count value permutation change register 536 is configured such that bits 1 to 7 cannot be written or read. Accordingly, even if control is performed to write a value to bits 1 to 7 of the count value permutation change register 536, the value read from bits 1 to 7 is all “0 (= 0000000b)”.

  Note that the value of the count value permutation change register 536 is reset by the CPU 56 in response to the count value permutation change circuit 523 starting a count value update operation in accordance with the updated update rule. In this case, the CPU 56 returns the value written in the count value permutation change register 536 from the count value permutation change data “01h” to the initial value “0 (= 00h)”.

  The comparator 522 includes a random number maximum value setting register (RMX) 535 that stores random number maximum value setting data for designating the maximum value of random R (random number maximum value). The comparator 522 limits the update range of the count value updated by the counter 521 according to the random number maximum value indicated in the random number maximum value setting data stored in the random number maximum value setting register 535. In this embodiment, the comparator 522 has a random number maximum value (for example, “00FFh”) indicated by the count value input from the counter 521 and the random number maximum value setting data (for example, “00FFh”) stored in the random number maximum value setting register 535. 256 "). When the comparator 522 determines that the input count value is equal to or less than the random number maximum value, the comparator 522 outputs the input count value to the random value storage circuit 531.

  In this embodiment, the comparator 522 specifically performs the following control. The comparator 522 obtains the initial value of the count value from the CPU 56 when updating the initial value of the count value, and obtains the number of count values from the initial value to the maximum random number. For example, when the initial value of the count value is “157” and the maximum random number value is “256”, the comparator 522 calculates the number of count values from the initial value to the maximum random number value as “100”. Further, the comparator 522 counts up how many count values are input from the initial value as the count values are input from the count value permutation changing circuit 523. When the number of input count values from the initial value reaches “100”, the comparator 522 determines that all count values from the initial value “157” to the maximum value “256” have been input. Then, the comparator 522 outputs a notification signal indicating that all count values have been input to the counter 521. By determining based on the number of count values, even when the count value permutation circuit 523 has changed the count value permutation, the comparator 522 limits the update range of the count value to the maximum random number or less. When all count values are input, a notification signal can be output to the counter 521.

  An operation in which the comparator 522 limits the update range of the count value will be described. In this embodiment, the case where the count value permutation changing circuit 523 selects the update rule A and the random number maximum value “256” is set in the random number maximum value setting register 535 will be described.

  While the counter 521 is updating the count value from “0” to “256”, the count value permutation changing circuit 523 updates based on the random number maximum value “256” set in the random number maximum value setting register 535. In accordance with rule A, the count values from “0” to “256” are output to the comparator 522 as they are. In this case, the count value permutation changing circuit 523 receives the value of the random number maximum value “256” from the comparator 522, determines whether the count value input from the counter 521 is larger than the random number maximum value, and the update rule is changed. Even when it is set (for example, update rule B), the count values from “257” to “4095” are compared based on the random number maximum value “256” set in the random number maximum value setting register 535. The data is not output to the device 522. For example, when the initial value is set to “0” and the count value is updated to the final value “256”, the counter 521 outputs a notification signal to the CPU 56. When the notification signal is output, the CPU 56 changes the initial value of the count value of the counter 521. In this embodiment, the CPU 56 changes the initial value to “50”.

  Note that the comparator 522 may determine whether the count value is greater than the maximum random number “256”, instead of the count value permutation changing circuit 523. In this case, for example, the comparator 522 determines whether or not the count value is greater than the random number maximum value set in the random number maximum value setting register 535, and determines that the count value is greater than the random number maximum value. Is output to the counter 521. When the comparator 522 determines that the count value exceeds the random number maximum value, the comparator 522 outputs a notification signal to the counter 521 before the clock signal output circuit 524 next outputs the random number generation clock signal SI1. By doing so, the comparator 522 counts up the count value from “257” to “4095” at high speed until the clock signal output circuit 524 next outputs the random number generation clock signal SI1. Thus, the counter 521 is controlled. By doing so, the count value is output to the random value storage circuit 531 only when the value from the count value permutation changing circuit 523 is less than “257”, and the value from the count value permutation changing circuit 523 is “257”. When the value is greater than or equal to “,” the count value can be updated at high speed.

  Based on the update rule A, while the count value is input from “0” to “255” from the count value permutation changing circuit 523, the comparator 522 inputs the count value below the maximum random number “256”. Therefore, the input count value is output to the random value storage circuit 531 as it is. Next, when the count value input from the count value permutation changing circuit 523 reaches “256”, the comparator 522 outputs the input count value to the random value storage circuit 531 and all the values from the initial value to the maximum value. A notification signal indicating that the count value is input is output to the counter 521. Specifically, the comparator 522 inputs the initial value of the count value (“0” in this embodiment) from the CPU 56 when changing the initial value of the count value, and the random number maximum from the initial value “0”. The number of count values (in this embodiment, “257”) up to the value (in this embodiment, “256”) is obtained. When the number of count values input from count value permutation changing circuit 523 reaches 257, a notification signal indicating that all count values have been input is output to counter 521. In this embodiment, since the initial value is changed to “50” by the CPU 56, the counter 521 does not reset the count value even when a notification signal is input from the comparator 522, and the initial value after the change is changed. The count value is updated from the value “50”.

  While the counter 521 updates the count value from the changed initial value “50” to “256”, the count value permutation changing circuit 523 sets the random number maximum value “256” set in the random number maximum value setting register 535. Based on the update rule A, the count values from “50” to “256” are output to the comparator 522 as they are. Further, the count value permutation changing circuit 523 does not output the count values from “257” to “4095” to the comparator 522 based on the random number maximum value “256” set in the random number maximum value setting register 535. When the count value to be updated by the counter 521 makes one round (when updated 257 times), when the count value permutation change data is written in the count value permutation change register 536, the count value permutation change circuit 523 Change the permutation of count values and output. For example, when the update rule is changed to the update rule B, the count value permutation changing circuit 523 changes the count value permutation from “256 → 255 →... 50” and outputs the result.

  While the count values from “256” to “50” are input from the count value permutation changing circuit 523, the comparator 522 outputs the input count value as it is to the random value storage circuit 531. Next, when the count value input from the count value permutation change circuit 523 reaches “50”, the comparator 522 outputs the input count value to the random value storage circuit 531 and all the values from the initial value to the maximum value. A notification signal indicating that the count value is input is output to the counter 521. Specifically, the comparator 522 receives the initial value of the count value (“50” in this embodiment) from the CPU 56 when changing the initial value of the count value, and the random number maximum value from the initial value “50”. The number of count values up to (“256” in this embodiment) (“207” in this embodiment) is obtained. When the number of count values input from count value permutation changing circuit 523 reaches 207, a notification signal indicating that all count values have been input is output to counter 521.

  Even when the count value permutation changing circuit 523 changes the count value permutation, the comparator 522 outputs a notification signal to the counter 521 when the number of count values reaches 207. By doing so, even if the permutation of the count values is changed, the notification signal is counted based on the input of all the count values from the initial value “50” to the maximum value “256”. 521 can be output.

  When the notification signal is input from the comparator 522, the counter 521 resets the initial value of the count value and returns it to “0”. Then, the counter 521 updates the count value from “0”. When the value of the counter 521 is updated again from “0”, the count value permutation changing circuit 523 outputs the count values from “49” to “0” to the comparator 522 based on the count value from the counter 521. The comparator 522 outputs the count value to the random value storage circuit 531 based on the count value input from the count value permutation changing circuit 523. Then, when the counter 521 updates the count value to the final value (“49” in this embodiment), the counter 521 outputs a notification signal to the CPU 56. When the notification signal is output, the initial value of the count value of the counter 521 is changed again by the CPU 56.

  By repeating the operation as described above, the comparator 522 causes the counter 521 to continuously count up the count value from “0” to the random number maximum value “256”, and the value from “0” to “256”. Is stored in the random value storage circuit 531 as a random R (random number value). In other words, the comparator 522 limits the update range of the count value to the random number maximum value “256” or less, and causes the counter 521 to update the count value.

  FIG. 10 is an explanatory diagram showing an example of the random number maximum value setting register (RMX) 535. FIG. 10A shows an example of the random number maximum value setting register 535 installed in the 12-bit random number circuit 503a. FIG. 10B shows an example of the random number maximum value setting register 535 installed in the 16-bit random number circuit 503b. First, the random number maximum value setting register 535 mounted in the 12-bit random number circuit 503a will be described. As shown in FIG. 10A, in the 12-bit random number circuit 503a, the random number maximum value setting register 535 is a 16-bit register, and the initial value is set to “4095 (= 0FFFh)”. The random number maximum value setting register 535 is configured so that bits 0 to 11 can be written and read. The random number maximum value setting register 535 is configured such that bits 12 to 15 cannot be written or read. Therefore, in the 12-bit random number circuit 503a, even if control is performed to write values to bits 12 to 15 of the random number maximum value setting register 535, the values read from bits 12 to 15 are all “0 (= 0000b)”. It is.

  The random number maximum value set in the random number maximum value setting register 535 has a predetermined lower limit value. In this embodiment, when random number maximum value setting data “0000h” to “00FEh” designating a value smaller than the lower limit value “256” is written in the random number maximum value setting register 535, the CPU 56 stores the random number maximum value setting register. The random number maximum value setting data “0FFFh” for specifying the initial value “4095” is set again in 535. That is, the random number maximum value that can be set in the random number maximum value setting register 535 is from “256” to “4095”, and when the CPU 56 determines that a value smaller than the lower limit value “256” is set, the random number maximum value Is reset to a predetermined value “4095”. The CPU 56 cannot write the random number maximum value setting register 535 in which the random number maximum value setting data is written until the game control microcomputer 560 (specifically, the CPU 56) is reset by the reset controller 502. Control. In addition, the random number maximum value setting register 535 may be formed so as to be unwritable until a reset signal is input after data is written, instead of being controlled so as not to be writable by the CPU 56.

  Next, the random number maximum value setting register 535 mounted in the 16-bit random number circuit 503b will be described. As shown in FIG. 10B, in the 16-bit random number circuit 503b, the random number maximum value setting register 535 is a 16-bit register, and the initial value is set to “65535 (= FFFFh)”. Further, in the 16-bit random number circuit 503b, the random number maximum value setting register 535 is configured in a state in which all of the bits 0 to 15 can be written and read.

  When random number maximum value setting data “0000h” to “00FEh” for designating a value smaller than the lower limit value “256” is written in the random number maximum value setting register 535, the CPU 56 stores the initial value in the random number maximum value setting register 535 in the initial value. The random number maximum value setting data “FFFFh” specifying the value “65535” is reset. That is, the random number maximum value that can be set in the random number maximum value setting register 535 is from “256” to “65535”, and when the CPU 56 determines that a value smaller than the lower limit value “256” is set, the random number maximum value Is reset to a predetermined value “65535”. The CPU 56 cannot write the random number maximum value setting register 535 in which the random number maximum value setting data is written until the game control microcomputer 560 (specifically, the CPU 56) is reset by the reset controller 502. Control. In addition, the random number maximum value setting register 535 may be formed so as to be unwritable until a reset signal is input after data is written, instead of being controlled so as not to be writable by the CPU 56.

  The clock signal output circuit 524 includes a cycle setting register (RPS) 537 for storing cycle setting data for designating the cycle of the clock signal output to the selector 528 and the inverting circuit 532 (that is, the count value update cycle). The clock signal output circuit 524 divides the reference clock signal CLK input from the clock circuit 501 mounted on the game control microcomputer 560 based on the cycle setting data stored in the cycle setting register 537, and generates a random number circuit. A clock signal (random number generating clock signal SI1) used to generate a random number value is generated inside 503. By doing so, the clock signal output circuit 524 operates to output the random number generation clock signal SI1 for updating the count value C to the counter 521 on condition that the clock signal has been input a predetermined number of times. . The period setting data is data for setting how many times the reference clock signal CLK input from the clock circuit 501 is to be divided. The clock output circuit 524 outputs the generated random number generating clock signal SI1 to the selector 528 and the inverting circuit 532. For example, when the cycle setting data “0Fh (= 16)” is written in the cycle setting register 537, the clock signal output circuit 524 divides the reference clock signal CLK input from the clock circuit 501 by 16, and generates random numbers. A clock signal SI1 is generated. In this case, the cycle of the random number generating clock signal SI1 generated by the clock signal output circuit 524 is “cycle of system clock signal × 128 × 16”.

  FIG. 11 is an explanatory diagram showing an example of the period setting register (RPS) 537. As shown in FIG. 11, the period setting register 537 is an 8-bit register, and the initial value is set to “256 (= FFh)”. The cycle setting register 537 is configured in a state where both writing and reading are possible.

  In addition, a predetermined lower limit value is determined for the value of the cycle setting data set in the cycle setting register 537. In this embodiment, when the cycle setting data “00h to 06h” designating a value smaller than the lower limit value “system clock signal cycle × 128 × 7” is written in the cycle setting register 537, the CPU 56 In 537, the cycle setting data “07h” for specifying the lower limit value “system clock signal cycle × 128 × 7” is reset. That is, the period that can be set in the period setting register 537 is “system clock signal period × 128 × 7” to “system clock signal period × 128 × 256”, and the CPU 56 is set to a value smaller than the lower limit value. If it is determined that it is, the cycle setting data is reset. The CPU 56 controls the period setting register 537 in which the period setting data is written to be unwritable until the game controller microcomputer 560 (specifically, the CPU 56) is system reset by the reset controller 502. Instead of controlling the CPU 56 to disable writing, the period setting register 537 may be formed so that writing is not possible until a reset signal is input after data is written.

  Note that, without setting the cycle setting data as the lower limit value in the cycle setting register 537, the clock signal output circuit 524, for example, directly supplies the reference clock signal CLK to the counter 521 and the inverting circuit 532 based on the set cycle setting data. You may make it output. In this case, the CPU 56 does not need to perform processing for setting the value of the cycle setting data set in the cycle setting register 537 by comparing it with the lower limit value. Further, the counter 521 updates the count value C every time the reference clock signal CLK is input from the clock signal output circuit 524.

  The count value update signal output circuit 525 includes a count value update register (RGN) 538 that stores count value update data “01h”. The count value update data is data for requesting update of the count value. The count value update signal output circuit 525 outputs the count value update signal SI3 to the selector 528 in response to the count value update data “01h” being written in the count value update register 538.

  FIG. 12 is an explanatory diagram illustrating an example of the count value update register (RGN) 538. As shown in FIG. 12, the count value update register 538 is an unreadable 8-bit register and is configured so that only bit 0 can be written. Accordingly, even if control is performed to write a value to bits 1 to 7 of the count value update register 538, it is invalidated.

  The random value read signal output circuit 526 includes a random value take-in register (RLT) 539 for storing random value take-in data “01h”. The random value acquisition data is data for requesting acquisition of the count value to the random value storage circuit 531. The random value read signal output circuit 526 generates a latch value read signal for requesting reading of the random value in response to the random value take-in data “01h” being written in the random value take-in register 539. Output to the circuit 533.

  FIG. 13 is an explanatory diagram illustrating an example of a random value fetch register (RLT) 539. As shown in FIG. 13, the random value fetch register 539 is an unreadable 8-bit register. The random value fetch register 539 is configured so that only bit 0 can be written. That is, even if control is performed to write a value to bits 1 to 7 of the random value fetch register 539, it is invalidated.

  The random number update method selection signal output circuit 527 includes a random number update method selection register (RTS) 540 that stores random number update method selection data. The random number update method selection data is data for designating one of the random number update methods, which is a method for updating the value of the random R. The random number update method selection signal output circuit 527 responds to the random number update method selection data written in the random number update method selection register 540, and corresponds to the random number update method specified by the written random number update method selection data. The update method selection signal is output to the selector 528 and the latch signal generation circuit 533.

  FIG. 14A is an explanatory diagram illustrating an example of a random number update method selection register (RTS) 540. As shown in FIG. 14A, the random number update method selection register 540 is an 8-bit register, and the initial value is set to “00h”. The random number update method selection register 540 is configured in a state where bits 0 to 1 can be written and read. The random number update method selection register 540 is configured in a state where bits 2 to 7 cannot be written or read. Therefore, even if control is performed to write a value to bits 2 to 7 of the random number update method selection register 540, it is invalid, and all the values read from bits 2 to 7 are “0 (= 000000b)”.

  FIG. 14B is an explanatory diagram of an example of random number update method selection data written to the random number update method selection register 540. As shown in FIG. 14B, the random number update method selection data is composed of 2-bit data. The random number update method selection data “01b” is used to specify the first random number update method. The random number update method selection data “10b” is used to specify the second random number update method. In this embodiment, the first random number update method is a method of updating the count value triggered by the output of the count value update signal SI3 from the count value update signal output circuit 525. The second random number update method is a method of updating the count value triggered by the output of the random number generation clock signal SI1 from the clock signal output circuit 524. Further, when the random number update method selection data “01b” or “10b” is written in the random number update method selection register 540, the random number circuit 503 is ready to be activated. On the other hand, when the random number update method selection data “00b” or “11b” is written in the random number update method selection register 540, the random number circuit 503 becomes unstartable.

  The selector 528 selects either the count value update signal SI 3 output from the count value update signal output circuit 525 or the random number generation clock signal SI 1 output from the clock signal output circuit 524 and outputs the selected signal to the counter 521. When a random number update method selection signal (also referred to as a first random number update method selection signal) corresponding to the first random number update method is input from the random number update method selection signal output circuit 527, the selector 528 outputs a count value update signal. The count value update signal SI3 output from the circuit 525 is selected and output to the counter 521. On the other hand, when a random number update method selection signal (also referred to as a second random number update method selection signal) corresponding to the second random number update method is input from the random number update method selection signal output circuit 527, the selector 528 outputs a clock signal. The random number generation clock signal SI 1 output from the circuit 524 is selected and output to the counter 521. When the first update method selection signal is input from the random number update method selection signal output circuit 527, the selector 528 receives a clock signal according to the count value update signal SI3 output from the count value update signal output circuit 525. A numerical value update instruction signal for instructing update of numerical data synchronized with the random number generation clock signal SI 1 output from the output circuit 524 may be output to the counter 521.

  The random number circuit activation signal output circuit 530 includes a random number circuit activation register (RST) 541 that stores random number circuit activation data “80h”. The random circuit activation data is data for requesting activation of the random number circuit 503. When random number circuit activation data “80h” is written to the random number circuit activation register 541, the random number circuit activation signal output circuit 530 outputs a predetermined random number circuit activation signal to the counter 521 and the clock signal output circuit 537, and the counter 521 and the clock The signal output circuit 524 is turned on. The random number circuit 503 is activated by starting the count value updating operation by the counter 521 and the internal clock signal output operation by the clock signal output circuit 524.

  FIG. 15 is an explanatory diagram illustrating an example of a random number circuit activation register (RST) 541. As shown in FIG. 15, the random number circuit activation register 541 is an 8-bit register, and the initial value is set to “00h”. The random number circuit activation register 541 is configured such that only bit 7 can be written and read. In addition, the random number circuit activation register 541 is configured such that bits 0 to 6 cannot be written or read. That is, even if control is performed to write a value to bits 0 to 6 of the random number circuit activation register 541, the value is invalid, and all values read from bits 0 to 6 are “0 (= 000000b)”.

  The random value storage circuit 531 is a 16-bit register, for example, and stores a random R value that is a random number used in the jackpot determination in the game control process. The random value storage circuit 531 stores the count value C output from the counter 521 via the comparator 522 as a random R value in response to the input of the latch signal SL from the latch signal generation circuit 533. Each time the latch signal SL is input from the latch signal generation circuit 533, the random value storage circuit 531 reads the count value C updated by the counter 521 and stores the random R value.

  FIG. 16 is a circuit diagram showing a configuration example of the random value storage circuit 531. As shown in FIG. 16, the random value storage circuit 531 includes two AND circuits 201 and 203, two NOT circuits 202 and 204, 16 flip-flop circuits 2101 to 2116, and 16 OR circuits. 2201-2216.

  As shown in FIG. 16, the input terminal of the AND circuit 201 is connected to the output terminal of the latch signal generation circuit 533 and the output terminal of the NOT circuit 204, and the output terminal is connected to the input terminal of the NOT circuit 202 and the flip-flop circuit 2101. Are connected to clock terminals Clk1 to Clk16. The input terminal of the NOT circuit 202 is connected to the output terminal of the AND circuit 201, and the output terminal is connected to one input terminal of the AND circuit 203.

  The input terminal of the AND circuit 203 is connected to the output terminal of the NOT circuit 202 and the CPU 56 mounted on the game control microcomputer 560, and the output terminal is connected to the input terminal of the NOT circuit 204. The input terminal of the NOT circuit 204 is connected to the output terminal of the AND circuit 203, and the output terminal is connected to one input terminal of the AND circuit 201 and one input terminal of the OR circuits 2201 to 2216.

  The input terminals D1 to D16 of the flip-flop circuits 2101 to 2116 are connected to the output terminal of the comparator 522. The clock terminals Clk1 to Clk16 of the flip-flop circuits 2101 to 2116 are connected to the output terminal of the AND circuit 201, and the output terminals Q1 to Q16 are connected to the other input terminals of the OR circuits 2201 to 2216.

  The input terminals of the OR circuits 2201 to 2216 are connected to the output terminal of the NOT circuit 204 and the output terminals of the flip-flop circuits 2101 to 2116, and the output terminals are connected to the CPU 56 mounted on the game control microcomputer 560. .

  The operation of the random value storage circuit 531 is described. FIG. 17 is a timing chart showing the timing at which each signal is input to the random value storage circuit 531 and the timing at which the random value storage circuit 531 outputs each signal. As shown in FIG. 17, when the output control signal SC (high level signal in this embodiment) is not input from the CPU 56 mounted on the game control microcomputer 560 (that is, one input terminal of the AND circuit 203). When the latch signal SL is input from the latch signal generation circuit 533 (at the timings T1, T2, and T7 in the example shown in FIG. 17), the two input terminals of the AND circuit 201 Both inputs to go high. Therefore, the signal SR output from the output terminal of the AND circuit 201 is at a high level. The signal SR output from the AND circuit 201 is input to the clock terminals Clk1 to Clk16 of the flip-flop circuits 2101 to 2116.

  The flip-flop circuits 2101 to 2116 are responsive to the rising edges of the signal SR input from the clock terminals Clk1 to Clk16, and the bit data C1 to C1 of the count value C input from the comparator 522 via the input terminals D1 to D16. C16 is latched and stored as bit data R1 to R16 of the random value. The flip-flop circuits 2101 to 2116 output random R bit data R1 to R16 to be stored from the output terminals Q1 to Q16.

  When the output control signal SC is not input (in the example shown in FIG. 17, the period up to the timing T3 and the period after the timing T6), the input to one input terminal of the AND circuit 203 is at the low level. The signal SG output from the output terminal of the circuit 203 becomes low level. The signal SG output from the AND circuit 203 is inverted by the NOT circuit 204 to be a high level signal. A high level signal is input from the NOT circuit 204 to one input terminal of each of the OR circuits 2201 to 2216.

  As described above, since the input to one of the input terminals of the OR circuits 2201 to 2216 is at the high level, the OR is input regardless of whether the signal input to the other input terminal is at the high level or the low level. The circuits 2201 to 2216 output high level signals. That is, the signals SO1 to SO16 output from the OR circuits 2201 to 2216 are all at the high level regardless of whether the values of the input random R bit data R1 to R16 are “0” or “1”. ("1"). By doing so, the value output from the random value storage circuit 531 is always “65535 (= 1111111111111111b)”, and the random R cannot be read from the random value storage circuit 531. That is, even if an attempt is made to read a random number from the random value storage circuit 531, only the same value “65535” can always be read from the random value storage circuit 531, and when the output control signal SC is not input, the random value storage circuit 531 becomes a non-readable (disabled) state. When the 16-bit random number circuit 503b is used, the value “65535” as the random number value may be used. In this case, even if the CPU 56 reads the value “65535”, the CPU 56 cannot determine whether the value is a random number or an unreadable state. Therefore, in the determination table for each jackpot determination shown in FIG. 26, when the random R is “65535”, it may be set to be determined as “out of”.

  When the output control signal SC is input from the CPU 56 when the latch signal SL is not input from the latch signal generation circuit 533 (in the example shown in FIG. 17, the period from the timing T4 to the timing T6), Since the inputs to the two input terminals are both at the high level, the signal SG output from the output terminal of the AND circuit 203 is at the high level. The signal SG output from the AND circuit 203 is inverted in the NOT circuit 204 to be a low level signal. A low level signal is input from the NOT circuit 204 to one input terminal of the OR circuits 2201 to 2216.

  As described above, since the input to one input terminal of the OR circuits 2201 to 2216 is at a low level, when the signal input to the other input terminal is at a high level, the output from the output terminals of the OR circuits 2201 to 2216 is high. A level signal is output. In addition, when a signal input to the other input terminal of the OR circuits 2201 to 2216 is at a low level, a low level signal is output from the OR circuits 2201 to 2216. That is, the values of the random R bit data R1 to R16 input to the other input terminals of the OR circuits 2201 to 2216 are unchanged from the output terminals of the OR circuits 2201 to 2216 (that is, the values of the bit data R1 to R16 are “ “1” is output when it is “1” and “0” when it is “0”). By doing so, random R can be read from the random value storage circuit 531. That is, when the output control signal SC is input, the random value storage circuit 531 enters a readable (enable) state.

  However, if the latch signal SL is input from the latch signal generation circuit 533 before the output control signal SC is input from the CPU 56, the input to one input terminal of the AND circuit 203 becomes low level. Even when the output control signal SC is input while the latch signal SL is being input (in the example shown in FIG. 17, it is output from the output terminal of the AND circuit 203). Signal SG remains low. The signal SG output from the AND circuit 203 is inverted by the NOT circuit 204 to be a high level signal. A high level signal is input from the NOT circuit 204 to one input terminal of each of the OR circuits 2201 to 2216.

  As described above, since the input to one of the input terminals of the OR circuits 2201 to 2216 is at the high level, the OR is input regardless of whether the signal input to the other input terminal is at the high level or the low level. The signals SO1 to SO16 output from the circuits 2201 to 2216 are all at a high level. Even though the output control signal SC is input, the random R cannot be read from the random value storage circuit 531. That is, when the latch signal SL is input, the random value storage circuit 531 cannot receive the output control signal SC. When the 16-bit random number circuit 503b is used, the value “65535” as the random number value may be used. In this case, even if the CPU 56 reads the value “65535”, the CPU 56 cannot determine whether the value is a random number or an unreadable state. Therefore, in the determination table for each jackpot determination shown in FIG. 26, when the random R is “65535”, it may be set to be determined as “out of”.

  Further, when the output control signal SC is input from the CPU 56 before the latch signal SL is input from the latch signal generation circuit 533, the input to one input terminal of the AND circuit 201 is at a low level. Even if the latch signal SL is input while the control signal SC is being input (timing T5 in the example shown in FIG. 17), the signal SR output from the output terminal of the AND circuit 201 remains at the low level. become. Therefore, the signal SR input to the clock terminals Clk1 to Clk16 of the flip-flop circuits 2101 to 2116 does not rise from the low level to the high level, and the random R bit data R1 to R16 stored in the flip-flop circuits 2101 to 2116. Is not updated despite the latch signal SL being input. That is, when the output control signal SC is input, the random value storage circuit 531 cannot receive the latch signal SL.

  The inversion circuit 532 generates the inverted clock signal SI2 in which the polarity of the clock signal is inverted by inverting the signal level in the random number generation clock signal SI1 input from the clock signal output circuit 524. Further, the inverting circuit 532 outputs the generated inverted clock signal SI2 to the latch signal generating circuit 533.

  The latch signal generation circuit 533 is configured using a selector, a flip-flop circuit, and the like. The latch signal generation circuit 533 receives the random number read signal from the random number read signal output circuit 526 and the inverted clock signal SI2 from the inversion circuit 532, and stores the random value in the random value storage circuit 531. Output SL. The latch signal generation circuit 533 outputs the latch signal SL in accordance with the random value update method designated by the random number update method selection signal from the random number update method selection signal output circuit 527. In this case, when the first random number update method selection signal output circuit 527 receives the first random number update method selection signal output circuit 527, the latch signal generation circuit 533 selects the inverted clock signal SI2 output from the inversion circuit 532, and the latch signal It outputs to the random value storage circuit 531 as SL. On the other hand, when the second random number update method selection signal is input from the random number update method selection signal output circuit 527, the latch signal generation circuit 533 inverts the random value read signal output from the random value read signal output circuit 526. In synchronization with the rising edge of the inverted clock signal SI2 output from the circuit 532, the latch signal SL is output to the random value storage circuit 531.

  The timer circuit 534 receives a winning detection signal SS indicating that the winning of the game ball to the first starting winning opening 13 (or the second starting winning opening 14) has been detected by the first starting opening switch 13a (or the second starting opening switch 14a). ) The timer circuit 534 measures the time during which the winning detection signal SS is continuously input from the first start port switch 13a (or the second start port switch 14a). Then, when the measurement time reaches a predetermined period (for example, 3 ms), the timer circuit 534 writes the random number value capture data “01h” in the random value capture register 539 of the random value read signal output circuit 526. For example, the timer circuit 534 is configured by an up counter or a down counter that is activated in response to the input of a high level signal. The timer circuit 534 has a clock while the input from the first start port switch 13a (or the second start port switch 14a) is at a high level (that is, while the winning detection signal SS is continuously input). The reference clock signal CLK sequentially input from the circuit 501 is counted up or down. When the count value to be counted up or down reaches a value corresponding to 3 ms, the timer circuit 534 determines that the winning detection signal SS is input from the first start port switch 13a (or the second start port switch 14a). Then, the random value fetch data “01h” is written into the random value fetch register 539. Note that the random value acquisition register 539 is prepared for each of the first start port switch 13a and the second start port switch 14a.

  FIG. 18 is an explanatory diagram showing an example of an address map of a storage area in the game control microcomputer 560. As shown in FIG. 18, the area from address 0000h to 1FFFh in the storage area of the game control microcomputer 560 is allocated to the ROM 54. An area from addresses 7E00h to 7FFFh is allocated to the RAM 55. Further, the area from the address FD00h to the address FE00h is allocated to a built-in register such as the random number maximum value setting register 535.

  As shown in FIG. 18, the area from address 0000h to address 1FFFh allocated to the ROM 54 includes a user program area and a user program management area. A program (user program) 550 created in advance by a user (for example, a game machine designer) is stored in the user program area in the area of addresses 0000h to 1F7Fh. Further, data (user program execution data) necessary for the CPU 56 to execute the user program 550 is stored in the user program management area in the area of addresses 1F80h to 1FFFh. Of the areas 7E00h to 7FFFh allocated to the RAM 55, the areas 7E00h to 7EFFh are unused areas, and the areas 7EFFh to 7FFFh are used as work areas.

  FIG. 19 is an explanatory diagram showing an example of an address map in the user program management area. As shown in FIG. 19, in the area of address 1F97h, among the initial value changing methods that are methods for changing the initial value input to the counter 521, the initial value changing method selected by the user is designated. The initial value change method setting data is stored. Further, in the areas 1F98h and 1F99h, RAM address data for specifying an address (designated RAM address) in the RAM 55 designated in advance by the user among addresses 7EFFh to 7FFFh allocated to the RAM 55 is stored. The In this case, of the values indicating the designated RAM address, the lower value of the designated RAM address is stored in the 1F98h address, and the higher value of the designated RAM address is stored in the 1F99h address.

  FIG. 20 is an explanatory diagram of an example of the initial value change method setting data. As shown in FIG. 20, the initial value change data is composed of 8-bit data. The initial value change data “00h” is data specifying that the initial value is not changed as the initial value change method. In this embodiment, when the initial value change data “00h” is set, the counter 521 of the random number circuit 503 updates the count value from a predetermined initial value “0” to a predetermined final value. Become. Further, the initial value change data “01h” is data specifying that the initial value input to the counter 521 is changed to a value based on an ID number for identifying the game control microcomputer 560 as an initial value change method. It is. In this embodiment, when the initial value change data “01h” is set, the initial value of the counter value updated by the counter 521 is changed from “0” to a value based on the ID number. The count value is updated from the initial value to a predetermined final value.

  The user program 550 stored in the user program area will be described. FIG. 21 is an explanatory diagram showing a configuration example of the user program 550. As shown in FIG. 21, in this embodiment, the user program 550 includes a random number circuit setting program 551 composed of a plurality of types of program modules, a display result determination program 552, a count value permutation change program 554, A numerical value update program 555, a serial communication circuit setting program 556, and an interrupt priority setting program 557 are included.

  The random number circuit setting program 551 is a program for causing the random number circuit 503 to execute a random number circuit setting process for performing an initial setting for updating the random R value. That is, the CPU 56 functions as a random number circuit setting unit by executing processing according to the random number circuit setting program 551.

  FIG. 22 is an explanatory diagram showing a configuration example of the random number circuit setting program 551. As shown in FIG. 22, the random number circuit setting program 551 includes, as a plurality of types of program modules, a random number maximum value setting module 551a, a random number update method selection module 551b, a cycle setting module 551c, a random number circuit activation module 551d, An initial value changing module 551e and a random number circuit selecting module 551f are included.

  The random number maximum value setting module 551a is a program module for causing the random number circuit 503 to set the maximum value of random R preset by a user (for example, a game machine manufacturer). The CPU 56 executes processing according to the random number maximum value setting module 551a, thereby writing random number maximum value setting data for specifying the maximum value of the random R preset by the user in the random number maximum value setting register 535. By doing so, the CPU 56 sets the maximum value of the random R preset by the user in the random number circuit 503. For example, when “255” is set in advance as the maximum value of the random R by the user, the CPU 56 writes the random number maximum value setting data “00FFh” in the random number maximum value setting register 535 and the maximum value of the random R “255”. Is set in the random number circuit 503.

  The random number update method selection module 551b is a program module for causing the random number circuit 503 to set the random number update method (first random number update method or second random number update method) selected by the user. The CPU 56 writes the random number update method selection data “01b” or “10b” designating the random number update method selected by the user in the random number update method selection register 540 by executing the process according to the random number update method selection module 551b. By doing so, the CPU 56 sets the random number update method selected by the user in the random number circuit 503. Therefore, the game control microcomputer 560 has a function of selecting either the first random number update method or the second random number update method as the random number update method used by the random number circuit 503 for the random number update.

  The cycle setting module 551c is a program for causing the random number circuit 503 to set the cycle of the internal clock signal preset by the user (that is, the cycle in which the clock signal output circuit 524 outputs the clock signal to the selector 528 and the inverting circuit 532). It is a module. The CPU 56 writes the period setting data for designating the period of the internal clock signal set in advance by the user in the period setting register 537 by executing the process according to the period setting module 551c. By doing so, the CPU 56 sets the cycle of the internal clock signal preset by the user in the random number circuit 503. For example, when the cycle of the internal clock signal is set in advance as “system clock signal cycle × 128 × 16” by the user, the CPU 56 writes the cycle setting data “0Fh” in the cycle setting register 537 and sets the internal clock signal The period “system clock signal period × 128 × 16” is set in the random number circuit 503.

  The random number circuit activation module 551d is a program module for activating the random number circuit 503. The CPU 56 activates the random number circuit 503 by writing the random number circuit activation data “80h” into the random number circuit activation register 541 by executing processing according to the random number circuit activation module 551d.

  The initial value change module 551e is a program module for changing the initial value of the count value updated by the counter 521. The CPU 56 functions as an initial value changing unit by executing processing according to the initial value changing module 551e. The CPU 56 executes the initial value changing module 551e to change the initial value of the count value updated by the counter 521 by the initial value changing method selected by the user. By doing so, the game control microcomputer 560 has a function of selecting an initial value changing method.

  In this embodiment, when initial value change method setting data “01h” is stored in the area of address 1F97h in the user program management area, the CPU 56 sets the initial value of the count value for each game control microcomputer 560. The value is changed to a value calculated based on the assigned unique ID number.

  For example, the CPU 56 associates, in advance, a predetermined storage area of the ROM 54 (or the RAM 55) with an ID number of the game control microcomputer 560 and a calculated value obtained by performing a predetermined calculation based on the ID number. I remember it. In this case, for example, if the ID number of the game control microcomputer 560 is “100”, the calculated value “150” obtained by adding the predetermined value “50” to the ID number “100” is set in advance as the ID number. Are stored in association with each other. Further, for example, the calculated value “50” obtained by subtracting the predetermined value “50” from the ID number “100” is stored in advance in association with the ID number. Further, for example, only a predetermined value may be stored in advance in association with the ID number. Then, the CPU 56 may use a value “150” obtained by adding an ID number (for example, “100”) to a predetermined value (for example, “50”) stored in advance as the initial value of the count value. The initial value of the count value may be a value “50” obtained by subtracting a predetermined value (eg, “50”) stored in advance from the ID number (eg, “100”).

  When the initial value change method setting data “01h” is stored, the CPU 56 changes the initial value of the count value to the calculated value based on the ID number stored in advance. By doing so, the randomness of the random number generated by the random number circuit 503 can be further improved, and the initial value of the random number can be made difficult to recognize only by looking at the ID number of the game control microcomputer 560. . Therefore, it is possible to more reliably prevent the transition condition to the big hit gaming state from being illegally established by an action such as generating a captured signal using a radio signal to the gaming machine. Can be improved.

  For example, when initial value change method setting data “01h” is stored, the CPU 56 calculates the ID number of the game control microcomputer 560 and a predetermined value (for example, adds the predetermined value to the ID number). The initial value of the count value is changed to the calculated value obtained. In this case, for example, the CPU 56 may calculate a value that is randomly changed using a random number as an ID number, thereby randomly updating a value used for the calculation and obtaining an initial value. By doing so, the randomness of the random numbers generated by the random number circuit 503 can be further improved.

  The random number circuit selection module 551f is a program module for setting a random number circuit to be used when executing a timer interrupt process including a game control process from among the random number circuits 503 built in the game control microcomputer 560. The CPU 56 executes a process according to the random number circuit selection module 551f, so that any of the two random number circuits (12-bit random number circuit 503a and 16-bit random number circuit 503b) built in the game control microcomputer 560 is selected. Set whether to use when executing timer interrupt processing. For example, the CPU 56 uses a 12-bit random number circuit 503a or 16-bit as a random number circuit used when executing the timer interrupt process according to a predetermined set value (a value set in advance by the user) stored in a predetermined storage area of the ROM 54. The random number circuit 503b is set.

  Note that both the 12-bit random number circuit 503a and the 16-bit random number circuit 503b may be set as random number circuits used when the timer interrupt process is executed. In this case, for example, the CPU 56 may perform a jackpot determination based on a random number generated by the 12-bit random number circuit 503a and may perform a probability change determination based on the random number generated by the 16-bit random number circuit 503b. In this embodiment, the random value storage circuit 531 is present in each of the 12-bit random number circuit 503a and the 16-bit random number circuit 503b (that is, a random-value storage circuit that stores a random number for 12 bits and a 16-bit random-number storage circuit). A random value storage circuit for storing random numbers exists separately). When both the 12-bit random number circuit 503a and the 16-bit random number circuit 503b are set, the CPU 56 is provided in the RAM 55 with the random number read from the 12-bit random number circuit 503a and the random number read from the 16-bit random number circuit 503b. Stored in separate buffer areas. Therefore, even when the timing for reading a random number from the 12-bit random number circuit 503a and the timing for reading a random number from the 16-bit random number circuit 503b are the same, two different random numbers can be extracted and stored in different buffer areas.

  The random value update program 555 is a program for updating the value of the random R stored in the random value storage circuit 531 when the first random number update method is selected as the random number update method. The CPU 56 functions as a random value updating unit by executing processing according to the random value updating program 555. When the first random number update method is selected, the CPU 56 executes the random value update program 555 and writes the count value update data “01h” in the count value update register 538, whereby the count value is stored in the counter 521. And the value of the random R stored in the random value storage circuit 531 is updated. When the second random number update method is selected as the random number update method, the counter 521 is updated with the random number generation clock signal output from the clock signal output circuit 537, and the random value storage circuit 531 is updated. The value of random R stored in is updated.

  The display result determination program 552 is a program for determining whether or not the display results in the first special symbol display unit 8a and the second special symbol display unit 8b are jackpot symbols. The game control microcomputer 560 (specifically, the CPU 56) functions as display result determination means by executing processing according to the display result determination program 552.

  In this embodiment, the game control microcomputer 560 (specifically, the CPU 56) causes the game ball to win the first start winning port 13 (or the second start winning port 14) and receive the first special symbol (or the first game). The processing is executed according to the display result determination program 552 in response to the establishment of the condition (first execution condition) for executing variable display of (2 special symbols). Then, the CPU 56 reads the updated random R value from the random value storage circuit 531, and determines whether or not the display result on the first special symbol display 8a (or the second special symbol display 8b) is a jackpot symbol. decide.

  FIG. 23 is an explanatory diagram illustrating an operation in which the CPU 56 updates the random R value or reads the random R value when the first random number update method is selected. As shown in FIG. 23, when the first random number update method is selected, the CPU 56 writes the count value update data “01h” into the count value update register 538, thereby storing the random value stored in the random value storage circuit 531. The value of R (eg, “2”) is updated. Then, the CPU 56 receives a condition for the variable display of the first special symbol (or the second special symbol) when the game ball wins the first start winning opening 13 (or the second start winning opening 14) (second setting). ) Is read out from the random value storage circuit 531 (for example, “2”).

  When the random R value stored in the random value storage circuit 531 is further updated, an interval equal to or longer than the cycle of the system clock signal output from the clock circuit 501 has elapsed since the random R value was updated during the previous update. Sometimes, the count value update data “01h” must be written to the count value update register 538. This is because it is necessary to secure time for reading the updated random R value from the random value storage circuit 531.

  FIG. 24 is an explanatory diagram illustrating an operation in which the CPU 56 reads the value of the random R when the second random number update method is selected. As shown in FIG. 24, when the second random number update method is selected, the timer circuit 534 writes the random value acquisition command “01h” in the random value acquisition register 539, so that the counter 521 outputs it. The count value (for example, “2”) is taken into the random value storage circuit 531 and the random R value stored in the random value storage circuit 531 is updated. Then, the CPU 56 reads the updated random R value (for example, “2”) from the random value storage circuit 531.

  Specifically, when the second random number update method is selected, the counter 521 updates the count value C using the input of the random number generation clock signal SI1 as a trigger. Thereafter, when the random value acquisition command “01h” is written in the random value acquisition register 539, the latch signal generation circuit 533 outputs the latch signal SL to the random value storage circuit 531. Then, the random value storage circuit 531 reads and stores the count value output from the counter 521 with the input of the latch signal SL as a trigger. Then, the CPU 56 reads the value of random R stored in the random value storage circuit 531.

  If the timer circuit 534 does not write the random number value acquisition command “01h” to the random number value acquisition register 539, even if the counter 521 updates the count value, the random value storage circuit 531 will not update the counter 521. Do not read numerical values. For example, the timer circuit 534 writes the random value take-in command “01h” into the random value take-in register 539, causes the count value “3” output from the counter 521 to be taken into the random value store circuit 531, and the random value store circuit 531. , The random R value “3” stored therein is updated. In this case, the count value output from the counter 521 is updated from “3” to “4” or “5” unless the timer circuit 534 writes the random number value acquisition command “01h” in the random number acquisition register 539 again. However, the random value stored in the random value storage circuit 531 is not updated, and the random value read from the random value storage circuit 531 remains “3”.

  The count value permutation change program 554 writes count value permutation change data “01h” to the count value permutation change register 536, and executes count value permutation change processing for changing the permutation of count values stored in the random value storage circuit 531. It is a program for. The game control microcomputer 560 (specifically, the CPU 56) functions as numerical data permutation changing means by executing processing according to the count value permutation changing program 554. The CPU 56 executes the count value permutation change program 554 and writes the count value permutation change data “01h” in the count value permutation change register 536, whereby the count value permutation change circuit 523 outputs and inputs to the random value storage circuit 531. The permutation of the count values to be changed.

  The serial communication circuit setting program 556 is a serial communication circuit setting process for performing initial settings for serial communication with a microcomputer (in this embodiment, a payout control microcomputer) mounted on each control board in the serial communication circuit 505. Is a program for executing That is, the game control microcomputer 560 (specifically, the CPU 56) functions as a serial communication circuit setting unit by executing processing according to the serial communication circuit setting program 556.

  The interrupt priority setting program 557 is a program for initially setting the priority of interrupt processing executed in response to an interrupt request from the serial communication circuit 505. That is, the game control microcomputer 560 (specifically, the CPU 56) functions as priority order initial setting means by executing processing according to the interrupt priority order setting program 556.

  Further, as shown in FIG. 25, the game control microcomputer 560 includes a special figure holding memory 570, a jackpot determination table memory 571, a flag memory 572, and a start winning port switch timer memory 573. Specifically, these memories are formed in the ROM 54 or the RAM 55. Note that “formed in ROM (or RAM)” means an area in the ROM (or RAM). Further, a flag memory 572, a start winning a prize mouth switch timer memory 573, and a special figure holding memory 570 are provided for each of the first holding memory and the second holding memory.

  In the special figure holding memory 570, although the game ball has won the first start winning opening 13 (or the second starting winning opening 14), the execution condition for the variable display of the first special symbol (or the second special symbol) is satisfied. The variable display start condition is not yet satisfied (for example, the first special symbol display unit 8a (or the second special symbol display unit 8b) is still performing variable display). Is a memory for storing pending data. The special figure holding memory 570 has four entries, and each entry has a random value storage circuit 531 in accordance with the winnings in the order in which the game balls have won the first starting winning opening 13 (or the second starting winning opening 14). The value of random R read from is stored. In addition, whenever the variable display of the first special symbol (or the second special symbol) on the special symbol display 8a (or the second special symbol display 8b) ends once or the big hit gaming state ends, The variable display start condition is satisfied, and variable display based on the uppermost information of the special figure reservation memory 570 is executed. In this case, when the condition for starting variable display of the first special symbol (or the second special symbol) is satisfied, the information registered in the second or lower place in the special figure holding memory 570 is advanced by one place. In addition, when the game ball newly wins the first start winning opening 13 (or the second start winning opening 14) while the first special symbol (or the second special symbol) is variably displayed, the new win is awarded. The random R value read from the random value storage circuit 531 is registered in the empty entry of the special figure holding memory 570.

  The jackpot determination table memory 571 stores a plurality of jackpot determination tables used by the CPU 56 to determine whether or not the display results of the first special symbol display 8a and the second special symbol display 8b are to be the big hit symbols. Specifically, the big hit determination table memory 571 stores a normal time big hit determination table used in a gaming state (normal state, short time state) other than the probability variation state as shown in FIG. The jackpot determination table memory 571 stores a probability change jackpot determination table used in a probability change state as shown in FIG. When the big hit determination is performed using the determination tables shown in FIGS. 26A and 26B, the probability of determining that the big hit is greatly changed by the random number maximum value set in the random number maximum value setting register 535. . In this case, for example, if the set random number maximum value is too small, the difference in the probability of determining a big hit between the case where the normal big hit determination table is used and the case where the probability variation big hit determination table is used becomes small. As a result, the player's interest in the game is diminished. Therefore, a plurality of determination tables (a plurality of normal time big hit determination tables and a plurality of probability variation big hit determination tables) may be stored in the big hit determination table memory 571 in association with the random number circuit 503 and the maximum random number. . Then, the CPU 56 uses the determination table corresponding to the random number circuit 503 to be used and the random number maximum value among the determination tables stored in the jackpot determination table memory 571 according to the display result determination program 552 to display the first special symbol indicator. You may make it determine whether the display result of 8a and the 2nd special symbol display device 8b is a big hit symbol. By doing so, even if the type of random number circuit 503 to be used and the maximum random number value are different, it is possible to control so that the probability of determining a big hit is somewhat the same.

  In this embodiment, a 16-bit random number circuit 503b is used. That is, it is assumed that it is decided to use the 16-bit random number circuit 503b in the process of step S151. Therefore, the random R can take a value in a range that can be generated in 16 bits (range from 0 to 65535).

  In the flag memory 572, various flags used in the game control process for controlling the progress of the game are set. For example, in the flag memory 572, a probability change flag indicating that the gaming state is a probability change state and a big hit flag indicating that the game state is a big hit gaming state are set.

  The start port switch timer memory 573 stores a timer value that is added or cleared in accordance with the winning detection signal SS output from the first start port switch 13a (or the second start port switch 14a).

  Next, the operation of the gaming machine will be described. FIG. 27 is a flowchart showing main processing executed by the game control microcomputer 560 on the main board 31. When the gaming machine is turned on and the input level of the reset terminal to which a reset signal is input becomes high level, the gaming control microcomputer 560 (specifically, the CPU 56) determines whether the contents of the program are valid. After executing the security check process, which is a process for confirming whether or not, the main process after step S1 is started. In the main process, the CPU 56 first performs necessary initial settings.

  In the initial setting process, the CPU 56 first sets the interrupt prohibition (step S1). Next, the interrupt mode is set to interrupt mode 2 (step S2), and a stack pointer designation address is set to the stack pointer (step S3). Then, initialization of the built-in device (initialization of CTC (counter / timer) and PIO (parallel input / output port) which are built-in devices (built-in peripheral circuits)) is performed (step S4). In interrupt mode 2, the address synthesized from the value (1 byte) of the specific register (I register) built in the CPU 56 and the interrupt vector (1 byte: least significant bit 0) output from the built-in device is the interrupt address. Is the mode shown.

  Next, the CPU 56 confirms the state of the output signal of the clear switch (for example, mounted on the power supply board) input via the input port only once (step S6). When the on-state is detected in the confirmation, the CPU 56 executes a normal initialization process (steps S10 to S15).

  If the clear switch is not on, check whether data protection processing of the backup RAM area (for example, power supply stop processing such as addition of parity data) was performed when power supply to the gaming machine was stopped (Step S7). When it is confirmed that such protection processing is not performed, the CPU 56 executes initialization processing. Whether there is backup data in the backup RAM area is confirmed by, for example, the state of the backup flag set in the backup RAM area in the power supply stop process. In this example, if “55H” is set in the backup flag area, it means that there is a backup (ON state), and if a value other than “55H” is set, it means that there is no backup (OFF state).

  After confirming that there is a backup, the CPU 56 performs a data check of the backup RAM area (parity check in this example) (step S8). In step S8, the calculated checksum is compared with the checksum calculated and stored by the same process in the power supply stop process. When the power supply is stopped after an unexpected power failure or the like, the data in the backup RAM area should be saved, so the check result (comparison result) is normal (matched). That the check result is not normal means that the data in the backup RAM area is different from the data when the power supply is stopped. In such a case, since the internal state cannot be returned to the state when the power supply is stopped, the initialization process that is executed when the power is turned on is not performed when the power supply is stopped.

  If the check result is normal, the CPU 56 performs a game state restoration process for returning the internal state of the game control means and the control state of the electrical component control means such as the effect control means to the state when the power supply is stopped. Specifically, the start address of the backup setting table stored in the ROM 54 is set as a pointer (step S91), and the contents of the backup setting table are sequentially set in the work area (area in the RAM 55) (step S92). ). The work area is backed up by a backup power source. In the backup setting table, initialization data for an area that may be initialized in the work area is set. As a result of the processing in steps S91 and S92, the saved contents of the work area that should not be initialized remain. The parts that should not be initialized include, for example, data indicating the gaming state before the power supply is stopped (special symbol process flag, etc.), the area where the output state of the output port is saved (output port buffer), unpaid prize balls This is the part where data indicating the number is set.

  Further, the CPU 56 sets the head address of the backup command transmission table stored in the ROM 54 as a pointer (step S93), and in accordance with the contents, the control command (power) indicating that the power supply has been restored to the effect control board 80. Control is performed such that a recovery command as an initialization command at the time of supply recovery is transmitted (step S94). Then, the process proceeds to step S14a.

  In this embodiment, it is confirmed whether the data in the backup RAM area is stored using both the backup flag and the check data. However, only one of them may be used. That is, either the backup flag or the check data may be used as an opportunity for executing the state recovery process.

  In the initialization process, the CPU 56 first performs a RAM clear process (step S10). The entire area of the RAM 55 may not be initialized, and predetermined data (for example, count value data of a counter for generating a jackpot symbol determining random number) may be left as it is. Further, the start address of the initialization setting table stored in the ROM 54 is set as a pointer (step S11), and the contents of the initialization setting table are sequentially set in the work area (step S12).

  By the processing in steps S11 and S12, for example, a normal symbol determination random number counter, a normal symbol determination buffer, a special symbol buffer, a total prize ball number storage buffer, a special symbol process flag, an award ball flag, a ball out flag, and a payout stop An initial value is set to a flag such as a flag for selectively performing processing according to the control state.

  Further, the CPU 56 sets the start address of the initialization command transmission table stored in the ROM 54 as a pointer (step S13), and transmits an initialization command for initializing the sub board according to the contents to the sub board. Processing is executed (step S14). Examples of the initialization command include a command indicating an initial symbol displayed on the variable display device 9.

  In step S14a, the CPU 56 executes random number circuit setting processing for initially setting the random number circuits 503a and 503b. In this case, the CPU 56 performs setting according to the random number circuit setting program 551 to make the random number circuits 503a and 503b update the value of the random R.

  Further, the CPU 56 executes a serial communication circuit setting process for initial setting of the serial communication circuit 505 (step S14b). In this case, the CPU 56 performs processing according to the serial communication circuit setting program 556, thereby setting the serial communication circuit 505 to perform serial communication with the payout control microcomputer.

  When the serial communication circuit 505 is initialized, the CPU 56 initializes the priority of interrupt processing executed in response to the interrupt request from the serial communication circuit 505 (step S14c). In this case, the CPU 56 executes the process according to the interrupt priority setting program 557, thereby initializing the priority of the interrupt process. For example, the CPU 56 initializes the priority of interrupt processing according to a predetermined interrupt processing priority table including the default priority of each interrupt processing.

  In addition, the default priority of each interrupt process can be changed by the user. For example, the CPU 56 stores specification information for specifying an interrupt process set by a user (for example, a game machine manufacturer) in a predetermined storage area of the ROM 54 in advance. Then, the CPU 56 sets the priority of interrupt processing according to the designation information stored in a predetermined storage area of the ROM 54.

  Then, the CPU 56 sets a CTC register built in the game control microcomputer 560 so that a timer interrupt is periodically taken every predetermined time (for example, 2 ms) (step S15). That is, a value corresponding to, for example, 2 ms is set in a predetermined register (time constant register) as an initial value. In this embodiment, it is assumed that a timer interrupt is periodically taken every 2 ms.

  When the execution of the initialization process (steps S10 to S15) is completed, the CPU 56 repeatedly executes the display random number update process (step S17) and the initial value random number update process (step S18) in the main process. When executing the display random number update process and the initial value random number update process, the interrupt disabled state is set (step S16). When the display random number update process and the initial value random number update process are finished, the interrupt enabled state is set. Set (step S19). In this embodiment, the display random number is a random number for determining the variation pattern, and the display random number update process is a process for updating the count value of the counter for generating the display random number. The initial value random number update process is a process for updating the count value of the counter for generating the initial value random number. The initial value random number is a random number for determining the initial value of the count value, such as a counter for generating a random number for determining whether or not to make a big hit (a big hit symbol determining random number generation counter). A game control process for controlling the progress of the game, which will be described later (the game control microcomputer 560 controls game devices such as a variable display device, a variable winning ball device, a ball payout device, etc. provided in the game machine itself. In a process to transmit, a command signal to be controlled by another microcomputer, or a game device control process), the count value of the jackpot determination random number generation counter or the like is one round (a jackpot determination random number generation counter or the like) When the value is incremented by the number of values between the minimum value and the maximum value that can be taken, the initial value is set in the counter.

  Next, the random number circuit setting process (step S14a) in the main process will be described. FIG. 28 is a flowchart showing random number circuit setting processing. In the random number circuit setting process, the CPU 56 executes the process according to the random number circuit selection module 551f included in the random number circuit setting program 551, and from among the random number circuits 503a and 503b built in the game control microcomputer 560, the game control process A random number circuit to be used at the time of execution of the timer interrupt process including is set (step S151). The designation information for designating the random number circuit 503 used when executing the timer interrupt process set by the user (for example, the manufacturer of the gaming machine) is stored in a predetermined storage area of the ROM 54 in advance. Then, the CPU 56 selects either the 12-bit random number circuit 503a or the 16-bit random number circuit 503b according to the designation information stored in the predetermined storage area of the ROM 54, and uses the selected random number circuit when executing the timer interrupt process. Set as a random number circuit. In this embodiment, a random number generated by the 16-bit random number circuit 503b is used as a random number used for the jackpot determination, but both the 12-bit random number circuit 503a and the 16-bit random number circuit 503b will be described.

  As described above, in step S151, whether or not each of a plurality of random number circuits (12-bit random number circuit 503a and 16-bit random number circuit 503b) having different predetermined ranges of numerical data that can be updated can be used is set. Therefore, it is possible to prevent unnecessary random numbers from being processed during the execution of the timer interrupt process, and the control burden on the game control microcomputer 560 (specifically, the CPU 56) can be reduced. For example, when the game control microcomputer 560 performs the game control process using only the random number generated by one of the two random number circuits 503a and 503b, the random number is read from the random circuit that is not used for the game control process. Processing or the like can be prevented, and the control burden on the game control microcomputer 560 can be reduced.

  When the CPU 56 sets the random number circuit 503 to be used in step S151, the counter 521 of the random number circuit which is set not to be used is stopped by stopping the operation of the counter 521 or the clock signal output circuit 524, for example. Do not update. Further, for example, the CPU 56 updates the count value C of the counter 521 of the random number circuit that is set not to use, but the CPU 56 does not output the output control signal SC and reads the random number from the random value storage circuit 531. You may control so that it may not come out. Further, for example, the CPU 56 prevents the random value fetch data “01h” from being written into the random value fetch register 539 of the random number circuit that is set not to be used, and the latch signal generation circuit 533 disturbs the latch signal SL. It may be controlled not to output to the numerical value storage circuit 531.

  As described above, by setting the random number circuit 503 to be used, by setting only the random number circuit 503 to be used, it is possible to appropriately set the range of the random number value to be generated. Further, it is possible to prevent unnecessary random numbers from being processed during the execution of the timer interrupt process, and the control burden on the game control microcomputer 560 (specifically, the CPU 56) can be reduced. For example, when a big hit determination is performed using a determination table including a distant value (for example, “1” and “100”) as a big hit determination value, the big hit is determined with a predetermined big hit probability (eg, 1/100). As a result, the number of types of determination values to be processed is smaller when the random number by the 12-bit random number circuit 503a is used than when the random number by the 16-bit random number circuit 503b is used, and the game control microcomputer 560 is used. The control burden is reduced.

  Further, the CPU 56 executes processing in accordance with the random number maximum value setting module 551a included in the random number circuit setting program 551, and generates random number maximum value setting data for designating a random number maximum value set in advance by the user as a random number maximum value setting register 535. (Step S152). By doing so, the random number maximum value of random R preset by the user is set in the random number circuit 503. When the 12-bit random number circuit 503a is set as the random number circuit used when the timer interrupt is executed, the CPU 56 sets the random number maximum value designating the random number maximum value (any value from “0” to “4095”). Data is written into the random number maximum value setting register 535 of the 12-bit random number circuit 503a. Further, when the 16-bit random number circuit 503b is set as the random number circuit used when the timer interrupt is executed, the CPU 56 sets the random number maximum value for designating the maximum random number value (any value from “0” to “65535”). Data is written into the random number maximum value setting register 535 of the 16-bit random number circuit 503b.

  When “0” to “255” are set as the random number maximum value, the random number maximum value is reset to a predetermined value in the random number maximum value resetting process described later. Even when control is performed to write a value greater than “256” as the random number maximum value, values “0” to “255” are set in the random number maximum value setting register 535 due to garbled data or the like. In the case where it is lost, the random number maximum value is reset to a predetermined value in the random number maximum value resetting process described later.

  As described above, since the maximum value of the random number to be generated is set in advance in the random number maximum value setting register 535 in step S152, a random number having a value larger than the range of random numbers used during execution of the timer interrupt process is generated. This can be prevented, and the processing load on the random number circuit 503 and the CPU 56 can be reduced.

  Further, the CPU 56 checks whether the random number maximum value set in the random number maximum value setting register 535 in step S152 is not less than a predetermined lower limit value. If the random number maximum value is not more than the lower limit value, the random number maximum value setting register The random number maximum value resetting process for resetting the random number maximum value set in 535 is executed (step S153).

  Further, the CPU 56 executes a process according to the initial value change module 551e included in the random number circuit setting program 551, and executes an initial value change process for changing the initial value of the count value updated by the counter 521 of the random number circuit 503 (step). S154).

  Further, the CPU 56 executes processing according to the random number update method selection module 551b included in the random number circuit setting program 551, and writes the random number update method selection data in the random number update method selection register 540 (step S155). By doing so, the random number update method of the random number circuit 503 is set. In this embodiment, the CPU 56 writes the random number update method selection data “10h” in the random number update method selection register 540. That is, in this embodiment, the second random number update method is set as the random number update method of the random number circuit 503.

  In addition, the CPU 56 executes processing according to the cycle setting module 551c included in the random number circuit setting program 551, and sets the cycle setting data (the reference clock signal by how many minutes) that specifies the cycle of the random number generation clock signal SI1 set in advance by the user. The data for setting whether to circulate) is written in the period setting register 537 (step S156). By doing so, the cycle of the random number generating clock signal SI1 preset by the user is set in the random number circuit 503.

  Further, the CPU 56 sets whether or not to update the initial value input to the counter 521 when the count value is updated to a predetermined final value by the counter 521 of the random number circuit 503 (step S157). When the count value is updated to a predetermined final value by the counter 521, a setting value indicating whether or not to update the initial value input to the counter 521 is set in advance by the user and stored in a predetermined area of the ROM 54. . Whether or not the CPU 56 updates the initial value input to the counter 521 when the counter 521 updates the count value to a predetermined final value in accordance with a predetermined set value stored in a predetermined storage area of the ROM 54. Set up. In this embodiment, when the CPU 56 determines in step S157 that the initial value input to the counter 521 is to be updated, the count value is updated to a predetermined final value (when a notification signal is input from the counter 521). An initial value update flag indicating that the initial value is updated is set.

  Instead of changing the initial value of the count value by the CPU 56, the initial value of the count value may be changed to a predetermined value on the random number circuit 503 side based on the update of the count value to the final value. For example, the random number circuit 503 includes an initial value update data register that stores initial value update data indicating that the initial value is updated, and an initial value change circuit that changes the initial value. Value update data is set in the initial value update data register. In this case, when the counter 521 updates the count value to the final value, the counter 521 outputs a notification signal to the initial value change circuit. Then, the initial value changing circuit checks whether or not initial value update data is set in the initial value update data register. When the initial value change circuit confirms that the initial value update data is set, the initial value change circuit changes the initial value of the count value to a predetermined value. Note that the initial value changing circuit may change the initial value of the count value whose permutation has been changed in the count value permutation changing process described later.

  Further, the CPU 56 sets whether or not to change the permutation of the count values updated by the counter 521 when the count value is updated to a predetermined final value by the counter 521 of the random number circuit 503 (step S158). When the counter 521 updates the count value to a predetermined final value, a setting value indicating whether or not to change the permutation of the count value output by the counter 521 is set in advance by the user and stored in a predetermined area of the ROM 54. ing. Then, the CPU 56 changes the permutation of the count values output by the counter 521 when the count value is updated by the counter 521 to a predetermined final value according to a predetermined set value stored in a predetermined storage area of the ROM 54. Set whether or not. In this embodiment, if the CPU 56 determines in step S158 that the permutation of count values output by the counter 521 is to be changed, the CPU 56 changes the permutation of count values when the count value is updated to a predetermined final value. The indicated count value permutation change flag is set. In this embodiment, the case where the count value permutation change flag is set in step S158 according to a predetermined set value will be described. The CPU 56 changes the permutation of the count values output by the counter 521 based on the count value permutation change flag being set in the count value permutation changing process described later.

  Instead of changing the permutation of count values under the control of the CPU 56, the permutation of count values may be changed on the random number circuit 503 side based on updating the count values up to the final value. For example, the random number circuit 503 includes a permutation change data register that stores permutation change data indicating that the permutation of count values is to be changed. In step S158, the CPU 56 sets the permutation change data in the permutation change data register. In this case, when the counter 521 updates the count value to the final value, the notification signal is output to the count value permutation change circuit 523, and the count value permutation change circuit 523 that has received the notification signal receives the permutation change data in the permutation change data register. Check whether it is set. When the count value permutation changing circuit 523 confirms that the permutation change data is set, it changes the permutation of the count values.

  Then, the CPU 56 executes processing according to the random number circuit activation module 551d included in the random number circuit setting program 551, and writes the random number circuit activation data “80h” in the random number circuit activation register 541 (step S159). By doing so, the CPU 56 activates the random number circuit 503.

  Next, the random number maximum value resetting process (step S153) in the random number circuit setting process will be described. FIG. 29 is a flowchart showing the random number maximum value resetting process. In the random number maximum value resetting process, the CPU 56 reads the random number maximum value set in the random number maximum value setting register 535 (step S153a). When the 12-bit random number circuit 503a is set as the random number circuit used when executing the timer interrupt process, the CPU 56 reads the random number maximum value set in the random number maximum value setting register 535 of the 12-bit random number circuit 503a. . Also, as in this embodiment, when the 16-bit random number circuit 503b is set as the random number circuit used when executing the timer interrupt process, the CPU 56 sets the random number maximum value setting register 535 of the 16-bit random number circuit 503b. Read the maximum random number.

  The CPU 56 determines whether or not the read random number maximum value is equal to or less than a predetermined lower limit value (step S153b). When the 12-bit random number circuit 503a is set, the maximum random number that can be set in the 12-bit random number circuit 503a is from “256” to “4095”. It is determined whether or not the random number maximum value read from is less than or equal to the lower limit value “256”. When the 16-bit random number circuit 503b is set, the maximum random number that can be set in the 16-bit random number circuit 503b is from “256” to “65535”. It is determined whether or not the maximum random number read from the register 535 is equal to or lower than the lower limit “256”.

  When the read random number maximum value is less than or equal to the lower limit value, the CPU 56 resets the random number maximum value set in the random number maximum value setting register 535 to a predetermined value (step S153c). When the 12-bit random number circuit 503a is set, if it is determined that the random number maximum value read from the random number maximum value setting register 535 of the 12-bit random number circuit 503a is equal to or lower than the lower limit value “256”, the CPU 56 sets the random number maximum value. The random number maximum value set in the register 535 is reset to a predetermined value “4095”. When the 16-bit random number circuit 503b is set, if it is determined that the random number maximum value read from the random number maximum value setting register 535 of the 16-bit random number circuit 503b is equal to or less than the lower limit “256”, the CPU 56 sets the random number maximum value. The random number maximum value set in the register 535 is reset to the predetermined value “65535”.

  As described above, when the random number maximum value set in the random number maximum value setting register 535 is less than or equal to the predetermined lower limit value, the random number maximum value is reset to a predetermined value. Therefore, it is possible to prevent an excessively small value from being set as the maximum value of the random number due to a malfunction of the game control microcomputer 560 or an action such as generating a capture signal using a radio signal for the game machine. be able to. Therefore, it is possible to prevent a situation in which a random number having an excessively small value range from the minimum value to the maximum value is generated.

  In this embodiment, in step S152, random number maximum value setting data designating a random number maximum value preset by the user is written in the random number maximum value setting register 535. Even if the random number maximum value that should have been written for some reason has changed (below the predetermined lower limit value), the random number maximum value is not left below the predetermined lower limit value. Further, the process of step S152 may not be executed. Even in that case, the random number maximum value is not left below the predetermined lower limit value in the process of step S153.

  Next, the initial value changing process (step S154) in the random number circuit setting process will be described. FIG. 30 is a flowchart showing the initial value changing process. In the initial value changing process, the CPU 56 first reads the initial value changing method setting data stored in the area 1F97h in the user program execution data area, and specifies the initial value changing method selected by the user. In this case, the CPU 56 determines whether or not the value of the read initial value changing method setting data is “01h” (step S154a), thereby specifying the initial value changing method selected by the user.

  When the value of the initial value change method setting data is “01h”, the CPU 56 sets the initial value input to the counter 521 of the random number circuit 503 to a value set based on the ID number unique to the game control microcomputer 560. Change (step S154b). For example, the CPU 56 stores the ID number of the game control microcomputer 560 and the calculated value obtained by performing the predetermined calculation based on the ID number in association with each other in a predetermined storage area of the ROM 54 in advance. In step S154b, the CPU 56 changes the initial value of the count value to the calculated value based on the stored ID number. Further, for example, in step S154b, the CPU 56 calculates the ID number of the game control microcomputer 560 and a predetermined value (for example, the ID number (for example, “100”) to a predetermined value (for example, “100”). The initial value of the count value is set to the calculated value (for example, “200”). When the initial value input to the counter 521 is changed, the game control microcomputer 560 sets an initial value change flag indicating that the initial value of the count value has been changed (step S154c).

  When the CPU 56 changes the initial value input to the counter 521 in step S154b, the CPU 56 checks the value of the random number maximum value setting register 535 of the comparator 522 of the random number circuit 503, and the value set based on the ID number is determined. It is determined whether or not it is greater than the maximum random number. If it is determined that the value set based on the ID number is equal to or greater than the maximum random number, the CPU 56 does not change the initial value input to the counter 521 (for example, the initial value remains “0” and does not change). By doing so, it is possible to prevent a situation where the initial value of the count value is set to a value equal to or greater than the maximum random number.

  If the value of the initial value change method setting data is not “01h” in step S154a (that is, the value of the initial value change method setting data stored in the area 1F97h of the user program execution data area is “00h”). In the case), the CPU 56 does not change the initial value of the count value, ends the initial value changing process as it is, and proceeds to step S155.

  By executing the random number circuit setting process, various signals are input to the random number circuit 503 when the timer interrupt process including the game control process is performed, and various signals are generated in the random number circuit 503. FIG. 31 is a timing chart showing the timing at which each signal is input to the random number circuit 503 and the timing at which each signal is generated in the random number circuit 503.

  As shown in FIG. 31, the clock circuit 501 increases the signal level of the output terminal from a low level to a high level at predetermined intervals (timing T11, T21,... Shown in FIG. 31). A reference clock signal CLK (see FIG. 31A) is input to 503.

  The clock signal output circuit 524 divides the reference clock signal CLK supplied from the clock circuit 501 to generate a random number generation clock signal SI1 (see FIG. 31B). For example, the clock signal output circuit 524 raises the signal level of the output terminal from the low level to the high level at timings T11, T12,..., And changes the signal level from the high level to the low level at timings T21, T22,. To output a random number generating clock signal SI1.

  The example shown in FIG. 31 shows a case where the clock signal output circuit 524 generates the random number generating clock signal SI1 by dividing the reference clock signal CLK by two for easy understanding. However, in the actual random number circuit, the period that can be set in the period setting register 537 is from “system clock signal period × 128 × 7” to “system clock signal period × 128 × 256”. Therefore, in an actual random number circuit, the clock signal output circuit 524 is set in the cycle setting register 537 in a range from “system clock signal cycle × 128 × 7” to “system clock signal cycle × 128 × 256”. The reference clock signal CLK is divided by a division ratio corresponding to the cycle setting data “07h” to “FFh” to generate a random number generating clock signal SI1. The random number generating clock signal SI 1 generated by the clock signal output circuit 524 is output to the selector 528 and the inverting circuit 532.

  In this embodiment, since the second random number update method is set in the random number circuit setting process, the second random number update method selection signal is input from the random number update method selection signal output circuit 527 to the selector 528. When the second random number update method selection signal output circuit 527 receives the second random number update method selection signal output circuit 527, the selector 528 selects the random number generation clock signal SI1 input from the clock signal output circuit 524 and outputs it to the counter 521. . The counter 521 updates the count value C and outputs it to the count value permutation change circuit 523 every time the rising edge of the random number generation clock signal SI1 supplied from the selector 528 is input.

  The inverting circuit 532 generates the inverted clock signal SI2 (see FIG. 31C) by inverting the signal level of the random number generating clock signal SI1 input from the clock signal output circuit 524. For example, the inverting circuit 532 lowers the signal level of the output terminal from the high level to the low level at timings T11, T12,..., And the signal level from the low level to the high level at timings T21, T22,. As a result, the inverted clock signal SI2 is output. Further, the inverted clock signal SI <b> 2 generated by the inverting circuit 532 is output to the latch signal generating circuit 533.

  When a predetermined time (for example, 3 milliseconds) elapses after the winning detection signal SS (see FIG. 31D) is input to the timer circuit 534, the latch signal generation circuit 533 receives a disturbance from the random value read signal output circuit 526. A numerical reading signal is input. For example, when the signal level of the output terminal of the random number read signal output circuit 526 rises from a low level to a high level, the random value read signal is input to the latch signal generation circuit 533. The latch signal generation circuit 533 inverts the random number read signal input from the random number read signal output circuit 526 in response to the input of the second random number update method selection signal from the random number update method selection signal output circuit 527. A latch signal SL (see FIG. 31E) is output in synchronization with the rising edge of the inverted clock signal SI2 supplied from 532.

  As described above, the random number circuit 503 updates the count value C at the timings T11, T12, T13... And outputs the latch signal SL at the timing T22 different from the timings T11, T12, T13. The random number value is stored in 531.

  Next, the game control process will be described. FIG. 32 is a flowchart showing the timer interrupt process. When a timer interrupt occurs during execution of the main process, specifically, during a period in which the interrupt is permitted during execution of the loop process of steps S16 to S19, the CPU 56 performs steps S20 to S20 shown in FIG. The timer interrupt process of S35 is executed. In the timer interrupt process, first, a power-off detection process for detecting whether or not a power-off signal is output (whether or not an on-state is turned on) is executed (step S20). The power-off signal is output when, for example, a voltage drop monitoring circuit mounted on the power supply board detects a drop in the voltage of the power supplied to the gaming machine. In the power-off detection process, when detecting that the power-off signal has been output, the CPU 56 executes a power supply stop process for saving necessary data in the backup RAM area. Next, detection signals from the gate switch 32a, the first start port switch 13a, the second start port switch 14a, and the count switch 23 are input via the input driver circuit 58, and their state is determined (switch processing: step S21). ).

  Next, the CPU 56 includes a first special symbol display 8a, a second special symbol display 8b, a normal symbol display 10, a first special symbol hold storage display 18a, a second special symbol hold storage display 18b, and a normal symbol. A display control process for controlling the display of the on-hold storage display 41 is executed (step S22). About the 1st special symbol display 8a, the 2nd special symbol display 8b, and the normal symbol display 10, a drive signal is output with respect to each display according to the content of the output buffer set by step S32, S33. Execute control.

  Further, the CPU 56 checks whether or not the initial value is updated when the count value is updated to a predetermined final value in the random number circuit setting process (see step S157). A process of updating the initial value input to the counter 521 is performed (random circuit initial value update process: step S23A).

  Next, a process of updating the count value of each counter for generating each determination random number such as a random number for jackpot determination used for game control is performed (determination random number update process: step S23). The CPU 56 further performs a process of updating the count value of the counter for generating the initial value random number and the display random number (initial value random number update process, display random number update process: steps S24 and S25).

FIG. 33 is an explanatory diagram showing each random number. Each random number is used as follows.
(2) Random 2: A special symbol that generates a big hit is determined (for determining a big hit symbol)
(3) Random 3: Determine the special symbol's off symbol (for determining off symbol)
(4) Random 4: Determine the variation pattern of the special symbol (for variation pattern determination) (5) Random 5: Determine whether or not to generate a hit based on the normal symbol (for determination per normal symbol)
(6) Random 6: Determine the initial value of random 1 (for determining the random 1 initial value)
(7) Random 7: Determine the initial value of random 5 (for determining the random 5 initial value)
(8) Random 8: Determine whether or not to end the probability variation state (for the probability variation state termination determination)
(9) Random 9: Determine the number of times of probability change (for number of times determination)

  In step S23 in the game control process shown in FIG. 32, the game control microcomputer 560 determines whether the jackpot symbol determining random number in (2), the losing symbol determining random number in (3), or the normal symbol determining in (5). The counter for generating the random number for use, the random number for determining the end of probability change state (8), and the random number for determining the number of times (9) is incremented (added by 1). That is, they are determination random numbers, and other random numbers are display random numbers or initial value random numbers. In order to enhance the game effect, random numbers other than the random numbers (2) to (9) are also used.

  Next, the CPU 56 performs a count value permutation changing process for causing the count value permutation changing circuit 523 to change the permutation of the count values output from the counter 521 of the random number circuit 503 (step S25A). In this embodiment, whether or not to execute the count value permutation change process is determined depending on whether or not the count value permutation change flag is set in step S158 of the random number circuit setting process. Then, the CPU 56 executes the count value permutation change process based on the fact that the count value permutation change flag is set.

  Further, the CPU 56 performs a first special symbol process (step S26A). In the first special symbol process, corresponding processing is executed according to a first special symbol process flag for controlling the first special symbol display 8a and the special variable winning ball apparatus in a predetermined order according to the gaming state. The CPU 56 updates the value of the first special symbol process flag during each process according to the gaming state. Next, the CPU 56 performs a second special symbol process (step S26B). In the second special symbol process, corresponding processing is executed according to a second special symbol process flag for controlling the second special symbol display 8b and the special variable winning ball apparatus in a predetermined order according to the gaming state. The CPU 56 updates the value of the second special symbol process flag during each process according to the gaming state.

  Further, normal symbol process processing is performed (step S27). In the normal symbol process, the CPU 56 executes a corresponding process according to the normal symbol process flag for controlling the display state of the normal symbol display 10 in a predetermined order. The CPU 56 updates the value of the normal symbol process flag during each process according to the gaming state.

  Next, the CPU 56 performs a process of sending an effect control command related to display control of the first variable display unit 9a and the second variable display unit 9b and an effect control command related to the number of reserved memories (effect control command control process: step S28).

  Next, the CPU 56 performs a hold storage process (step S29). In the reserved memory process, the CPU 56 holds the number of reserved memories of the first special symbol (first reserved memory number), the number of reserved memories of the second special symbol (second reserved memory number), and the number of reserved memories of the background symbol (first number). A process of counting and managing the total number that is the sum of the number of reserved memories and the second number of reserved memories (total number of reserved memories) is executed.

  Further, the CPU 56 performs information output processing for outputting data such as jackpot information, start information, probability variation information supplied to the hall management computer, for example (step S30).

  Further, the CPU 56 executes a prize ball process for setting the number of prize balls based on detection signals from the first start port switch 13a, the second start port switch 14a and the count switch 23 (step S31). Specifically, the payout control micro mounted on the payout control board 37 in response to winning detection based on any one of the first start port switch 13a, the second start port switch 14a and the count switch 23 being turned on. A payout control command indicating the number of prize balls is output to the computer. The payout control microcomputer drives the ball payout device 97 in accordance with a payout control command indicating the number of winning balls.

  In this embodiment, a RAM area (output port buffer) corresponding to the output state of the output port is provided. However, the CPU 56 outputs the contents relating to ON / OFF of the solenoid in the RAM area of the output port to the output port. (Step S32: output processing).

  Further, the CPU 56 sets the first special symbol display control data for effect display of the first special symbol in the output buffer for setting the first special symbol display control data according to the value of the first special symbol process flag. In addition, special symbol display for setting second special symbol display control data for effect display of the second special symbol according to the value of the second special symbol process flag is set in the output buffer for setting the second special symbol display control data A control process is performed (step S33). For example, if the fluctuation speed is 1 frame / 0.2 seconds, the CPU 56 increments the value of the display control data set in the output buffer by 1 every 0.2 seconds. Further, the CPU 56 outputs a drive signal in step S22 in accordance with the display control data set in the output buffer, thereby variably displaying the special symbols on the first special symbol display 8a and the second special symbol display 8b. Execute.

  Further, the CPU 56 performs a normal symbol display control process for setting normal symbol display control data for effect display of the normal symbol in the output buffer for setting the normal symbol display control data according to the value of the normal symbol process flag ( Step S34). For example, if the normal symbol fluctuation speed is such that the display state (“◯” and “×”) is switched every 0.2 seconds, the CPU 56 sets the output buffer every 0.2 seconds. The display control data value to be switched (for example, 1 indicating “◯” and 0 indicating “×”) is switched. Further, the CPU 56 outputs a normal signal on the normal symbol display 10 by outputting a drive signal in step S22 according to the display control data set in the output buffer. Thereafter, the interrupt permission state is set (step S35), and the process is terminated.

  With the above control, in this embodiment, the game control process is started every 2 ms. The game control process corresponds to the processes of steps S21 to S34 (excluding step S30) in the timer interrupt process. In this embodiment, the game control process is executed by the timer interrupt process. However, in the timer interrupt process, for example, only a flag indicating that an interrupt has occurred is set, and the game control process is performed by the main process. It may be executed in step (b).

  In this embodiment, the first special symbol display unit 8a and the second special symbol display unit 8b perform the variable display of the first special symbol and the second special symbol, but the CPU 56 Control is performed so that a big hit does not occur simultaneously in the two displays.

  FIG. 34 is an explanatory diagram showing variation patterns (variation times) of special symbols and decorative symbols used in this embodiment. EXT shown in FIG. 34 is the second byte data of an effect control command (2-byte configuration) corresponding to each variation pattern.

  In the example shown in FIG. 34, 12 types of first variation patterns # 1 to # 12 for the first decorative design and 12 types of second variation patterns # 1 to # 12 for the second decorative design are used. Note that each of the first variation patterns # 1 to # 12 is the same as each of the second variation patterns # 1 to # 12, but is separately shown in FIG. Yes. Hereinafter, for example, the variation pattern #n (n = 1 to 12) means both the first variation pattern #n and the second variation pattern #n.

  As shown in FIG. 34, the variation patterns # 1 to # 6 are used in the normal gaming state (normal state), and the variation patterns # 7 to # 12 are used in the time saving state. Note that the variation patterns # 7 to # 12 in the time-short state are used even in the probability variation state.

  As shown in FIG. 34, in this embodiment, as the normal game state change patterns # 1 to # 6, “normal change” which is a change pattern without reach, and a change with a reach slightly more than the normal change. The “shortening fluctuation” that is a short fluctuation pattern, the “variation with reach A” that is a fluctuation pattern with reach A, the “variation with reach B” that is a fluctuation pattern with reach B, and reach C. There are provided a “variation with reach C” that is a variation pattern and a “special variation” that is a variation pattern of a special mode (see FIG. 59). Further, as in the normal gaming state, the fluctuation pattern # 7 to # 12 in the short-time state (probability variation state) is a variation pattern that does not involve reach, “normal variation”, and slightly more than normal variation with reach. “Variation with Reach B” that is a variation pattern with Reach B, “Variation with Reach B” that is a variation pattern with Reach B, “Fluctuation with reach C”, which is a variation pattern with “”, and “Special variation”, which is a variation pattern with a special mode. Note that the fluctuation patterns # 3 to # 5, # 9 to # 11 can be selected both in the case of big hit and off, but the fluctuation patterns # 1, # 2, # 6 to # 8, and # 12 are out of place. Only selected when.

  In this embodiment, the fluctuation time is shorter in the normal fluctuation in the short-time state (and the probability variation state) than in the normal fluctuation in the normal gaming state. That is, the variation time of the variation pattern # 7 is 5 seconds shorter than the variation pattern # 1. In addition, the variation time with the reach in the time-short state (and the probability variation state) is shorter than the variation with the reach (reach A, B, C) in the normal gaming state. That is, the variation time of the variation patterns # 9 to # 11 is 5 seconds shorter than that of the variation patterns # 3 to # 5. In this embodiment, the fluctuation pattern with reach is normally changed after the start of change, and becomes reach after the change time of normal change (15 seconds in the normal gaming state, 10 seconds in the short time state), and then reach. Reach fluctuation (design fluctuation in the reach state) is performed for a predetermined time (reach A is 10 seconds, reach B is 20 seconds, reach C is 30 seconds). As described above, the fluctuation patterns # 3 to # 5 and the fluctuation patterns # 9 to # 11 have the same fluctuation time in the reach fluctuation part, but the fluctuation time in the normal fluctuation part is the fluctuation pattern # 3. The variation patterns # 9 to # 11 are 5 seconds shorter than # 5.

  Further, as shown in FIG. 34, the fluctuation pattern # 6 and the fluctuation pattern # 12 have the same fluctuation time. Note that the variation pattern # 6 and the variation pattern # 12 are used when it is determined that the force will be described later. Further, the fluctuation time of the fluctuation pattern # 6 and the fluctuation pattern # 12 (45 seconds in this example) is longer than the fluctuation times of the fluctuation patterns # 3 to # 5 and # 9 to # 11 that can be used when making a big hit. .

  FIG. 35 is an explanatory diagram illustrating an example of a relationship between a stop symbol of a special symbol (first special symbol, second special symbol) and a gaming state controlled thereafter. In the example shown in FIG. 35, when the stop symbol is an even symbol, the game is out of the game. When the stop symbol is an odd symbol, it is a big hit, and after the special symbol changes, the game shifts to a big hit game state. Furthermore, in the case of “3” or “7” among the odd number of symbols, the gaming state is changed to the probability changing state. A symbol that shifts to a jackpot gaming state after the end of a special symbol change is called a jackpot symbol. In addition, a symbol that changes the gaming state to a probability variation state is referred to as a probability variation symbol. A jackpot symbol (“1”, “5”, “9”) that is not a probability variable symbol is referred to as a non-probable variable symbol or a non-probable variable symbol symbol. In this embodiment, by determining the jackpot symbol of the special symbol, it is determined which game state is to be controlled between the probability variation state (special game state) and the normal state.

  Note that the probability variation symbol and the non-probability variation symbol may not be distinguished, but may be simply divided into a jackpot symbol and an off symbol symbol. In that case, the game control microcomputer 560 does not determine whether or not to shift to the probability variation state according to the symbol determined by the lottery, but determines whether or not to transition to the probability variation state using a random number or the like. I do. Further, the production control microcomputer 100 uses electrical components provided in the gaming machine after the big hit game is started (for example, during the big hit game or at the end of the big hit game) when the probability variation big hit occurs. You may make it alert | report the probability variation big hit. In such a configuration, the player can no longer grasp the change in the game state from the stop symbol, and the change in the game state can be grasped for the first time by notification, so that the interest of the game is improved.

  In this embodiment, the relationship between the stop symbols of the decorative symbols (first decorative symbol, second decorative symbol) and the gaming state controlled thereafter is the same as the content shown in FIG. That is, when the stop symbol is an even symbol, the game is out of the game. When the stop symbol is an odd symbol, the game is a big hit. Furthermore, in the case of “3” or “7” among the odd number of symbols, the gaming state is changed to the probability changing state. A symbol that shifts to a jackpot gaming state after the decoration symbol changes is called a jackpot symbol, a symbol that changes the gaming state to a probable variation state is called a probability variation symbol, and a jackpot symbol that is not a probability variation symbol (“1”) , “5”, “9”) are referred to as non-probable variation designs or non-probability variation big hit designs.

  In this embodiment, the special symbol stop symbol and the decorative symbol stop symbol do not always match. However, for the meanings of the stop symbols (displacement, non-probable big hit, probable big hit), the stop symbol of the special symbol and the stop symbol of the decorative symbol are made the same. For example, when the stop symbol of the special symbol is a symbol (for example, “2”) that means a loss, the stop symbol of the decorative symbol is “0”, “2”, “4”, “6”, or “8” that means a loss. One of the symbols is selected. When the stop symbol of the special symbol is a symbol (for example, “1”) meaning a non-probable big hit, the stop symbol of the decorative symbol is a symbol “1”, “5” or “9” meaning a non-probable big hit. Either one is selected. In addition, when the stop symbol of the special symbol is a symbol (for example, “7”) that means a probable big hit, either the symbol “3” or “7” that means a probable big hit is selected as the stop symbol of the decorative symbol. The The stop symbol of the decorative design is selected by the production control microcomputer 100 based on the production control command indicating the display result (disconnected, non-probable big hit, probable big hit), as will be described later.

  In addition, in FIG. 35, although the number symbol was illustrated as a special symbol (same for the ornament symbol), the alphabet, the character symbol, the symbol in which the character or the like is displayed in the character indicator, Any other symbol may be used.

  Next, the random number circuit initial value update process (step S23A) in the timer interrupt process will be described. FIG. 36 is a flowchart showing random number circuit initial value update processing. In the initial value update process, the CPU 56 checks the state of the notification signal indicating that the count value C output from the counter 521 of the random number circuit 503 has been updated to the final value (step S220). When it is detected that the notification signal is in the on state, the CPU 56 checks whether or not the initial value update flag is set (step S221). That is, in the random number circuit setting process, the CPU 56 checks whether or not the setting for updating the initial value is made when the count value is updated to a predetermined final value (see step S157).

  When the initial value update flag is set, the CPU 56 determines to update the initial value input to the counter 521 when the counter 521 of the random number circuit 503 updates the count value to a predetermined final value. When the initial value update flag is set, the CPU 56 checks whether or not the initial value change flag is set (step S222). That is, the CPU 56 determines whether or not the initial value of the count value is currently changed (that is, whether or not it is changed to a value based on the ID number of the game control microcomputer 560).

  When the initial value change flag is set (that is, when the initial value is currently changed based on the ID number of the game control microcomputer 560), the CPU 56 uses the initial value input to the counter 521 as the game control. The value based on the ID number of the microcomputer 560 is returned to the original value (for example, “1”) (step S223). Then, the CPU 56 resets the initial value change flag (step S224) and ends the initial value update process.

  If the initial value change flag is not set (that is, the initial value is not currently changed), the CPU 56 changes the initial value input to the counter 521 to a value based on the ID number of the game control microcomputer 560. (Step S225). In this case, for example, if the ID number of the game control microcomputer 560 is “100”, the initial value input to the counter 521 is calculated by adding a predetermined value “100” to the ID number “100”. Change to the value “200”. Further, for example, the initial value input to the counter 521 is changed to the calculated value “50” obtained by subtracting the predetermined value “50” from the ID number “100”. Then, the CPU 56 sets an initial value change flag (step S226) and ends the initial value update process.

  When both the 12-bit random number circuit 503a and the 16-bit random number circuit 503b are set, in step S225, the CPU 56 uses the random number read from one random number circuit (for example, the 12-bit random number circuit 503a) as a predetermined value as an ID number. The initial value input to the counter 521 may be obtained. Then, the CPU 56 may use a random number read from the other one (for example, a 16-bit random number circuit 503b) as a random number for determining the big hit.

  When the CPU 56 updates the initial value input to the counter 521 in step S225, the CPU 56 checks the value of the random number maximum value setting register 535 of the comparator 522 of the random number circuit 503, and the value set based on the ID number is obtained. It is determined whether or not it is greater than the maximum random number. If the CPU 56 determines that the value set based on the ID number is equal to or greater than the maximum random number, the CPU 56 does not update the initial value input to the counter 521 with a predetermined value (for example, updates with the predetermined value “0”). do not do). By doing so, it is possible to prevent a situation where the initial value of the count value is set to a value equal to or greater than the maximum random number.

  If it is determined in step S220 that the notification signal is in the OFF state, or if it is determined in step S221 that the initial value update flag is not set, the CPU 56 does not update the initial value input to the counter 521. Then, the random number circuit initial value update processing is finished as it is.

  Next, the count value permutation change process (step S25A) in the timer interrupt process will be described. FIG. 37 is a flowchart showing the count value permutation changing process. The CPU 56 performs a count value permutation change process by executing a process according to the count value permutation change program 554. In the count value permutation change process, the CPU 56 checks the state of the notification signal indicating that the count value C output from the counter 521 of the random number circuit 503 has been updated to the final value (step S241). When it is detected that the notification signal is in the on state, the CPU 56 checks whether or not the count value permutation change flag is set (step S242). That is, the CPU 56 determines whether or not the setting for changing the permutation of the count values updated by the counter 521 when the count values are updated to a predetermined final value has been made in the random number circuit setting process (see step S158). Check.

  When the count value permutation change flag is set, the CPU 56 determines that the permutation of the count values updated by the counter 521 is changed when the counter 521 of the random number circuit 503 updates the count value to a predetermined final value. Then, the game control microcomputer 560 writes the count value permutation change data “01h” in the count value permutation change register 536 (step S243). That is, the CPU 56 causes the count value permutation change circuit 523 to change the permutation of the count values C input to the random value storage circuit 531 by writing the count value permutation change data “01h”.

  As described above, in the count value permutation change process, when the random number is updated to a predetermined final value, the permutation of the count value updated by the counter 521 is changed, so that the randomness generated by the random number circuit 503 is more random. Can be improved.

  38 and 39 are flowcharts showing an example of a program of the first special symbol process (step S26A) executed by the game control microcomputer 560 (specifically, the CPU 56) mounted on the main board 31. . As described above, in the first special symbol process, a process for controlling the first special symbol display 8a and the special variable winning ball apparatus is executed. The program for the second special symbol process (step S26B) is similarly configured. That is, in the following description, if “first” is read as “second” and “second” is read as “first”, the second special symbol process will be described.

  As described above, in this embodiment, the variable display of the first special symbol and the second special symbol is executed by the two displays of the first special symbol display 8a and the second special symbol display 8b. . In this embodiment, control is performed so that the big hit based on the fact that the big win symbol is derived and displayed on the two displays is not generated at the same time.

  Further, in this embodiment, there are a normal state, a probable change state, and a short time state as the gaming state. Then, when a predetermined transition condition is satisfied, control is performed so as to shift to any one of the three gaming states. Control relating to the transition of the gaming state is performed based on ON / OFF (set / reset) of the probability change flag and the time reduction flag.

  When the CPU 56 performs the first special symbol process, the first start port switch 13a for detecting that a game ball has won the first start winning port 13 provided in the game board 6 is turned on. In other words, if a start winning that causes the game ball to win the first start winning opening 13 has occurred (Y in step S311), the first start opening switch passing process is executed (step S312). The contents of the first start port switch passing process will be described later (see FIG. 43).

  Next, the CPU 56 checks whether or not the value of the second special symbol process flag is a value corresponding to any one of the second big hit symbol stop process to the second big hit end process (step S313). When the value of the second special symbol process flag is a value corresponding to any one of the second big hit symbol stop process to the second big hit end process (Y in step S313), after executing the processes of steps S314 and S315 Then, the first special symbol process is terminated. Otherwise, after executing the processing of steps S316 and S317, depending on the internal state (specifically, the value of the first special symbol process flag), the processing of any of steps S300 to S309 is performed. Do. In this embodiment, the values corresponding to the second jackpot symbol stop process to the second jackpot end process are continuous values (for example, 6 to 9). Therefore, the determination process of step S313 of the CPU 56 can be simplified.

  In step S314, the CPU 56 changes the first decorative symbol and the first special symbol, and the second big hit game (a big hit is generated based on the fact that the stop symbol of the second special symbol is the big hit symbol). Whether the interruption command is transmitted to the production control microcomputer 100 or not. If it has already been transmitted (for example, if the transmitted flag is set by setting the transmitted flag when the interruption command is transmitted), the process ends. After transmitting the interruption command to the control microcomputer 100, the process is terminated (step S315). In step S316, the CPU 56 executes the process of step S316 after transmitting the interruption command (for example, when the transmission completion flag is set by setting the transmission completion flag when the interruption command is transmitted). In the case of being performed, after the restart command is transmitted to the production control microcomputer 100, any one of steps S300 to S309 is performed. Note that, in the CPU 56, whether or not the first decorative symbol and the first special symbol are changing can be determined by whether or not the value of the first special symbol process flag is a value corresponding to the processing in step S304. Further, whether or not the second big hit game is being executed can also be determined by the second special symbol process flag.

  When receiving the interruption command, the production control CPU 101 of the production control microcomputer 100 interrupts the variation (variable display) of the first decorative symbol. When the restart command is received, the variation of the first decorative symbol is restarted.

  The processes in steps S300 to S309 are as follows.

  First special symbol normal processing (step S300): When the microcomputer for game control 560 is in a state where variable display of the first special symbol can be started, the number of numerical data stored in the first reserved memory buffer (reserved memory) Number). The number of numerical data stored in the first hold storage buffer can be confirmed by the count value of the first hold storage counter. Further, if the count value of the first hold storage counter is not 0, it is checked whether or not the gaming state is a probability variation state, and if it is a probability variation state, the end of the probability variation state is determined. If the count value of the first reserved storage counter is not 0, the internal state (first special symbol process flag) is updated to a value according to step S301.

  First special symbol stop symbol setting process (step S301): As a result of variable display of the first special symbol, it is determined whether or not to make a big hit (whether or not to make a specific display result) and whether to make a probable big hit. . In the case of a big hit, the first big hit flag is set. Further, the stop symbol of the first special symbol after the variable display is determined. Then, the internal state (first special symbol process flag) is updated to a value according to step S302. The first big hit flag is reset when the big hit game ends.

  First variation pattern setting process (step S302): variation pattern determining random number (one of display random numbers) obtained by extracting variation pattern of variable display of first special symbol (corresponding to variation time here) extracted at the time of start winning. Is selected from a plurality of predetermined variation patterns according to the value of. In addition, information (variation pattern command, that is, variable display pattern command) for commanding a variation pattern is transmitted to the effect control board 80. Then, the internal state (first special symbol process flag) is updated to a value according to step S303.

  First gaming state transition control process (step S303): After the gaming state is shifted to the probability changing state and when the gaming state is controlled to the probability changing state or the short time state, the first gaming state transition control process is performed. It is confirmed whether or not the number of start times (number of states) of the variable display of the first special symbol and the second special symbol has reached a predetermined number. Then, when it is confirmed that the number of states has reached the predetermined number, it is confirmed whether or not the gaming state at that time is shifted from the probability change state to the time-saving state. The transition control for shifting to the normal gaming state is executed. Whether or not the number of variable display start times (probability change count) of the first special symbol and the second special symbol in the probability change state has reached a predetermined number after the game state is changed to the probability change state. Check. Then, after confirming that the probability variation count has reached the predetermined count, it is confirmed whether or not the status count has already reached the predetermined count, and when the status count has reached the predetermined count, the gaming state is changed from the probability variation state to the normal gaming state. When the number of states is not the predetermined number, the transition control is performed to shift the gaming state from the probability changing state to the time-saving state.

  In addition, when the game state is controlled to the probabilistic state, the game state is shifted to the short-time state based on the fact that it has been decided to make a big hit with a non-probable variable symbol (referred to as non-probable variable big hit or normal big hit). After being confirmed, it is confirmed whether or not the number of variable display start times (number of time reductions) of the first special symbol and the second special symbol has reached a predetermined number. Transition control for shifting to the gaming state is executed. Further, when it is determined that the big hit is a big hit in the big hit determination, it is confirmed whether or not the big hit is a probable big hit, and in the case of the probable big hit, transition control for shifting the gaming state to the probable state is executed. If it is not a probabilistic big hit (in case of non-probable big hit (usually big hit)), if the gaming state at that time is in the probabilistic state, execute transition control to shift to the short time state, and if the gaming state at that time is in the short time state Transition control for shifting to the normal gaming state is executed. Furthermore, the variation of the first special symbol is started, and the variable display time (variation time) until the first special symbol is variably displayed and derived and displayed based on the variation pattern determined in the first variation pattern setting process. Is set in the first variable time timer, and then the first variable time timer is started. Thereafter, the internal state (first special symbol process flag) is updated to a value according to step S304.

  First special symbol variation processing (step S304): When the variation time of the variation pattern selected in the first variation pattern setting processing elapses (the first special symbol process timer set in step S303 times out), the internal state ( The first special symbol process flag) is updated to a value corresponding to step S305 or step S306. When it is determined that the display result of the special symbol is a jackpot symbol, the value is updated according to step S306, and when it is determined that the display result of the special symbol is not a jackpot symbol, step S305 is performed. Update to a value according to.

  First off symbol stop process (step S305): The variable display on the first special symbol indicator 8a is stopped and the stop symbol is displayed. In addition, control for transmitting an effect control command (decorative symbol stop command) indicating stop of the decorative symbol to the effect control microcomputer 100 is performed. Then, the internal state (first special symbol process flag) is updated to a value according to step S300.

  First big hit symbol stop process (step S306): The variable display on the first special symbol indicator 8a is stopped and the stop symbol is displayed. In addition, control for transmitting an effect control command (decorative symbol stop command) indicating stop of the decorative symbol to the effect control microcomputer 100 is performed. Then, the internal state (first special symbol process flag) is updated to a value according to step S307. When the effect control microcomputer 100 on the effect control board 80 receives the effect control command (decoration symbol stop command) indicating the ornament symbol stop transmitted from the game control microcomputer 560, the first ornament symbol of the variable display device 9 is displayed. Although the control is performed so that the first decorative symbol is stopped in the display area 9b, the variable display of the first decorative symbol may be independently stopped when the variation time has elapsed.

  First big winning opening opening pre-processing (step S307): Control for opening the big winning opening is started. Specifically, a counter (for example, a counter that counts the number of game balls that have entered the big prize opening) is initialized, and the solenoid 21 is driven to open the special variable winning ball apparatus to open the big prize opening. To do. Also, the execution time of the first big prize opening opening process is set by the process timer, and the internal state (first special symbol process flag) is updated to a value according to step S308.

  Processing during opening of first big prize opening (step S308): control for sending presentation control command for round display in big hit gaming state to stage control board 80, processing for counting number of rounds, establishment of closing condition for big prize opening Perform processing to confirm. If the number of rounds does not reach a predetermined number of times (for example, 15 rounds) when the closing condition of the big prize opening is established, the internal state (first special symbol process flag) is updated to a value according to step S307, If the number of rounds has reached a predetermined number, the internal state (first special symbol process flag) is updated to a value according to step S309.

  First jackpot end process (step S309): Control for causing the microcomputer 100 for effect control to perform display control for notifying the player that the jackpot gaming state has ended is performed. Then, the internal state (first special symbol process flag) is updated to a value according to step S300.

  Next, a method for sending a control command from the game control means to the effect control means will be described. FIG. 40 is an explanatory diagram showing a signal line of an effect control command transmitted from the main board 31 to the effect control board 80. As shown in FIG. 40, in this embodiment, the effect control command is transmitted from the main board 31 to the effect control board 80 through eight signal lines of the effect control signals CD0 to CD7. Further, between the main board 31 and the effect control board 80, a signal line of the effect control INT signal for transmitting the capture signal (effect control INT signal) is also wired.

  In this embodiment, the effect control command has a 2-byte structure, the first byte represents MODE (command classification), and the second byte represents EXT (command type). The first bit (bit 7) of the MODE data is always set to “1”, and the first bit (bit 7) of the EXT data is always set to “0”. Note that such a command form is an example, and other command forms may be used. For example, a control command composed of 1 byte or 3 bytes or more may be used.

  As shown in FIG. 41, the 8-bit effect control command data of the effect control command is output in synchronization with the effect control INT signal. The effect control microcomputer 100 mounted on the effect control board 80 detects that the effect control INT signal has risen, and starts a 1-byte data capturing process through an interrupt process. Therefore, when viewed from the effect control microcomputer 100, the effect control INT signal corresponds to a signal that triggers the capture of effect control command data.

  The effect control command is sent only once so that the effect control microcomputer 100 can recognize it. In this example, “recognizable” means that the level of the effect control INT signal changes, and that it is sent only once so as to be recognizable means that, for example, each of the first and second bytes of the effect control command data Accordingly, the production control INT signal is output in a pulse shape (rectangular wave shape) only once. The effect control INT signal may have a polarity opposite to that shown in FIG.

  FIG. 42 is an explanatory diagram showing an example of the contents of the effect control command sent to the effect control board 80. In the example shown in FIG. 42, commands 8000 (H) to 801B (H) are variable in the first decorative symbol display area 9b or the second decorative symbol display area 9c of the variable display device 9 corresponding to the variable display of the special symbol. This is an effect control command (variation pattern command) for designating a variation pattern of a decorative pattern to be displayed. The effect control command for designating the variation pattern is also a command for designating the variation start. Therefore, when the production control microcomputer 100 receives any of the commands 8000 (H) to 801B (H), the decoration design is displayed in the first design display area 9b or the second design display area 9c of the variable display device 9. Control to start variable display. The commands of the first variation pattern designations # 1 to # 12 are 8000 (H) to 800B (H), and the commands of the second variation pattern designations # 1 to # 12 are 8010 (H) to 801B (H). And

  Command 9000 (H) is an effect control command (first probability variable big hit designation command) that designates that the display result (stop symbol) of the variable display of the first decorative symbol is the probability variation symbol (probability variation big hit symbol). Command 9001 (H) is an effect control command (first normal jackpot designation command) for designating that the display result of variable display of the first decorative symbol is a non-probable variable symbol (non-probable variable big hit symbol). The command 9002 (H) is an effect control command (first deviation designation command) for designating that the display result of the variable display of the first decorative symbol is to be an off symbol.

  Command 9100 (H) is an effect control command (second probability variable big hit designation command) for designating that the display result (stop symbol) of the variable display of the second decorative symbol is the probability variation symbol (probability big hit symbol). The command 9101 (H) is an effect control command (second normal jackpot designation command) that designates that the display result of the variable display of the second decorative symbol is the non-probable variation symbol (non-probability variation jackpot symbol). The command 9102 (H) is an effect control command (second deviation designation command) for designating that the display result of the variable display of the second decorative symbol is to be a missing symbol. Note that the commands 9000 (H) to 9102 (H) may be referred to as display result commands.

  Command A000 (H) is an effect control command for instructing stop of variable display of the first decorative symbol. Command A001 (H) is an effect control command for instructing stop of variable display of the second decorative symbol.

  The command A100 (H) is an effect control command for instructing to interrupt the variable display of the first decorative symbol in the first decorative symbol display area 9b, and the command A101 (H) is the first in the first decorative symbol display region 9b. This is an effect control command for instructing restart of variable display of decorative symbols.

  The command A200 (H) is an effect control command for instructing to interrupt the variable display of the second decorative symbol in the second decorative symbol display area 9c, and the command A201 (H) is the second in the second decorative symbol display region 9c. This is an effect control command for instructing restart of variable display of decorative symbols.

  The command BXXX (H) is an effect control command that is sent from the start of the big hit game to the end of the big hit game.

  Command B000 (H) is an effect control command (first jackpot start designation command) that designates the start of a jackpot game based on the first special symbol (first decorative symbol), and command B001 (H) is the first special symbol. This is an effect control command (first jackpot end designation command) for designating the end of the jackpot game based on the symbol (first decorative symbol). Command B002 (H) is an effect control command (second jackpot start designation command) that designates the start of a big hit game based on the second special symbol (second ornament symbol), and command B003 (H) is a second special symbol. This is an effect control command (second jackpot end designation command) for designating the end of the jackpot game based on the symbol (second decorative symbol).

  The command B1XX (H) is an effect control command (display command when opening the big winning opening) that designates the display during opening of the large winning opening for the number of times indicated by XX (round display during round). The command B2XX (H) is an effect control command (display command after opening the big winning opening) for designating the display after the opening of the big winning opening for the number of times indicated by XX (interval display between lands after the opening of the big winning opening). .

  Command C100 (H) is an effect control command (designating that a game ball has won a prize at the first start winning opening 13 when the first reserved memory number has not reached the upper limit value (four) (when less than tan). First effective start winning designation command). The command C101 (H) is an effect control command (designating that a game ball has won a prize at the first start winning opening 13 when the first reserved memory number has reached the upper limit value (four) (when full). First invalid start winning designation command). The command C200 (H) is an effect control command (designating that a game ball has won a prize at the second start winning opening 14 when the second reserved memory number has not reached the upper limit value (4) (less than tan). Second effective start winning designation command). The command C201 (H) is an effect control command (designating that a game ball has won a prize at the second start winning opening 14 when the second reserved memory number has reached the upper limit (four) (when full). Second invalid start winning designation command).

  Command D000 (H) is an effect control command for designating a customer waiting demonstration.

  The effect control microcomputer 100 (specifically, the effect control CPU 101) mounted on the effect control board 80 receives the above-described effect control command from the game control microcomputer 560 mounted on the main board 31. Then, the display state of the variable display device 9 is changed according to the contents shown in FIG. 14, the display state of the lamp is changed, and the sound number data is output to the sound output board 70. 42. An effect control command other than the effect control command shown in FIG. 42 is also transmitted from the main board 31 to the effect control board 80. For example, a more detailed presentation control command related to the big hit game and a presentation control command indicating a gaming state (for example, an initialization command or a presentation control command indicating a probability change state) are also transmitted from the main board 31 to the presentation control board 80.

  FIG. 43 is a flowchart showing the first start port switch passing process in step S312. In the first start port switch passing process, the CPU 56 checks whether or not the current gaming state is a high base state (step S320). Whether or not the state is the high base state can be confirmed by, for example, a state flag setting state or a probability change flag and a time-short flag setting state.

  When the gaming state is not the high base state, that is, the low base state (N in Step S320), the total pending storage number that is the sum of the first reserved memory number and the second reserved memory number (that is, the low base state) At this time, it is determined whether or not the number of stored background symbols displayed in the memory display area 9d of the variable display device 9 is 4 which is the upper limit (step S321a). Note that the total pending storage number is counted by the total pending storage number counter. When the total pending storage number indicated by the total pending storage number counter is not 4 (N in Step S321a), the process proceeds to Step S321c, and when the total pending storage number is 4 (Y in Step S321a), the process is performed. finish. When the gaming state is in the high base state (Y in Step S320), the total pending storage number that is the sum of the first reserved memory number and the second reserved memory number (that is, the variable display device 9 in the high base state) It is determined whether or not the number of stored background symbols stored in the memory display area 9d is 8 which is the upper limit (step S321b). When the total pending storage number indicated by the total pending storage number counter is not 8 (N in step S321b), the process proceeds to step S321c, and when the total pending storage number is 8 (Y in step S321b), the process is performed. finish.

  Subsequently, the CPU 56 determines the first reserved memory number indicated by the first reserved memory number counter (that is, the reserved memory number of the first special symbol displayed by the first special symbol reserved memory display 18a; It is determined whether or not the stored number of the first reserved memory has reached the upper limit of 4 (step S321). If the first reserved memory number is 4, the process is terminated as it is.

  If the first reserved storage number has not reached 4, the CPU 56 adds 1 to the value of the interrupt counter indicating the number of times that the timer interrupt process has been executed (step S322). That is, the CPU 56 executes a process of counting the number of times that the timer interrupt process has been executed. In this embodiment, by executing step S322, the CPU 56 counts up an interrupt number counter indicating the number of times the timer interrupt process has been executed each time the timer interrupt process is executed. When the value of the interrupt counter is incremented by 1, the CPU 56 checks whether or not the number of executions of the timer interrupt process indicated by the interrupt execution counter has reached a preset number (for example, 3 times). (Step S323). That is, after the game ball has won the first start winning opening 13, the CPU 56 checks whether or not the interrupt execution number counter has reached a predetermined number. When the number of executions of the timer interrupt process reaches a predetermined number, in step S328, the CPU 56 resets the interrupt execution number counter.

  The predetermined number of times that is set in advance in step S323 is determined as follows. As described above, the timer circuit 534 of the random number circuit 503 measures the time during which the winning detection signal SS is continuously input from the first start port switch 13a, and detects that the measurement time has reached a predetermined period. Then, the random value fetch data “01h” is written. In this embodiment, a predetermined period (for example, 3 ms) measured by the timer circuit 534 is a period in which a predetermined number of timer interrupt processes are executed (for example, when the timer interrupt process every 2 ms is executed three times). The predetermined number of times (for example, three times) confirmed in step S323 is set so as to be shorter than 6 ms). By setting as such, it is possible to prevent the random number from being read again after the random number is read and before the random number value stored in the random value storage circuit 531 is updated. It is possible to prevent a random number having the same value as the random number read from the circuit 531 from being read again. The timer circuit 534 does not measure the input time of the winning detection signal SS, but the CPU 56 measures the input time of the winning detection signal SS and writes the random value fetch data “01h” to the random value fetch register 539. May be.

  When the number of executions of the timer interrupt process has reached a predetermined number, the CPU 56 can output the output control signal SC to the random number storage circuit 531 of the specified random number circuit 503 and read the random number storage circuit 531 (enable). The state is controlled (step S324).

  The CPU 56 reads the random R value stored as the random number value from the random value storage circuit 531 of the random number circuit 503 (step S325). Further, the CPU 56 stores the read random R value in a predetermined buffer area in the RAM 55 (step S326). When the CPU 56 stores the value of the random R in the buffer area, the CPU 56 stops outputting the output control signal SC to the random value storage circuit 531 and controls the random value storage circuit 531 to be unreadable (disabled) ( Step S327). Further, the CPU 56 resets the interrupt execution number counter (step S328).

  Further, the CPU 56 sets the value of the random R stored in the buffer area at the head of the empty entry in the special figure reservation memory 570 (step S329). The entry in the special figure reservation memory 570 corresponds to an area in which a big hit determination random number is set in the storage area corresponding to the first reserved storage number. The random R corresponds to a big hit determination random number.

  Further, a process of extracting software random numbers (such as a counter value for generating a jackpot symbol determination random number) and storing them in the storage area corresponding to the value of the first reserved memory number counter as the extracted random number value Is executed (step S330). The same number of storage areas as the upper limit value of the first reserved storage number are secured. In step S330, random numbers 2 to 4, 8, and 9 are extracted from the random numbers shown in FIG. Note that extracting a random number means reading a count value from a counter for generating a random number and setting the read count value as a random value.

  As described above, in reading the random R from the random value storage circuit 531 in the first start port switch passing process, the timer interrupt process is executed a predetermined number of times (that is, the timer interrupt process is executed a predetermined number of times). The random number is read from the random value storage circuit 531 on the condition that the winning detection signal SS is continuously input). Therefore, it is possible to prevent the random number from being read again after the random number is read and before the value of the random number stored in the random value storage circuit 531 is updated. Further, it is possible to prevent a random number having the same value as the random number read from the previous random number value storage circuit 531 from being read again.

  FIG. 44 is a flowchart showing the first special symbol normal process (step S300) in the first special symbol process. The state where the first special symbol normal process is executed is when the value of the first special symbol process flag is a value indicating step S300. The case where the value of the first special symbol process flag is a value indicating step S300 means that the first special symbol indicator 8a does not display the variation of the first special symbol and the first big hit This is a case where the game is not in progress (a game in which a special winning opening is opened a predetermined number of times based on the fact that the first special symbol has become a big hit symbol).

  In the first special symbol normal process, the CPU 56 confirms the value of the first reserved memory number (step S41). Specifically, the count value of the first hold storage counter is confirmed.

  If the first reserved memory number is not 0, each random number value stored in the storage area corresponding to the first reserved memory number = 1 in the first reserved memory buffer of the RAM 55 is read and stored in the random number buffer area of the RAM 55. At the same time (step S42), the value of the first reserved memory number is decreased by 1 (the count value of the first reserved memory counter is decremented by 1), and the contents of each storage area are shifted (step S43). That is, each random number value stored in the storage area corresponding to the first reserved memory number = n (n = 2, 3, 4) in the first reserved memory buffer of the RAM 55 is expressed as the first reserved memory number = n−1. Store in the storage area corresponding to. Therefore, the order in which the random number values stored in the respective storage areas corresponding to the respective first reserved memory numbers are extracted always coincides with the order of the first reserved memory number = 1, 2, 3, 4. It is like that.

  Next, the CPU 56 checks whether or not the current gaming state is a probability changing state (high probability state) by checking whether or not the probability changing flag is set (step S44). The probability variation flag is data indicating that the current gaming state is a probability variation state, and is set when the probability variation state is started (see step S192 in FIG. 52) and reset when the probability variation state is terminated (FIG. 44). Step S51, Step S185 of FIG. 51, Step S202 of FIG. 52).

  When the probability variation flag is not set, the CPU 56 proceeds to step S55 without executing the processes of steps S45 to S54. If the probability variation flag is set, the CPU 56 reads the probability variation state end random number (random 8) from the random number buffer area (step S45), and determines the end of the probability variation state (step S46). That is, the CPU 56 compares the predetermined probability change state end determination value with the probability change state end determination random number value, and determines that the probability change state is ended when they match.

  When it is determined to end the probability variation state, the CPU 56 resets the probability variation flag and terminates the probability variation state (step S51). Then, the CPU 56 checks whether or not the status flag is set (step S52). Note that the determination (lottery) in step S46 is referred to as puncture lottery.

  The state flag is set when the probability changing state is started, and when the number of variable display times of the first special symbol and the second special symbol reaches a predetermined number (for example, 100 times) after the transition to the probability changing state, the state flag is also determined. This flag is reset when it is determined that the jackpot symbol is to be an uncertain variable symbol before the number of times is reached.

  The fact that the state flag is set in step S52 is a state in which the number of variable display of the first special symbol and the second special symbol has not reached a predetermined number (for example, 100 times) after being controlled to the probability variation state. It is shown that. Therefore, when confirming that the status flag is set, the CPU 56 sets the time reduction flag and starts the time reduction state (step S53).

  That is, in this embodiment, if the result of the puncture lottery is a win (the probability variation state is terminated), the time-short state is controlled until variable display is performed for the remaining number of states.

  The time reduction flag is data indicating that the current gaming state is the time reduction state, and is set when the time reduction state is started and reset when the time reduction state ends. In the first variation pattern setting process (step S302), when the hour / hour flag is set, the CPU 56 selects a variation pattern having a shorter variation time than when the hour / hour flag is not set.

  Then, the value of the first special symbol process flag is updated to a value corresponding to the first special symbol stop symbol setting process (step S301) (step S55).

  45 and 46 are flowcharts showing the first special symbol stop symbol setting process (step S301) in the first special symbol process. In the first special symbol stop symbol setting process, the CPU 56 of the game control microcomputer 560 first checks whether or not the second jackpot flag is set (step S60). If the second big hit flag is set, the forcible deviation flag is set (step S66), and then the process proceeds to step S64. Note that the second big hit flag is set when it is determined to be a big hit in the second special symbol process. That is, the fact that the second jackpot flag is set means that it has been determined that the display result of the second special symbol display 8b is a jackpot symbol. Therefore, the fact that the second jackpot flag is set means that the second special symbol display 8b changes the second special symbol based on the fact that the display result of the second special symbol display 8b is determined to be the jackpot symbol. Is executed, or the jackpot game is being executed based on the determination that the display result of the second special symbol display 8b is the jackpot symbol.

  If the second jackpot flag is not set, the jackpot determination random number (random R) is read from the random number buffer area (storage area) (step S61), and the jackpot determination module is executed (step S62). The jackpot determination module is a program that compares a jackpot determination value (see FIG. 26) determined in advance with a jackpot determination random number and executes a process of determining a jackpot if they match. If it is determined to be a big hit (step S63), the process proceeds to step S81. In step S63, the CPU 56 determines that the jackpot is determined to be a big hit when the jackpot determination random value (random R value) matches the jackpot determination value shown in FIG. In the normal state or the short time state, the big hit determination random number value is compared with the numerical value described in FIG. 26A, and in the probabilistic state, the big hit determination random number value and the numerical value described in FIG. And compare. In addition, determining whether or not to make a big hit means to decide whether or not to shift to the big hit gaming state, but in the first special symbol display 8a and the first variable display portion 9a, the stop symbol is a big hit. It also means determining whether or not to use a symbol.

  If it is decided not to win, the CPU 56 reads out the design determining random number from the random number buffer area (step S64), and the first special design out of the first special design based on the out of design determining random number (in this example, even number) The symbol is determined (step S65). Then, control goes to a step S84.

  In step S81, the CPU 56 sets a first big hit flag. Then, the jackpot symbol determining random number is read from the random number buffer area (step S82), and the first special symbol jackpot symbol (in this example, odd symbol) is determined based on the jackpot symbol determining random number (step S83). Then, when it is determined that the effect control board 80 has a probability variation jackpot (when the value of the random number for determining the jackpot symbol is a value indicating the probability variation symbol), the effect control command (probability variation jackpot designation command) for specifying the probability variation jackpot ) Is sent and a non-probable variation jackpot is determined (when the random value for determining the jackpot symbol is a value indicating a non-probable variation symbol), a normal jackpot-designated effect control command (normal jackpot designation command) If it is not determined to be a big hit (if it is determined to be a missing symbol; Y in step S60 or N in step S63), an effect control command for specifying a loss is transmitted. After controlling (step S84), the value corresponding to the first variation pattern setting process (step S302) is set to the value of the first special symbol process flag. Update (step S85).

  FIG. 47 is a flowchart showing the first variation pattern setting process (step S302) in the first special symbol process. In the first variation pattern setting process, the CPU 56 reads the variation pattern determination random number from the random number buffer area (step S101). And when the 1st big hit flag which shows that the stop symbol of the 1st special symbol started from now on is made into a big hit design, and the time-short flag is set (Y of Steps S102 and S103), A variation pattern is selected from the short-time big hit variation pattern table (see FIG. 49A) (step S104). In other words, a short-time jackpot variation pattern table is selected, and further, a variation pattern corresponding to the random number for variation pattern determination is selected from the short-time jackpot variation pattern table. Then, the process proceeds to step S114.

  If the hour / short flag is not set (N in step S113), a variation pattern is selected from the normal big hit variation pattern table (see FIG. 49B) (step S105). That is, the normal big hit variation pattern table is selected, and further, a fluctuation pattern corresponding to the random number for determining the fluctuation pattern is selected from the normal big hit variation pattern table. Then, the process proceeds to step S114.

  When the first big hit flag is not set, the CPU 56 checks whether or not the forced off flag is set (step S106). If the forcible deviation flag is set, the process proceeds to step S110.

  When the forcible deviation flag is not set (N in step S106), and when the time reduction flag is set (Y in step S107), it indicates that the variation pattern of the shortening variation is selected instead of the normal variation. It is confirmed whether or not the shortening variation flag is set (step S108a). The shortening variation flag is set when the value of the total pending storage number counter (total number of pending storage) is 4 or more (see steps S416 and S423). If the shortening variation flag is not set (N in Step S108a), a variation pattern is selected from the time variation shift variation pattern table (see FIG. 49C) (Step S108b). That is, the shift variation pattern table is selected when the time is short, and the variation pattern corresponding to the random number for determining the variation pattern is selected from the shift variation pattern table when the time is short. Then, the process proceeds to step S114. On the other hand, when the shortening variation flag is set (Y in step S108a), the variation pattern is selected from the time variation reduction variation pattern table (see FIG. 50G) (step S108c). That is, the shift shortening variation pattern table is selected at the time reduction, and further, the variation pattern corresponding to the random number for determining the variation pattern is selected from the shift shortening variation pattern table at the time reduction. Then, the process proceeds to step S114.

  Even when the time reduction flag is not set (N in Step S107), it is confirmed whether or not the shortening variation flag is set (Step S109a). If the shortening variation flag is not set (N in step S109a), a variation pattern is selected from the normal deviation variation pattern table (see FIG. 49D) (step S109b). That is, the deviation pattern table is selected in the normal time, and further, the fluctuation pattern corresponding to the random number for determining the fluctuation pattern is selected from the deviation pattern table in the normal time. Then, the process proceeds to step S114. On the other hand, when the shortening variation flag is set (Y in step S109a), a variation pattern is selected from the normal time deviation shortening variation pattern table (see FIG. 50H) (step S109c). That is, the deviation shortening variation pattern table is selected in the normal time, and further, the variation pattern corresponding to the random number for determining the variation pattern is selected from the deviation shortening variation pattern table in the normal time. Then, the process proceeds to step S114.

  In step S110, the CPU 56 resets the forced off flag. If the time reduction flag is set (Y in step S111), it is confirmed whether or not the shortening variation flag is set (step S112a). When the shortening variation flag is not set (N in Step S112a), a variation pattern is selected from the time-lapse forced deviation variation pattern table (see FIG. 49E) (Step S112b). In other words, the time / temporal forced deviation variation pattern table is selected, and further, a variation pattern corresponding to the random number for variation pattern determination is selected from the time / temporal forced deviation variation pattern table. Then, the process proceeds to step S114. On the other hand, when the shortening variation flag is set (Y in step S112a), the variation pattern is selected from the time-lapse forced deviation shortening variation pattern table (see FIG. 50I) (step S112c). In other words, the time / temporal forced deviation shortening variation pattern table is selected, and further, a variation pattern corresponding to the random number for variation pattern determination is selected from the time / temporal forced deviation shortening variation pattern table. Then, the process proceeds to step S114.

  Even when the time reduction flag is not set (N in Step S111), it is confirmed whether or not the shortening variation flag is set (Step S113a). If the shortening variation flag is not set (N in step S113a), a variation pattern is selected from the normal forced deviation variation pattern table (see FIG. 49F) (step S113b). That is, the normal-time forced deviation fluctuation pattern table is selected, and further, a fluctuation pattern according to the fluctuation pattern determining random number is selected from the normal-time forced deviation fluctuation pattern table. Then, the process proceeds to step S114. On the other hand, when the shortening variation flag is set (Y in step S113a), the variation pattern is selected from the normal forced off-shortening variation pattern table (see FIG. 50J) (step S113c). That is, the normal-time forced deviation shortening variation pattern table is selected, and further, a variation pattern corresponding to the random number for variation pattern determination is selected from the normal-time forced deviation shortening variation pattern table. Then, the process proceeds to step S114.

  Note that the same deviation variation pattern table may be selected when the forced deviation flag is set and when the forced deviation flag is not set (that is, when it is determined No in step S63). Good. That is, when the determination in step S102 is made without executing the determination in step S106, the shift pattern table for time reduction and the shift reduction pattern table for shift reduction in time are set according to the setting status of the time reduction flag and the reduction fluctuation flag. The normal time deviation variation pattern table or the normal time deviation reduction variation pattern table may be selected. Since the process for selecting the variation pattern table can be executed by a common routine, it is not necessary to create a process for forced deviation in the control program, and the program capacity can be reduced.

  In step S114, the CPU 56 performs control to transmit a variation pattern command corresponding to the determined variation pattern to the effect control microcomputer 100. When transmitting the effect control command to the effect control microcomputer 100, specifically, the CPU 56 sets the address of a command transmission table (preliminarily set for each command in the ROM) corresponding to the effect control command. Set to pointer. Then, the address of the command transmission table corresponding to the effect control command is set in the pointer, and the effect control command is transmitted in the decorative symbol command control process (step S28). Similar processing is executed in other command transmission processing. Thereafter, the value of the first special symbol process flag is updated to a value corresponding to the first gaming state transition control process (step S303) (step S115).

  Although not shown in FIGS. 47 and 48, when the probability variation flag is set, the CPU 56 selects the variation pattern table for the time reduction as in the case of the time reduction flag being set, A variation pattern is selected using the variation pattern table. This is because in this embodiment, the same variation pattern (variation time) is used for the variation pattern in the probability variation state and the variation pattern in the time-short state.

  49 and 50 are explanatory diagrams illustrating an example of a variation pattern table used in the first variation pattern setting process. The variation pattern table is stored in the ROM 54. In the variation pattern tables shown in FIGS. 49 and 50, the number of determination values is the number of determination values for selecting a corresponding variation pattern. The larger the number of determination values, the easier the corresponding variation pattern is selected. Note that the variation pattern table used in the second variation pattern setting process in the second special symbol process is also configured similarly to the configuration illustrated in FIGS. 49 and 50. However, second variation patterns # 1 to # 12 are set in the variation pattern table. That is, in the example shown in FIGS. 49 and 50, the “first variation pattern” is replaced with the “second variation pattern”. When each of the first variation patterns # 1 to # 12 and each of the second variation patterns # 1 to # 12 are the same variation pattern, the variation pattern table used in the first variation pattern setting process. And the variation pattern table used in the second variation pattern setting process may be made common.

  As shown in FIGS. 49 and 50, the first fluctuation pattern # 6 and the first fluctuation pattern # 12 are the time-shortage forced-offset fluctuation pattern table, which is used when the forced-off flag is set, It is set only in the forced deviation shortening fluctuation pattern table, the normal forced deviation deviation pattern table, and the normal forced deviation deviation fluctuation pattern table. That is, in this embodiment, the first variation pattern # 6 and the first variation pattern # 12 can be selected only when the forced flag is set.

  The first fluctuation pattern # 6 and the first fluctuation pattern # 12 are included in the hourly and forced forced deviation pattern table, the hourly and forced forced deviation and fluctuation pattern table, the normal and forced forced deviation and fluctuation pattern table, and the normal and forced forced deviation and fluctuation pattern table. Is higher than the probability that another variation pattern is selected.

  Further, in this embodiment, the fluctuation pattern table (FIGS. 49E, 49F, and FIG. 49) used for forced deviation (unconditionally, that is, the lottery result by lottery is not performed and the lottery result is lost). 50 (I), (J)) and non-forced deviation (the result of the big hit determination by lottery that the decision was made as a deviation) (FIGS. 49C, 49D, 50G) ) And (H)) are provided separately, but they may be shared. That is, a variation pattern table that is commonly used at the time of disconnection may be provided regardless of whether it is out of force or out of force. In this case, for example, when the first variation pattern # 6 or the first variation pattern # 12 is selected at the time of non-forced deviation, the CPU 56 changes to another variation pattern. Furthermore, in this embodiment, the variation pattern is selected using the variation pattern table. However, the variation pattern used at the time of forced deviation may be fixed. In that case, for example, data indicating the first variation pattern # 6 and data indicating the first variation pattern # 12 are stored in the ROM 54, and data indicating the first variation pattern # 12 is read from the ROM 54 in steps S112b and 112c. In S113b and 113c, data indicating the first variation pattern # 6 is read out.

  51 and 52 are flowcharts showing the first gaming state transition control process. In the first game state transition control process, the CPU 56 checks whether or not the first big hit flag is set (step S171). If it is set, the process proceeds to step S191.

  When the first big hit flag is not set, that is, when it is determined to be off, the CPU 56 checks whether or not the status flag is set (step S172). If the state flag is set, it means that the current gaming state is a certain change state or a short time state. If the state flag is set, the CPU 56 decrements the value of the state number counter by -1 (step S173). The number of states indicates the number of fluctuations of the first special symbol and the second special symbol that can continue the probability variation state or the short time state when the state flag is set. The state number counter is a counter for counting the number of states. For example, when the condition for terminating the probability variation state is satisfied by the punctured lottery in step S46, if the value of the state number counter is not 0, the first special symbol and the second special symbol are the number of times indicated by the value of the state number counter. The time-saving state continues until the change is executed (except when a non-probable big hit occurs). In this embodiment, for example, 100 is set as the number of states at the start of the probability variation state (see step 192).

  Then, the CPU 56 checks whether or not the value of the state number counter is 0 (step S174). The value of the state number counter being 0 means that the number of variable display of the first special symbol and the second special symbol has reached a predetermined number of times (for example, 100 times) after the gaming state is controlled to the probability changing state. means. If the value of the state number counter is 0, the CPU 56 resets the state flag (step S175). If the value of the state number counter is not 0, the process proceeds to step S182.

  Next, the CPU 56 checks whether or not the time reduction flag is set (step S176). The fact that the time reduction flag is set means that the predetermined transition condition is satisfied before the number of variable display of the first special symbol and the second special symbol reaches 100 after the gaming state is controlled to the probabilistic state. (The decision to end the probability variation state was made in the determination of the probability variation state end, or the number of variable display of the first special symbol and the second special symbol has reached the certain variation number after being controlled to the probability variation state. ) Means that the gaming state has been shifted from the probability changing state to the time-saving state. And, the value of the state number counter is 0, which means that the number of variable display of the first special symbol and the second special symbol has reached a predetermined number (for example, 100 times) after the gaming state is controlled to the probability changing state. Means that. In this embodiment, if the number of times of variable display reaches a predetermined number, the time reduction state is terminated. Therefore, if the time reduction flag is set, the CPU 56 resets the time reduction flag and shifts the gaming state to the normal state. (Step S177). If the time reduction flag is not set, the process proceeds to step S182.

  In step S178, the CPU 56 checks whether or not the time reduction flag is set. When the time reduction flag is set, it means that the time reduction state has been continued due to a big hit with a non-probability variable when the probability change state is being controlled, and the time reduction state has continued. To do. If the time reduction flag is not set, the process proceeds to step S182. When the time reduction flag is set, the CPU 56 decrements the value of the variation counter by −1 (step S179). At this time, the remaining number of fluctuations that can be maintained in the time-short state is set in the fluctuation number counter.

  Next, the CPU 56 checks whether or not the value of the variation counter is 0 (step S180). The value of the variation counter is 0, which means that the number of variable display of the first special symbol and the second special symbol reaches a predetermined number (for example, 50 times) after the game state is shifted from the probability variation state to the short-time state. Means that Therefore, if the value of the variation counter is 0, the CPU 56 resets the time reduction flag and shifts the gaming state from the time reduction state to the normal state (step S181). Then, the process proceeds to step S182.

  In step S182, the CPU 56 checks whether or not the probability variation flag is set. If the probability variation flag is not set, the process proceeds to step S188. If the probability variation flag is set, the value of the variation counter is decremented by -1 (step S183), and it is confirmed whether or not the value of the variation counter is 0 (step S184).

  If the probability variation flag is set and the value of the variation counter is 0, the number of variable display of the first special symbol and the second special symbol continues to be in the probability variation state after the gaming state is controlled to the probability variation state. Means that the number of possible variations has been reached. Note that the probability change count is the number of times (when the variable display is possible) indicating how many times the first special symbol and the second special symbol are changed when the gaming state is in the probability change state. ), That is, the number of fluctuations of the first special symbol and the second special symbol that can be executed after shifting to the probability variation state. In this embodiment, the probability variation number is determined by lottery from a predetermined number of times (for example, 50 to 150 times).

  When the value of the variation counter becomes 0, the CPU 56 resets the probability variation flag and ends the probability variation state (step S185). Then, it is confirmed whether or not the status flag is set (step S186). The fact that the status flag is set means that the number of variable displays of the first special symbol and the second special symbol has not reached a predetermined number (for example, 100 times) since the transition to the probability changing state. On the contrary, the fact that the state flag is not set means that the number of variable display times of the first special symbol and the second special symbol has reached a predetermined number (for example, 100 times) or more after shifting to the probability changing state. means. If the status flag is set, the CPU 56 sets the time reduction flag and starts the time reduction state (step S187). Then, control goes to a step S188.

  In step S188, the CPU 56 starts changing the first special symbol. For example, a start flag referred to in the special symbol display control process in step S32 is set. Further, a value corresponding to the variation time of the variation pattern is set in the first variation time timer formed in the RAM 55 (step S189). Then, the value of the first special symbol process flag is updated to a value corresponding to the first special symbol changing process (step S304) (step S189).

  In step S191, the CPU 56 determines whether or not the stop symbol determined in step S83 is a probability variation symbol (for example, “3” “7”). That is, it is determined whether or not the probability variation big hit. In this embodiment, whether or not to make a probable big hit is determined by the stop symbol determined in step S83. For example, a random number is generated and the generated random number is compared with the determination value. It may be determined whether or not to make a probable big hit.

  If it is not a probable big hit, control goes to step S198. In the case of the probable big hit, the CPU 56 sets a state flag (step S192), and sets the number of states in the state number counter as 100 (step S193). If the probability variation flag is not set, the probability variation flag is set (step S194), and if the time reduction flag is set, the time reduction flag is reset (step S195). Note that the probability variation flag and the time reduction flag are formed in the RAM 55.

  In addition, the CPU 56 executes a process of selecting the number of times of change by lottery from a predetermined range (for example, a range from 50 to 150 times) (step S196). In step S196, the number-of-times determining random number (random 9) is read from the random number buffer area, and the number of times corresponding to the read number-of-times determining random number value is determined as the probability variation number. Then, the game control microcomputer 560 sets the probability variation number in the variation counter (step S197). In addition, according to the lottery of the probability variation number as described above, there is a possibility that the ratio of selecting 150 times as the probability variation number (the most frequent variation variation number) may be reduced, but the number of times corresponding to the probability variation number of 150 times is determined in advance. By setting a large number of random numbers for use, it is possible to increase the rate at which 150 is selected as the probability variation number. Then, control goes to a step S188.

  In step S198, the CPU 56 checks whether the status flag is set. If the state flag is set, the state flag is reset (step S199), and the value of the state number counter is cleared (step S200).

  In this embodiment, when the probability change big hit is determined, the probability change flag is set when the variable symbol special display is started and the gaming state shifts to the probability change state. A flag may be set to shift to a certain probability change state. In the case of such control, for example, the processing of steps S191 to S207 may be executed in the first big hit end processing of step S309.

  Next, the CPU 56 checks whether or not the probability variation flag is set (step S201). If the probability variation flag is not set, the process proceeds to step S205. If the probability variation flag is set, the probability variation flag is reset (step S202), and the time reduction flag is set (step S203). Thereby, the gaming state is shifted from the probability changing state to the time saving state. Then, the CPU 56 sets the number of time reductions in the fluctuation number counter (step S204). The number of time reductions is the number of times (when the variable display is possible) indicating how many times the first special symbol and the second special symbol are changed when the gaming state is in the time reduction state. ), That is, the number of fluctuations of the first special symbol and the second special symbol that can be continued after the transition to the time-short state. In this embodiment, for example, 50 times are set as the number of time reductions. Thereafter, the process proceeds to step S188.

  In step S205, the CPU 56 checks whether or not the time reduction flag is set. If the hour / hour flag is set, the CPU 56 resets the hour / hour flag (step S206). Therefore, the gaming state is shifted from the short time state to the normal state. Further, the value of the variation counter is cleared (step S207). Then, control goes to a step S188.

  When it is determined that the non-probability big hit is made in the probability variation state by the processing as described above, the gaming state is controlled to the time reduction state, and 50 variable displays can be executed in the time reduction state (steps S201 to S204). ). When it is determined that it will be a non-probable big hit in the short time state, the gaming state is controlled to the normal state (steps S205 to S207).

  Further, when the value of the variation counter becomes 0 before the value of the state counter reaches 0 in the probability change state, the gaming state is controlled to the time-short state (steps S182 to S187). When the value of the variation counter becomes 0 after the value of the state counter becomes 0 in the probability variation state, the gaming state is controlled to the normal state (steps S182 to S186). After the value of the state number counter becomes 0 in the short time state, when the value of the change number counter becomes 0, the gaming state is shifted to the normal state (steps S178 to S181).

  Next, the flag set time and reset time in the first gaming state transition control process will be described with reference to FIGS. 53 and 54. FIG.

  In FIG. 53, when the state is controlled to the probability variation state, the state flag is set in step S192, the state number counter is set to 100 times in step S193, and the probability variation flag is set in step S194. An example is shown in which 150 times as a probability variation number is determined by lottery in step S196, and 150 times is set in the variation number counter in step S197.

  When controlled to the certain change state, the CPU 56 changes the first special symbol and the second special symbol by the state number counter at the start of the change of the first special symbol and the second special symbol by setting the state flag. The number of times is counted (steps S172 and S173). Further, when the probability variation flag is set, at the start of the variation of the first special symbol and the second special symbol, the variation number counter counts the number of variations of the first special symbol and the second special symbol (steps S182 and S183). ). In FIG. 53, the numbers in parentheses indicate the count number of the state number counter, and the numbers outside the parentheses indicate the count number of the variation number counter. The state flag is reset when the first special symbol and the second special symbol change count reaches 100 times after being controlled to the probability change state, that is, when the 100th change starts after the probability change flag is set. (Steps S174 and S175). The CPU 56 checks whether or not the time reduction flag is set when the state flag is reset (step S176). In the example shown in FIG. 53, since the hour / hour flag is not set, the hour / hour flag is not reset. That is, game state transition control is not performed. When the state flag is reset, the CPU 56 stops counting the number of fluctuations of the first special symbol and the second special symbol by the state number counter (see step S172).

  Thereafter, the CPU 56 counts the number of fluctuations of the first special symbol and the second special symbol each time the fluctuation of the first special symbol and the second special symbol is started by the fluctuation number counter (steps S182 and S183). . The probability variation flag is reset when the number of fluctuations of the first special symbol and the second special symbol reaches 150 times after being controlled to the probability variation state, that is, when the 150th variation starts after the probability variation flag is set. (Steps S184 and S185). The CPU 56 checks whether the status flag is set when the probability variation flag is reset (step S186). In the example shown in FIG. 53, since the state flag has already been reset, the time reduction flag is not set. That is, since the state flag is not set, the CPU 56 recognizes that the first special symbol and the second special symbol have been changed 100 times or more after being controlled to the probable variation state, and controls to the short-time state. It is determined that there is no need to do so, and control for shifting to the time-saving state is not performed. As a result, the gaming state is shifted from the probability changing state to the normal state.

  In FIG. 54, when the state is controlled to the probability variation state, the state flag is set in step S192, the state number counter is set to 100 as the state number in step S193, and the probability variation flag is set in step S194. An example is shown in which 50 is determined as a probability variation number by lottery in step S196, and 50 times is set in the variation counter in step S197.

  Also in this case, as in the example shown in FIG. 53, when the state flag is set, the CPU 56 counts the number of fluctuations of the first special symbol and the second special symbol by the state number counter (steps S172 and S173). In addition, when the probability variation flag is set, the variation counter counts the number of variations of the first special symbol and the second special symbol (steps S182 and S183). After that, when the probability variation state is controlled, the first special symbol and the second special symbol change when the number of changes reaches 50 times, that is, when the 50th change starts after the probability change flag is set. When the value of the number counter becomes 0, the probability variation flag is reset (steps S184 and S185). The CPU 56 checks whether the status flag is set when the probability variation flag is reset (step S186). In the example shown in FIG. 54, since the status flag is still set, the time reduction flag is set (step S187). In other words, the game control microcomputer 560 recognizes that the variation of the first special symbol and the second special symbol is less than 100 times after the state flag is set, so that the variation in the first special symbol and the second special symbol is less than 100 times. It is determined that it is necessary to control to the state, and control to shift to the short time state is performed. As a result, the gaming state is shifted from the probability changing state to the time saving state.

  Thereafter, the CPU 56 counts the first special symbol and the second special symbol in the state number counter every time the first special symbol and the second special symbol start to change based on the state flag being set. The number of fluctuations is counted (steps S172 and S173). The state flag is reset when the number of fluctuations of the first special symbol and the second special symbol reaches 100 times after being controlled to the probability variation state, that is, when the variation of the 100th time is started after the probability variation flag is set. (Steps S174 and S175). The CPU 56 checks whether or not the time reduction flag is set when the state flag is reset (step S176). In the example shown in FIG. 54, since the time reduction flag is set, the time reduction flag is reset (step S177). As a result, the gaming state is shifted from the short-time state to the normal gaming state.

  When the gaming state is controlled to the probability changing state, it is determined that the probability changing state is ended in the determination of the probability changing state end (step S46), and the probability changing state is shifted to the time-saving state (steps S51 and S53). ) Also applies to the example shown in FIG.

  For example, when controlled to the probability variation state, 100 times is set as the number of states in the state number counter in step S193, 80 times is determined as the probability variation number in step S196 by lottery, and 80 times in the variation number counter in step S197. Suppose the number of times is set. In that case, if it is determined at the start of the 50th variation after the control to the probability variation state that the probability variation state is to be ended in the determination of the end of the probability variation state (step S46), the probability variation flag is reset and the time reduction flag Is set (steps S51 and S53), and the gaming state is shifted from the probability changing state to the time saving state. Then, the value of the variation counter is cleared (step S54). Even in this case, each time the first special symbol and the second special symbol are changed thereafter, the number of changes of the first special symbol and the second special symbol is counted by the state number counter (steps S172 and S173). ). Then, the state flag is reset when the number of changes of the first special symbol and the second special symbol reaches 100 after being controlled to the certain change state (steps S174 and S175). Then, the time reduction flag is also reset (steps S176 and S177). As a result, the gaming state is shifted from the short time state to the normal state.

  FIG. 55 is a flowchart showing the process of the first special symbol changing process (step S304) in the first special symbol process. In the first special symbol variation processing, the CPU 56 subtracts 1 from the first variation time timer (step S121), and when the first variation time timer times out (step S122), the first big hit flag is set. (Y in step S123), the value of the first special symbol process flag is updated to a value corresponding to the first big hit symbol stop process (step S306) (steps S123, S124), and the first big hit symbol display time timer is set. (Step S125). If the first big hit flag is not set (N in step S123), the value of the first special symbol process flag is updated to a value corresponding to the first off symbol stop process (step S305) (step S126). If the first variable time timer has not timed out, the process is terminated as it is.

  FIG. 56 is a flowchart showing the first big hit symbol stop process (step S306) in the first special symbol process. In the first big hit symbol stop process, if the CPU 56 has already finished the variation of the first special symbol (Y in Step S130), the CPU 56 proceeds to Step S133 (Step S130). If not finished yet (N in Step S130), the variation of the first special symbol is finished (Step S131). For example, an end flag referred to in the special symbol display control process in step S33 is set. Moreover, control which transmits the 1st decoration symbol stop designation | designated command with respect to the production control board 80 is performed (step S132).

  Then, the value of the first jackpot symbol display time timer is decremented by -1 (step S133). If the value of the first jackpot symbol display time timer becomes 0 (step S134), the value of the first special symbol process flag is set. Is updated to a value corresponding to the pre-opening process for the first big winning opening (step S307) (step S135).

  The time when the value of the first special symbol process flag is a value corresponding to the first big hit symbol stop process by the first big hit symbol stop processing as described above is a predetermined time corresponding to the value set in step S125 Continue (for example, 0.6 seconds). Also, when the second special symbol process is executed, the time during which the value of the second special symbol process flag is a value corresponding to the second big hit symbol stop process is a predetermined time (for example, 0.6 Seconds) to continue. It is not essential to provide such a predetermined time.

  FIG. 57 is a flowchart showing the first off symbol stop process (step S305) in the first special symbol process. In the first lost symbol stop process, the CPU 56 ends the variation of the first special symbol (step S141). For example, an end flag referred to in the special symbol display control process in step S33 is set. Moreover, control which transmits the 1st decoration symbol stop designation | designated command with respect to the production control board 80 is performed (step S142). Thereafter, the value of the first special symbol process flag is updated to a value corresponding to the first special symbol normal process (step S300) (step S143).

  FIG. 58 is a timing chart showing a control example of the game control microcomputer 560 (specifically, the CPU 56) as described above. If the CPU 56 decides whether to win or not (ie, lottery) based on the winning of the game ball at the second starting port 14, if it is decided to win, the second big hit A flag is set (see step S81 in FIG. 46. FIG. 46 shows the process in the first special symbol process, but the same process is also executed in the second special symbol process).

  At each of the timings A to D shown in FIG. 58 (specifically, when the fluctuation is started), the CPU 56 performs a jackpot determination random number in the first special symbol stop symbol setting process in the first special symbol process process. Whether or not to win a big win is determined by a lottery process based on the above (see steps S61, S62, and S63), but the lottery process is not executed when the second big hit flag is set (steps S61, S62, and S63). Skip the process.) In the example shown in FIG. 58, in the lottery executed at the timing of B and C (specifically, when the change is started), the lottery result is unconditionally separated. Unconditionally making a lottery result off is a forcible off. In the lottery executed at the timings A and D (specifically, when the change is started), the lottery result may be a big hit because the second big hit flag is not set.

  Then, when the variation time of the second decorative symbol and the second special symbol ends and the jackpot symbol is derived and displayed, the variation of the first decorative symbol and the first special symbol stops and the stopped symbol is derived and displayed. It is prevented. This is because when the big hit symbol is derived and displayed as the stop symbol of the second decorative symbol and the second special symbol, the value of the second special symbol process flag is a value corresponding to the second big hit symbol stop process (step S124 in FIG. 55). 55 is a process in the first special symbol process, but the same process is also executed in the second special symbol process.) In this case, the process is performed by the process of step S313 shown in FIG. This is because the processing of S300 to S309 (particularly, the processing of step S304) is not executed and the processing is interrupted. That is, when the process of step S304 is interrupted, the processes of steps S121 and S122 are not executed, and as a result, the processes of steps S131, S132, S141, and S142 are not executed. Therefore, the fluctuation of the first special symbol does not stop. Further, the big hit symbol is not derived and displayed as the stop symbol of the first special symbol.

  The first decorative design is controlled by the effect control microcomputer 100. Then, by the process of step S315, an interruption command is transmitted to the production control microcomputer 100, and when the production control CPU 101 in the production control microcomputer 100 receives the interruption command, the first decorative design of the variable display device 9 is displayed. The variation of the decorative pattern in the display area 9b is interrupted. Further, the effect control CPU 101 notifies that effect when the variation of the decorative symbol is interrupted.

  In addition, the effect control CPU 101 may perform control so that, for example, the first decorative symbol is swayed and displayed in a swaying manner when the variation of the decorative symbol is interrupted. It should be noted that the effect control CPU 101 may perform control so as to continue the variation of the first decorative symbol in the first decorative symbol display area 9b of the variable display device 9 and stop only other displays (characters, etc.).

  FIG. 59 is an explanatory diagram showing an example of the variation pattern (also referred to as special variation) of the first decorative patterns of the first variation patterns # 6 and # 12. In the first variation patterns # 6 and # 12, during the variation period (variation time), as shown in FIG. 59A, the first decorative symbols are variably displayed in five periods (first period to fifth period). . A stop period is provided between each period. During the stop period, the first decorative symbol is displayed temporarily stopped. “Temporary stop display” refers to temporarily stopping and displaying a symbol that is not the final stop symbol in the middle of fluctuation, unlike “derived display” in which the final stop symbol (deterministic symbol) is stopped and displayed. In this embodiment, the variation mode of the first decorative pattern of the first variation patterns # 6 and # 12 is the variation mode illustrated in FIG. 59, but the variation mode illustrated in FIG. It is good also as a variation mode used when the variation pattern different from variation pattern # 6 and # 12 is designated.

  In each period, different notice effects are executed on the variable display device 9 (for example, the background symbol display area 9a). For example, different characters are displayed on the variable display device 9 (stationary display or exercise display) in each period.

  As shown in FIG. 59 (B), if variable display is interrupted while variable display of the first decorative patterns of the first variation patterns # 6 and # 12 is being performed, after variable display is resumed. In each of the periods, the notice effect is not executed.

  Note that FIG. 59B shows an example in which the notice effect is stopped when the variable display is resumed (the notice effect is not executed in the subsequent period), but the fluctuation stop period between the subsequent periods is shown. By eliminating it, it may be shown to the player that the notice effect has been lost.

  Next, the normal symbol process (step S27) executed by the game control microcomputer 560 will be described. FIG. 60 is a flowchart showing an example of the normal symbol process. In the normal symbol process, when the CPU 56 of the game control microcomputer 560 detects that the game ball has passed through the gate 32 and the gate switch 32a is turned on (step S511), the gate switch passage process (step S512). ). Then, the CPU 56 executes any one of the processes shown in steps S500 to S504 according to the value of the normal symbol process flag.

  Gate switch passage processing (step S512): The CPU 56 checks whether or not the count value (gate passage storage number) of the gate passage storage counter has reached the maximum value ("4" in this example). If the maximum value has not been reached, the count value of the gate passage storage counter is incremented by one. Note that the LED of the normal symbol hold storage display 19 is turned on according to the value of the gate passage storage counter. Then, the CPU 56 performs a process of extracting the value of the random number for determination per ordinary symbol (random 5) and storing it in the storage area (ordinary symbol determination buffer) corresponding to the value of the number of passing gates.

  Normal symbol change waiting process (step S500): The CPU 56 can start normal symbol change (for example, when the value of the normal symbol process flag is a value indicating step S500, When the symbol display 10 does not display the variation of the normal symbol, and the variable symbol device 15 is not in the open / close operation based on the symbol being derived and displayed on the normal symbol display 10), the gate passing memory is stored. Check the value of the number. Specifically, the count value of the gate passage storage counter is confirmed. If the gate passing memory number is not 0, the normal symbol per random number stored in the storage area corresponding to the gate passing memory number = 1 is read and stored in the random number buffer area of the RAM 55, and the gate passing memory number Is decreased by 1 (the count value of the gate passage storage counter is decreased by 1), and the contents of each storage area are shifted. That is, the random number value for hit determination stored in the storage area corresponding to the gate passing memory number = n (n = 2, 3, 4) is stored in the storage area corresponding to the gate passing memory number = n−1. . Therefore, the order in which the random numbers for determination per ordinary symbol stored in the respective storage areas corresponding to the respective numbers of gate passing memories is extracted is always the order of the number of gate passing memories = 1, 2, 3, 4. It is supposed to match. Then, the normal symbol process flag is updated to a value indicating the normal symbol determination process.

  Normal symbol determination processing (step S501): The CPU 56 reads the random symbol for normal symbol determination from the random number storage buffer, and determines whether to win or not. Specifically, it is determined whether or not the value of the random number for normal symbol determination matches the hit determination value, and if there is a matching hit determination value, it is determined to be a hit. The hit determination value is, for example, a state that hits with high probability as any of 3 to 12 in the probability variation state and the short time state (high base state), and is 3 or 7 in the normal gaming state (low base state) It is assumed that it is a hit state with a relatively low probability. Then, the CPU 56 sets the normal symbol change time data in the normal symbol process timer, and starts the normal symbol change time timer. For example, a value corresponding to 5.1 seconds is set in the normal symbol variation time timer in the probability variation state and the short time state. In the normal gaming state, a value corresponding to 29.2 seconds is set in the normal symbol variation time timer. Then, the normal symbol process flag is updated to a value indicating the normal symbol variation process.

  Normal symbol variation process (step S502): The CPU 56 checks whether or not the normal symbol variation time timer has timed out.

  Normal symbol stop process (step S503): The CPU 56 stops the variation of the normal symbol. When it is decided to win, the normal symbol process flag is updated to a value indicating the start winning opening / closing process. When it is determined to be off, the normal symbol process flag is updated to a value indicating the normal symbol variation waiting process.

  Start winning opening / closing process (step S504): If the gaming state is the normal gaming state (low base state), the CPU 56 performs control so that, for example, the variable winning device 15 is opened only once for 0.2 seconds. If the gaming state is a certain change state or a short time state (high base state), for example, the variable winning device 15 is controlled to be opened again for 2 seconds after a closing period of 3 seconds after opening the variable winning device 15 for 2 seconds. Then, the normal symbol process flag is updated to a value indicating the normal symbol variation waiting process.

  Next, the hold storage process (step S29) executed by the game control microcomputer 560 will be described. 61 and 62 are flowcharts showing an example of the hold storage process. In the pending storage process, the CPU 56 first checks whether or not the gaming state is a high base state (step S401). Whether or not the state is the high base state can be determined, for example, by confirming the setting state of the state flag or the setting state of the probability variation flag and the time reduction flag. In this embodiment, as will be described later, in the low base state, the number of stored background symbols is displayed based on only the first start winning (ie, the number of stored background symbols based on the second starting winning). In the high base state, the stored number of reserved symbols of the background symbols based on the first start winning and the second starting winning is displayed (see FIG. 76).

  When the gaming state is not the high base state, that is, the low base state (N in step S401), it is determined whether or not the value of the first reserved memory number counter (first reserved memory number) is the upper limit value 4. (Step S402). When the value of the first reserved memory number counter is not 4, the process proceeds to step S404. When the value of the first reserved memory number counter is 4, the process proceeds to step S417. On the other hand, when it is in the high base state (Y in Step S401), it is determined whether or not the value of the total pending storage number counter (the total pending storage number) is the upper limit value 8 (Step S403). When the value of the total pending storage number counter is not 8, the process proceeds to step S404. When the value of the total pending storage number counter is 8, the process proceeds to step S417.

  Next, the CPU 56 determines whether the start prize is a prize at the first start prize port 13 or a prize at the second start prize slot 14 (steps S404 and S409). Such a determination of the type of the start winning prize can be made by confirming whether the winning is detected by the first start winning opening switch 13a or the winning is detected by the second start winning opening switch 14a.

  When it is a winning to the first start winning opening 13 (Y in Step S404), it is determined whether or not the value of the first reserved memory number counter (first reserved memory number) is the upper limit value 4 (Step S404). S405). If the value of the first reserved memory number counter has not reached the upper limit value 4 (N in step S405), the CPU 56 increments the value of the first reserved memory number counter by 1 (step S406), and the first start winning opening 13 And the first reserved memory number has not reached the upper limit value (that is, the first start winning port 13 has had an effective start winning, and the first effective execution condition has been established). Is transmitted to the production control microcomputer 100 (step S407). Then, the process proceeds to step S414. On the other hand, if the first reserved memory number has reached the upper limit value (Y in step S405), the CPU 56 has won a game ball at the first start winning opening 13 and the first reserved memory number has reached the upper limit value. A first invalid start winning command is transmitted to the production control microcomputer 100 indicating that there is an invalid start winning in the first start winning opening 13 and that the first invalid execution condition is satisfied. (Step S408). Then, the process proceeds to step S417.

  When it is a prize to the second start winning opening 14 (Y in Step S409), it is determined whether or not the value of the second reserved memory number counter (second reserved memory number) is the upper limit value 4 (Step S409). S410). If the value of the second reserved memory number counter has not reached the upper limit value 4 (N in Step S410), the CPU 56 increments the value of the second reserved memory number counter by 1 (Step S411), and the second start winning opening 14 The game ball has won a prize and the second reserved memory number has not reached the upper limit value (that is, there has been a valid start prize at the second start prize opening 14 and the second valid execution condition has been established). Is transmitted to the effect control microcomputer 100 (step S412). Then, the process proceeds to step S414. On the other hand, when the second reserved memory number has reached the upper limit value (Y in step S410), the CPU 56 has won a game ball in the second start winning opening 14, and the second reserved memory number has reached the upper limit value. A second invalid start winning command is transmitted to the production control microcomputer 100. The second invalid start winning command indicating that the second start winning opening 14 has been invalid and that the second invalid execution condition has been established. (Step S413). Then, the process proceeds to step S417.

  In step S414, the CPU 56 increments the value of the total pending storage number counter by 1, and determines whether or not the value of the total pending storage number counter is 4 or more (step S415). If the value of the total pending storage number counter is 4 or more, a shortening variation flag is set (step S416). As described above, when the shortening variation flag is set, the variation pattern is selected using the shortening variation pattern table (FIGS. 50G to 50J) including variation patterns # 2 and 8 of “shortening variation”. The When the value of the total pending storage number counter is 4 or more and the shortening variation flag is already set, the flag is set as it is.

  In step S417, the CPU 56 determines whether it is a fluctuation start timing. Further, it is determined whether or not the variation is the variation of the first special symbol at the variation start timing (step S418). For example, when the value of the first special symbol process flag is a value indicating the first special symbol stop symbol setting process, it can be determined that the first special symbol variation start timing, and similarly, the second special symbol process flag is set. When the value of the symbol process flag is a value indicating the second special symbol stop symbol setting process, it can be determined that it is the timing for starting the variation of the second special symbol.

  If it is not the fluctuation start timing (N in step S417), the process is terminated. If it is the change start timing of the first special symbol (Y in step S418), the value of the first reserved memory number counter is decremented by -1 (step S419), and if it is the change start timing of the second special symbol (in step S418). N), the value of the second reserved memory number counter is decremented by -1 (step S420), and the value of the combined pending memory number counter is decremented by 1 (step S421). Then, the CPU 56 determines whether or not the value of the total pending storage number counter is less than 4 (that is, 3 or less) (step S422), and if it is less than 4, the shortening variation flag is reset (step S423). The process is terminated.

  Next, the background symbol variation (variable display) execution timing, the concept of switching points, the display control of the hold storage display, and the like will be described.

  In this embodiment, when the gaming state is in the low base state, the change of the background symbol is started in synchronization with the change of the first decorative symbol (and the first special symbol), and the first decorative symbol (and the first decorative symbol) It ends in synchronization with the change of the special symbol. When the gaming state is in the low base state, the probability that the variable winning ball device 15 is opened is low, and the possibility that the gaming ball will win the second starting winning port 14 is low (almost no winning is made in the second starting winning port 14). Therefore, the start winning at the second start winning opening 14 is not reflected in the fluctuation of the background symbol, and only the starting winning at the first starting winning prize port 13 is reflected in the fluctuation of the background symbol. That is, in the low base state, the background design is not changed based on the start winning to the second start winning opening 14. Further, when the gaming state is the low base state, the number of reserved memories of the background symbol displayed in the memory display area 9d of the variable display device 9 is reflected only in the number of reserved memories of the first special symbol (the number of reserved memories of the background symbol) Is the same value as the number of reserved memories of the first special symbol), and the upper limit value of the number of reserved memories of the background symbol is also the same value (“4”) as the upper limit value of the number of reserved memories of the first special symbol. According to such a configuration, in the low base state, it is only necessary to associate the background symbol variation with the first special symbol variation, and the control burden on the production control microcomputer 100 can be reduced.

  However, the start winning to the second starting winning opening 14 is not completely ignored, and even in the low base state, the starting winning to the second starting winning opening 14 is made so as not to be disadvantaged by the player. The basic jackpot determination (see step S62) is executed. Then, when it is determined that the big hit is made in the big hit determination, the game is shifted to the big hit gaming state. At this time, the background symbol is not changed and the game is suddenly shifted to the big hit gaming state. In this embodiment, such a sudden shift to a big hit game is called “sudden big hit”.

  In this embodiment, when the gaming state is the high base state, the change of the background symbol is started in synchronization with the start of the change of either the first decorative symbol or the second decorative symbol. That is, when the change of the first decorative design is started when the change of the background design can be started (when the background design is not changing and is not big hit), the background design is changed simultaneously with the start of the change of the first decorative design. The fluctuation starts. In addition, when the change of the second decorative design is started when the change of the background design can be started (when the background design is not changing and is not a big hit), the background design is changed simultaneously with the start of the change of the second decorative design. The fluctuation starts.

  In principle, the change of the background symbol in the high base state ends in synchronization with the end of the change of the decorative symbol (either the first decorative symbol or the second decorative symbol) synchronized with the start of the fluctuation of the background symbol. . That is, when the change of the background symbol is started in synchronization with the start of change of the first decorative symbol, the change is ended in synchronization with the end of change of the first decorative symbol. Further, when the change of the background symbol is started in synchronization with the start of change of the second decorative symbol, the change is ended in synchronization with the end of change of the second decorative symbol. However, as an exception, it may end in synchronization with the end of the variation of the decorative symbol different from the decorative symbol synchronized at the start of the variation of the background symbol. This will be described later with reference to FIGS. 68 and 69.

  FIG. 63 is a timing chart showing the display control timing of the switching point and the hold storage display during the change of the background symbol in the high base state. As shown in FIG. 63, it is assumed that the background symbol starts to be synchronized with the start of variation of the first decorative symbol. Further, it is assumed that the variation time of the first decorative design is 40 seconds. Since the variation time of the first decorative pattern synchronized with the start of variation of the background symbol is 40 seconds, the variation time of the background symbol is also selected as 40 seconds.

  When the variation of the first special symbol is started (the variation of the first decorative symbol is also started in synchronization with the first special symbol), the number of reserved memory on the first special symbol storage memory display 18a is displayed (FIG. 63). 1 is erased). Further, when the change of the background symbol is started in synchronism with the start of the change of the first special symbol, one reserved memory number display in the memory display area 9d of the variable display device 9 is also deleted (for example, the start memory number display area) The red display color is changed to a blue display color).

  When the first special symbol and the background symbol start changing at the same time that the game ball is won at the first start winning opening 13, the reserved memory number display is not turned on and the first special symbol and the background symbol are not turned on. Generally, fluctuations are initiated. However, in this embodiment, in order to make the explanation easy to understand, it is assumed that lighting and erasure (turning off) of the stored storage number display is instantaneously performed even in such a case.

  It is assumed that a game ball wins the second start winning opening 14 after a predetermined time (for example, 5 seconds) has elapsed since the first special symbol and the background symbol have started to change, and the second special symbol starts to change. At this time, when the game ball has won the second start winning opening 14, the reserved memory number display in the second special symbol display 18b is turned on, and the second special symbol is started to change, so that the second special symbol is started. The reserved memory number display on the symbol display 18b is deleted. On the other hand, since the background symbol is changing and the background symbol has not started changing in synchronization with the start of changing the second special symbol, one reserved memory number display in the memory display area 9d of the variable display device 9 is lit. (For example, the blue display color in the start memory number display area is changed to one red display color).

  Originally, when the variation time of the background symbol is 40 seconds, the normal variation is performed for 10 seconds after the start of the variation of the background symbol, and then the reach occurs and the variation with the reach C of 30 seconds is performed. However, a special symbol (Fig. 63 is the first special symbol) that is different from the special symbol (Fig. 63 is the first special symbol) until the specific time (for example, 10 seconds) elapses after the background symbol variation starts. Then, when the change of the second special symbol is started, as shown in FIG. 63, the stop symbol (step which is determined in advance as the stop symbol of the background symbol after the lapse of a specific time from the start of the change of the background symbol) The stop symbol determined in S616) is temporarily stopped, and the normal fluctuation is again performed for 10 seconds. Then, the reach occurs and the fluctuation with the reach B of 20 seconds is performed. In other words, the background symbol variation pattern is switched after the background symbol is temporarily stopped after a lapse of a specific time from the start of the variation of the background symbol. A time point at which the background symbol variation pattern is switched in this way (a time point when 10 seconds have elapsed after the background symbol variation start) is referred to as a “switching point”.

  In the example shown in FIG. 63, from the start of the change of the background symbol to the switching point, the change of the background symbol is regarded as a change based on the start of the change of the first special symbol (the first decorative symbol), and the background after the change point The variation of the symbol is regarded as a variation based on the start of variation of the second special symbol (second decorative symbol). Accordingly, at the switching point, the display memory number display area of the background symbol, that is, one start memory number display area in the memory display area 9d of the variable display device 9 is deleted. Also, in order to make it easier for the player to recognize the break between the background symbol variation based on the start of the first special symbol variation and the background symbol variation based on the second special symbol variation start, the background symbol is temporarily set at the switching point. Control to stop display is performed.

  Thus, when the change of the second special symbol (the second decorative symbol) is started from the start of the change of the background symbol to the switching point, the second change from the change based on the start of the change of the first special symbol at the switching point. By switching to the variation based on the start of variation of the special symbol, and further, at the switching point, the number of reserved memories of the background symbol (the total of the number of reserved memories of the first special symbol and the second special symbol) is decreased by one, A change display (variable display) of the background symbol corresponding to the change of the first special symbol (first decorative symbol) and the second special symbol (second decorative symbol) that are changed in parallel without giving the player a sense of incongruity. ) Can be realized efficiently. As a result, the stop timing of the fluctuation of the first special symbol and the second special symbol executed in parallel with the stop timing of the fluctuation of the background symbol executed corresponding to the first special symbol and the second special symbol. Deviation can be reduced.

  As described above, in the example shown in FIG. 63, since the change in the background symbol after the switching point is based on the start of the change in the second special symbol, the stop symbol in the second special symbol is an outlier symbol. In addition, the stop symbol of the background symbol should be an off symbol. However, in the example shown in FIG. 63, it is determined that the stop symbol of the first special symbol (that is, the first decorative symbol) is a big hit symbol, and when the variation of the first special symbol is finished, the big hit symbol is stopped and displayed (derived display). In addition, the background symbol has finished changing in synchronization with the end of change of the first special symbol. Therefore, if the stop symbol of the background symbol that is most easily visible to the player does not become a jackpot symbol, the jackpot game will start even though the symbol is stopped and displayed as a stop symbol of the background symbol. The stop symbol of the symbol and the game state cannot be matched. Therefore, in this embodiment, the stop symbol type of the background symbol is determined in accordance with the stop symbol type of the special symbol whose variation ends in synchronization with the background symbol (displacement, non-probable big hit, probable big hit), Control for stopping display (derivation display) of the stop symbols of the determined type is performed.

  In the example shown in FIG. 63, before the first special symbol and the background symbol jackpot symbol are stopped and displayed, the variation of the second special symbol is started, and the first special symbol and the background symbol jackpot symbol is stopped and displayed. Sometimes the variation of the second special symbol is ongoing. In this case, as described above, the variation of the second special symbol is interrupted (see step S313 to step S315). In addition, while the variation of the second special symbol is interrupted, control is performed to notify that the variation of the second special symbol is once suspended but the variation itself is continuing (the variation has not ended). .

  In this embodiment, the first decorative symbol is changed in synchronization with the first special symbol, and the second decorative symbol is changed in synchronization with the second special symbol. Therefore, the number of reserved memories that the first special symbol can start to fluctuate coincides with the number of reserved memories that the first decorative symbol can start to vary, and the number of reserved memories that the second special symbol can start to fluctuate and the second ornament The number of reserved memories that can start changing the symbol coincides. Therefore, in the following description, the number of reserved memories of the first special symbol displayed on the first special symbol reserved memory display 18a is expressed as the number of reserved memories of the first decorative symbol, and the second special symbol reserved There is also a place where the number of reserved memories of the second special symbol displayed on the memory display 18b is expressed as the number of reserved memories of the second decorative symbol.

  64 and 65 are explanatory diagrams showing display examples at the change execution timing of each symbol shown in FIG. 64 and 65 show the variable display device 9, the first special symbol display 8a, and the second special symbol display 8b. The screen of the variable display device 9 is divided into a background symbol display area 9a, a first decorative symbol display area 9b, a second decorative symbol display area 9c, and a memory display area 9d.

  As shown in FIG. 64, the change of the background symbol is started in synchronization with the start of the change of the first decorative symbol (first special symbol). The fluctuation of the background symbol is normally fluctuated (high-speed fluctuation in which the symbol fluctuates at high speed) until a predetermined time (10 seconds) elapses after the fluctuation starts. Thereafter, the variation of the second decorative symbol is started, but since the background symbol is changing, the variation of the background symbol based on the start of the variation of the second decorative symbol is not started. However, one display of the number of reserved symbols stored in the background symbol is lit. Thereafter, when the switching point is reached, the background symbol is displayed temporarily stopped as shown in FIG. The temporary stop symbol is an off symbol (“527” in FIG. 64). At this time, the first decorative symbol (first special symbol) and the second decorative symbol (second special symbol) are changing.

  Since the change of the second decorative pattern has started from the start of the change of the background design to the switching point, the change of the change pattern of the background design is performed, and after the switching point, the normal change (high-speed change) of the background design is performed again. ) Is performed. When the normal variation of the background symbol is resumed, one of the reserved symbol number display (the reserved symbol number display corresponding to the reserved symbol number of the second decorative symbol) is deleted.

  Then, after a predetermined time (10 seconds) has elapsed, the left and right background symbols are aligned and reach is achieved. At this time, the variation of the second decorative symbol (second special symbol) has already ended and the stop symbol is displayed. Note that the stop symbols of the second special symbol and the second decorative symbol may be the same type of symbols (outlier symbol, non-probable variation symbol, probability variation symbol), and it is not necessary that the numbers of the symbols coincide completely. In the example shown in FIG. 64, the second special symbol is displayed as a missing symbol “0”, and the second decorative symbol is displayed as a missing symbol “8”.

  After that, a change with reach is performed for a predetermined time, the background pattern changes in synchronization with the end of the change of the first decorative design, and the first decorative design (first special design) and the stop design of the background design are derived and displayed. Is done. At this time, in the example shown in FIG. 64, the jackpot symbol “7” is derived and displayed as the stop symbol of the first special symbol, the jackpot symbol “7” is derived and displayed as the stop symbol of the first decorative symbol, and the background symbol is stopped. A jackpot symbol “777” is derived and displayed as a symbol.

  When the big hit symbol is derived and displayed on the first special symbol, the first decorative symbol, and the background symbol, the fluctuation of the second special symbol and the second decorative symbol is interrupted, and the off symbol is stopped and displayed. Thereby, it is possible to prevent the big hit based on the second special symbol from occurring during the big hit game based on the first special symbol. In the example shown in FIG. 64, the off symbol “4” is stopped and displayed as the stop symbol of the second special symbol, and the off symbol “6” is stopped and displayed as the stop symbol of the second decorative symbol.

  When the big hit symbol is derived and displayed as the stop symbol of the first decorative symbol (first special symbol) and the background symbol, the big hit game is started and the big hit game state is entered. Specifically, as shown in FIG. 65, in order to notify the player that a big hit has occurred (a big hit game is started), the background symbol display area 9a of the variable display device 9 displays “big hit!”. After the characters are displayed, a round game associated with the opening of the special winning opening is executed a predetermined number of times. In this embodiment, during the jackpot game, the background symbol display area is used to notify that the variation of the second decorative symbol is interrupted but the variation itself is continuing (the variation has not ended). The characters “Fluctuation is continuing” are displayed immediately above the second decorative symbol display area 9c in 9a.

  As shown in FIG. 65, when the big hit game is over, the character “Manekane” is displayed in the background symbol display area 9a of the variable display device 9 in order to notify the end of the big hit game. Thereafter, when the big hit game is finished, the first special symbol, the first decorative symbol, and the background symbol are changed, and the suspended second special symbol and second decorative symbol are resumed.

  Next, a description will be given of the execution timing of variation (variable display) of each symbol in various situations in the high base state, the erasure timing of the hold storage display corresponding to each symbol, the change of the variation time of the background symbol, and the like.

  FIG. 66 is a timing chart showing an example of the execution timing of each symbol variation and the erasure timing of the reserved storage display corresponding to each symbol when the variation of the second decorative symbol is started before and after the switching point.

  In the example shown in FIG. 66, similarly to the example shown in FIG. 63, the change of the background symbol is started in synchronization with the start of change of the first decorative symbol (first special symbol). Note that the variation time of the first decorative symbol is 20 seconds, and the variation time of the background symbol is 20 seconds. When the first decorative symbol (first special symbol) and the background symbol start to change, the number of reserved memory (the number of reserved memory of the first special symbol) is displayed on the first special symbol reserved memory display 18a. In addition to being erased, one of the reserved memory number display (background symbol reserved memory number display) in the memory display area 9d of the variable display device 9 is also erased.

  When the variation of the second decorative symbol is started from the start of the variation of the first decorative symbol and the background symbol to the switching point, the reserved memory number display (second decorative symbol of the second special symbol storing memory display 18b is displayed. 1) is turned on and immediately erased, and one display of the reserved memory number for the background symbol is lit. When the switching point is reached, the background symbol is temporarily stopped and displayed, and the variation pattern of the background symbol is switched.

  After that, the display of the number of reserved memories for the background symbol is deleted, and the normal variation of the background symbol is performed again. When the variation time of the second decorative symbol (second special symbol) elapses, the stop symbol of the second decorative symbol is stopped and displayed, and the variation ends. At this time, if the game ball has already won the second start winning opening 14, the second decorative symbol is stopped and displayed for a predetermined time (for example, 0.5 seconds), and then the second decorative symbol is held. One memory number display is deleted, and the variation of the second decorative symbol is started. As shown in FIG. 66, the timing when the change of the second decorative symbol is started is after the switching point during the change of the background symbol and before the end of the change of the background symbol. The display of the number of reserved symbols stored in the background symbol is already lit based on the winning of the game ball in the second start winning opening 14, but the background symbol is changing when the second decorative symbol starts to change. Therefore, it is not erased based on the start of variation of the second decorative symbol. Therefore, the background symbol variation based on the start of variation of the second decorative symbol is in an undigested state.

  When the variation time of the first decorative symbol (first special symbol) and the background symbol elapses, the stop symbol of the first decorative symbol and the background symbol is stopped and the variation ends. At this time, if the game ball has already won in the first start winning opening 13, the first decoration and background symbols are stopped and displayed for a predetermined time (for example, 0.5 seconds), and then the first decoration is displayed. The display of the number of reserved memories for the symbol and the background symbol are both erased, and the first decorative symbol and the background symbol change are started synchronously. The variation time of the first decorative design and the background design is assumed to be 10 seconds. At this time, since the variation of the background symbol is started in synchronization with the first decorative symbol, the variation of the background symbol is based on the start of variation of the first decorative symbol. Therefore, the background symbol variation based on the start of the variation of the second decorative symbol remains undigested.

  When the variation time of the first decorative symbol (first special symbol) and the background symbol elapses again, the stop symbol of the first decorative symbol and the background symbol is stopped and the variation ends. At this time, when the first reserved number of the first special symbol is 0, the background symbol is not changed in synchronization with the first decorative symbol, but the background symbol changes based on the start of the second decorative symbol change. Since the first decorative symbol and the background symbol are stopped and displayed for a predetermined time (for example, 0.5 seconds), the background symbol changes based on the start of the second decorative symbol change. Be started. In addition, when the change of the background symbol is started, the display of the number of reserved memories for the background symbol is deleted. Thereby, the variation of the undigested decorative design is digested, and there is no state of variation of the undigested decorative design.

  In FIG. 66, even if the correspondence relationship between the variation execution timings of the first decorative symbol and the background symbol and the correspondence relationship between the variation execution timings of the second decorative symbol and the background symbol are interchanged, the same control as described above is performed. Is done.

  FIG. 67 is a timing diagram showing an example of the execution timing of each symbol variation and the erasure timing of the reserved storage display corresponding to each symbol when the variation of the second decorative symbol is started after the switching point.

  In the example shown in FIG. 67, the change of the background symbol is started in synchronization with the start of change of the first decorative symbol (first special symbol). Note that the variation time of the first decorative symbol is 20 seconds, and the variation time of the background symbol is 20 seconds. When the first decorative symbol (first special symbol) and the background symbol start to change, the number of reserved memory (the number of reserved memory of the first special symbol) is displayed on the first special symbol reserved memory display 18a. In addition to being erased, one of the reserved memory number display (background symbol reserved memory number display) in the memory display area 9d of the variable display device 9 is also erased.

  The normal variation of the background symbol is performed from the start of the variation to the switching point, and then the variation with reach A is performed. In the example shown in FIG. 67, the timing at which the change of the second decorative symbol is started is after the switching point during the change of the background symbol and before the end of the change of the background symbol. The display of the number of stored symbols of the background symbol is already lit based on the winning of the game ball to the second start winning opening 14, but the background symbol is changing at the start of the variation of the second decorative symbol, It is not erased based on the start of change of the second decorative symbol. Therefore, the background symbol variation based on the start of variation of the second decorative symbol is in an undigested state.

  When the variation time of the first decorative symbol (first special symbol) and the background symbol elapses, the stop symbol of the first decorative symbol and the background symbol is stopped and the variation ends. At this time, if the game ball has already won in the first start winning opening 13, the first decoration and background symbols are stopped and displayed for a predetermined time (for example, 0.5 seconds), and then the first decoration is displayed. The display of the number of stored memory of the symbol (first special symbol) and the background symbol is both erased, and the first decorative symbol and the background symbol change are started in synchronization. The variation time of the first decorative design and the background design is assumed to be 20 seconds. At this time, since the variation of the background symbol is started in synchronization with the first decorative symbol, the variation of the background symbol is based on the start of variation of the first decorative symbol. Therefore, the background symbol variation based on the start of the variation of the second decorative symbol remains undigested.

  When a predetermined time (10 seconds) elapses after the first decorative symbol (first special symbol) and the background symbol start to change, the switching point is reached. At this time, since the variation of the undigested decorative pattern remains, in order to digest the undigested decorative variation at the switching point, control is performed to temporarily stop display the background design and switch the background pattern variation pattern. Then, the display of the number of reserved symbols for the background symbol is deleted, and the normal variation of the background symbol is performed again. Thereby, the variation of the undigested decorative design is digested, and there is no state of variation of the undigested decorative design. Thereafter, when the variation time of the first decorative symbol and the background symbol elapses, the variation of the first decorative symbol and the background symbol ends synchronously.

  In FIG. 67, even if the correspondence between the variation execution timings of the first decorative symbol and the background symbol and the correspondence between the variation execution timings of the second decorative symbol and the background symbol are interchanged, the same control as described above is performed. Is done.

  Next, the change of the background symbol variation time in the high base state will be described. FIG. 68 is a timing diagram showing a change in the variation time of the background symbol whose variation has been started first. In the example shown in FIG. 68, the change of the background symbol is started in synchronization with the start of the change of the first decorative symbol (first special symbol). Note that the variation time of the first decorative symbol is 20 seconds, and the variation time of the background symbol is 20 seconds. When the variation of the first decorative symbol (first special symbol) and the background symbol is started, one reserved memory number display of the first special symbol is deleted and one reserved memory number display of the background symbol is also deleted. Is done.

  When the variation of the second decorative symbol is started by the switching point after the variation of the first decorative symbol and the background symbol is started, one stored memory number display of the second decorative symbol is turned on and immediately erased. One of the stored symbols for the background symbol is turned on. Here, it is assumed that the variation time of the second decorative design is 20 seconds. When the switching point is reached, the background symbol is temporarily stopped and displayed, and the variation pattern of the background symbol is switched. After that, the display of the number of reserved memories for the background symbol is deleted, and the normal variation of the background symbol is performed again.

  As described above, the variation time of the first decorative symbol and the background symbol is 20 seconds, and the variation time of the second decorative symbol (second special symbol) is also 20 seconds. In addition, since the first decorative design and the background design change are started first, the second decorative design change ends after the first decorative design and the background design change. As described above, the variation of the first decorative design and the background design is started first, the variation of the second decorative design is started by the switching point, and the variation of the second decorative design is the first decorative design and the background. When ending after the symbol change, extend (change) the change time of the background symbol that started to change first, and change the end timing of the second decorative symbol that started to change after the change timing of the background symbol. Synchronize with.

  This is because the change in the background symbol after the switching point is a change based on the start of the change in the second decorative symbol, and it is preferable to end the change in the background symbol in synchronization with the change in the second decorative symbol. In addition, when the stop symbol of the second decorative symbol is a jackpot symbol, when the big hit symbol is derived and displayed as the stop symbol of the second decorative symbol, it is necessary to derive and display the jackpot symbol as the stop symbol of the background symbol is there. Therefore, when the situation as shown in FIG. 68 occurs, the fluctuation time of the background symbol that has started to fluctuate first is extended. However, even in such a case, since the variation of the first decorative symbol and the variation of the first special symbol are completely synchronized, the variation time of the first decorative symbol that has started to be varied is not extended. .

  If the stop symbol of the decorative symbol that has started to change (the first decorative symbol in FIG. 68) is a big hit symbol, the big hit symbol of the background symbol is derived and displayed when the big hit symbol of the decorative symbol is derived and displayed. There is a need to. Therefore, in such a case, the extension of the background symbol variation time started earlier is prohibited.

  The background symbol fluctuation time is extended by shifting the switching point provided when 10 seconds have elapsed after the background symbol fluctuation start to extend the normal fluctuation (high-speed fluctuation) time until the switching point. Is called. For example, in the example shown in FIG. 68, when the variation of the second design starts after 5 seconds from the start of the variation of the background design (and the first design), the change end timing of the background design and the second design of the design In order to synchronize with the fluctuation end timing, the switching point is shifted to the point of 15 seconds after the start of the background symbol fluctuation, the normal fluctuation time to the switching point is extended by 5 seconds, and the fluctuation time after the switching point is constant. Leave. Thereby, the fluctuation time of the background symbol is extended by 5 seconds.

  As described above, the background symbol variation time is extended by adding the normal variation time to the switching point for the following reason. In this embodiment, the normal variation is always performed up to the switching point. If the symbol is changed at high speed like normal fluctuation, the changing symbol is not visible (difficult to see), so that the player does not feel uncomfortable even if the variation time is extended. In addition, when the symbol fluctuates at low speed or medium speed, such as fluctuation with reach, control is performed to extend the fluctuation time and stop and display the predetermined stop symbol at the extended fluctuation time. Although it is difficult, when the symbol fluctuates at high speed like normal variation, it is relatively easy to control to stop and display a predetermined stop symbol in the extended variation time. As described above, when the switching point is shifted backward, the display of the stored number of reserved symbols in the background symbol is deleted at the switching point shifted backward.

  If there is a hold memory based on the first start winning when the variation of the first decorative symbol is finished first, the variation of the first decorative symbol is started without being synchronized with the variation of the background symbol. At this time, the display of the number of reserved memories for the first decorative symbol is erased, but the number of reserved memories for the background symbol remains lit. If there is a holding memory based on the second start winning prize when the fluctuation of the background symbol and the second decorative symbol is finished, the fluctuation is started in synchronization with the background symbol and the second decorative symbol. At this time, one reserved memory number display of the second decorative symbol is deleted, and one reserved memory number display of the background symbol is also deleted.

  When the variation of the second decorative design and the background design is completed, there is still an undigested reserved memory, and the background symbol variation is started in order to digest the reserved memory. Then, one display of the stored number of reserved background symbols is deleted. Thereby, the variation of the undigested decorative design is digested, and there is no state of variation of the undigested decorative design.

  In FIG. 68, even if the correspondence between the variation execution timings of the first decorative symbol and the background symbol and the correspondence between the variation execution timings of the second decorative symbol and the background symbol are interchanged, the same control as described above is performed. Is done.

  FIG. 69 is a timing chart showing a change in the variation time of the background symbol that has started to be varied later. In the example shown in FIG. 69, the background symbols start to change in synchronization with the start of change of the first decorative symbol (first special symbol). Note that the variation time of the first decorative symbol is 20 seconds, and the variation time of the background symbol is 20 seconds. When the variation of the first decorative symbol (first special symbol) and the background symbol is started, one reserved memory number display of the first special symbol is deleted and one reserved memory number display of the background symbol is also deleted. Is done.

  As shown in FIG. 69, the variation of the second decorative symbol is started after the switching point (at the time when 10 seconds have elapsed from the start of variation) in the variation of the first decorative symbol and the background symbol. Here, it is assumed that the variation time of the second decorative design is 20 seconds. Thereafter, if there is a reserved memory based on the first start winning prize when the variation of the first decorative symbol and the background symbol is completed, the variation is started in synchronization with the first decorative symbol and the background symbol. At this time, one reserved memory number display of the first decorative symbol is deleted, and one reserved memory number display of the background symbol is also deleted. Here, it is assumed that the variation time of the first decorative symbol is 10 seconds. Therefore, normally, 10 seconds is selected as the background symbol fluctuation time. In addition, it is assumed that the first decorative design and the background design have started to change when 5 seconds have elapsed after the start of the change of the second decorative design.

  As described above, the variation time of the second decorative symbol is 20 seconds, and the variation time of the first decorative symbol is 10 seconds. In addition, the first decorative pattern and the background pattern are changed 5 seconds after the start of the change of the second decorative design. Accordingly, the change in the first decorative design and the background design is started 10 seconds after the start of the change in the second decorative design, and the change in the second decorative design ends after the change in the first decorative design and the background design. . In this way, the first decorative design and the background design start to change later, the first decorative design starts to change by 10 seconds after the start of the second decorative design change, and the second decorative design changes. If it ends after the change of the first decorative design and the background design, the change time of the background design that started the change later was extended (changed), and the change start timing of the background design was started first. Synchronize with the variation end timing of the second decorative symbol.

  The reason for extending the background symbol variation time in this way is the same as the reason described in FIG. That is, when the second decorative design starts to change first without synchronizing with the background design, and the first decorative design starts to change synchronously with the background design by 10 seconds after the start of changing the second decorative design In order to efficiently digest the variation of the first decorative symbol and the second decorative symbol in the variation of the background symbol, when 10 seconds have elapsed after the start of the variation of the second decorative symbol (this is the switching point), It is preferable to switch the variation of the design from the variation based on the variation of the first decorative design to the variation based on the variation of the second decorative design. And since the change of the background symbol after the switching point is a change based on the start of the change of the second decorative design, it is preferable to end the change of the background design in synchronization with the change of the second decorative design. When the stop symbol of the second decorative symbol is a jackpot symbol, it is necessary to derive and display the big hit symbol as the stop symbol of the background symbol when the big hit symbol is derived and displayed as the stop symbol of the second decorative symbol. Therefore, when the situation as shown in FIG. 69 occurs, the variation time of the background symbol started to vary in synchronization with the first decorative symbol after the second decorative symbol is extended. However, even in such a case, since the variation of the first decorative symbol and the variation of the first special symbol are completely synchronized, the variation of the first decorative symbol started to vary after the second decorative symbol. The time will not be extended.

  If the stop symbol of the decorative symbol that has started to change (the first decorative symbol in FIG. 69) is a big hit symbol, the big hit symbol of the background symbol is derived and displayed when the big hit symbol of the decorative symbol is derived and displayed. There is a need. Therefore, in such a case, extension of the background symbol variation time started later is prohibited.

  The change of the background symbol variation time is 10 seconds after the start of variation of the second decorative symbol that started to vary first. The variation time after the switching point is after the start of variation of the second decorative symbol. This is done by matching the fluctuation time after 10 seconds. For example, in the example shown in FIG. 69, when the change of the background symbol (and the first decorative symbol) is started 5 seconds after the start of the variation of the second decorative symbol, the change end timing of the second decorative symbol and the background symbol In order to synchronize with the change end timing of the second design symbol, the time point 10 seconds after the start of the second design symbol change (time point 5 seconds after the start of the background symbol change) is taken as the switching point in the background symbol, The remaining variation time after 10 seconds from the start of variation of the second decorative symbol (10 seconds in FIG. 69) is made to coincide. Thereby, the fluctuation time of the background symbol is extended by 5 seconds.

  In the example shown in FIG. 69, when the variation time of the second decorative symbol that starts to change first is 30 seconds and the variation time of the first decorative symbol that starts to change later is 20 seconds, FIG. Similarly to the example shown in FIG. 5, the change time of the background symbol is extended by 5 seconds by shifting the switching point at the time of 10 seconds after the start of the variation of the first decorative symbol by 5 seconds.

  As described above, the reason for extending the fluctuation time of the background symbol by adding the normal fluctuation time until the switching point is the same as the reason explained in FIG. In other words, if the symbol is changing at high speed as usual, the changing symbol will not be visible (difficult to see), so the player will not feel uncomfortable even if the variation time is extended, When the symbol fluctuates at a high speed like fluctuation, it is relatively easy to stop and display the predetermined stop symbol in the extended fluctuation time. As described above, when the switching point is shifted backward (when a switching point is newly added in the example of FIG. 69), one display of the stored stored number of background symbols is deleted at the switching point shifted backward. The

  When the variation time of the second decorative symbol and the background symbol elapses, the variation of the second decorative symbol and the background symbol ends synchronously.

  In the example shown in FIG. 69, for example, when the variation of the first decorative symbol and the background symbol is started 9.8 seconds after the start of the variation of the second decorative symbol, the switching point from the start of the variation of the background symbol. Only 0.2 seconds. In such a case, the time until the switching point is too short and the normal variation cannot be substantially executed. Therefore, even if, for example, more than 8 seconds have elapsed since the start of the second decorative symbol change, the first decorative symbol and the background symbol change may be started, or the background symbol change time may not be extended. Good. According to such a configuration, it is possible to ensure a normal fluctuation time of at least 2 seconds as the time to the switching point.

  In FIG. 69, even if the correspondence between the variation execution timings of the first decorative symbol and the background symbol and the correspondence between the variation execution timings of the second decorative symbol and the background symbol are interchanged, the same control as described above is performed. Is done.

  FIG. 70 is an explanatory diagram showing the upper limit of the number of reserved memories in the low base state and the high base state. As described above, in the low base state (normal gaming state), the upper limit value of the number of reserved symbols stored in the memory display area 9d of the variable display device 9 is “4”, and the high base state ( (Probable change state or short time state), the upper limit value of the number of reserved symbols stored in the background symbol displayed in the memory display area 9d of the variable display device 9 is “8”. The upper limit value of the number of reserved symbols stored in the background symbol is “4” in the low base state and “8” in the high base state, but may be a different value.

  FIG. 71 is an explanatory diagram showing lighting conditions for a dummy background symbol hold storage display in the high base state. In the upper diagram of FIG. 71, four first special symbol hold memory displays on the first special symbol hold memory display 18a are lit, and the second special symbol hold memory display 18b on the second special symbol hold memory display 18b is displayed. One is lit, and five background symbol hold storage displays in the memory display area 9d of the variable display device 9 are lit. The difference counter is ± 0. The difference counter is a counter that counts the difference between the total number of reserved memory displays of the first special symbol and the second special symbol and the number of reserved memory displays of the background symbol. That is, it is a counter that counts the difference between the count value of the first reserved memory number counter and the count value of the second reserved memory number counter and the display number actually displayed as the reserved memory display of the background symbol.

  In the state of the above figure, it is assumed that a game ball has won the first start winning opening 13 and a first start win has occurred. In this case, as shown in FIGS. 61 and 62, since the count value of the first reserved memory number counter is already 4 (Y in step S405), the new first start winning is invalid, and this first start Although the variation of the first special symbol (and the first decorative symbol) based on the winning is not started, the first invalid start winning command is transmitted to the production control microcomputer 100 (step S408). Then, as shown in the lower part of FIG. 71, in the production control microcomputer 100, in response to the reception of the first invalid start winning command, the memory display area 9d of the variable display device 9 newly displays the reserved memory display of the background symbols. One lights up. Then, the difference counter value is incremented by one.

  As described above, the invalid start winning command based on the invalid start winning is transmitted to the production control microcomputer 100 and the background symbol hold storage display is turned on according to the command for the following reason. . The player pays attention to the background symbols with high visibility and the background symbol hold storage display, and recognizes the remaining number of fluctuations and the number of remaining start winnings that can be held based on the background symbol and the background symbol hold storage display. Therefore, in the state shown in the upper diagram of FIG. 71, the player recognizes that the remaining five background symbols have been changed and that three start winnings can still be held. At this time, even if a game ball wins the first start winning opening 13, as described above, the start win becomes invalid. In this case, if the configuration is such that the background symbol hold memory display is not turned on as usual, the player feels wondering why the background symbol hold memory display does not light even though the start winnings for three times can be held. End up. Alternatively, if there is 8 start-pending hold memories and only 5 hold memory displays are still lit, the game condition (satisfaction of start condition) may be disadvantageous if the hold memory display is not lit. I feel it. Therefore, in this embodiment, even if the start winning is invalid, the reserved memory display of the background symbol is turned on so as not to give the player an unfavorable impression on the establishment of the start condition.

  If the difference counter is incremented by one, the background symbol is retained at the point when the background symbol is changed by erasing one of the reserved symbols on the background symbol at the subsequent switching point, or when starting the variation of the background symbol based on the invalid start prize. By deleting one storage display, the number of stored background symbols stored and the number of fluctuations of the background symbol are matched.

  In addition, four second special symbol on-hold storage displays on the second special symbol on-hold storage display 18b are lit, and at that time, a game ball has won a prize at the second start winning opening 14 and a second start winning has occurred. Also in this case, the second invalid start winning command is transmitted to the effect control microcomputer 100, and the background symbol hold storage display is turned on in response to the second invalid start winning command.

  It should be noted that the difference counter is not only used when an invalid start winning occurs, but also when an undigested change occurs, that is, a decorative design changes, as shown in FIGS. However, it is also incremented by 1 when the background symbol corresponding to it has not been changed yet.

  FIG. 72 is a timing chart showing the execution timing of the notice effect in the high base state. As shown in FIG. 72, in this embodiment, a notice effect may be executed for notifying that a big hit or a reach will occur while the background symbol is changing. For example, during the execution of the normal fluctuation within 10 seconds from the start of the fluctuation, a notice effect is given to notify that there is a chance to win a big hit, and during the execution of the fluctuation with reach A from 10 seconds to 20 seconds after the fluctuation starts. Execute a notice effect to notify that the probability of a big hit is high, and after a change with reach B from 20 seconds to 30 seconds after the start of the change, stop the jackpot symbol as a stop pattern of the background symbol Such an embodiment is conceivable.

  Even when such a variation mode is selected, the variation pattern may be switched at the switching point. For example, in the example shown in FIG. 72, the background symbol and the first decorative symbol are started to vary in synchronization, and the notice effect is executed during the normal variation. Then, since the change of the second decorative symbol is started before reaching the switching point, the changing pattern is switched at the switching point. In this case, since the notice effect is already executed before the switching point, even if the change after the change is made, if the notice effect according to the aspect is not executed according to the already executed notice effect, the consistency of the effect cannot be obtained. It will be. Therefore, the presence / absence and effect mode of the notice effect performed before the switching point is stored, and when the change effect pattern is switched at the change point, the notice effect is already executed when the notice effect is already executed. It is configured to execute the notice effect according to the change after the switching.

  FIG. 73 is an explanatory diagram showing a display example of a notice effect. As shown in FIG. 73, the background symbol and the first decorative symbol (and the first special symbol) start to fluctuate synchronously, and then the text “Maybe ...” is displayed as the notice effect during the normal variation. It is displayed in the symbol display area 9a. Then, when the variation of the second decorative symbol is started before reaching the switching point, a temporary stop display of the background symbol is performed at the switching point, and the variation pattern is switched. Then, normal fluctuation is started again. In this case, since the notice effect ("Maybe ..." is displayed) is already executed before the switching point, the notice effect according to the mode is executed according to the already executed notice effect even in the normal fluctuation after the change. . In the example shown in FIG. 73, a character “Maybe a big hit?” Is displayed in the background symbol display area 9a. After that, when the left and right background symbols are aligned at “7”, reach occurs, and the variation with reach A is executed. Then, when the variation time has elapsed, the stop symbol of the background symbol (the off symbol “767” in the example shown in FIG. 73) is stopped (displayed).

  Next, the operation of the effect control means will be described. FIG. 74 is a flowchart showing main processing executed by the effect control microcomputer 100 (specifically, the effect control CPU 101) mounted on the effect control board 80. The effect control CPU 101 starts executing the main process when the power is turned on. In the main process, first, an initialization process is performed for clearing the RAM area, setting various initial values, initializing a timer for determining the start interval of effect control, and the like (step S701). Thereafter, the effect control CPU 101 proceeds to a loop process for monitoring a timer interrupt flag (step S702). When a timer interrupt occurs, the effect control CPU 101 sets a timer interrupt flag in the timer interrupt process. If the timer interrupt flag is set in the main process, the effect control CPU 101 clears the flag (step S703) and executes the following effect control process.

  In the effect control process, the effect control CPU 101 first analyzes the received effect control command (command analysis process: step S704). Next, the effect control CPU 101 performs the first decorative symbol process (step S705). In the first decorative symbol process, a process corresponding to the current control state (first decorative symbol process flag) is selected from the processes corresponding to the control state, and the first decorative symbol display area 9b of the variable display device 9 is selected. Execute display control. Further, the second decorative symbol process is performed (step S706). In the second decorative symbol process, a process corresponding to the current control state (second decorative symbol process flag) is selected from the processes corresponding to the control state, and the second decorative symbol display area 9c of the variable display device 9 is selected. Execute display control. Also, background symbol process processing is performed (step S707). In the background symbol process, a process corresponding to the current control state (background symbol process flag) is selected from the processes corresponding to the control state, and display control of the background symbol display area 9a of the variable display device 9 is executed. . Furthermore, a random number update process for updating a counter value of a counter for generating a random number such as a random number for notice determination is executed (step S708). Thereafter, the process proceeds to step S702.

  The effect control command transmitted from the game control microcomputer 560 is received by an interrupt process based on the effect control INT signal and stored in a buffer area formed in the RAM. In the command analysis process, it is analyzed which command (see FIG. 42) the effect control command stored in the buffer area is.

  FIG. 75 is a flowchart showing command analysis processing (step S704) in the main processing. The effect control command transmitted from the game control microcomputer 560 is stored in the command reception buffer. In the command analysis process, the effect control CPU 101 first checks whether or not a reception command is stored in the command reception buffer (step S611). When the reception command is stored in the command reception buffer, the effect control CPU 101 reads the reception command from the command reception buffer (step S612).

  If the received effect control command is a start prize designation command (C100 (H) to C201 (H)) that designates that a start prize (valid start prize and invalid start prize) has occurred (step S613), production control The CPU 101 executes background symbol storage storage display control processing (step S614). The specific contents of the background symbol hold storage display control process will be described later (see FIG. 76).

  Further, if the received effect control command is an effect control command (9000 (H) to 9102 (H)) that designates a display result (probability big hit, non-probable big hit, or disengagement) of decorative symbols variable display (step S615). ), A process of determining and storing stop symbols of the first decorative symbol, the second decorative symbol, and the background symbol is executed (step S616).

  Specifically, when receiving the display result command, the effect control CPU 101 determines whether the display result command is an effect control command that specifies a display result of variable display of the first decorative symbol, or variable display of the second decorative symbol. It is confirmed whether it is an effect control command for designating the display result, and whether the content of the display result is a probable big hit, a non-probable big hit, or a miss. Then, a random number for determining a decorative symbol and a random number for determining a background symbol are extracted, and a stop symbol of the first decorative symbol, the second decorative symbol, and the background symbol is determined based on the extracted random number value. For example, it is an effect control command for designating the display result of the first decorative symbol, and when the content of the display result is out of order, the first decorative symbol that is the out of symbol is stopped based on the value of the random number for determining the decorative symbol In addition to determining the symbol, a stop symbol of the background symbol which is the off symbol is determined based on the value of the random number for determining the background symbol. Further, it is an effect control command for designating the display result of the second decorative symbol, and when the content of the display result is a probable big hit, the second decorative symbol which is the probable variable symbol is based on the value of the random number for determining the decorative symbol. A stop symbol is determined, and a stop symbol of a background symbol which is a probability variable symbol is determined based on a random value for determining a background symbol. Then, the first decorative symbol, the second decorative symbol, and the background symbol stop symbol determined as described above are stored in the first decorative symbol storage region, the second decorative symbol storage region, and the background symbol storage region, respectively. These storage areas are formed in the RAM of the production control microcomputer 100.

  Next, the production control CPU 101 confirms whether or not the content of the display result specified by the display result command is a big hit (probable big hit or non-probable big hit) (step S617). (Y in step S617), it is confirmed whether or not the background symbol is changing (step S618). Whether or not the background symbol is changing is determined by checking whether or not the value of the background symbol process flag is a value indicating the background symbol change start waiting process (step S900). If the value of the background symbol process flag is a value indicating the background symbol variation start waiting process, the background symbol is not changing, and if the value of the background symbol process flag is not a value indicating the background symbol variation start waiting process, the background symbol The design is changing. When the value of the background symbol process flag is a value indicating the jackpot display process and the jackpot game process, the display result command is not transmitted (see step S313 in FIG. 38).

  If the content of the display result specified by the display result command is a big hit and the background symbol is fluctuating, the change of the decorative symbol that makes the stop symbol a big hit symbol is started without synchronizing with the background symbol. It will be. In this case, it is necessary to end the variation of the background symbol in synchronization with the end of the variation of the decorative symbol and to make the stop symbol of the background symbol a big hit symbol. For example, in FIG. 69, when the change of the second decorative design is started, the background design is changing, and therefore the second decorative design starts to change without being synchronized with the background design. If the stop symbol of the second decorative symbol is a jackpot symbol, it is necessary to change the stop symbol of the background symbol, which has started to change in synchronization with the first decorative symbol, to the jackpot symbol, and the background symbol ends changing. It is necessary to synchronize the timing with the variation end timing of the second decorative symbol. Therefore, the symbol forced synchronization change flag is set (step S619). When this symbol forced synchronization change flag is set, as will be described later, the background symbol variation end timing is synchronized with the decorative symbol variation end timing at which the stop symbol becomes a big hit symbol.

  If the content of the display result specified by the display result command is a big hit and the background symbol is not changing, the change of the decorative symbol that the stop symbol becomes a big hit symbol is started in synchronization with the background symbol. Become. Even in this case, it is necessary to end the change of the background symbol in synchronization with the end of the change of the decorative symbol and to make the stop symbol of the background symbol a big hit symbol. Normally, when the background pattern starts to change in synchronization with the start of the decorative pattern, the background pattern also ends in synchronization with the end of the decorative pattern. However, as shown in FIG. In some cases, the variation time of the symbol is extended, and the decorative symbol and the background symbol do not end in synchronization. Therefore, a variation time change prohibition flag is set (step S620). When this variation time change prohibition flag is set, as will be described later, the change of the variation time of the background symbol is prohibited.

  If the received effect control command is an effect control command (8000 (H) to 8019 (H)) for designating a decorative pattern variation pattern (variation time) (step S621), the effect control CPU 101 The command EXT data is stored in the variation pattern data storage area in the RAM (step S622), and it is confirmed from the contents of the received variation pattern command whether the current gaming state is the low base state or the high base state (step S623). And the production | presentation side state flag according to a game state is set (step S624). The performance side state flag is a flag indicating whether the gaming state is a low base state or a high base state. For example, in this embodiment, it is assumed that the high base state is set when the performance side state flag is set. Thereafter, the effect control CPU 101 executes a symbol variation control process for controlling the variation of the background symbol (step S625). Although not shown in FIG. 75, the symbol variation control process in step S625 is executed only when the gaming state is in the high base state, and is skipped when the gaming state is in the low base state. The specific contents of the symbol variation control process will be described later (see FIGS. 77 and 78).

  If the received command read in step S612 is another effect control command, the effect control CPU 101 sets a flag corresponding to the received command (step S626).

  FIG. 76 is a flowchart showing background symbol reservation storage display control processing. In the background symbol hold memory display control process, the effect control CPU 101 first checks whether or not the current gaming state is the high base state (step S630a). Whether or not the high base state is set can be determined based on whether or not the effect side state flag is set. If the gaming state is a high base state (Y in step S630a), the process proceeds to step S631. If the gaming state is not the high base state but the low base state (N in step S630a), the effect control CPU 101 determines that the received start winning designation command is a first effective start winning designation command (first effective start winning command). (Step S630b). If it is not the first valid start winning command (N in step S630b), the process is terminated as it is. That is, in the low base state, the background symbol hold storage display based on the second start winning is not performed, and the background symbol hold storage display based on the invalid start winning is not performed.

  If it is the first valid start winning command (Y in step S630b), the value of the reserved memory display number counter that counts the number of background symbol reserved memory displays actually displayed in the memory display area 9d of the variable display device 9 is It is confirmed whether or not the upper limit value 4 (see FIG. 70) in the low base state is satisfied (step S630c). When the value of the on-hold storage display number counter is 4 (Y in step S630c), the process ends. On the other hand, when the value of the reserved memory display number counter is not 4 (N in step S630c), the effect control CPU 101 increments the value of the reserved memory display number counter by 1 (step S630d), and the background symbol is reserved in the memory display area 9d. Control to turn on one memory display is executed (step S630e). Then, the process ends.

  In step S630a, when the gaming state is in the high base state (Y in step S630a), the effect control CPU 101 uses the upper limit value 8 (see FIG. 70) when the value of the on-hold storage display number counter is in the high base state. It is confirmed whether or not there is (step S631).

  When the value of the hold memory display number counter is not 8 (N in step S631), the effect control CPU 101 increments the value of the hold memory display number counter by 1 (step S632), and the background symbol hold memory display is displayed in the memory display area 9d. Control to turn on one is executed (step S633). At this time, if the value of the hold memory display number counter is not 8, one background symbol hold memory display is lit not only when the valid start winning designation command is received but also when the invalid start winning designation command is received. Will be. The background symbol hold memory display based on the invalid start winning designation command is the dummy hold memory display shown in the lower diagram of FIG.

  Next, the effect control CPU 101 checks whether or not the received start winning designation command is an invalid starting winning designation command (step S634). The counter is incremented by 1 (step S635). Also, the value of the dummy display number counter that counts the number of dummy pending storage displays based on the invalid start winning is incremented by 1 (step S636).

  In step S631, when the value of the stored storage display number counter is 8 (Y in step S631), the effect control CPU 101 confirms whether or not the received start winning designation command is a valid starting winning designation command ( If it is a valid start winning designation command (step S637) (Y in step S637), it is confirmed whether the value of the dummy display number counter is 1 or more (step S638). When the value of the dummy display number counter is 1 or more (Y in Step S638), the value of the difference number counter is decremented by -1 (Step S639), and the value of the dummy display number counter is decremented by 1 (Step S640).

  Even when the value of the reserved memory display number counter is 8, that is, when eight memory patterns of the background symbol are displayed in the memory display area 9d, May contain pending storage indications. In that case, in the processing of steps S637 to S640, when an effective start winning occurs, the dummy hold storage display included in the eight hold storage displays is not a dummy hold storage display (hold storage based on the effective start winning). Display).

  In the example shown in FIG. 76, in the high base state, the number of start winnings (the number of stored storages) is counted without distinguishing between valid starting winnings and invalid starting winnings in the holding memory display number counter. For example, a counter that counts the number of valid start prizes (effective start prize number counter) and a counter that counts the number of invalid start prizes (invalid start prize number counter) are not limited to such a configuration. The structure provided separately may be sufficient. In this case, in the example shown in FIG. 76, the effect control CPU 101 first determines whether or not the value of the effective start winning number counter is 8 based on the reception of the start winning designation command. If is 8, the process ends. When the value of the valid start winning number counter is not 8, the production control CPU 101 determines whether or not the sum of the value of the effective starting winning number counter and the invalid start winning number counter is 8. When the value is 8, the process proceeds to step S637. When the value is not 8 (when it is 8 or less), the process may proceed to step S632. Even with such a configuration, the processing shown in FIG. 76 can be realized.

  Also, in the example shown in FIG. 76, the effective hold storage display is performed on the condition that, in the high base state, the effect control CPU 101 determines that the value of the hold storage number counter is not 8 (8 or less). However, the present invention is not limited to such a configuration, and the CPU 56 determines whether or not the hold storage display can be displayed and determines that the display is possible. It may be configured to transmit a valid start winning designation command or an invalid start winning designation command only in the case of having performed. More specifically, a counter (main-side reserved memory display number) that counts the number of background symbol reserved memory displays actually displayed in the memory display area 9d of the variable display device 9 like the reserved memory display number counter of FIG. A counter) is provided on the game control side (that is, the RAM 55). Then, the CPU 56 increments the value of the main-side reserved memory display number counter by +1 each time the lighting condition of the reserved symbol display of the background symbol is satisfied (every time the valid start winning designation command and invalid start winning designation command are transmitted). In addition, every time a condition for erasing (turning off) the background symbol hold memory display is satisfied (background symbol start of change, time of switching point; the CPU 56 also executes the same processing as the CPU 101 for effect control. It is possible to determine whether the erasure condition is satisfied). The value of the main-side reserved memory display number counter is decremented by 1. Then, when the value of the main-side reserved storage display number counter is 8, the control for not transmitting the start winning designation command is executed. According to such a configuration, it is not necessary to determine whether or not the number of reserved symbols stored in the background symbol is 8 in the CPU 101 for effect control.

  77 and 78 are flowcharts showing the symbol variation control process. In the symbol variation control process, the effect control CPU 101 confirms whether or not the received variation pattern command is the first variation pattern command (step S641). When the command is not the first variation pattern command (N in Step S641), the process proceeds to the processing after Step S662, which is the processing when the second variation pattern command is received.

  When the first variation pattern command is received (Y in step S641), the effect control CPU 101 sets a first variation pattern reception flag indicating that the first variation pattern has been received (step S642). Then, it is confirmed whether or not the background symbol is changing (step S643). Whether or not the background symbol is changing is determined by checking whether or not the value of the background symbol process flag is a value indicating the background symbol variation start waiting process (step S900), as in step S618. Is called. The fact that the background symbol is not changing (N in step S643) means that the change of the background symbol can be started in synchronization with the start of the change of the first decorative symbol, so the change of the background symbol starts. A background symbol variation start flag indicating that it is possible is set (step S644).

  Next, the effect control CPU 101 checks whether or not the second decorative symbol is changing (step S645). Whether or not the second decorative symbol is changing is determined by confirming whether or not the value of the second decorative symbol process flag is a value indicating the second variable pattern command reception waiting process. When the value of the second decorative symbol process flag is a value indicating the second variation pattern command reception waiting process, the second decorative symbol is not changing, and the value of the second decorative symbol process flag is the second variable pattern command received. When the value does not indicate the waiting process, the second decorative symbol is changing. When the value of the second decorative symbol process flag is a value indicating the second jackpot display process and the second jackpot game process, the first variation pattern command is not transmitted (see step S313 in FIG. 38).

  If the second decorative symbol is not changing, the process is terminated as it is. When the second decorative symbol is changing, the production control CPU 101 checks whether or not the changing time of the changing second decorative symbol is 20 seconds or longer (step S646). That the variation time of the second decorative symbol is 20 seconds or more means that the variation pattern may be switched at the background symbol switching point where the variation starts thereafter. If the variation time of the second decorative symbol is not 20 seconds or longer (if the variation time is 10 seconds), the processing is terminated as it is. If the variation time of the second decorative symbol is 20 seconds or more, the effect control CPU 101 confirms whether or not the timing at which the first variation pattern command is received is within 10 seconds after the start of the variation of the second decorative symbol. (Step S647). If it is not within 10 seconds after the start of the second decorative symbol variation, the background symbol variation pattern is not switched at the background symbol switching point as shown in FIG. If it is within 10 seconds after the start of the variation of the second decorative symbol, in order to switch the variation pattern of the background symbol at the switching point of the background symbol as shown in FIG. A switching flag indicating that switching of the variation pattern is performed at the switching point is set (step S648).

  Next, the CPU 101 for effect control confirms whether or not the variation of the first decorative symbol is completed before the second decorative symbol (step S649), and the variation of the first decorative symbol is prior to the second decorative symbol. When the process ends (Y in step S649), the variable time change A flag is set (step S650). When the change time change A flag is set, as shown in FIG. 69, the change time of the background symbol is changed.

  In step S643, the fact that the background symbol is changing (Y in step S643) means that the change of the background symbol cannot be started in synchronization with the start of the change of the first decorative symbol. In this case, since the first effective start winning designation command has been received, the background symbol hold storage display is turned on (see step S633), and the first special symbol (and the first decorative symbol) starts to change immediately. As a result, one first special symbol reserved memory display is erased (the value of the first reserved memory number counter is decremented by 1; see step S419), so that the first special symbol and second special symbol reserved memory is stored. There will be a difference between the total number of displays and the number of reserved display of background symbols. Accordingly, the effect control CPU 101 increments the value of the difference counter by +1 (step S651).

  Next, the production control CPU 101 confirms whether or not the changing time of the changing background symbol is 20 seconds or longer (step S652). That the fluctuation time of the background symbol is 20 seconds or more means that there is a switching point in the changing background symbol. If the background symbol fluctuation time is not 20 seconds or longer (if the fluctuation time is 10 seconds), the processing is terminated. If the background symbol variation time is 20 seconds or more, the effect control CPU 101 confirms whether or not the timing of receiving the first variation pattern command is within 10 seconds after the background symbol variation start (step S653). . The fact that it is not within 10 seconds after the start of the background symbol change means that the change of the first decorative symbol is started after the switching point. In this case, the process is terminated as it is. If it is within 10 seconds after the start of the change of the background symbol, the change of the first decorative symbol is started before the switching point. Therefore, the effect control CPU 101 switches the change pattern at the switching point. Is set (step S654).

  Next, the production control CPU 101 checks whether or not the variation time of the first decorative design designated by the first variation pattern command is 20 seconds or longer (step S655). This is because it is not necessary to change the fluctuation time of the background symbol as shown in FIG. 68 unless the variation time of the first decorative symbol is 20 seconds or longer. If the variation time of the first decorative symbol is not 20 seconds or longer, the processing is terminated as it is. If the variation time of the first decorative symbol is 20 seconds or more, the effect control CPU 101 has started the variation of the changing background symbol in synchronization with the second decorative symbol (that is, the background symbol is currently the second decorative symbol). Whether it is changing in synchronization with the symbol) is checked (step S656). Whether or not the background symbol is started to change in synchronization with the second decorative symbol is, for example, the value of the background variation time timer that measures the variation time of the background symbol and the second variation time that measures the variation time of the second decorative symbol. This is done by checking whether the timer value is the same value.

  As shown in FIG. 68, the fact that the background symbol has started to fluctuate synchronously with the second decorative symbol means that the second symbol (the first decorative symbol in FIG. 68) and the background symbol have started to fluctuate synchronously. This means that the variation of the first decorative symbol (second decorative symbol in FIG. 68) has started within 10 seconds after the start of the variation. In such a case, the production control CPU 101 confirms whether or not the variation of the first decorative symbol ends after the second decorative symbol (and the background symbol) (step S657), and after the second decorative symbol. When the variation of the first decorative design is completed (Y in step S657), the variation time change B flag is set (step S658). When the variation time change B flag is set, the variation time of the background symbol is changed as shown in FIG.

  When it is determined in step S641 that the command is not the first variation pattern command but the second variation pattern command (N in step S641), the effect control CPU 101 performs the same processing as steps S641 to S658 shown in FIG. A process when the second variation pattern command of the content is received is executed. That is, the effect control CPU 101 sets a second variation pattern reception flag indicating that the second variation pattern has been received (step S662). Then, it is confirmed whether or not the background symbol is changing (step S663). The fact that the background symbol is not changing (N in step S663) means that the change of the background symbol can be started in synchronization with the start of the change of the second decorative symbol, so the change of the background symbol starts. A background symbol fluctuation start flag indicating that it is possible is set (step S664).

  Next, the production control CPU 101 checks whether or not the first decorative symbol is changing (step S665). Whether or not the first decorative symbol is changing is determined by checking whether or not the value of the first decorative symbol process flag is a value indicating the first variable pattern command reception waiting process. When the value of the first decorative symbol process flag is a value indicating the first variation pattern command reception waiting process, the first decorative symbol process flag is not changing and the value of the first decorative symbol process flag is the first variable pattern command received. When the value does not indicate the waiting process, the first decorative symbol is changing.

  If the first decorative symbol is not changing, the process is terminated as it is. When the first decorative symbol is changing, the effect control CPU 101 checks whether or not the changing time of the changing first decorative symbol is 20 seconds or longer (step S666). That the variation time of the first decorative symbol is 20 seconds or more means that the variation pattern may be switched at the background symbol switching point where the variation starts thereafter. If the variation time of the first decorative symbol is not 20 seconds or more (if the variation time is 10 seconds), the processing is terminated. If the variation time of the first decorative symbol is 20 seconds or more, the effect control CPU 101 confirms whether or not the timing of receiving the second variation pattern command is within 10 seconds after the first decorative symbol variation starts. (Step S667). If it is not within 10 seconds after the start of the first decorative symbol variation, the background symbol variation pattern is not switched at the background symbol switching point as shown in FIG. If it is within 10 seconds after the start of the first decorative symbol variation, the effect control CPU 101 performs the background symbol variation pattern switching at the background symbol switching point as shown in FIG. A switching flag indicating that the change pattern is switched at the switching point is set (step S668).

  Next, the CPU 101 for effect control confirms whether or not the variation of the second decorative symbol is finished before the first decorative symbol (step S669), and the variation of the second decorative symbol is prior to the first decorative symbol. When the process ends (Y in step S669), the variable time change A flag is set (step S670). When the change time change A flag is set, as shown in FIG. 69, the change time of the background symbol is changed.

  In step S663, the fact that the background symbol is changing (Y in step S663) means that the background symbol cannot be changed in synchronization with the start of the second decorative symbol change. In this case, the background symbol hold storage display is turned on because the second valid start winning designation command has been received (see step S633), and the second special symbol (and the second decorative symbol) starts to change immediately. As a result, one second special symbol reserved memory display is erased (the value of the second reserved memory counter is decremented by 1), so the total number of reserved memory displays of the first special symbol and the second special symbol And a difference between the number of reserved display of the background symbol and the number of background symbols. Therefore, the effect control CPU 101 increments the value of the difference counter by +1 (step S671).

  Next, the effect control CPU 101 checks whether or not the changing time of the changing background symbol is 20 seconds or longer (step S672). That the fluctuation time of the background symbol is 20 seconds or more means that there is a switching point in the changing background symbol. If the background symbol fluctuation time is not 20 seconds or longer (if the fluctuation time is 10 seconds), the processing is terminated. If the background symbol variation time is 20 seconds or more, the effect control CPU 101 confirms whether or not the timing of receiving the second variation pattern command is within 10 seconds after the background symbol variation start (step S673). . The fact that it is not within 10 seconds after the start of the background symbol change means that the change of the first decorative symbol is started after the switching point. In this case, the process is terminated as it is. If it is within 10 seconds after the start of the change of the background design, the change of the second decorative design is started before the switching point. Therefore, the effect control CPU 101 switches the change pattern at the switching point. Is set (step S674).

  Next, the effect control CPU 101 confirms whether or not the variation time of the second decorative design designated by the second variation pattern command is 20 seconds or longer (step S675). This is because it is not necessary to change the variation time of the background symbol as shown in FIG. 68 unless the variation time of the second decorative symbol is 20 seconds or longer. If the variation time of the second decorative symbol is not 20 seconds or more, the process is terminated as it is. If the variation time of the second decorative symbol is 20 seconds or more, the effect control CPU 101 has started the variation of the changing background symbol in synchronization with the first decorative symbol (that is, the background symbol is currently the first decorative symbol). It is confirmed whether or not it is changing in synchronization with the symbol (step S676). Whether or not the background symbol has started to change in synchronization with the first decorative symbol is, for example, the value of the background variable time timer that measures the variation time of the background symbol and the first variation time that measures the variation time of the first decorative symbol. This is done by checking whether the timer value is the same value.

  As shown in FIG. 68, when the background design starts to change in synchronization with the first decorative design, the first design and the background design start to change synchronously, and within 10 seconds after the start of the change. It means that the variation of the second decorative design has started. In such a case, the production control CPU 101 confirms whether or not the variation of the second decorative symbol ends after the first decorative symbol (and the background symbol) (step S677), and after the first decorative symbol. When the variation of the second decorative symbol is completed (Y in step S677), the variation time change B flag is set (step S678). When the variation time change B flag is set, the variation time of the background symbol is changed as shown in FIG.

  FIG. 79 is a flowchart showing the first decorative symbol process (step S705) in the main process shown in FIG. In the first decorative symbol process, the effect control CPU 101 performs any one of steps S800 to S805 according to the value of the first decorative symbol process flag. In each process, the following process is executed. Note that the second decorative symbol process (step S706) is also different in that the control target is the second decorative symbol variably displayed in the second decorative symbol display area 9c of the variable display device 9. It is configured in the same way as process processing.

  First variation pattern command reception waiting process (step S800): It is confirmed whether or not a variation pattern designation effect control command (first variation pattern command) has been received by the command reception interrupt process. Specifically, it is confirmed whether or not a flag (first fluctuation pattern reception flag) indicating that the first fluctuation pattern command has been received is set. The first variation pattern reception flag is set in the process of step S642. When the first variation pattern command is received, the variation time of the first decorative design designated by the first variation pattern command is confirmed and determined. Then, the value of the first decorative symbol process flag is updated to a value corresponding to the first decorative symbol variation start process (step S801).

  First decorative symbol variation start process (step S801): Control is performed so that the variation of the first decorative symbol is started. Then, the value of the first decorative symbol process flag is updated to a value corresponding to the first decorative symbol changing process (step S802).

  First decorative symbol variation processing (step S802): The end of the variation time of the first decorative symbol determined according to the variation pattern is monitored. When the variation time ends, the value of the first decorative symbol process flag is updated to a value corresponding to the first decorative symbol stop process (step S803).

  First decorative symbol stop process (step S803): Control is performed to finally stop the change of the first decorative symbol and display the stopped symbol. Then, the value of the first decorative symbol process flag is updated to a value corresponding to the first jackpot display process (step S804).

  First jackpot display process (step S804): The jackpot display is controlled. Then, the value of the first decorative symbol process flag is updated to a value corresponding to the first big hit game process (step S805).

  First big hit game processing (step S805): Control during the big hit game is performed. For example, when an effect control command such as a display when the special winning opening is opened or a display after opening the special winning opening (display during closing of the special winning opening) is received, the display control of the number of rounds is performed. When the big hit game ends, the value of the first decorative symbol process flag is updated to a value corresponding to the first variation pattern command reception waiting process (step S800).

  FIG. 80 is a flowchart showing the first variation pattern command reception waiting process (step S800). In the first variation pattern command reception waiting process, the effect control CPU 101 confirms whether or not the first variation pattern reception flag is set (step S811), and when the flag is set, the first variation pattern reception is received. The flag is reset (step S812). Then, based on the contents specified by the first variation pattern command, the variation time of the first decorative symbol is determined (step S813), and the value of the first decorative symbol process flag is set to a value indicating the first decorative symbol variation start processing. Update (step S814). Note that the stop symbol of the first decorative symbol that is derived and displayed when the fluctuation is stopped is already determined and stored in the process of step S616. The effect control CPU 101 starts the control for changing the first decorative symbol based on the stop symbol and the variation time of the first decorative symbol set as described above.

  FIG. 81 is a flowchart showing the first decorative symbol variation start process (step S801). In the first decorative symbol variation starting process, the effect control CPU 101 starts the variable display of the first decorative symbol in the first decorative symbol display area 9b of the variable display device 9 (step S815). Then, the variation time of the first decorative symbol determined in step S813 is set in the first variation time timer and started (step S816). Thereafter, the value of the first decorative symbol process flag is updated to a value indicating the first decorative symbol changing process (step S817).

  FIG. 82 is a flowchart showing the first decorative symbol variation process (step S802). In the first decorative symbol variation process, the production control CPU 101 confirms whether or not the first variation interruption flag is set (step S821). If the variation interruption flag is not set, has the interruption command been received? It is confirmed whether or not (step S822). If the interruption command has not been received, the production control CPU 101 decrements the value of the first variation time timer by -1 (step S823), and continuously executes the variation display of the first decorative symbol (step S824). Further, the effect control CPU 101 checks whether or not the first variation time timer has timed out (step S825), and when timed out, the value of the first decorative symbol process flag is a value indicating the first decorative symbol stop process. (Step S826).

  If the interruption command has been received, the CPU 101 for effect control sets the first fluctuation interruption flag (step S827), and stops displaying the shifted symbol in the first decorative symbol display area 9b of the variable display device 9 (step S828). ). Further, it may be configured to display in the first decorative symbol display area 9b to notify that the variation of the first decorative symbol is continuing (step S829). In the example shown in FIG. 65, the background symbol display area 9a of the variable display device 9 is displayed to notify that the variation of the decorative symbol (second decorative symbol in FIG. 65) is continuing. When the decorative design is stopped and displayed in the process of step S828, the effect control CPU 101 does not stop the decorative design completely, but changes the decorative design (eg, moves up and down or returns). Such variation may be repeated).

  If it is confirmed in step S821 that the variable interruption flag is set (Y in step S821), the production control CPU 101 confirms whether or not a restart command has been received (step S830). If the restart command has been received, the first variation interruption flag is reset (step S831), and the variation of the first decorative symbol is resumed in the first decorative symbol display area 9b of the variable display device 9 (step S832). And the process of step S823-S826 is performed. If the restart command has not been received (N in step S830), the first decorative symbol variation process is terminated.

  As described above, when the big hit symbol is derived and displayed in the second decorative symbol display area 9c of the variable display device 9 and the effect control CPU 101 enters the big hit gaming state, the first control based on the reception of the interruption command. The variable interruption flag is set and the variable interruption process is performed. Then, control is performed so that the processes in steps S823 to S826 are not executed until a restart command is received. That is, control is performed so as not to change the first decorative design.

  FIG. 83 is a flowchart showing the background symbol process (step S707) in the main process shown in FIG. In the background symbol process, the effect control CPU 101 determines that the value of the background symbol process flag is a variation start waiting process (a low base background symbol variation start waiting process (step S850 described later) and a high base background symbol variation start waiting process ( It is confirmed whether or not the value indicates (step S900)) (step S841). That the value of the background symbol process flag is a value indicating the variation start waiting process means that the state is before the variation of the background symbol is started.

  When the value of the background symbol process flag is a value indicating the change start waiting process (Y in step S841), it is confirmed whether or not the gaming state is a high base state (step S842). When the gaming state is not the high base state but the low base state (N in step S842), the effect control CPU 101 designates that the display result (stop symbol) of the second decorative symbol is a big hit (first step). It is determined whether or not the second decorative symbol is a big hit by confirming whether or not a two-probability big hit designation command, a second normal big hit designation command) has been received (step S843).

  As described above, when the gaming state is the low base state, the background symbol changes in synchronization with the first decorative symbol (and the first special symbol). That is, the background symbol varies based on the first start winning prize. On the other hand, when the second start prize is generated, the jackpot determination is executed, and a display result command for designating the display result of the second decorative symbol is transmitted from the game control microcomputer 560 based on the determination result. The effect control CPU 101 needs to execute a jackpot game when the display result command is a command that specifies a jackpot. Therefore, it is monitored whether or not the display result command for designating the display result of the second decorative symbol is a command for designating the big hit, and if the command is for designating the big hit, the following steps S844 to S846 are executed. To do. Although not shown in FIG. 75, in the command analysis process, a flag indicating the occurrence of a big hit of the second decorative symbol is set when the second certainty big hit designation command and the second normal big hit designation command are received. By checking the flag, the control CPU 101 can confirm whether or not the second certain variation jackpot designation command and the second normal jackpot designation command have been received.

  In step S844, the effect control CPU 101 suddenly selects a process table for big hit. Then, the process timer is started (step S845), and the value of the background symbol process flag is updated to a value indicating the low base jackpot display process (step S846).

  When the gaming state is in the low base state, the effect control CPU 101 executes low base background symbol process processing that is background symbol process processing in the low base state (step S847).

  In step S842, when the gaming state is the high base state (Y in step S842), the effect control CPU 101 executes the high base background symbol process processing which is the background symbol process processing in the high base state ( Step S848).

  Thus, when the gaming state is the low base state, the low base background symbol process (step S847) is executed, and when the gaming state is the high base state, the high base background symbol process (step S848) is executed. By the way, the gaming state is changed from the high base state to the low base state at a predetermined timing, and is changed from the low base state to the high base state. In this case, when the gaming state is the low base state, the first decorative symbol (and the first special symbol) and the background symbol are fluctuated synchronously, so that the background symbol process processing is performed at the start of the variation of those symbols. It is possible to change from the low base background symbol process to the high base background symbol process. However, when the gaming state is the high base state, the first decorative symbol (and the first special symbol) and the background symbol are not necessarily changed synchronously, so that the background symbol at the start of the change of those symbols. In some cases, the process processing cannot be changed from the high base background symbol process to the low base background symbol process. In addition, it may be possible to change the background design process for the high base to the background design process for the low base in the middle of the fluctuation of the background design, but the control may become complicated and the continuity of the background design variation may be impaired. This is not preferable. Therefore, in the control shown in FIG. 83, in step S841, it is confirmed whether the value of the background symbol process flag is a value indicating the variation start waiting process, and the value of the background symbol process flag is a value indicating the variation start waiting process. At some time (Y in step S841), the background symbol process is switched according to the gaming state at that time (steps S842, S847, S848).

  In step S841, when the value of the background symbol process flag is not a value indicating the fluctuation start waiting process (N in step S841), the effect control CPU 101 is currently executing the low base background symbol process. (Step S849), when the background design process for low base is being executed, the process proceeds to step S843 to execute the background design process for low base as it is, and the background design process for high base is executed. When the process is being executed, the high base background symbol process is executed as it is (step S848).

  FIG. 84 is a flowchart showing the low base background symbol process in step S847. In the low base background symbol process, the effect control CPU 101 performs one of steps S850 to S856 in accordance with the value of the background symbol process flag. In each process, the following process is executed.

  Low base background symbol variation start waiting process (step S850): It is confirmed whether or not an effect control command (first variation pattern command) for designating the variation pattern of the first decorative symbol has been received by the command reception interrupt process. Specifically, it is confirmed whether or not a flag (first fluctuation pattern reception flag) indicating that the first fluctuation pattern command has been received is set. When the first variation pattern command is received, the variation pattern of the background symbol is determined based on the content of the first variation pattern command, and the value of the background symbol process flag corresponds to the low base notice selection processing (step S851). Update to the specified value.

  Low-base notice selection process (step S851): Whether or not a notice effect is to be executed and a mode of the notice effect when the notice effect is executed are selected. Then, the value of the background symbol process flag is updated to a value corresponding to the background symbol variation start process for low base (step S852).

  Low base background symbol variation start processing (step S852): Control is performed so that the variation of the background symbol is started. Further, a value corresponding to the variation time is set in the background variation time timer, the process table to be used is selected, and the process timer set value set at the beginning of the process table is set in the process timer. Then, the value of the background symbol process flag is updated to a value corresponding to the low base background symbol changing process (step S853).

  Low base background symbol variation processing (step S853): The switching timing of each variation state (variation speed) constituting the variation pattern is controlled. If it is determined that the notice effect is to be executed in the notice selection process (step S851), the notice effect is also executed while the background symbol is changing. Then, the value of the background symbol process flag is updated to a value corresponding to the background symbol stop process for low base (step S854).

  Low base background symbol stop processing (step S854): Control is performed to finally stop the change of the background symbol and display the stop symbol. If the stop symbol is an off symbol, the value of the background symbol process flag is updated to a value corresponding to the low base background symbol fluctuation start waiting process (step S850). If the stop symbol is a big hit symbol, the background symbol is updated. The value of the process flag is updated to a value corresponding to the low base jackpot display process (step S855).

  Low-base jackpot display processing (step S855): Control of jackpot display is performed. Then, the value of the background symbol process flag is updated to a value corresponding to the low base big hit game processing (step S907).

  Low base jackpot game processing (step S856): Control during jackpot game is performed. For example, display control of the number of rounds, interval display control between rounds, and the like are performed. When the big hit game ends, the value of the background symbol process flag is updated to a value corresponding to the low base background symbol change start waiting process (step S850).

  FIG. 85 is a flowchart showing low base background symbol change start waiting processing (step S850). In the low base background symbol variation start waiting process, the effect control CPU 101 checks whether or not the first variation pattern reception flag is set (step S861), and when the flag is set, the first variation pattern is received. The reception flag is reset (step S862). Further, the effect control CPU 101 decrements the value of the reserved memory display number counter by -1 (step S863), and deletes one background symbol reserved memory display (step S865). Then, the background symbol variation pattern (variation time) is determined based on the content designated by the first variation pattern command (step S864), and the background symbol process flag value is set to the low base notice selection processing (step S851). ) Is updated to a value indicating () (step S866). It should be noted that the stop symbol of the background symbol that is derived and displayed when the fluctuation is stopped is already determined and stored in the process of step S616. The effect control CPU 101 starts the control of changing the background symbol based on the stop symbol and the changing pattern of the background symbol set as described above.

  FIG. 86 is a flowchart showing the low-base notice selection process (step S851). In the low base notice selection process, the effect control CPU 101 determines whether or not the variation pattern determined in the low base background symbol variation start waiting process is a variation pattern with reach (step S871). If it is not the variation pattern with reach (N in step S871), the effect control CPU 101 does not execute the process as it is, and corresponds the value of the background symbol process flag to the low base background symbol variation start process (step S852). The value is changed (step S878).

  If it is a variation pattern with reach (Y in step S871), the effect control CPU 101 extracts a notice determination random number (step S872), and whether or not the notice effect is executed based on the extracted value of the notice determination random number. And the mode of the notice effect are determined (step S873).

  FIG. 87 is an explanatory diagram of an example of the notice determination table. In the example shown in FIG. 87, if the value of the random number for determination of a notice (in this example, any one of 0 to 7) is 0, 1, or 3, it is determined to perform a notice effect of the effect form of the notice effect A. The Further, if the value of the random number for determining the notice is 5, it is decided to perform the notice effect of the effect form of the notice effect B. Further, if the value of the random number for determining the notice is 7, it is decided to perform the notice effect of the effect form of the notice effect C. If the value of the random number for determining the notice is 2 or 4, it is decided not to perform the notice effect.

  Next, when it is determined that the notice effect is to be executed (Y in Step S874), the effect control CPU 101 stores the notice effect mode in a predetermined storage area (notice mode storage area) in the RAM (Step S875). Also, a notice execution timer for measuring the execution timing of the notice effect is started (step S876). Further, a notice execution flag indicating that the notice effect is to be executed is set (step S877). Thereafter, the effect control CPU 101 changes the value of the background symbol process flag to a value corresponding to the low base background symbol fluctuation start process (step S852) (step S878).

  FIG. 88 is an explanatory diagram of a configuration example of the process table. The process table includes data in which a plurality of combinations of process timer set values, display control execution data, lamp control execution data, and sound number data are collected. The display control execution data describes each variation mode constituting a variation mode during variable display time (variation time) of variable display. The process timer set value is set with a change time in the form of the change. The effect control CPU 101 refers to the process table, and performs control for variably displaying the background symbol in the variation mode set in the display control execution data for the time set in the process timer set value.

  In addition, similar to the control based on the display control execution data, the effect control CPU 101 controls the lighting state of various lamps based on the lamp control execution data for the time set in the process timer set value, and obtains the sound number data. Output to the audio output board 70.

  The process table shown in FIG. 88 is stored in the ROM of the effect control board 80 (the effect control microcomputer 100). Moreover, the process table is prepared according to each variation mode according to each variation pattern. In this embodiment, when it is time to execute the notice effect during the fluctuation of the background symbol, the notice effect of the predetermined effect mode selected from the plural kinds of notice effects is displayed in the background symbol display area of the variable display device 9. Although executed at 9a, the effect control CPU 101 synthesizes and displays an image such as a character or character for the notice effect on the image displayed in the background symbol display area 9a, and outputs the notice sound as a sound. The notice effect is executed. It should be noted that different process tables are prepared depending on whether or not the notice effect is executed and the effect mode, and when the notice effect is executed, the CPU 101 for effect control selects the process table for executing the notice effect and selects the selected process table. The notice effect may be executed at a predetermined timing based on the table.

  FIG. 89 is a flowchart showing the low base background symbol variation start process (step S852). In the low base background symbol variation start processing, the effect control CPU 101 first selects process data corresponding to the variation pattern of the decorative symbol to be used (step S881). Then, the process timer set value in the selected process data 1 is set in the process timer and the process timer is started (step S882). Next, the effect control CPU 101 executes control of the effect device (variable display device 9, various lamps, speaker 27) according to the contents of the process data 1 (display control execution data 1, lamp control execution data 1, sound number data 1). (Step S843). For example, a control signal is output to the VDP 109 in order to display an image corresponding to the variation pattern on the variable display device 9. Further, a control signal is output to the lamp driver board 35 in order to perform various lamp on / off control. In addition, a control signal (sound number data) is output to the sound output board 70 in order to output sound from the speaker 27.

  Thereafter, the CPU 101 for effect control starts a background variation time timer (timer corresponding to the variation time of the background symbol) (step S884), and sets the value of the background symbol process flag to the low base background symbol variation processing (step S853). (Step S885).

  FIG. 90 is a flowchart showing the low base background symbol changing process (step S853). In the low base background symbol changing process, the effect control CPU 101 confirms whether or not the notice execution flag is set (step S891a). If the notice execution flag is set (Y in step S891a), the notice is notified. It is confirmed whether or not the execution timer has timed out (step S891b). When the notice execution timer times out (step S891b, Y), the effect control CPU 101 executes the notice effect in the form stored in the notice form storage area of the RAM (step S891c).

  Next, the production control CPU 101 subtracts 1 from the value of the process timer (step S892a), and checks whether the process timer has timed out (step S892b). When the process timer times out (Y in step S892b), the effect control CPU 101 switches the process data (step S892c). That is, the process data (display control execution data, lamp control execution data, and sound number data) set next in the process table is switched. Then, the process timer set value in the next process data is set in the process timer and the process timer is started (step S892d).

  Next, the effect control CPU 101 executes control of the effect device (variable display device 9, various lamps, speaker 27) according to the contents of the process data (display control execution data, lamp control execution data, sound number data) (step S893). ). For example, when the variation pattern with reach is selected, the rendering device is controlled according to the contents of the process data of the variation pattern with reach. Specifically, at a predetermined timing after the start of fluctuation, the left and right background symbols that are variably displayed on the variable display device 9 are stopped and displayed in the same pattern to generate normal reach.

  Then, the production control CPU 101 sets the value of the background variation time timer to −1 (step S894), checks whether the variation time timer has timed out (step S895), and when the variation time timer has timed out (step S895). Y), the value of the background symbol process flag is updated to a value indicating the low base background symbol stop process (step S854) (step S896).

  By the background design process for the low base as described above, the variable display of the background design in the variable display device 9 in the low base state is executed.

  FIG. 91 is a flowchart showing the high base background symbol process in step S848. In the high base background symbol process, the effect control CPU 101 performs one of steps S900 to S907 according to the value of the background symbol process flag. In each process, the following process is executed.

  High base background symbol variation start waiting process (step S900): It is confirmed whether or not the background symbol variation start condition (third start condition) is satisfied. Specifically, when the background symbol variation start flag is set in step S644 or step S664, it is determined that the variation of the background symbol can be started in synchronization with the first ornament symbol or the second ornament symbol. Even when the background symbol variation start flag is not set, if the value of the difference counter is 1 or more, it is determined that the variation of the undigested or dummy background symbol must be started. When the background symbol variation start condition is satisfied, the background symbol variation time and variation mode (background symbol variation speed during the variation period, background, character type, character display start timing, etc.) are determined. Then, the value of the background symbol process flag is updated to a value corresponding to the high base notice selection process (step S901).

  High-base notice selection process (step S901): It is determined whether or not to execute the notice effect, and the effect form of the notice effect when it is executed. Then, the value of the background symbol process flag is updated to a value corresponding to the background symbol variation start process for high base (step S902).

  High base background symbol variation start processing (step S902): Control is performed so that the variation of the left middle right background symbol is started. Then, the value of the background symbol process flag is updated to a value corresponding to the high base background symbol changing process (step S903). In addition, when it is necessary to change the variation time at the start of variation of the background symbol, processing for changing the variation time of the background symbol is also performed.

  High base background symbol variation processing (step S903): Control of background symbol variation display is executed. When it is determined to execute the notice effect, the notice effect is executed at a predetermined timing. Further, when it is necessary to switch the variation pattern at the switching point, the variation pattern is switched. When the change pattern is switched, the value of the background symbol process flag is updated to a value corresponding to the changing processing after the high base background symbol change (step S904). Also, the end of the fluctuation time of the background symbol is monitored. When the background symbol variation time ends, the value of the background symbol process flag is updated to a value corresponding to the high base background symbol stop process (step S905). In the high base background symbol variation processing, the switching timing of each variation state (variation speed) constituting the variation pattern is also controlled.

  High base background symbol change processing (step S904): Control of the background symbol change display after the change of the change pattern is executed. Further, when it is necessary to execute a notice effect, a notice effect in a predetermined effect mode is executed at a predetermined timing. Also, the end of the fluctuation time of the background symbol is monitored. When the background symbol variation time ends, the value of the background symbol process flag is updated to a value corresponding to the high base background symbol stop process (step S905). Note that, also in the process of changing after the high base background symbol switching, the switching timing of each fluctuation state (fluctuation speed) constituting the fluctuation pattern is controlled.

  High base background symbol stop process (step S905): Control is performed to finally stop the change of the background symbol and display the stop symbol. If the stop symbol is an off symbol, the value of the background symbol process flag is updated to a value corresponding to the high base background symbol variation start waiting process (step S900). If the stop symbol is a big hit symbol, the background symbol is updated. The value of the process flag is updated to a value corresponding to the high base jackpot display process (step S906).

  High base jackpot display process (step S906): Control of the jackpot display is performed. Then, the value of the background symbol process flag is updated to a value corresponding to the high base big hit game processing (step S907).

  High base big hit game processing (step S907): Control during big hit game is performed. For example, display control of the number of rounds, interval display control between rounds, and the like are performed. When the big hit game ends, the value of the background symbol process flag is updated to a value corresponding to the high base background symbol variation start waiting process (step S900).

  FIG. 92 is a flowchart showing the high base background symbol change start waiting process (step S900). In the high base background symbol variation start waiting process, the effect control CPU 101 first checks whether or not the symbol forced synchronization flag is set (step S910A). For example, when the first decorative symbol and the background symbol are changing in synchronization, the symbol forced synchronization flag is set when the change of the second decorative symbol that is a big hit is started (see step S619). If the symbol forced synchronization flag is set (Y in step S910A), the production control CPU 101 determines a variation pattern based on the remaining variation time of the decorative symbol that becomes a big hit (step S960A). For example, when the change of the second decorative symbol that becomes a big hit is started after the switching point in the variation of the first decorative symbol and the background symbol has elapsed, and the variation time of the second decorative symbol is 30 seconds, After the decoration symbol and the background symbol have been changed, the first decoration symbol and the background symbol are newly changed in synchronization. At this time, Y is determined in step S910A, and a variation pattern corresponding to the remaining variation time (for example, 25 seconds) of the second decorative symbol is determined in step S910B. Thereafter, the value of the background symbol process flag is updated to a value indicating the high base notice selection process (step S916).

  When the symbol forced synchronization flag is not set (N in Step S910A), the effect control CPU 101 checks whether or not the background symbol variation start flag is set (Step S911). The fact that the background symbol variation start flag is set means that the variation of the background symbol can be started in synchronization with the variation start of the first decorative symbol or the second decorative symbol. When the background symbol variation start flag is set (Y in step S911), the background symbol variation start flag is reset (step S912). Then, the production control CPU 101 determines the variation pattern of the background symbol based on the content of the variation pattern command (variation pattern command for designating the variation pattern of the decorative symbol whose variation starts in synchronization with the background symbol) (step). S913).

  Note that whether the decorative symbol whose variation starts in synchronization with the background symbol is the first decorative symbol or the second decorative symbol is determined by, for example, setting the background symbol variation start flag to the first background symbol variation start flag (step S644). And a second background symbol variation start flag (flag set in step S664), and may be identified according to which flag is set.

  In step S913, it is determined whether or not the value of the difference counter is greater than or equal to a predetermined value (for example, 3). For example, it may be configured to select a special fluctuation pattern that stops twice and appears to have been executed three times within 10 seconds. In this case, when each background symbol is stopped, the reserved memory display of the background symbol is deleted, the value of the reserved memory display number counter is decreased by 1, and the value of the difference counter is decreased by 1.

  Then, the production control CPU 101 decrements the value of the reserved memory display number counter by -1 (step S914), and deletes one background symbol reserved memory display (step S915). Thereafter, the value of the background symbol process flag is updated to a value indicating the high base notice selection process (step S916).

  In step S911, when the background symbol variation start flag is not set (N in step S911), the effect control CPU 101 checks whether or not the value of the difference counter is 1 or more (step S917). If the value of the difference counter is 1 or more, it means that an undigested background symbol variation exists, or that a dummy background symbol variation based on an invalid start prize must be performed. In this case, the value of the difference counter is decremented by -1 (step S918), and the fluctuation pattern with the shortest fluctuation time (10 in the normal gaming state) is used to digest the undigested fluctuation and the dummy fluctuation as soon as possible. A fluctuation pattern of seconds, or a fluctuation pattern of 5 seconds when the time is short state is determined (step S919). And the process of step S914-step S916 mentioned above is performed.

  FIG. 93 is a flowchart showing the high-base notice selection process (step S901). In the high base notice selection process, the effect control CPU 101 confirms whether or not the change pattern to start changing from now on is a change pattern with reach (step S921). In the case of a variation pattern with reach, the effect control CPU 101 extracts a notice determination random number (step S922), and whether or not to perform a notice effect based on the notice determination random number and the notice determination table. An effect mode of the notice effect is determined (step S923).

  Note that the notice determination table used when determining the presence / absence of execution of the notice effect and the effect mode may be the one shown in FIG.

  Next, when it is determined that the notice effect is to be executed in step S923 (step S924), the effect control CPU 101 stores the decided notice mode in a predetermined storage area (for example, a notice mode storage area) in the RAM. (Step S925). Then, a notice execution timer for measuring the execution timing of the notice effect is started, and a notice execution flag indicating that the notice effect is to be executed is set (steps S926 and S927). Thereafter, the effect control CPU 101 updates the value of the background symbol process flag to a value indicating the high base background symbol variation start process (step S928).

  FIG. 94 is a flowchart showing the high base background symbol variation start process (step S902). In the high base background symbol variation start processing, the effect control CPU 101 first selects a process table corresponding to the background symbol variation pattern to be used (step S931). Then, the process timer setting value of the process data 1 in the selected process table is set in the process timer and the process timer is started (step S932). The effect control CPU 101 sets the background symbol variation time timer in accordance with the variation pattern of the background symbol to be used in the background symbol variation time timer and starts the operation (step S933).

  Next, the production control CPU 101 confirms whether or not the variation time change prohibition flag is set (step S934). The fact that the change time change prohibition flag is set indicates that a big hit will occur in the change starting from now. If the variation time change prohibition flag is set, the process proceeds to step S936 without executing the processes in steps S935A to S935E.

  If the change time change prohibition flag is not set, the effect control CPU 101 checks whether or not the change time change A flag is set (step S935A). If the variable time change A flag is not set, the process proceeds to step S936 without executing the processes in steps S935B to S935E. If the variation time change A flag is set, the situation shown in FIG. 69 (the variation of the other decorative design starts during the variation of one decorative design, and the background design is synchronized with the variation of the other decorative design. This is a situation in which fluctuation starts. In this case, the effect control CPU 101 resets the variation time change A flag (step S935B). Then, the fluctuation time of the background symbol to be extended (the fluctuation time for the extension) is calculated (step S935C).

  Specifically, in the example shown in FIG. 69, when the background symbol starts to change, the remaining variation time of the second decorative symbol is 15 seconds, and the variation time of the first decorative symbol and the background symbol is 10 seconds. is there. As described with reference to FIG. 69, the background symbol variation end timing is made to coincide with the second decorative symbol variation end timing, so the background symbol variation time is extended to 15 seconds. That is, the background symbol variation time is extended by 5 seconds.

  The effect control CPU 101 adds the calculated variation time to the process timer (step S935D), and adds the variation time to the background variation time timer (step S935E). Thereby, the fluctuation time of the normal fluctuation from the fluctuation start to the switching point is extended.

  Next, the effect control CPU 101 executes control of the effect device (variable display device 9, various lamps, speaker 27) according to the contents of the process data 1 (display control execution data 1, lamp control execution data 1, sound number data 1). (Step 936). For example, a control signal (display control execution data) is output to the VDP 109 in order to display an image corresponding to the variation pattern in the background symbol display area 9 a of the variable display device 9. In addition, a control signal (lamp control execution data) is output to the lamp driver board 35 in order to perform on / off control of various lamps. In addition, a control signal (sound number data) is output to the sound output board 70 in order to output sound from the speaker 27. Then, the value of the background symbol process flag is updated to a value indicating the high base background symbol changing process (step S903) (step S937).

  95 and 96 are flowcharts showing the high base background symbol changing process (step S903). In the high base background symbol changing process, the effect control CPU 101 checks whether or not the notice execution flag is set (step S941). If the notice execution flag is set, the value of the notice execution timer is decremented by 1 (step S942), and it is determined whether the notice execution timer has timed out (step S943). If the notice execution timer has timed out, a notice effect in a predetermined mode is executed (step S944). For example, a notice effect as shown in FIG. 73 (display of characters “Maybe”) is executed. Then, the production control CPU 101 resets the advance notice execution flag (step S945) and sets the advance notice execution flag (step S946).

  Next, the effect control CPU 101 controls the effect device (variable display device 9, lamp / LED, speaker 27) according to the contents of the process data n (step S947). Then, the value of the process data is set to −1 (step S948), and it is determined whether or not the process timer has timed out (step S949). If the process timer has timed out, the process data is switched (step S950). That is, the process timer set value set next in the process table is set in the process timer, and the control for the effect device is performed based on the display control execution data, lamp control execution data, and sound number data set next. Change state. Then, the process timer is started (step S951).

  Next, the effect control CPU 101 checks whether or not the variation time change prohibition flag is set (step S952). If the variable time change prohibition flag is set, the process proceeds to step S958 without executing the processes in steps S953 to S957. If the change time change prohibition flag is not set, the effect control CPU 101 confirms whether or not the change time change B flag is set (step S953). If the variable time change B flag is not set, the process proceeds to step S958 without executing the processes in steps S954 to S957. If the change time change B flag is set, the situation shown in FIG. 68 (the situation in which the change of the other decorative design is started while one decorative design is changing in synchronization with the background design). It shows that there is. In this case, the effect control CPU 101 resets the variation time change B flag (step S955). Then, the fluctuation time of the background symbol to be extended (the fluctuation time for the extension) is calculated (step S956).

  Specifically, in the example shown in FIG. 68, at the time of starting the variation of the second decorative symbol, the remaining variation time of the first decorative symbol and the background symbol is 15 seconds, and the variation time of the second decorative symbol is also 20. Seconds. As described with reference to FIG. 68, since the variation end timing of the background symbol is made to coincide with the variation end timing of the second decorative symbol, the remaining variation time of the background symbol is extended to 20 seconds. That is, the background symbol variation time is extended by 5 seconds.

  The effect control CPU 101 adds the calculated variation time to the process timer (step S956), and adds the variation time to the background variation time timer (step S957). Thereby, the fluctuation time of the normal fluctuation from the fluctuation start to the switching point is extended.

  Next, the effect control CPU 101 decrements the value of the background fluctuation time timer by 1 (step S958). Then, the effect control CPU 101 checks whether or not the symbol forced synchronization flag is set (step S959). For example, when the first decorative symbol and the background symbol are changing in synchronization, the symbol forced synchronization flag is set when the change of the second decorative symbol that is a big hit is started (see step S619). If the symbol forced synchronization flag is set, the CPU 101 for effect control newly determines a variation pattern of the background symbol based on the variation time of the decorative symbol that is a big hit (step S960A). For example, if the variation time of the second decorative symbol that is a big hit is 30 seconds, the variation pattern of the variation time of 30 seconds is determined. At the time when the process of step S960A is executed, the background symbol has normally fluctuated (high-speed fluctuation). Therefore, even if a new fluctuation pattern is determined and the fluctuation of the background symbol based on the fluctuation pattern is executed, There is no risk of discomfort.

  Next, the production control CPU 101 selects process data corresponding to the variation pattern determined in step S960A (step S960B), and starts a process timer (step S960C). In addition, the effect control CPU 101 sets the change time of the change pattern determined in step S960A to the background change time timer and starts (step S960D).

  In addition, when the background symbol based on the newly set variation pattern is executed, the background symbol stop symbol is also changed to the jackpot symbol. For example, when starting the change of the background symbol, the background symbol stop symbol is determined based on the display result command from the game control microcomputer 560, and the determined stop symbol is stored in the background symbol storage area. (See step S616). Thereafter, when a display result command designating a jackpot is transmitted from the game control microcomputer 560 after the background symbol starts to change, the background symbol stop symbol (big hit symbol) is determined, and the determined stop symbol is determined. Is stored in the background symbol storage area (an area different from the stored symbol that has already been stored) (see step S616), and the symbol forced synchronization flag is set (see steps S617 to S619). Then, in the background symbol stop process, when it is determined that the symbol forced synchronization flag is set, the off symbol stored in the background symbol storage area is changed to a big hit symbol as the stop symbol of the background symbol derived and displayed when the fluctuation is stopped. .

  Next, the effect control CPU 101 determines whether or not the background variation time timer has timed out (step S961). When the time-out occurs, the value of the background symbol process flag is updated to a value indicating the high base background symbol stop process (step S962).

  If not timed out, the effect control CPU 101 checks whether or not the value of the difference counter is 1 or more (step S963A). When the value of the difference counter is 1 or more, the process proceeds to step S964. When the value of the difference counter is not 1 or more (0), it is confirmed whether or not the switching flag is set (step S963B). At this time, the fact that the switching flag is set indicates that it is necessary to switch the variation pattern at the switching point.

  If the switching flag is set, it is determined whether or not the switching point has been reached (step S964). If the change time is not extended, the change point is the time when 10 seconds have passed since the start of change, and if the change time has been changed, the time obtained by adding the extended time to 10 seconds after the start of change has passed. (When the fluctuation time before the extension is 10 seconds as shown in FIG. 69, the time when the extension has elapsed since the fluctuation was started). Therefore, whether or not the switching point has been reached can be determined by confirming whether or not the above-mentioned time point has been reached based on the value of the background variation time timer, for example.

  If the switching point has been reached (Y in step S964), the effect control CPU 101 determines a variation pattern corresponding to the remaining variation time (step S965). For example, when the remaining fluctuation time is 10 seconds, a predetermined fluctuation pattern is determined from the fluctuation patterns of the fluctuation time of 10 seconds, and when the remaining fluctuation time is 20 seconds, the fluctuation pattern of the fluctuation time of 20 seconds is changed. A predetermined variation pattern is determined from the inside. As shown in FIG. 64 and the like, the background pattern is temporarily stopped at the switching point, and the background is displayed at the beginning of the variation pattern determined in step S965 (that is, before the normal variation is newly started). It is necessary to set a variation mode for temporarily stopping display of symbols.

  The effect control CPU 101 selects a process table corresponding to the variation pattern determined in step S965 (step S966), and starts a process timer (step S967). Then, the production control CPU 101 checks whether or not the advance notice execution flag is set (step S968). If the advance notice execution flag is set, the notice execution timer is started (step S969).

  In addition, when the notice execution flag is set, it is not necessarily limited to the configuration in which the notice effect is executed. Even when the notice execution flag is set, the fluctuation pattern is not changed at a certain rate. The notice effect may not be executed after switching. In this case, when the jackpot symbol is derived and displayed in the change after the change of the change pattern, it is preferable that the probability that the notice effect is executed is increased. Specifically, the table for determining whether or not to execute the notice is prepared separately for a table when the jackpot is won and a table when the jackpot is not hit. Then, the number of determination values set in the table with the notice when the big hit is larger than the number of determination values set with the notice in the table when the big hit is not reached. According to such a configuration, the probability that the notice effect is executed is higher when the big hit is caused by the change after switching than when the big hit is not made. The mode of the notice effect is not limited to the form shown in FIG. 73, and the notice effect that causes the character that appears before the switching to appear again after the switching, or is developed stepwise before and after the switching. Such a notice effect may be used.

  Then, the CPU 101 for effect control updates the value of the background symbol process flag to a value indicating the changing process after switching the background symbol for high base (step S970).

  When the symbol forced synchronization flag is set and the background variation time timer has not timed out in step S961 (N in step S961), the processes in steps S963A to S969 are not executed and the process in step S970 is performed. It is transferred to.

  FIG. 97 is a flowchart showing the high base background symbol changing process after switching (step S904). In the changing process after high base background symbol switching, the effect control CPU 101 first checks whether the value of the difference counter is 1 or more (step S971). That the value of the difference counter is 1 or more indicates that an undigested variation or a dummy variation needs to be executed. If the value of the difference counter is 1 or more, the effect control CPU 101 sets the value of the reserved storage display number counter to −1 (step S972), sets the value of the difference counter to −1 (step S973), and the background symbol. One pending storage display is erased (step S974).

  In this embodiment, when the changing process after high base background symbol switching is executed, it is considered that the value of the difference counter is always 1 or more, so the process of step S971 is not provided. May be.

  Next, the effect control CPU 101 confirms whether or not the advance notice completion flag is set (step S975). If the notice execution completion flag is not set, the process proceeds to step S981 without executing the processes in steps S976 to S980. If the notice execution completion flag is set, the effect control CPU 101 decrements the value of the notice execution timer by 1 (step S976), and checks whether or not the notice execution timer has timed out (step S977).

  When the notice execution timer times out, the effect control CPU 101 confirms the executed notice effect aspect stored in the notice aspect storage area (step S978). Then, the effect control CPU 101 executes a notice effect according to the form of the executed notice effect (step S979). For example, as shown in FIG. 73, when a character “Maybe” is displayed before the switching point, a notice effect is displayed to display a character “Maybe big hit?” After the switching point. Then, the effect control CPU 101 resets the advance notice execution flag (step S980).

  Next, the effect control CPU 101 controls the effect device according to the contents of the process data n (step S981). Further, the production control CPU 101 sets the value of the process timer to −1 (step S982), and checks whether the process timer has timed out (step S983). When the process timer times out, the process data is switched (step S984). Then, the process timer is started (step S985).

  Further, the effect control CPU 101 sets the value of the background variation time timer to −1 (step S986), and checks whether the variation time timer has timed out (step S987). When the background variation time timer times out, the value of the background symbol process flag is updated to a value indicating the high base background symbol stop process (step S988).

  The background symbol variable display in the variable display device 9 in the high base state is executed by the high base background symbol process.

  As described above, according to this embodiment, the game control microcomputer is configured such that when the big hit game is executed based on the fact that the stop symbol of the second special symbol has become a big hit symbol. By stopping the variation control of the special symbol (first special symbol process) (steps S313 to S315), the jackpot symbol is derived and displayed as the stop symbol of the first special symbol, and the stop symbol of the second special symbol If the second big hit flag is set and the second special symbol is fluctuating, the first special symbol is stopped. Since the control for forcibly separating the symbols (steps S60 and S66) is executed, the player is aware that the symbols that are out of order are derived and displayed as stop symbols. Can Kusuru. As a result, as in the prior art, it is possible to prevent the player from knowing whether to win or lose depending on whether or not two special symbols are changed simultaneously.

  Further, when the second big hit flag is set, the big hit determination (lottery process) is not performed. Therefore, when the big hit determination process is realized by software, the big hit determination program It is possible to realize control for forcibly disengaging only by skipping the program, and it is possible to prevent the program capacity from increasing.

  Further, since the variation of the first special symbol is stopped when the value of the second special symbol process flag becomes a value corresponding to the second big hit symbol stop process (step S313), it is simple. By the processing, the fluctuation of the first special symbol can be stopped early.

  Also, when the variation of the special symbol is stopped (when the variation time measurement is interrupted), the player is informed that the variation of the first special symbol (the first decorative symbol) is continuing. By doing so (see FIG. 65), it is possible to prevent the player from feeling distrust.

  In addition, when the variation of the special symbol is stopped (when the variation time measurement is interrupted), the two symbols are simultaneously hit big by displaying the off symbol in a stopped manner (see FIGS. 64 and 65). It can be prevented from being mistaken for becoming a symbol.

  Further, when a high base state in which winning to the second start winning opening 14 is likely to occur and a low base state in which winning to the second start winning opening 14 is unlikely to occur is provided and controlled to the low base state. In the memory display area 9d of the variable display device 9, the first reserved memory number counted by the first reserved memory number counter is displayed in an identifiable manner, and when it is controlled to the high base state, the total reserved memory number counter Since it is configured to display the total number of stored pending memories (the total of the first reserved memory number and the second reserved memory number) in an identifiable manner, a prize is awarded to the second start winning opening 14 according to the gaming state. The ease can be changed, and the upper limit of the number of reserved memory of the background symbols displayed in the memory display area 9d can be changed according to the gaming state, so that the game can be changed. . As a result, the interest of the game can be improved.

  When the low base state is controlled, when the variable display of the first special symbol (and the first decorative symbol) is started, the first special symbol is displayed in the background symbol display area 9a of the variable display device 9. The variable display of the background symbol associated with (synchronized with) the variable display is executed, and the display result of the background symbol associated with the display result of the variable display of the first special symbol when the predetermined variable display time has elapsed When the first special symbol (and the first decorative symbol) or the second special symbol (second decorative symbol) is started to be variable when the symbol is displayed in the symbol display area 9a and controlled to the high base state. In addition, in the background symbol display area 9a of the variable display device 9, the variable of the background symbol associated with the variable display of the first special symbol or the second special symbol (synchronized with either the first special symbol or the second special symbol). Execute the display When the predetermined variable display time has elapsed, the display result of the background symbol associated with the display result of the variable display of the first special symbol or the second special symbol is derived and displayed in the background symbol display area 9a. Therefore, in the low base state, the variable display of the background symbol only needs to be associated with the variable display of the first special symbol, and the control burden on the production control microcomputer 100 can be reduced.

  In addition, when the gaming state is controlled to the high base state, a switching point is provided when a predetermined time elapses after the background symbol starts to change, and the decorative symbol (special symbol) is displayed between the start of the background symbol change and the switching point. When the change starts, the background symbol is temporarily stopped at the switching point, and the reserved symbol display number of the background symbol indicating the total number of reserved symbols of the first special symbol and the second special symbol is deleted. Since it is configured, it is possible to match the start timing of the background symbol variation with the timing of erasing the stored number of stored background symbols in the background symbol, so that the player does not feel uncomfortable.

  Also, when the change of the decorative design (special design) is started after the background design change point, the change of the undigested design is memorized in the difference counter, and then the background design change point is used. When it becomes, it is configured to erase the display number of reserved memory of the background symbol, so the start timing of the background symbol fluctuation and the timing of erasing the reserved symbol number of the background symbol can be matched, It can prevent the player from feeling uncomfortable.

  In addition, when the notice effect is executed before the switching point of the background symbol, the fact that the notice effect is executed and the aspect of the notice effect are stored, and the notice effect that has been executed after the change point is stored. Therefore, it is possible to execute consistent and continuous notice effects, and to increase variations of the notice effects.

  In addition, when the background design starts to change in synchronization with the start of the change of one of the decorative designs, the change of the other decorative design starts before the background design change point, or the other decorative design changes. When the background symbol change starts in synchronization with the start of the change of one of the decorative symbols before the specified time elapses from the start, the change end timing of the other decorative symbol is greater than the change end timing of the background symbol Is later, the background symbol variation time is changed so that the background symbol variation ends in accordance with the other decoration symbol variation end timing (see FIGS. 68 and 69). The variation end timing of the other decorative design can be matched with the variation end timing of the background design, and the variation of two decorative designs can be efficiently digested by the variation of one background design. Kill with, it is possible to synchronize the change of change and background pattern of decorative pattern without giving an uncomfortable feeling to the player.

  In addition, when the change of the background design is started in synchronization with the start of the change of one of the design symbols, when the change of the other design is started by the switching point of the background design, When the variation end timing of the other decorative symbol is later than the variation end timing of (design), and the stop symbol of one decorative symbol is a jackpot symbol (see FIG. 68), Change the background symbol variation time so that the background symbol variation ends at the timing of the variation end, and change the background symbol stop symbol to a jackpot symbol to change the background symbol jackpot symbol and one of the decorative symbols. The jackpot symbol is derived and displayed at the same time. In addition, when the change of the background design is started in synchronization with the start of the change of one of the decorative symbols before the predetermined time has elapsed since the start of the change of the other decorative design, the background design (and the one of the decorative designs) When the variation end timing of the other decorative symbol is later than the variation end timing of one and the stop symbol of one decorative symbol is a big hit symbol (see FIG. 69), the change time of the background symbol variation is changed By prohibiting, the jackpot symbol of the background symbol and the jackpot symbol of one of the decorative symbols are derived and displayed at the same time. According to such a configuration, it is possible to prevent the player from suddenly shifting to the jackpot game before the jackpot symbol display by the background symbol is made to the player at all, so that the player does not feel suspicious. Can be. Further, the production control microcomputer 100 only needs to perform control so that the content (process table) of the display production and the stop design are changed at the switching point in the change of the background design, and the control burden of the production control microcomputer 100 is increased. You can avoid it.

  Further, even when the first start prize or the second start prize is invalid when the high base state is controlled, even if the start prize (start prize that occurs when the number of reserved memories is the upper limit value 4), As long as the number of stored symbols in the symbol has not reached the upper limit value 8, the display of the number of stored symbols in the background symbol is lit, so that the variation of the two decorative symbols is executed based on separate start winnings. In the gaming machine, it is possible to avoid giving the player an unfavorable impression that the number of reserved memories does not increase even though the start winning is generated.

  Further, when the background symbol hold memory display based on the invalid start winning is turned on, the background symbol hold memory display is erased (turned off) at the background symbol switching point. Even when there is a difference between the total number of reserved memories counted by the reserved memory counter and the second reserved memory counter and the number of reserved memories displayed as the reserved memory display of the background symbol, the player feels uncomfortable. Can be matched without any problems.

  Further, when an invalid start winning occurs, the game control microcomputer 560 transmits an invalid start winning designation command to the effect control microcomputer 100, and the effect control microcomputer 100 is based on the invalid start prize designation command. Since the dummy background symbol hold memory display is turned on, a control burden is placed on the game control microcomputer 560 so as not to give the player an unfavorable impression of the starting prize. It can be realized without.

  Further, in this embodiment, it is determined whether or not the value of the total pending storage number counter is equal to or greater than a predetermined value (4 in this example), and if it is determined to be equal to or greater than the predetermined value, the first special symbol ( The variation time of the first special symbol (second decorative symbol) and the second special symbol (second decorative symbol) and the variation time corresponding to the first special symbol (first decorative symbol) are shortened. The time to change the background pattern is reduced. Therefore, even if the total number of reserved memories is equal to or greater than a predetermined value, a shortening variation occurs during variable display of either the first special symbol (first decorative symbol) or the second special symbol (second decorative symbol). However, it is possible to prevent a situation in which the shortening variation is not performed during the other variable display. Therefore, the background figure can be shortened and changed in accordance with the number of reserved background symbols stored.

  Furthermore, when the variable display (fluctuation) of the first special symbol or the second special symbol is started, the gaming state is a special gaming state (probability variation state, time-short state) on condition that a predetermined transition condition is satisfied. Since it is configured to set (set / reset) the state data indicating whether or not there is, when it becomes necessary to change the gaming state according to the display result of one special symbol By immediately setting the state data to predetermined data, the changed game state can be immediately reflected in the game control in the other special symbol variation, and as a result, a fair gaming machine can be provided. .

  In this embodiment, the random number circuit 503 is initially set (random number circuit setting process) from the start of power-on to the gaming machine until the timer interrupt is set, and in the random number circuit setting process, A value based on an ID number unique to the control microcomputer 560 is set as an initial value of a random number. Therefore, the randomness of the random number generated by the random number circuit 503 can be improved. In addition, since the randomness of random numbers can be improved, the timing of random number generation can be made difficult to be recognized by a player or a game store, and by generating a capture signal using a radio signal for a gaming machine It is possible to prevent the condition for shifting to a specific gaming state such as a big hit state from being illegally established.

  In this embodiment, a software random number is used as a determination random number for determining a jackpot type (a jackpot type determining random number) among the random numbers used in the game control process. Then, only the big hit determination random number for determining whether or not to win is generated using the random number circuit 503. For example, in addition to the big hit determination random number, if the big hit type determination random number is generated using the random number circuit 503, a plurality of types of random numbers are generated using the random number circuit 503, and the configuration of the random number circuit 503 is It becomes more complicated than necessary. In this embodiment, since only the big hit determination random number is generated using the random number circuit 503, it is possible to prevent the circuit configuration of the random number circuit 503 from becoming complicated.

  In this embodiment, the inverting circuit 532 of the random number circuit 503 generates the inverted clock signal SI2 (or the delayed clock signal delayed by the delay circuit) whose polarity is inverted, and is synchronized with the inverted clock signal SI2. A latch signal for instructing random number storage is output. Therefore, the timing for updating the random number and the timing for storing the random number in the random value storage circuit 531 can be shifted, and the generated random number can be stored stably and reliably.

  In the above embodiment, the following configuration is also disclosed. The first variable display execution means is a measurement means for measuring variable display time during which variable display of the first identification information is executed in the first variable display section, and a specific display result is derived and displayed in the second variable display section. And a measurement interruption means for interrupting the measurement of the measurement means. With such a configuration, the variable display on the first variable display unit can be continued until the specific display result is derived and displayed on the second variable display unit, and the variable display on the first variable display unit is interrupted. In comparison, the variable display in the first variable display section can be ended earlier. Therefore, it is possible to prevent the player from being disadvantaged by prolonging the time until the end of the variable display.

  Further, the game control board is provided with a first signal direction restricting means for blocking signal input from the relay board, and the relay board is provided with second signal direction restricting means for blocking signal input from the effect control board. Is provided. With such a configuration, it is possible to prevent an unauthorized signal from being sent to the game control board via the peripheral board using a signal line from a board other than the game control board to the peripheral board.

  Next, a modified example of the present invention will be described. FIG. 98 is a timing diagram showing a plurality of switching points provided during the change of the background symbol. In the embodiment described above, the switching point is provided only when 10 seconds have elapsed since the start of the background symbol change, but in the example shown in FIG. 98, there are three switching points within the 40-second change time. A switching point is provided. That is, the first switching point is provided at 10 seconds after the start of the background symbol variation, and the second switching point is provided at 20 seconds after the background symbol variation starts, and 30 seconds after the background symbol variation starts. A third switching point is provided at the point in time. According to such a configuration, as shown in FIG. 98, the decoration pattern starts to change by 10 seconds after the background pattern starts to change, and the decoration pattern changes newly from 10 seconds to 20 seconds. Even if the decoration pattern changes anew from 20 seconds to 30 seconds, the background pattern is temporarily stopped and displayed at the three switching points during the background pattern change. Since it is possible to switch and further erase the stored display display of the background symbols, it becomes possible to digest the variation of the decorative symbols even more efficiently. As a result, the difference between the total number of reserved memories counted by the first reserved memory number counter and the second reserved memory number counter (total number of reserved memories) and the number of reserved memories displayed as the reserved memory display of the background symbol Can be prevented from becoming large.

  FIG. 99 is a timing diagram showing a switching point in which the time from the start of fluctuation is shortened. In the embodiment described above, the switching point is the time when 10 seconds have elapsed since the start of the background symbol change, but in the example shown in FIG. 99, the time when 5 seconds have elapsed since the start of the background symbol change is used. Switching points (Note that, when the gaming state is in the probabilistic state or in the short time state, for example, 2.5 seconds have elapsed since the start of the background symbol change). According to such a configuration, as shown in FIG. 99, when the variation of the decorative symbol is started immediately after the variation of the background symbol with a variation time of 10 seconds is started (up to 5 seconds after the variation starts). However, since the background symbol can be temporarily stopped and displayed at the switching point, the variation pattern can be switched, and the reserved symbol display of the background symbol can be erased, so that the variation of the decorative symbol can be efficiently digested. As a result, it is possible to prevent the difference between the total number of reserved memories counted by the first reserved memory number counter and the second reserved memory number counter and the number of reserved memories displayed as the reserved memory display of the background symbol from becoming large. can do. In addition, it is possible to avoid a situation in which the variation of the background symbol is continued long (multiple times) even though the variation of the first decorative symbol and the second decorative symbol are all completed.

  In the configuration in which a plurality of switching points are provided as shown in FIG. 98, the interval between the switching points may be shortened (for example, 5 seconds). In FIG. 99, the switching point is set to 5 seconds after the start of fluctuation, but may be set to a shorter time.

  When the total number of pending storages is 4 or more in the high base state, the change time of the normal change (high-speed change) is 5 seconds after the start of change (see FIG. 34), so the switching point also changes. The time is preferably 5 seconds after the start. However, the timing may be different.

  In addition, when all of the variations of the first decorative symbol and the second decorative symbol have been completed, but a situation occurs in which the variation of the background symbol is continued long (multiple times), the shortened background The variation of the symbol variation pattern (variation pattern having a variation time of, for example, 5 seconds) may be executed a plurality of times to quickly digest the variation. In addition, it is determined whether or not the value of the difference counter is a predetermined number (for example, 3) or more. It may be configured to digest. In the case of such a configuration, when each background symbol is stopped, the reserved memory display of the background symbol is erased, the value of the reserved memory display number counter is decremented by 1, and the value of the difference counter is decremented by -1. Composed.

  Further, for example, when the variation pattern of 40 seconds is a variation pattern in which the reach mode is developed every predetermined period, for example, the normal variation is first performed for 10 seconds, and then the variation with reach A is performed for 10 seconds. Then, when the change with the reach B developed by the reach A is performed for 10 seconds, and the change with the reach C developed by the reach B is finally performed for 10 seconds, for example, “767” at the end of each reach. It is also possible to execute an effect such that the temporary stop display is temporarily displayed with such an appearance (left middle right background symbol). According to such a configuration, the point temporarily displayed as “767” can also be used as the switching point. As a result, it is possible to provide multiple switching points in a series of fluctuations that are likely to develop into jackpots, efficiently digest decoration patterns, and give players a sense of expectation for jackpots. Can do.

  As shown in FIG. 34, the variation time of the normal variation in the low base state (normal game state) is 15 seconds, and the variation time of the normal variation in the high base state (probability variation state, short time state). Was set to 10 seconds, but since it is set to a shorter time in an actual gaming machine, it may be set to such a time. For example, the variation time of the normal variation in the low base state (normal game state) may be 5 seconds, and the variation time of the normal variation in the high base state (probability variation state, short time state) may be 3 seconds. In this case, it is necessary to shorten the fluctuation time of the fluctuation with reach in accordance with the shortening of the fluctuation time of the normal fluctuation. For example, when the fluctuation time of the normal fluctuation portion is 5 seconds and the fluctuation time of the reach A portion is 10 seconds, the fluctuation time of the fluctuation with reach A is 15 seconds in total.

  61 and 62, regardless of whether the gaming state is the high base state or the low base state, the first valid start winning command, the first invalid start winning command, The 2 valid start winning command and the second invalid starting winning command are configured to be transmitted to the production control microcomputer 100. That is, the processing of steps S404 to S413 is executed in any gaming state. However, since the dummy hold display is not displayed in the low base state, it is not necessary to transmit invalid start winning commands (first invalid start winning command and second invalid start winning command). Therefore, the processing of steps S404 to S413 may be executed when the gaming state is the high base state, and the processing of steps S404 to S407 and S409 to S412 may be executed when the gaming state is the low base state.

Embodiment 2. FIG.
In the first embodiment, when the gaming state is the low base state, the change of the background symbol is executed in synchronization with the variation of the first special symbol based on the first starting winning prize, whereas the gaming state In the high base state, the change of the background symbol was executed in synchronism with the change of the first special symbol or the second special symbol based on the first start prize and the second start prize. In addition, when the gaming state is the low base state, the number of reserved memories of the background symbol is reflected (displayed) only in the number of reserved memories of the first special symbol (first reserved memory number), and the upper limit value of the number of reserved memories of the background symbol Is the same value as the upper limit (“4”) of the number of reserved memories of the first special symbol, whereas in the high base state, the number of reserved memories of the background symbol is the first special symbol and the second special symbol The number of reserved memories of symbols (total number of reserved memories) was reflected, and the upper limit of the number of reserved memories of the background symbol was also the total value ("8") of the number of reserved memories of the first special symbol and the second special symbol . However, the present invention is not limited to such a configuration. In the second embodiment, regardless of the gaming state, the change in the background symbol is based on the first start winning and the second starting winning. It is executed in synchronization with the fluctuation of the special symbol or the second special symbol, and the reserved memory count of the background symbol reflects the total reserved memory count (the sum of the reserved memory count of the first special symbol and the reserved memory count of the second special symbol) (Displayed).

  FIG. 100 is a flowchart showing background symbol reservation storage display control processing according to the second embodiment. As shown in FIG. 100, in the background symbol hold storage display control process in the first embodiment, a process of determining whether or not the start winning command is the first starting winning command in the low base state is executed (step S630b). However, in the background symbol hold storage display control process in the second embodiment, the process of step S630b is not executed. Thereby, even in the low base state, the number of reserved memories of the background symbol can be displayed by adding both the number of reserved memories of the first special symbol and the number of reserved memories of the second special symbol. However, in the low base state, the percentage of game balls winning in the second start winning opening 14 is low, so the upper limit value of the display number displayed as the stored number of reserved background symbols is the upper limit in the high base state. The value ("4") is smaller than the value ("8"). That is, when the value of the reserved memory display number counter is 4 in step S630c, the lighting of the background symbol reserved memory display is not increased.

  In the first embodiment, the symbol variation control process shown in FIGS. 77 and 78 is executed only in the high base state (see step S625), but in the second embodiment, It is also executed in the low base state. In the first embodiment, the background symbol process is divided into the low-base background symbol process and the high-base background symbol process. However, the same processing regarding the variation of the background symbol regardless of the gaming state. Therefore, one background symbol process process (that is, the high base background symbol process process in the first embodiment may be executed).

  As described above, according to the second embodiment, as in the case of the first embodiment, the ease of winning the second start winning opening 14 can be changed according to the gaming state, and the gaming state Accordingly, the upper limit of the number of reserved symbols stored in the background symbol displayed in the memory display area 9d can be changed, and the game can be changed. As a result, the interest of the game can be improved. Further, since it is not necessary to divide the background symbol variation control into the low base and the high base, the control in the production control microcomputer 100 can be simplified, and the control burden can be reduced.

Embodiment 3 FIG.
In the first and second embodiments described above, in order to prevent a big hit based on the fact that the big hit symbol is derived and displayed on the two special symbol indicators 8a and 8b, one special symbol becomes a big hit symbol. When the game is interrupted, the variation of the other special symbol is interrupted, and when the big hit game ends, the variation of the other special symbol is resumed. However, even if the variation of the other special symbol is resumed, the variation does not become a big hit. Therefore, if the variation of the other special symbol is executed unnecessarily for a long time, there is a possibility that the interest of the game may be reduced. Therefore, in the third embodiment, when one special symbol becomes a big hit symbol, the fluctuation of the other special symbol is invalidated, and the big hit symbol is derived and displayed on the two special symbol indicators 8a and 8b. While preventing big hits from occurring at the same time, it is possible to prevent the fluctuations that are lost after the big hit game from being executed unnecessarily for a long time.

  FIG. 101 is a flowchart showing the first special symbol process in the third embodiment. As shown in FIG. 101, in the first special symbol process in the third embodiment, the processes in steps S313 to S317 shown in FIG. 38 are not executed. This is because when the second special symbol is a big hit, the change of the first special symbol is invalidated instead of interrupted, so that the processing for interrupting the variation is unnecessary. The other processes of the first special symbol process are the same as in the first embodiment.

  FIG. 102 is an explanatory diagram showing an example of the contents of the effect control command in the third embodiment. In FIG. 102, a command A100 (H) is an effect control command (first control) for instructing the start of variation of the first decorative symbol when the display result of the first special symbol and the first decorative symbol is forcibly determined to be off. Forcible detachment designation command). Command A200 (H) is an effect control command (second forcible detachment designation command for instructing start of variation of the second decorative symbol when the display result of the second special symbol and the second decorative symbol is forcibly determined to be off. ).

  FIG. 103 is a flowchart showing the first special symbol normal process in the third embodiment. In the first special symbol normal process in the third embodiment, the CPU 56 checks whether or not the gaming state is between the start of the second big hit game and the end of the second big hit game (step S40). The CPU 56 determines whether or not the gaming state is such a state, for example, the value of the second special symbol process flag according to any of steps S306 to S309 (specifically, the first special symbol process). It is determined by whether or not it is a value for the second special symbol process flag corresponding to a value corresponding to any of steps S306 to S309 for the flag. Also, in the second special symbol process, a flag indicating that the second big hit game is being played is set when the second big hit symbol stop process is shifted to the second big winning opening release pre-processing, and the second big hit end process The flag may be reset at, and whether or not the second big hit game is being played may be confirmed by checking whether or not the flag is set. If the gaming state is between the start of the second jackpot game and the end of the second jackpot game, the process is terminated. When that is not right, CPU56 performs the process of step S41. As a result of the determination in step S40, the CPU 56 derives and displays the specific display result after the specific display result (in this example, the jackpot symbol) is derived and displayed on the second special symbol display 8b and the second decorative symbol display area 9c. Until the specific gaming state based on the result (in this example, the second big hit game) is finished, the first start condition (for example, after the final stop of the first special symbol and the first decorative symbol, The control that does not hold (the hold storage is not 0) is executed. This is because the first special symbol and the first decorative symbol are not started to change by not proceeding the process of the first special symbol process control from step S300. Other processes of the first special symbol normal process are the same as those in the first embodiment.

  FIG. 104 is a flowchart showing first special symbol stop symbol setting processing in the third embodiment. In the first special symbol stop symbol setting process according to the third embodiment, the CPU 56 sets a forcible deviation flag (step S66), and then transmits a first forcible deviation designation command to the effect control microcomputer 100 (step S67). . The other processes of the first special symbol stop symbol setting process are the same as those in the first embodiment.

  FIG. 105 is a flowchart showing the first variation pattern setting process in the third embodiment. In the first variation pattern setting process in the third embodiment, the CPU 56 does not reset the forcible deviation flag (that is, does not execute the process of step S111). The other processes of the first variation pattern setting process are the same as in the first embodiment.

  FIG. 106 is a flowchart showing processing during first special symbol variation in the third embodiment. In the first special symbol variation processing in the third embodiment, the CPU 56 decrements the first variation time timer by 1 (step S121), and when the first variation time timer times out (step S122), the first jackpot flag is set. If so, the value of the first special symbol process flag is updated to a value corresponding to the first big hit symbol stop process (step S306) (steps S123, S124), and the first big hit symbol display time timer is set (step S123). Step S125). If the first big hit flag is not set, the value of the first special symbol process flag is updated to a value corresponding to the first off symbol stop process (step S305) (step S126). Up to this point, the processing is the same as in the first embodiment.

  If the first variation time timer has not timed out, a second jackpot start designation command for designating the start of the second jackpot game is transmitted when the forcible flag is set (Y in step S127). In this case, a forced termination flag is set (steps S128 and S129), and the process proceeds to step S126. When the forced miss flag is not set, and when the second jackpot designation command is not transmitted even if the forced miss flag is set, the process is terminated. In order to determine whether or not the second jackpot start designation command has been transmitted, in the second special symbol process, a flag indicating that is set when the second jackpot start designation command is transmitted. In step S129, the flag may be confirmed.

  In step S128, it is confirmed whether or not the forcible flag is set, but without performing this confirmation process, it is determined whether or not the second big hit start designation command is transmitted in step S129. It may be configured. According to such a configuration, it is possible to end not only the forced deviation variation but also all the deviation variations upon the start of the second big hit game. In step S129, it is determined whether or not the second jackpot start designation command is transmitted. Instead of this determination process, the value of the second special symbol process flag is set to the second jackpot symbol stop process or the second process. You may be comprised so that it may be determined whether it is a value which shows a big prize opening pre-processing.

  Further, in this embodiment, when the production control microcomputer 100 receives the second big hit start designation command during the variable display of the first decorative symbol executed when it is determined to be forced out, the variable display is performed. Control for ending variable display of the first decorative symbol in the first decorative symbol display area 9b of the device 9 is executed.

  FIG. 107 is a flowchart showing the first big hit symbol stop process in the third embodiment. In the first big hit symbol stop process in the third embodiment, the CPU 56 proceeds to step S133 when the variation of the first special symbol has already been completed (step S130). If not finished yet, the variation of the first special symbol is finished (step S131). Moreover, control which transmits the 1st decoration symbol stop designation | designated command with respect to the production control board 80 is performed (step S132). Then, the value of the first jackpot symbol display time timer is decremented by -1 (step S133). When the value of the first jackpot symbol display time timer becomes zero (step S134), a first jackpot start designation command is transmitted. (Step S134a), and the value of the first special symbol process flag is updated to a value corresponding to the first big winning opening release pre-processing (step S307) (step S135).

  FIG. 108 is a flowchart showing a first off symbol stop process in the third embodiment. In the first off symbol stop process in the third embodiment, the CPU 56 ends the fluctuation of the first special symbol (step S141). Next, it is confirmed whether or not the forced end flag is set (step S141a). If the forced end flag is set, the forced end flag is reset (step S142b), and the process proceeds to step S144. If the forced end flag is not set, control is performed to transmit a first design symbol stop designation command to the effect control board 80 (step S142a). Then, the process proceeds to step S144.

  In step S144, it is confirmed whether or not the forcible deviation flag is set. If the forcible deviation flag is set, the forcible deviation flag is reset (step S145). Then, the value of the first special symbol process flag is updated to a value corresponding to the first special symbol normal process (step S300) (step S143).

  FIG. 109 is a flowchart showing the first big hit end process in the third embodiment. In the first big hit end process in the third embodiment, the CPU 56 performs control to transmit a first big hit end designation command to the effect control board 80 (step S146), and sets the value of the first special symbol process flag to the first special symbol process flag. Update to a value corresponding to the symbol normal process (step S300) (step S147).

  As described above, according to the second embodiment, the variable display of the first decorative symbol (or the variable display of the second decorative symbol) is performed based on the decision to make the forced deviation. In this case, when the second big hit game (or the first big hit game) is started, the variable display of the first decorative symbol (or the variable display of the second decorative symbol) is ended, The fact that the jackpot symbol is derived and displayed in the second decorative symbol display area 9c (or the first decorative symbol display region 9b) is variably displayed in the first decorative symbol display region 9b (or the second decorative symbol display region 9c). Based on this, it can be made difficult for the player to recognize. In addition, it is possible to prevent a big hit based on the fact that the big hit symbol is derived and displayed on the two special symbol indicators 8a and 8b, and the fluctuation that is lost after the big hit game is executed unnecessarily for a long time. Can be prevented.

  In the second embodiment, when the big hit game is started, the variable display of the decorative symbols started based on the fact that it has been determined to be forced out of play is ended. You may make it complete | finish the variable display of a decoration symbol at the time. For example, when the big hit game ends or during the big hit game, when the special symbol is stopped, the variable display of the decorative symbol that is started based on the fact that it is determined to be forced out may be ended.

  In each of the above-described embodiments, the first special symbol of the first special symbol display 8a is used when the variable display of the second special symbol is executed on the second special symbol display 8b using the forced off flag. The display result of the variable display of the first special symbol display unit 8a is controlled so as not to be the jackpot symbol, but means for preventing the variable display display result of the first special symbol indicator 8a from being the jackpot symbol is Not limited to anything. For example, the CPU 56 always determines whether or not to make a big hit at the start of the variation of the special symbol, the second big hit flag is set, and the second special symbol is a big hit variation (a variation in which the stop symbol is a big hit symbol). When it is in the middle, if the first determination result is a big hit, the determination result may be changed to off. When the second jackpot flag is set and the second special symbol is changing, the CPU 56 determines the jackpot determination random number stored in the random number buffer before executing the first jackpot determination process. The value may be changed to a value corresponding to the deviation.

  Further, in the above-described embodiment, the time-short state is configured to be transferred only after the end of the probability variation state. However, the present invention is not limited to such a configuration. It may be configured such that the time-short state is determined, and the jackpot symbol that becomes the time-short state is controlled to the time-short state after the big-hit symbol is reached. In such a case, the time state corresponds to a special gaming state in which it is determined that the specific display result is obtained by the first predetermining means and the second predetermining means at a higher rate than the normal gaming state. To do. Further, all of the big hit symbols may be time-shortened symbols (that is, all symbols “1”, “3”, “5”, “7” and “9” are time-shortened symbols). Further, the probability variation symbol and the time-short symbol may be distinguished or overlapped. When the probability variation symbol and the short time symbol overlap, if such a symbol is a big hit, the probability variation state and the short time state are controlled.

  In the above embodiment, the second big hit game is being executed based on the fact that the first decorative symbol and the first special symbol are changing and the stop symbol of the second special symbol is the big hit symbol. At this time, the interruption command is transmitted to the production control microcomputer 100, and the measurement of the variation time of the first decorative symbol is interrupted. However, the measurement of the variation time of the first decorative symbol is also performed at other time points. May be interrupted.

  Also, in the above embodiment, the stop symbol of the other special symbol that is started from the time when it is determined that the stop symbol of one special symbol becomes a big hit symbol until the big hit symbol is derived and displayed is forcibly removed. It is controlled to be a symbol, and when the big hit game is started based on the fact that the stop symbol of one special symbol has become a big hit symbol, the fluctuation of the other special symbol is stopped and the big hit game is ended Sometimes it was configured to resume the fluctuation of the other special symbol, but when the big hit game is started (or during the big hit game or at the end) May be. In this case, after the big hit game ends, the fluctuation of the two special symbols is started again.

  In the above-described embodiment, the first special symbol and the second special symbol are numbers having the numbers “0” to “9”. However, the present invention is not limited to such symbols, and other than numbers. (For example, a figure such as a star or a triangle). In addition, information such as lighting / extinguishing of a lamp or LED may be used as long as it is information that can identify whether it is a big hit or not, and does not need to be a symbol. Also, one identification information may be a design and the other identification information may be a lamp. The same applies to the first decorative design and the second decorative design.

  Further, in the above embodiment, as a method for displaying the number of reserved memories, the number of reserved memories of special symbols is displayed by increasing or decreasing the number of indicators that are lit, and the number of reserved symbols is reserved. The number is displayed by increasing or decreasing the number of display colors of the reserved storage table displayed in the memory display area 9d. However, the present invention is not limited to such a configuration. For example, a 7-segment LED displays a number of reserved memories (for example, when the number of reserved memories is 3, a number “3” is displayed). Also good. Moreover, the structure which displays not only the number of displays and the number of display colors but the number of reserved memory by the number of characters may be sufficient.

  Further, in the above-described embodiment, the number of reserved memories that can be counted by the first reserved memory counter and the second reserved memory counter is 4, but it may be 4 or more or 4 or less. Also, the number of reserved memories that can be counted by the first reserved memory counter and the number of reserved memories that can be counted by the second reserved memory counter may be different values.

  Further, in the above embodiment, even when an invalid start prize is generated, the game control microcomputer 560 transmits an invalid start prize designation command to the effect control microcomputer 100, so that a dummy based on the invalid start prize is obtained. It was configured to display the hold memory display, but it was configured not to display a dummy hold memory display based on the invalid start winning, and to display the hold memory display only when an effective start winning occurred. Also good.

  Further, in the above embodiment, the effect control microcomputer 100 mounted on the effect control board (sub board) 80 is the effect from the game control microcomputer 560 mounted on the game control board (main board) 31. Although it was configured to execute control of various effect devices (variable display device 9, speaker 27, lamp, LED, etc.) based on the control command, control of a predetermined effect device among a plurality of effect devices is performed. A first effect control board on which a first effect control microcomputer to be executed is mounted, and a second effect control microcomputer that executes control of effect devices other than a predetermined effect device among a plurality of effect devices. You may divide into the mounted 2nd production control board. In this case, the control command from the game control microcomputer 560 is transmitted from the first effect control microcomputer to the first effect control microcomputer mounted on the first effect control board, and then sent to the first effect control microcomputer. Is transmitted to the second effect control microcomputer mounted on the second effect control board. For example, a sound / lamp control board equipped with a sound / lamp control microcomputer that performs sound output control of the speaker 27 and lamp / LED lighting control is used as the first effect control board, and display control of the variable display device 9 is performed. When the display control board equipped with the display control microcomputer is the second effect control board, a control command from the game control microcomputer 560 is transmitted to the sound / lamp control microcomputer, and the sound / lamp control is performed. Sent from the display microcomputer to the display control microcomputer. In such a configuration, the control command transmitted from the first effect control board (first effect control microcomputer) to the second effect control board (second effect control microcomputer) is a game control board. Even if the control command is the same as the control command transmitted from the (game control microcomputer 560) to the first effect control board (first effect control microcomputer), the first effect is output from the game control board. The control command transmitted to the control board may be a control command processed by the first effect control microcomputer.

  In addition, the pachinko gaming machine of the above embodiment can be given a predetermined game value to a player mainly when the stop symbol of the special symbol variably displayed on the variable display unit based on the start winning becomes the predetermined symbol. A pachinko machine that can be given a predetermined gaming value to a player when there is a prize in a predetermined area of an electric game that is released based on a start prize, or a start prize The present invention can be applied even to a pachinko gaming machine in which a predetermined right is generated or continued when a winning is given to a predetermined electric combination that is released when a stop symbol of a variably displayed symbol becomes a predetermined symbol combination . Furthermore, the present invention can be applied to a slot machine that inserts game medals and sets a bet number and plays a game, or a game machine that inserts game balls instead of game medals and sets a bet number and plays a game.

  The present invention can be applied to a game such as a pachinko gaming machine, and in particular, can be applied to a gaming machine in which variable display of a plurality of identification information in a variable display device is executed based on establishment of separate starting conditions.

It is the front view which looked at the pachinko game machine from the front. It is a block diagram which shows the circuit structural example of a game control board (main board). It is a block diagram which shows the circuit structural example of a relay board | substrate, an effect control board, a lamp driver board | substrate, and an audio | voice output board | substrate. It is a block diagram showing a circuit configuration of the main board and a signal line of an effect control command transmitted from the main board to the effect control board. It is a block diagram which shows the structural example of a random number circuit. It is explanatory drawing which shows the example of an update rule selection register. It is explanatory drawing which shows the example of an update rule memory. It is explanatory drawing which shows the example in case a count value permutation change circuit changes the permutation of the count value which a counter outputs. It is explanatory drawing which shows the example of a count value permutation change register. It is explanatory drawing which shows the example of a random number maximum value setting register. It is explanatory drawing which shows the example of a period setting register. It is explanatory drawing which shows the example of a count value update register. It is explanatory drawing which shows the example of a random value taking-in register. It is explanatory drawing of an example of the random number update system selection register and the random number update system selection data written in the random number update system selection register. It is explanatory drawing which shows the example of a random number circuit starting register. It is a circuit diagram which shows the structural example of a random value storage circuit. It is a timing chart which shows the timing when each signal is input into a random value storage circuit, and the timing when a random value storage circuit outputs each signal. It is explanatory drawing which shows an example of the address map of the storage area in the microcomputer for game control. It is explanatory drawing which shows an example of the address map in a user program management area. It is explanatory drawing which shows an example of initial value change system setting data. It is explanatory drawing which shows the structural example of a user program. It is explanatory drawing which shows the structural example of a random number circuit setting program. It is explanatory drawing which shows the operation | movement which updates the value of random R, or reads the value of random R, when the 1st random number update system is selected. It is explanatory drawing which shows the operation | movement which updates the value of random R, or reads the value of random R, when the 2nd random number update system is selected. It is explanatory drawing which shows each memory with which the microcomputer for game control is provided. It is explanatory drawing which shows the example of the table memory for jackpot determination. It is a flowchart which shows the main process which the microcomputer for game control performs. It is a flowchart which shows a random circuit setting process. It is a flowchart which shows a random number maximum value reset process. It is a flowchart which shows an initial value change process. It is a timing diagram which shows the timing when each signal is input into a random number circuit, and the timing when each signal is generated within a random number circuit. It is a flowchart which shows a timer interruption process. It is explanatory drawing which shows each random number. It is explanatory drawing which shows the variation pattern (variation time) of a special design and a decoration design. It is explanatory drawing which shows an example of the relationship between the stop symbol of a special symbol, and the game state controlled after that. It is a flowchart which shows a random circuit initial value update process. It is a flowchart which shows a count value permutation change process. It is a flowchart which shows a 1st special symbol process process. It is a flowchart which shows a 1st special symbol process process. FIG. 38E illustrates an effect control command signal line. It is a timing chart showing the relationship between an 8-bit control signal and an INT signal that constitute an effect control command. It is explanatory drawing which shows an example of the content of an effect control command. It is a flowchart which shows a 1st start port switch passage process. It is a flowchart which shows an example of a 1st special symbol normal process. It is a flowchart which shows an example of a 1st special symbol stop symbol setting process. It is a flowchart which shows an example of a 1st special symbol stop symbol setting process. It is a flowchart which shows an example of a 1st fluctuation pattern setting process. It is a flowchart which shows an example of a 1st fluctuation pattern setting process. It is explanatory drawing which shows an example of a fluctuation pattern table. It is explanatory drawing which shows an example of a fluctuation pattern table. It is a flowchart which shows an example of a 1st game state transfer control process. It is a flowchart which shows an example of a 1st game state transfer control process. It is a timing diagram for explaining a set time / reset time of a flag in the first gaming state transition control process. It is a timing diagram for explaining a set time / reset time of a flag in the first gaming state transition control process. It is a flowchart which shows an example of a process during the 1st special symbol change. It is a flowchart which shows an example of a 1st big hit symbol stop process. It is a flowchart which shows an example of a 1st deviation symbol stop process. It is a timing diagram which shows the example of control of the microcomputer for game control. It is explanatory drawing which shows an example of the fluctuation | variation aspect of the 1st decoration design of 1st fluctuation pattern # 6 and # 12. It is a flowchart which shows an example of a normal symbol process process. It is a flowchart which shows an example of a pending | holding memory | storage process. It is a flowchart which shows an example of a pending | holding memory | storage process. It is a timing diagram which shows the display control timing of the switching point in the fluctuation | variation of the background symbol in a high base state, and a pending | holding memory | storage display. FIG. 64 is an explanatory diagram illustrating a display example at the change execution timing of each symbol illustrated in FIG. 63. FIG. 64 is an explanatory diagram illustrating a display example at the change execution timing of each symbol illustrated in FIG. 63. It is a timing chart showing an example of the execution timing of each symbol variation and the erasure timing of the hold storage display corresponding to each symbol. It is a timing chart showing an example of the execution timing of each symbol variation and the erasure timing of the hold storage display corresponding to each symbol. It is a timing diagram which shows the change of the fluctuation | variation time of the background symbol by which the fluctuation | variation start was carried out previously. It is a timing diagram which shows the change of the change time of the background symbol by which the change start was carried out later. It is explanatory drawing which shows the upper limit of the pending | holding memory | storage number at the time of a low base state and a high base state. It is explanatory drawing which shows the lighting conditions of the dummy background symbol holding | maintenance memory | storage display at the time of a high base state. It is a timing diagram which shows the execution timing of the notice effect in a high base state. It is explanatory drawing which shows the example of a display of notice effect. It is a flowchart which shows an example of the main process which the microcomputer for production control performs. It is a flowchart which shows a command analysis process. It is a flowchart which shows a background symbol reservation memory display control process. It is a flowchart which shows a symbol fluctuation control process. It is a flowchart which shows a symbol fluctuation control process. It is a flowchart which shows a 1st design process process. It is a flowchart which shows a 1st fluctuation pattern command reception waiting process. It is a flowchart which shows a 1st decoration design change start process. It is a flowchart which shows the 1st decoration design change process. It is a flowchart which shows a background symbol process process. It is a flowchart which shows the background symbol process process for low bases. It is a flowchart which shows the background symbol change start waiting process for low bases. It is a flowchart which shows the notice selection process for low bases. It is explanatory drawing which shows an example of a notice determination table. It is explanatory drawing which shows the example of 1 structure of a process table. It is a flowchart which shows the background symbol change start process for low bases. It is a flowchart which shows the process during background symbol change for low bases. It is a flowchart which shows the background symbol process process for high bases. It is a flowchart which shows the background symbol change start waiting process for high bases. It is a flowchart which shows the notice selection process for high bases. It is a flowchart which shows the background symbol change start process for high bases. It is a flowchart which shows the high base background symbol change process. It is a flowchart which shows the high base background symbol change process. It is a flowchart which shows the process during fluctuation after high base background symbol switching. It is a timing diagram which shows the some switching point provided during the fluctuation | variation of a background symbol. It is a timing diagram which shows the switching point by which the time after the fluctuation | variation start was shortened. 10 is a flowchart showing background symbol reservation storage display control processing in the second embodiment. FIG. 10 is a flowchart showing a first special symbol process process in the third embodiment. FIG. 29 is an explanatory diagram showing an example of content of an effect control command in the third embodiment. 12 is a flowchart showing a first special symbol normal process in the third embodiment. FIG. 12 is a flowchart showing a first special symbol stop symbol setting process in the third embodiment. 10 is a flowchart showing a first variation pattern setting process in the third embodiment. 10 is a flowchart showing processing during first special symbol variation in the third embodiment. 12 is a flowchart showing a first big hit symbol stop process in the third embodiment. It is a flowchart which shows the 1st deviation symbol stop process in Embodiment 3. 12 is a flowchart showing a first big hit end process in the third embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Pachinko machine 8a 1st special symbol display device 8b 2nd special symbol display device 9 Variable display device 13 1st starting winning port 14 2nd starting winning port 15 Variable winning ball device 31 Main board 56 CPU
77 Relay board 80 Production control board 100 Production control microcomputer 101 Production control CPU
560 Microcomputer for game control

Claims (6)

A first variable display unit that starts variable display of the first identification information and derives and displays a display result based on satisfaction of the first start condition of variable display after the first execution condition of variable display is satisfied; A second variable display unit that starts variable display of the second identification information and derives and displays a display result based on satisfaction of the second start condition of variable display after the second execution condition of display is satisfied; A gaming machine that shifts to a specific gaming state that is advantageous for a player when a specific display result is derived and displayed on either the first variable display unit or the second variable display unit,
When the predetermined transition condition is satisfied, control is performed to a high base state in which the first execution condition is easily satisfied, and when the predetermined end condition is satisfied, control is performed to a low base state in which the first execution condition is difficult to be satisfied. Gaming state transition control means to
First counting means for counting the number of established first execution conditions not established to the first upper limit number to the first upper limit number;
Second counting means for counting the number of established second execution conditions not established to the second upper limit to the second upper limit number;
Whether to display the variable identification display result of the first identification information as the specific display result when starting the variable display of the first identification information in the first variable display section based on the establishment of the first start condition. First predetermining means for determining
Whether or not to make the display result of the variable display of the second identification information the specific display result when starting the variable display of the second identification information on the second variable display unit based on the establishment of the second start condition Second pre-determining means for determining
Based on the determination result of the first pre-determining means, variable display of the first identification information is executed by the first variable display unit, and when the predetermined variable display time has elapsed, the first variable display unit First variable display execution means for deriving and displaying a display result;
Based on the determination result of the second pre-determining means, the second variable display unit performs variable display of the second identification information, and when the predetermined variable display time has elapsed, the second variable display unit Second variable display execution means for deriving and displaying the display result;
When the variable display of the first identification information or the second identification information is started, the third variable display unit that is easier to visually recognize than the first variable display unit and the second variable display unit. The variable display of the third identification information associated with the variable display of the first identification information or the second identification information is executed, and the variable display of the first identification information or the second identification information is displayed when a predetermined variable display time has elapsed. Third variable display execution means for deriving and displaying a display result associated with the result on the third variable display unit;
A second execution condition establishment number display means for displaying the number of establishments of the second execution condition counted by the second counting means in an identifiable manner when being controlled to the low base state;
When the high base state is controlled, the total establishment number is displayed so that the total establishment number obtained by adding the establishment number counted by the first counting means and the establishment number counted by the second counting means can be specified. A gaming machine comprising a number display means. A first variable display unit that starts variable display of the first identification information and derives and displays a display result based on satisfaction of the first start condition of variable display after the first execution condition of variable display is satisfied; A second variable display unit that starts variable display of the second identification information and derives and displays a display result based on satisfaction of the second start condition of variable display after the second execution condition of display is satisfied; A gaming machine that shifts to a specific gaming state that is advantageous for a player when a specific display result is derived and displayed on either the first variable display unit or the second variable display unit,
When the predetermined transition condition is satisfied, control is performed to a high base state in which the first execution condition is easily satisfied, and when the predetermined end condition is satisfied, control is performed to a low base state in which the first execution condition is difficult to be satisfied. Gaming state transition control means to
First counting means for counting the number of established first execution conditions not established to the first upper limit number to the first upper limit number;
Second counting means for counting the number of established second execution conditions not established to the second upper limit to the second upper limit number;
Whether to display the variable identification display result of the first identification information as the specific display result when starting the variable display of the first identification information in the first variable display section based on the establishment of the first start condition. First predetermining means for determining
Whether or not to make the display result of the variable display of the second identification information the specific display result when starting the variable display of the second identification information on the second variable display unit based on the establishment of the second start condition Second pre-determining means for determining
Based on the determination result of the first pre-determining means, variable display of the first identification information is executed by the first variable display unit, and when the predetermined variable display time has elapsed, the first variable display unit First variable display execution means for deriving and displaying a display result;
Based on the determination result of the second pre-determining means, the second variable display unit performs variable display of the second identification information, and when the predetermined variable display time has elapsed, the second variable display unit Second variable display execution means for deriving and displaying the display result;
When the variable display of the first identification information or the second identification information is started, the third variable display unit that is easier to visually recognize than the first variable display unit and the second variable display unit. The variable display of the third identification information associated with the variable display of the first identification information or the second identification information is executed, and the variable display of the first identification information or the second identification information is displayed when a predetermined variable display time has elapsed. Third variable display execution means for deriving and displaying a display result associated with the result on the third variable display unit;
A combined establishment number calculating means for calculating a combined establishment number obtained by adding up the establishment number counted by the first counting means and the establishment number counted by the second counting means;
Low-base time execution that displays the number of established execution conditions up to the second upper limit number among the total established numbers calculated by the total established number calculating means when controlled to the low base state Condition establishment number display means;
A gaming machine comprising: a high base execution condition establishment number display means for displaying the total establishment number calculated by the addition establishment number calculation means in an identifiable manner when controlled to the high base state . Based on the fact that the second pre-determining means has determined that the display result of the variable display is the specific display result, after the second pre-deciding means has determined that the display result of the variable display is the specific display result, Forcibly determining that the display result of the variable display of the first identification information of the first variable display unit is not to be the specific display result during the specific period until the display result is derived and displayed by the second variable display execution means. A non-specific display result determination means;
And a restriction control means for executing a predetermined control that does not satisfy the first start condition when the specific display result is derived and displayed on the second variable display section and the state is shifted to the specific game state. The gaming machine according to claim 1 or 2. The first variable display execution means determines the determination result of the forced non-specific result determination means between the time when the specific display result is derived and displayed based on the determination result of the second prior determination means and the time when the specific gaming state ends. The gaming machine according to claim 3, further comprising variable display invalidating means for invalidating variable display of the first identification information based on the first identification information. The third variable display execution means
After the first variable display execution means starts the variable display of the first identification information on the first variable display section, the second variable display execution means displays the second identification information on the second variable display section. The first variable display execution means starts the first variable display execution means within a specific time from the time when the second variable display execution means derives and displays the specific display result as the display result on the second variable display section. Specific condition determining means for determining whether or not a specific condition for deriving and displaying the display result on the variable display unit is satisfied;
A specific effect corresponding to the specific display result when the variable display of the first identification information on the first variable display unit is terminated on the condition that the specific condition determination unit determines that the specific condition is satisfied. The gaming machine according to claim 1, further comprising: a specific effect result display unit that executes control to display a result on the third variable display unit. The third variable display execution means is associated with the variable display of the second identification information in the third variable display unit when the variable display of the second identification information is started when the low base state is controlled. The third identification information is variably displayed, and when a predetermined variable display time has elapsed, a display result associated with the display result of the second identification information variable display is derived and displayed on the third variable display unit. When the variable display of the first identification information or the second identification information is started when the high base state is controlled, the first identification information or the second identification information is changed in the third variable display unit. The variable display of the third identification information associated with the display is executed, and the display result associated with the display result of the variable display of the first identification information or the second identification information when a predetermined variable display time has elapsed Derived and displayed on the 3 variable display section The gaming machine according to any one of claims 1 to 5.

Images