JP2007258776A - High-frequency module - Google Patents

High-frequency module Download PDF

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Publication number
JP2007258776A
JP2007258776A JP2006076661A JP2006076661A JP2007258776A JP 2007258776 A JP2007258776 A JP 2007258776A JP 2006076661 A JP2006076661 A JP 2006076661A JP 2006076661 A JP2006076661 A JP 2006076661A JP 2007258776 A JP2007258776 A JP 2007258776A
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acoustic wave
electrode
wiring board
wave element
surface acoustic
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Yoshihiro Miyawaki
義宏 宮脇
Kenji Kitazawa
謙治 北澤
Hiroyuki Kita
弘幸 北
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Kyocera Corp
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Kyocera Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15192Resurf arrangement of the internal vias

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
  • Transceivers (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To suppress destruction in airtightness between a surface acoustic wave element that is subjected to flip-chip packaging on a wiring board and coated with a sealing resin, and the wiring board in secondary packaging. <P>SOLUTION: In a high-frequency module, the surface acoustic wave element 2, where an annular sealing electrode 24 is provided along the outer periphery on one main surface of a piezoelectric substrate 21, and an IDT electrode 22 and an I/O electrode 23 connected to the IDT electrode 22 are provided at the inner region of the annular sealing electrode 24, is subjected to flip-chip packaging to the surface of the wiring board 1 having a laminated structure comprising a plurality of dielectric layers 11 and a plurality of conductive layers 12. The other surface mount components are packaged on the surface of the wiring board 1, and the surface of the wiring board 1 is covered with a sealing resin layer 4 so that the surface acoustic wave element 2 and the other surface mount components are sealed. In the high-frequency module, an annular gap 41 is formed on the sealing resin layer 4 along the surface acoustic wave element 2 so that the sealing resin layer 4 is divided when viewed from the lamination direction in the wiring board 1. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、主として携帯電話等の無線通信端末機に搭載され、弾性表面波素子を表面実装してなる高周波モジュールに関するものである。   The present invention relates to a high-frequency module that is mainly mounted on a wireless communication terminal such as a mobile phone and has a surface acoustic wave element mounted thereon.

携帯電話、無線LANの市場は右肩上がりの成長が想定されており、第3世代の携帯電話の生産数は、急激に増加している。携帯電話は第3世代に進歩するに従って、カメラ内蔵、テレビの受信、他の無線通信(ブルーツース、無線LAN、WiMAX)との併用化も進んでおり、高周波回路の占有面積は年々減少している。その為、携帯電話の部品は小形軽量化および複合化がめざましく、個々の性能をアップしつつ、部品点数の削減、低消費電力化への要求に対応する必要がある。このような要求を実現するため、チップセットの集積化および性能向上が進んでおり、同様に周辺の高周波部品も集積化した高周波モジュールが提案されている。   The mobile phone and wireless LAN markets are expected to grow rapidly, and the number of third-generation mobile phones produced is increasing rapidly. As mobile phones progress to the third generation, built-in cameras, TV reception, and other wireless communications (Bluetooth, wireless LAN, WiMAX) are also being used together, and the area occupied by high-frequency circuits is decreasing year by year. . For this reason, mobile phone parts are dramatically reduced in size and weight, and it is necessary to meet the demands for reducing the number of parts and reducing power consumption while improving individual performance. In order to realize such a demand, integration of chipsets and performance improvement are progressing, and similarly, a high frequency module in which peripheral high frequency components are also integrated has been proposed.

高周波モジュールに実装される高周波部品のうち、圧電基板の一方主面に励振電極や入出力電極等が形成されてなる弾性表面波(SAW)素子は、励振電極に水分、塵埃等の異物が付着しないようにかつ弾性表面波の伝搬を妨げないように中空状態で気密封止する必要がある。   Among high-frequency components mounted on high-frequency modules, surface acoustic wave (SAW) elements, in which excitation electrodes and input / output electrodes are formed on one main surface of a piezoelectric substrate, have foreign substances such as moisture and dust attached to the excitation electrodes. It is necessary to hermetically seal in a hollow state so as not to interfere with the propagation of surface acoustic waves.

そこで、図9に示すように、圧電基板81の励振電極82や入出力電極83が形成された面を下方に向けて、弾性表面波素子8を配線基板91上にフリップチップ実装した高周波モジュールが提案されている(例えば特許文献1参照)。かかる構造によれば、励振電極82および入出力電極83の周囲に環状封止電極84を配置し、半田92によって配線基板91表面の配線層93に入出力電極83および環状封止電極84を接合することによって、励振電極82接合部および入出力電極83接合部が配線基板91の表面と弾性表面波素子8の圧電基板81および環状封止電極84接合部で囲まれた気密空間内に封止されている。この環状封止電極84は接地電極として機能させることができる。   Therefore, as shown in FIG. 9, a high-frequency module in which the surface of the piezoelectric substrate 81 on which the excitation electrode 82 and the input / output electrode 83 are formed faces downward and the surface acoustic wave element 8 is flip-chip mounted on the wiring substrate 91 is provided. It has been proposed (see, for example, Patent Document 1). According to this structure, the annular sealing electrode 84 is disposed around the excitation electrode 82 and the input / output electrode 83, and the input / output electrode 83 and the annular sealing electrode 84 are joined to the wiring layer 93 on the surface of the wiring substrate 91 by the solder 92. Thus, the excitation electrode 82 junction and the input / output electrode 83 junction are sealed in an airtight space surrounded by the surface of the wiring substrate 91 and the piezoelectric substrate 81 and the annular sealing electrode 84 junction of the surface acoustic wave element 8. Has been. The annular sealing electrode 84 can function as a ground electrode.

そして、フリップチップ実装された弾性表面波素子8およびその他実装された高周波部品(半導体チップ94など)を保護するために、これらの実装部品を封止するように配線基板91の表面は封止樹脂95で被覆されている。なお、この封止樹脂95は、製造時の利便性から、上側から吸引して搬送できるように上面が平坦になっている。
特開2005−123909号公報
In order to protect the flip-chip mounted surface acoustic wave element 8 and other mounted high-frequency components (such as the semiconductor chip 94), the surface of the wiring board 91 is sealed with a sealing resin so as to seal these mounted components. 95. Note that the sealing resin 95 has a flat upper surface so that it can be sucked and conveyed from the upper side for convenience in manufacturing.
JP 2005-123909 A

しかしながら、図9に示すように、1つの配線基板91上に弾性表面波素子8とともに半導体チップ94やチップコンデンサなどの表面実装部品(不図示)を実装してなる高周波モジュールを、マザーボードに無鉛半田などで二次実装すると、弾性表面波素子8と配線基板91の表面とを接合している入出力電極83接合部、環状封止電極84接合部の半田92が再溶融し、この溶融した半田92が気密空間側に移動する結果、気密空間の気密破壊や入出力電極83と環状封止電極84とが半田92によって短絡するなどの問題があった。   However, as shown in FIG. 9, a high-frequency module in which surface-mounted components (not shown) such as a semiconductor chip 94 and a chip capacitor are mounted on a single wiring board 91 together with the surface acoustic wave element 8 is lead-free soldered to the motherboard. When the secondary mounting is performed, etc., the solder 92 of the input / output electrode 83 joint and the annular sealing electrode 84 joint joining the surface acoustic wave element 8 and the surface of the wiring substrate 91 are remelted. As a result of the movement of 92 to the hermetic space side, there were problems such as hermetic destruction of the hermetic space and short circuit between the input / output electrode 83 and the annular sealing electrode 84 by the solder 92.

これは、弾性表面波素子8のフリップチップ実装に用いられる半田92が二次実装に用いる半田より高融点かつ接続信頼性に優れた非鉛材料を選択できない点が背景にある。二次実装の為リフロー炉に投入した際、入出力電極83接続部および環状封止電極84接続部に使用される半田92は、再溶融が起こり固相から液相に変わる。このとき、封止樹脂95が吸湿した水分や未反応性生成物が気化、脱ガスされることによって、環状封止電極84接続部の内外(気密空間と外部)で圧力差が生じる。したがって、溶融した半田92が気密空間側に向かって流れ込み、短絡、断線に至るのである。   This is because the solder 92 used for flip chip mounting of the surface acoustic wave element 8 cannot select a lead-free material having a higher melting point and better connection reliability than the solder used for secondary mounting. When thrown into the reflow furnace for secondary mounting, the solder 92 used for the input / output electrode 83 connecting portion and the annular sealing electrode 84 connecting portion undergoes remelting and changes from a solid phase to a liquid phase. At this time, moisture or unreacted product absorbed by the sealing resin 95 is vaporized and degassed, thereby causing a pressure difference between the inside and outside (the airtight space and the outside) of the connection portion of the annular sealing electrode 84. Therefore, the melted solder 92 flows toward the airtight space, resulting in a short circuit and disconnection.

対策手段として、樹脂封止せず金属ケースで配線基板を被覆する方法が考えられる。ところが、金属ケースで配線基板を被覆する場合、例えば配線基板の側面に半田を介して接続されるが、高周波配線とのショートを避ける為、金属ケースと高周波配線との間には必要最小限の間隔を設ける必要がある。したがって、小型化を目的とする高周波モジュールにとっては望ましい対策ではない。一方、樹脂ケースで配線基板を被覆したとしても、コスト的に課題は残る。   As a countermeasure, a method of covering the wiring board with a metal case without resin sealing is conceivable. However, when covering a wiring board with a metal case, for example, it is connected to the side surface of the wiring board via solder, but in order to avoid a short circuit with the high frequency wiring, the minimum necessary amount between the metal case and the high frequency wiring is required. It is necessary to provide an interval. Therefore, it is not a desirable measure for a high-frequency module aimed at miniaturization. On the other hand, even if the wiring board is covered with the resin case, there remains a problem in terms of cost.

本発明は上記事情に鑑みてなされたもので、二次実装時において、配線基板上にフリップチップ実装され封止樹脂で被覆された弾性表面波素子と配線基板との間の気密破壊を抑制する高周波モジュールを提供することを目的とする。   The present invention has been made in view of the above circumstances, and suppresses hermetic breakage between a surface acoustic wave element flip-chip mounted on a wiring board and covered with a sealing resin and the wiring board during secondary mounting. An object is to provide a high-frequency module.

本発明者は、鋭意検討の結果、二次実装時の加熱によって半田が再溶融する前に弾性表面波素子の環状封止電極(環状封止電極)近傍の封止樹脂から水分が放出されるような構造を採用することで、上記目的を達成することを見出し、本発明に到達した。   As a result of diligent study, the present inventor releases moisture from the sealing resin in the vicinity of the annular sealing electrode (annular sealing electrode) of the surface acoustic wave element before the solder is remelted by heating during secondary mounting. By adopting such a structure, the inventors have found that the above object can be achieved, and have reached the present invention.

すなわち本発明の高周波モジュールは、圧電基板の一方主面上に外周に沿って環状封止電極が設けられ、該環状封止電極の内側領域にIDT電極と該IDT電極に接続する入出力電極とが設けられた弾性表面波素子が、複数の誘電体層および複数の導体層からなる積層構造を有する配線基板の表面にフリップチップ実装されるとともに、その他の表面実装部品が前記配線基板の表面に実装され、前記弾性表面波素子および前記その他の表面実装部品を封止するように上面平坦に形成された封止樹脂層で前記配線基板の表面が被覆された高周波モジュールにおいて、前記封止樹脂層には、前記配線基板における積層方向から見て前記封止樹脂層を分割するように前記弾性表面波素子に沿って溝状空隙部が形成されていることを特徴とするものである。   That is, in the high frequency module of the present invention, an annular sealing electrode is provided along the outer periphery on one main surface of the piezoelectric substrate, and an IDT electrode and an input / output electrode connected to the IDT electrode are provided in an inner region of the annular sealing electrode; The surface acoustic wave device provided with is flip-chip mounted on the surface of a wiring board having a laminated structure composed of a plurality of dielectric layers and a plurality of conductor layers, and other surface mounting components are mounted on the surface of the wiring board. In the high-frequency module which is mounted and the surface of the wiring board is covered with a sealing resin layer formed flat on the upper surface so as to seal the surface acoustic wave element and the other surface mounting components, the sealing resin layer Is characterized in that a groove-like gap is formed along the surface acoustic wave element so as to divide the sealing resin layer when viewed from the stacking direction of the wiring board. That.

また本発明の高周波モジュールは、圧電基板の一方主面上に外周に沿って環状封止電極が設けられ、該環状封止電極の内側領域にIDT電極と該IDT電極に接続する入出力電極とが設けられた弾性表面波素子が、複数の誘電体層および複数の導体層からなる積層構造を有する配線基板の表面にフリップチップ実装されるとともに、その他の表面実装部品が前記配線基板の表面に実装され、前記弾性表面波素子および前記その他の表面実装部品を封止するように上面平坦に形成された封止樹脂層で前記配線基板の表面が被覆された高周波モジュールにおいて、前記封止樹脂層には、前記配線基板における積層方向から見て複数の孔状空隙部が前記弾性表面波素子に沿って該弾性表面波素子との間隔未満の間隔で列をなすように形成されていることを特徴とするものである。   The high-frequency module according to the present invention further includes an annular sealing electrode provided along the outer periphery on one main surface of the piezoelectric substrate, and an IDT electrode and an input / output electrode connected to the IDT electrode in an inner region of the annular sealing electrode; The surface acoustic wave device provided with is flip-chip mounted on the surface of a wiring board having a laminated structure composed of a plurality of dielectric layers and a plurality of conductor layers, and other surface mounting components are mounted on the surface of the wiring board. In the high-frequency module which is mounted and the surface of the wiring board is covered with a sealing resin layer formed flat on the upper surface so as to seal the surface acoustic wave element and the other surface mounting components, the sealing resin layer Are formed so that a plurality of hole-like voids in the wiring board are arranged along the surface acoustic wave element at intervals less than the distance from the surface acoustic wave element. And it is characterized in and.

本発明によれば、二次実装リフローの際に環状封止電極接合部に悪影響を及ぼしていた環状封止電極接合部の近傍に存在する封止樹脂中から、これに含まれる水分や未反応ガス成分が半田の再溶融までの間に溝状空隙部または孔状空隙部を通して外部に放出され除去されることとなるため、半田の気密空間側への流れ込みが発生せず、弾性表面波素子と配線基板との間の気密性を向上、すなわち気密破壊を防止することができる。   According to the present invention, from the sealing resin existing in the vicinity of the annular sealing electrode joint that had an adverse effect on the annular sealing electrode joint during the secondary mounting reflow, the moisture contained therein and unreacted Since the gas component is discharged to the outside through the groove-like gap or hole-like gap until the solder is remelted, the solder does not flow into the airtight space, and the surface acoustic wave element The airtightness between the wiring board and the wiring board can be improved, that is, the airtight destruction can be prevented.

本発明に係る高周波モジュールの実施形態を図面に基づいて説明する。   An embodiment of a high-frequency module according to the present invention will be described with reference to the drawings.

図1は本発明の高周波モジュールの一実施形態を示す概略平面図、図2は図1に示す矢印方向に見たときの高周波モジュールの概略説明図である。   FIG. 1 is a schematic plan view showing an embodiment of the high-frequency module of the present invention, and FIG. 2 is a schematic explanatory view of the high-frequency module when viewed in the direction of the arrow shown in FIG.

図1および図2に示すように、本発明の高周波モジュールを構成する配線基板1は、複数の誘電体層11および複数の平面導体層12からなる積層構造になっている。誘電体層11の厚みは5〜200μm程度であり、平面導体層12の厚みは2〜20μm程度になっている。また、異なる層に形成された平面導体層12等を接続するために、各誘電体層11を貫通する直径30〜200μmのビアホール導体13が形成されている。そして、この配線基板1の表面には、弾性表面波素子2がいわゆるフリップチップ実装され、その搭載部には、弾性表面波素子2をフリップチップ実装するための電極パッド群(入出力電極用パッド14と環状封止電極用パッド15)が形成されている。   As shown in FIGS. 1 and 2, the wiring substrate 1 constituting the high-frequency module of the present invention has a laminated structure including a plurality of dielectric layers 11 and a plurality of planar conductor layers 12. The dielectric layer 11 has a thickness of about 5 to 200 μm, and the planar conductor layer 12 has a thickness of about 2 to 20 μm. In order to connect the planar conductor layers 12 and the like formed in different layers, via-hole conductors 13 having a diameter of 30 to 200 μm that penetrate each dielectric layer 11 are formed. A surface acoustic wave element 2 is so-called flip-chip mounted on the surface of the wiring substrate 1, and an electrode pad group (input / output electrode pads for flip-chip mounting the surface acoustic wave element 2 is mounted on the mounting portion. 14 and an annular sealing electrode pad 15) are formed.

配線基板1を構成する誘電体材料としては、セラミック等が挙げられ、特に限定されるものではない。ただし、ガラス粉末、あるいはガラス粉末とセラミックフィラー粉末との混合物を焼成してなるガラスセラミック焼結体からなることによって、電極、平面導体層、ビアホール導体などをCu、Ag、Au、Ni、Pt、Pd又はそれらの混合物などを使用することが可能である。   Examples of the dielectric material constituting the wiring board 1 include ceramics and the like, and are not particularly limited. However, by comprising a glass ceramic sintered body obtained by firing glass powder or a mixture of glass powder and ceramic filler powder, electrodes, planar conductor layers, via-hole conductors, etc. are made of Cu, Ag, Au, Ni, Pt, Pd or a mixture thereof can be used.

ここで用いられるガラス成分としては、少なくともSiOを含み、Al、B、ZnO、PbO、アルカリ土類金属酸化物、アルカリ金属酸化物のうちの少なくとも1種を含有したものであって、例えば、SiO−B系、SiO−B−Al系−MO系(但し、MはCa、Sr、Mg、BaまたはZnを示す)等のホウケイ酸ガラス、アルカリ珪酸ガラス、Ba系ガラス、Pb系ガラス、Bi系ガラス等が挙げられる。これらのガラスは、焼成によって結晶が析出する結晶化ガラスであることが基板強度を高める上で望ましい。 The glass component used here contains at least SiO 2 and contains at least one of Al 2 O 3 , B 2 O 3 , ZnO, PbO, alkaline earth metal oxide, and alkali metal oxide. For example, SiO 2 —B 2 O 3 system, SiO 2 —B 2 O 3 —Al 2 O 3 system—MO system (where M represents Ca, Sr, Mg, Ba or Zn), etc. Examples thereof include borosilicate glass, alkali silicate glass, Ba glass, Pb glass, and Bi glass. These glasses are desirably crystallized glasses in which crystals are precipitated by firing in order to increase the substrate strength.

また、セラミックフィラーとしては、クォーツ、クリストバライト等のSiOや、Al、ZrO、ムライト、フォルステライト、エンスタタイト、スピネル、マグネシア等が好適に用いられる。ガラス成分およびフィラー成分の割合としては、ガラス成分10〜70重量%と、セラミックフィラー成分30〜90重量%の割合からなることが基板強度を高める上で望ましい。 As the ceramic filler, SiO 2 such as quartz and cristobalite, Al 2 O 3 , ZrO 2 , mullite, forsterite, enstatite, spinel, magnesia and the like are preferably used. The ratio of the glass component and the filler component is preferably 10 to 70% by weight of the glass component and 30 to 90% by weight of the ceramic filler component for increasing the substrate strength.

配線基板1の表面にフリップチップ実装される弾性表面波素子2は、例えばタンタル酸リチウム、ランタン−ガリウム−ニオブ系単結晶、四ホウ酸リチウム単結晶等の圧電性の単結晶から成る圧電基板21の一方主面上に、図3に示すように、励振電極であるインターデジタルトランスデューサー電極(本発明では、櫛歯状電極及び反射器電極を含み、以下、IDT電極という)22が形成されるとともにこのIDT電極22と接続する入出力電極23が形成され、さらに圧電基板21の一方主面上外周に沿って環状封止電極24が形成されたものである。ここで、IDT電極22は圧電基板21の略中央領域に配置され、入出力電極23は所定のIDT電極22から延びる位置に配置されている。   A surface acoustic wave element 2 flip-chip mounted on the surface of the wiring substrate 1 is a piezoelectric substrate 21 made of a piezoelectric single crystal such as lithium tantalate, lanthanum-gallium-niobium single crystal, lithium tetraborate single crystal, or the like. As shown in FIG. 3, an interdigital transducer electrode (in the present invention, including a comb-like electrode and a reflector electrode, hereinafter referred to as an IDT electrode) 22 is formed on one main surface of the electrode. In addition, an input / output electrode 23 connected to the IDT electrode 22 is formed, and an annular sealing electrode 24 is formed along the outer periphery on one main surface of the piezoelectric substrate 21. Here, the IDT electrode 22 is disposed in a substantially central region of the piezoelectric substrate 21, and the input / output electrode 23 is disposed at a position extending from the predetermined IDT electrode 22.

環状封止電極24は、後述するように、弾性表面波素子2が配線基板1上に実装された際に、IDT電極22が接する空間であって圧電基板21と配線基板1の表面との間の間隙によって形成される空間を気密封止するものである。本例では、この環状封止電極24は接地電極として機能するようになっている。なお、圧電基板21上の電極は、アルミニウム、銅などで例えばフォトリソグラフィ技術により形成され、その表面にクロム、ニッケル、金などのメッキ層が形成されたものである。   As will be described later, the annular sealing electrode 24 is a space in contact with the IDT electrode 22 when the surface acoustic wave element 2 is mounted on the wiring substrate 1, and between the piezoelectric substrate 21 and the surface of the wiring substrate 1. The space formed by the gap is hermetically sealed. In this example, the annular sealing electrode 24 functions as a ground electrode. The electrode on the piezoelectric substrate 21 is formed of aluminum, copper or the like by, for example, photolithography technique, and a plating layer of chromium, nickel, gold or the like is formed on the surface thereof.

一方、図4に示すように、配線基板1表面の弾性表面波素子2が実装される領域には、入出力電極23に対応して入出力電極用パッド14が設けられるとともに、これらを囲むように環状封止電極用パッド15が形成されている。   On the other hand, as shown in FIG. 4, an input / output electrode pad 14 corresponding to the input / output electrode 23 is provided in a region where the surface acoustic wave element 2 on the surface of the wiring substrate 1 is mounted so as to surround these. An annular sealing electrode pad 15 is formed on the substrate.

そして、配線基板1の表面と圧電基板21の一方主面(IDT電極22が形成された面)との間に所定間隙を形成するように、入出力電極23と入出力電極用パッド14とが半田接合されるとともに、環状封止電極24と環状封止電極用パッド15とが半田接合されて、配線基板1上に弾性表面波素子2がフリップチップ実装される。かかる構成によって、積層方向から見て環状封止電極24に囲まれた領域は気密空間を形成し、励振電極であるIDT電極22がこの気密空間内に気密封止される。   The input / output electrodes 23 and the input / output electrode pads 14 are formed so as to form a predetermined gap between the surface of the wiring substrate 1 and one main surface of the piezoelectric substrate 21 (the surface on which the IDT electrode 22 is formed). In addition to solder bonding, the annular sealing electrode 24 and the annular sealing electrode pad 15 are solder-bonded, and the surface acoustic wave element 2 is flip-chip mounted on the wiring substrate 1. With this configuration, the region surrounded by the annular sealing electrode 24 when viewed from the stacking direction forms an airtight space, and the IDT electrode 22 that is an excitation electrode is hermetically sealed in the airtight space.

その他、配線基板1の表面には半導体チップ(パワーアンプIC)31、チップコンデンサ32、チップインダクタ33などの表面実装部品が実装されており、全ての実装部品が実装された後、これらの実装部品の保護などのためにエポキシ樹脂、シリコーン樹脂、あるいは後述する光硬化樹脂などからなる封止樹脂層4で表面実装部品が封止される。この封止樹脂層4は、弾性表面波素子2や半導体チップ31のボンディングワイヤなど全ての表面実装部品を封止するように、一番高い表面実装部品に合わせた層厚みで上面(表面)が平坦になるように配線基板1の表面に被覆されるものである。   In addition, surface mount components such as a semiconductor chip (power amplifier IC) 31, a chip capacitor 32, and a chip inductor 33 are mounted on the surface of the wiring board 1. After all the mounted components are mounted, these mounted components are mounted. In order to protect the surface mounting component, the surface mount component is sealed with a sealing resin layer 4 made of an epoxy resin, a silicone resin, or a photo-curing resin described later. The sealing resin layer 4 has an upper surface (surface) with a layer thickness that matches the highest surface mounting component so as to seal all surface mounting components such as the surface acoustic wave element 2 and the bonding wires of the semiconductor chip 31. The surface of the wiring board 1 is coated so as to be flat.

そして、封止樹脂層4には、配線基板1の積層方向から見てこれを分割するように弾性表面波素子2に沿って溝状空隙部41が形成されていることが重要である。この溝状空隙部41が弾性表面波素子2に沿って形成されるとは、二次実装時の加熱によって弾性表面波素子2の環状封止電極24接合部近傍の封止樹脂層4から水分が外部に放出されるような位置に形成されることである。これにより、二次実装する際に環状封止電極接合部の半田に悪影響を及ぼす環状封止電極接合部近傍の封止樹脂層4中の水分は、半田の融点よりも水の沸点が低いことから、半田が再溶融する直前までに溝状空隙部41から外部に放出されるため、半田5が気密空間に侵入して気密破壊などを生じさせてしまうことを抑止できる。   In the sealing resin layer 4, it is important that a groove-like void 41 is formed along the surface acoustic wave element 2 so as to be divided when viewed from the stacking direction of the wiring substrate 1. The formation of the groove-like gap 41 along the surface acoustic wave element 2 means that moisture from the sealing resin layer 4 in the vicinity of the joint portion of the annular sealing electrode 24 of the surface acoustic wave element 2 by heating during secondary mounting. Is formed at such a position as to be released to the outside. As a result, the water in the sealing resin layer 4 in the vicinity of the annular sealing electrode joint that adversely affects the solder of the annular sealing electrode joint during secondary mounting has a boiling point of water lower than the melting point of the solder. Therefore, it is possible to prevent the solder 5 from entering the airtight space and causing an airtight breakage or the like because the solder is discharged from the groove-like gap portion 41 immediately before remelting.

ここで、分割するようにとは、封止樹脂層4が弾性表面波素子2側とその他の表面実装部品(他の弾性表面波素子2の場合もある)側とに仕切られることを意味している。また、弾性表面波素子2に沿ってとは、原則として配線基板1の積層方向から見て周囲に形成されるが、図1に示すように、弾性表面波素子2が配線基板1の側面(縁)に近接する位置に配置され封止樹脂層4の側面から水分が放出されるような状況にある場合は、封止樹脂層4の側面(積層方向からみて配線基板1の側面)以外の部分に形成されることを意味するものである。   Here, to be divided means that the sealing resin layer 4 is partitioned into the surface acoustic wave element 2 side and the other surface-mounted component (which may be another surface acoustic wave element 2) side. ing. Further, along the surface acoustic wave element 2, in principle, it is formed around the wiring substrate 1 as viewed from the stacking direction. However, as shown in FIG. In the situation where moisture is released from the side surface of the sealing resin layer 4 disposed at a position close to the edge), other than the side surface of the sealing resin layer 4 (side surface of the wiring substrate 1 as viewed from the stacking direction) It is meant to be formed in a part.

溝状空隙部41は、水分放出の観点から、封止樹脂層4の上面から下面ぎりぎり(配線基板1の表面付近)まで形成されているのが好ましい。また、その幅は例えば後述のレーザー加工では0.05mm以上0.2mm以下程度が採用されるが、他の実装部品の配置との関係や吸引搬送に支障をきたさない程度であれば特に限定はない。さらに、溝状空隙部41が形成される位置は、弾性表面波素子に対して水分放出の効果が発揮される領域である必要があり、好ましくは積層方向から見て弾性表面波素子2の外周から0.05mm乃至0.3mm程度の距離の範囲の領域内に設定される。   The groove-like gap 41 is preferably formed from the top surface of the sealing resin layer 4 to the bottom surface (near the surface of the wiring substrate 1) from the viewpoint of moisture release. In addition, the width is, for example, about 0.05 mm or more and 0.2 mm or less in the laser processing described later. However, the width is not particularly limited as long as it does not hinder the relationship with the arrangement of other mounting parts and suction conveyance. Absent. Further, the position where the groove-like gap 41 is formed needs to be a region where the effect of moisture release is exerted on the surface acoustic wave element, and preferably the outer periphery of the surface acoustic wave element 2 as viewed from the stacking direction. To 0.05 mm to 0.3 mm in the range of the distance.

溝状空隙部41の形成にあっては、封止樹脂層4を硬化させた後、この封止樹脂層4にレーザー加工を施す方法が挙げられる。ここで、特に配線基板1の表面に配線導体がある場合は、この配線導体を切削しないようにする必要があることから、配線基板1の表面付近までの深さの溝状空隙部41を形成するようにレーザー装置の出力は調整される。   In the formation of the groove-shaped gap 41, a method of performing laser processing on the sealing resin layer 4 after curing the sealing resin layer 4 can be mentioned. Here, especially when there is a wiring conductor on the surface of the wiring board 1, it is necessary not to cut the wiring conductor, so that a groove-like gap 41 having a depth to the vicinity of the surface of the wiring board 1 is formed. The output of the laser device is adjusted to do so.

また、レーザー加工以外の方法も採用できる。その他の加工方法としては、トランスファモールド工法を挙げることができる。具体的には、図5に示すように、弾性表面波素子2およびその他の実装部品の実装、半導体チップ31の固着およびワイヤボンディング終了後、溝状空隙部41を形成するようにかたどられた金型61を配線基板1の表面上にセットし、金型61の一部に設けられた注入口611から封止樹脂(熱硬化性樹脂)を注入し、完全に封止樹脂を充填した後、注入口611に圧力を加えながら密閉する。そのままの状態で減圧しながら150℃に加熱し、封止樹脂の硬化処理を行なう。その後、金型611を取り外すことで、レーザー加工と同様に溝状空隙部41を形成することができる。   Also, methods other than laser processing can be employed. Examples of other processing methods include a transfer mold method. Specifically, as shown in FIG. 5, after mounting the surface acoustic wave element 2 and other mounting components, fixing the semiconductor chip 31 and completing the wire bonding, the gold is shaped so as to form a groove-like gap 41. After setting the mold 61 on the surface of the wiring substrate 1 and injecting a sealing resin (thermosetting resin) from an injection port 611 provided in a part of the mold 61, and completely filling the sealing resin, Seal the inlet 611 while applying pressure. While being decompressed as it is, it is heated to 150 ° C. to cure the sealing resin. Thereafter, by removing the mold 611, the groove-shaped gap 41 can be formed in the same manner as laser processing.

その他の方法として、封止樹脂として熱硬化性樹脂の代わりに光硬化樹脂42を使用した方法も採用できる。具体的には、図6に示すように、弾性表面波素子2およびその他の実装部品の実装、半導体チップ31の固着およびワイヤボンディング終了後、光硬化樹脂42を配線基板1の表面上に塗布する。その後、空隙部を形成する領域に光が照射されないようなマスクパターン62を光硬化樹脂42の上面に接触しないようにセットした後、光硬化樹脂が硬化する条件で上方向から光を照射した。その後、高周波モジュールを現像液に浸し、スプレー噴射処理を行い、未硬化部421を除去することで、空隙部を形成することができる。   As another method, a method using a photo-curing resin 42 instead of a thermosetting resin as a sealing resin can be employed. Specifically, as shown in FIG. 6, after the surface acoustic wave element 2 and other mounting components are mounted, the semiconductor chip 31 is fixed and the wire bonding is completed, a photo-curing resin 42 is applied on the surface of the wiring substrate 1. . Then, after setting the mask pattern 62 which does not irradiate the area | region which forms a space | gap so that it may not contact the upper surface of the photocurable resin 42, it irradiated from the upper direction on the conditions which photocurable resin hardens | cures. Thereafter, the void portion can be formed by immersing the high-frequency module in a developer, performing a spraying process, and removing the uncured portion 421.

なお、溝状空隙部41を形成した後、吸引搬送に支障がある場合や外観を考慮して、封止樹脂層4の上面にシールを貼り付けてもよい。このシールは、金属を混入させたもので、シールド機能を有するものであってもよい。   In addition, after forming the groove-shaped space | gap part 41, a seal | sticker may be affixed on the upper surface of the sealing resin layer 4 in consideration of the case where suction conveyance is hindered or an external appearance. The seal is a metal mixed and may have a shielding function.

これまでは溝状空隙部41を形成する本発明の実施形態について説明してきたが、これにかえて複数の孔状空隙部43を形成する発明も好ましく採用できる。   So far, the embodiment of the present invention in which the groove-like void portion 41 is formed has been described, but an invention in which a plurality of hole-like void portions 43 are formed instead can be preferably employed.

具体的には、図7に示すように、封止樹脂層4に、配線基板1における積層方向から見て複数の孔状空隙部43が弾性表面波素子2に沿ってこの弾性表面波素子2との間隔未満の間隔で列をなすように形成されているものである。図7においては、弾性表面波素子2の長辺に沿って7個の孔状空隙部43が一列に形成され、弾性表面波素子2の短辺に沿って5個の孔状空隙部43が一列に形成されている。   Specifically, as shown in FIG. 7, a plurality of hole voids 43 are formed in the sealing resin layer 4 along the surface acoustic wave element 2 as viewed from the stacking direction in the wiring substrate 1. Are formed so as to form rows at intervals less than the interval. In FIG. 7, seven hole voids 43 are formed in a row along the long side of the surface acoustic wave element 2, and five hole voids 43 are formed along the short side of the surface acoustic wave element 2. It is formed in a row.

弾性表面波素子2と孔状空隙部43との距離(間隔)は、溝状空隙部41の形成される位置と同様に積層方向から見て弾性表面波素子2の外周から0.05mm乃至0.3mm程度の距離の範囲の領域内に設定される。そして、複数の孔状空隙部43における隣り合う孔状空隙部43と孔状空隙部43との間隔は、弾性表面波素子2の気密封止に悪影響を及ぼさない程度に封止樹脂層4から水分を放出できる範囲で、少なくとも弾性表面波素子2と孔状空隙部43との距離(間隔)未満に設定される。孔状空隙部43が横断面円形の場合、その径は例えばレーザー加工で形成するときは0.05mm以上0.2mm以下程度に形成され、深さも溝状空隙部41と同様に封止樹脂層4の上面から下面ぎりぎり(配線基板1の表面付近)まで形成されているのが好ましい。   The distance (interval) between the surface acoustic wave element 2 and the hole-like gap portion 43 is 0.05 mm to 0 mm from the outer periphery of the surface acoustic wave element 2 when viewed from the stacking direction, similarly to the position where the groove-like gap portion 41 is formed. It is set within an area having a distance of about 3 mm. And the space | interval of the adjacent hole part 43 and the hole part 43 in the several hole part 43 is from the sealing resin layer 4 to such an extent that it does not have a bad influence on the airtight sealing of the surface acoustic wave element 2. It is set to be less than the distance (interval) between the surface acoustic wave element 2 and the hole-like gap 43 within a range in which moisture can be released. When the hole-shaped void 43 has a circular cross section, the diameter thereof is, for example, about 0.05 mm or more and 0.2 mm or less when formed by laser processing, and the depth is the same as that of the groove-shaped void 41 and the sealing resin layer. 4 is preferably formed from the top surface to the bottom surface (near the surface of the wiring board 1).

孔状空隙部43としては、横断面円形に限らず、横断面多角形でもよく、例えば横断面四角形の場合は横断面形状における短軸方向(弾性表面波素子と孔状空隙部を結ぶ線分方向)の距離(幅)が溝状空隙部41と同様の幅に形成され、長軸方向(弾性表面波素子に沿う方向)は適宜決定される。   The hole void 43 is not limited to a circular cross section, and may be a polygonal cross section. For example, in the case of a square cross section, the short axis direction in the cross section (the line segment connecting the surface acoustic wave element and the hole void). The distance (width) of the (direction) is formed to be the same width as the groove-like gap 41, and the major axis direction (direction along the surface acoustic wave element) is appropriately determined.

また、孔状空隙部43の製造は、溝状空隙部41の製造と同様に、レーザー加工の他、金型を用いたトランスファーモールド、封止樹脂層4を光硬化樹脂を用いて未硬化部を形成する方法が採用できる。   Further, in the same manner as the manufacture of the groove-like void portion 41, the hole-like void portion 43 is manufactured in addition to the laser processing, the transfer mold using the mold, and the sealing resin layer 4 using the photo-curing resin. The method of forming can be adopted.

なお、図7に示す実施形態においては、封止樹脂層4からの水分放出手段として全ての弾性表面波素子に沿った位置に孔状空隙部43を設けた構成になっているが、図1に示す溝状空隙部41と図7に示す孔状空隙部43とを組み合わせた構成であってもよい。   In the embodiment shown in FIG. 7, a hole-like void 43 is provided at a position along all the surface acoustic wave elements as means for releasing moisture from the sealing resin layer 4. The groove-like void portion 41 shown in FIG. 7 and the hole-like void portion 43 shown in FIG. 7 may be combined.

一般に高周波モジュールは、図8の一点鎖線で囲まれる領域に示されるような回路構成を有している。送信信号入力端子71から入力された送信信号はバンドパスフィルタ72で不要成分を除去され、電力増幅器73で信号増幅される。増幅された送信信号は、デュプレクサ74を経てアンテナ接続端子75に送られる。そして、アンテナから空中へ放射されるようになっている。   Generally, a high frequency module has a circuit configuration as shown in a region surrounded by a one-dot chain line in FIG. Unnecessary components are removed from the transmission signal input from the transmission signal input terminal 71 by the band pass filter 72, and the signal is amplified by the power amplifier 73. The amplified transmission signal is sent to the antenna connection terminal 75 through the duplexer 74. And it radiates | emits from the antenna to the air.

一方、アンテナで受け取り、アンテナ接続端子75から入力された受信信号は、デュプレクサ74を経て、受信信号出力端子76から出力される。そして、受信信号出力端子76から出力された受信信号は、入力整合回路を介してローノイズアンプへ入力され、その後、復調機能をもつ受信回路へ入力され、携帯電話の場合は音声として出力されるようになっている。   On the other hand, the reception signal received by the antenna and input from the antenna connection terminal 75 is output from the reception signal output terminal 76 via the duplexer 74. The reception signal output from the reception signal output terminal 76 is input to the low noise amplifier via the input matching circuit, and then input to the reception circuit having a demodulation function. In the case of a mobile phone, the reception signal is output as sound. It has become.

これまで述べた弾性表面波素子2は図8中のデュプレクサ74における送信信号を通過させる送信用フィルタ、受信信号を通過させる受信用フィルタとして使用されるとともに、電力増幅器73の前段のバンドパスフィルタ72等として使用されるものである。また、半導体チップ31は図8中の電力増幅器73の構成部品として使用されるものである。   The surface acoustic wave element 2 described so far is used as a transmission filter that passes a transmission signal and a reception filter that passes a reception signal in the duplexer 74 in FIG. 8, and a band-pass filter 72 in front of the power amplifier 73. Etc. are used. The semiconductor chip 31 is used as a component of the power amplifier 73 in FIG.

最後に、本発明の製造方法および効果確認の結果について説明する。   Finally, the manufacturing method of the present invention and the results of effect confirmation will be described.

ガラス粉末またはガラス粉末とセラミックフィラー粉末との混合物に有機バインダー有機溶剤などを添加混合してスラリーを作製した後、ドクターブレード法やカレンダーロール法などによって、所定の厚みのセラミックグリーンシートを作製した。その後、このセラミックグリーンシートにビアホール導体を形成するための貫通穴をマイクロドリルやパンチング、レーザー加工などによって形成した後、貫通穴内に、Cu、Ag、Au、Ni、Pt、Pd又はそれらの混合物などの導体のペーストをスクリーン印刷法などによって充填するとともに、平面導体層となる種々の導体パターンを印刷した。そして、ビアホール導体および平面導体層を形成したセラミックグリーンシートを積層圧着した後、850〜1000℃の温度で焼成することによって、配線基板を作製した。   An organic binder organic solvent or the like was added to and mixed with glass powder or a mixture of glass powder and ceramic filler powder to prepare a slurry, and then a ceramic green sheet having a predetermined thickness was prepared by a doctor blade method, a calender roll method, or the like. Thereafter, a through hole for forming a via hole conductor is formed in the ceramic green sheet by micro drilling, punching, laser processing, etc., and then Cu, Ag, Au, Ni, Pt, Pd, or a mixture thereof is formed in the through hole. The conductor paste was filled by a screen printing method or the like, and various conductor patterns serving as a planar conductor layer were printed. And after laminating and pressure-bonding the ceramic green sheet in which the via-hole conductor and the planar conductor layer were formed, the wiring board was produced by baking at the temperature of 850-1000 degreeC.

次に、圧電基板(タンタル酸リチウム単結晶の38.7°Yカット、熱膨張係数14〜16ppm/℃)上にAl−Cu(2重量%)合金から成る電極を成膜し、その後レジスト塗布、パターンニング、剥離を繰り返し、IDT電極、入出力電極、環状封止電極(接地電極)、保護膜を形成し、弾性表面波素子を作製し、熱膨張係数が8.5ppm/℃の配線基板(セラミック積層基板)上に実装した。実装に際しては、環状封止電極及び入出力電極に高温半田をスクリーン印刷にて塗布し、リフローにて実装を行った。この弾性表面波素子の実装構造によれば、IDT電極の周囲を環状封止電極(接地電極)で取り囲こむようにして気密性を確保している。また、弾性表面波素子と同時にコンデンサチップなどのチップ部品の実装を行い、リフローにて半田を固着させた。さらに、銀ペーストにて半導体チップを接着した後、金線によるワイヤボンディングで導通をさせた。   Next, an electrode made of an Al—Cu (2 wt%) alloy is formed on a piezoelectric substrate (38.7 ° Y-cut of lithium tantalate single crystal, thermal expansion coefficient 14 to 16 ppm / ° C.), and then a resist is applied. , Patterning and peeling are repeated to form an IDT electrode, input / output electrode, annular sealing electrode (ground electrode) and protective film, to produce a surface acoustic wave device, and a wiring board having a thermal expansion coefficient of 8.5 ppm / ° C. It was mounted on (ceramic multilayer substrate). In mounting, high-temperature solder was applied to the annular sealing electrode and the input / output electrode by screen printing, and mounting was performed by reflow. According to the mounting structure of the surface acoustic wave element, airtightness is ensured by surrounding the IDT electrode with the annular sealing electrode (ground electrode). In addition, a chip component such as a capacitor chip was mounted at the same time as the surface acoustic wave element, and the solder was fixed by reflow. Furthermore, after bonding the semiconductor chip with silver paste, conduction was made by wire bonding with a gold wire.

さらに、エポキシ樹脂に対してフィラーとして溶融シリカを添加した熱硬化性樹脂を多層基板の表面上に塗布した。そして、減圧した真空乾燥機内にて150℃に加熱し、封止樹脂の硬化処理を行なった。このとき用いた熱硬化性樹脂は、飽和吸水量が重量比0.2%のエポキシ樹脂であり、事前テストにより飽和吸水状態から200℃にて3時間の乾燥を実施した場合において、吸水する前の重量に戻ることが確認されたものである。   Further, a thermosetting resin in which fused silica was added as a filler to the epoxy resin was applied on the surface of the multilayer substrate. And it heated at 150 degreeC within the vacuum dryer which reduced pressure, and hardened the sealing resin. The thermosetting resin used at this time is an epoxy resin with a saturated water absorption of 0.2% by weight, and when it is dried from a saturated water absorption state at 200 ° C. for 3 hours by a preliminary test, before water absorption. It has been confirmed that the weight returns to.

またさらに、封止樹脂層には、配線基板における積層方向から見て封止樹脂層を分割するように弾性表面波素子に沿って溝状空隙部を形成した。具体的には、弾性表面波素子に沿って弾性表面波素子の外周から距離約0.08mm程度の位置に、約0.1mmの幅、配線基板表面付近までの深さのスリットをレーザー加工で形成し、本発明の高周波モジュールを得た。   Furthermore, in the sealing resin layer, groove-like voids were formed along the surface acoustic wave element so as to divide the sealing resin layer when viewed from the lamination direction on the wiring board. Specifically, a slit having a width of about 0.1 mm and a depth to the vicinity of the wiring board surface is formed by laser processing at a position of about 0.08 mm from the outer periphery of the surface acoustic wave element along the surface acoustic wave element. The high frequency module of the present invention was obtained.

上記の手順で作製した本発明の高周波モジュールとスリットを形成していない従来の高周波モジュールとについて比較した。試験の条件として、温度60℃、湿度60%の雰囲気下で40時間吸湿処理した後、リフロー加熱(ピーク温度260℃)を3回繰り返し、不良率を比較したところ、従来構造の高周波モジュールサンプルでは不良率が約40%あったのに対し、本発明の構造であるスリットを形成した高周波モジュールサンプルでは不良率は0%に改善されることが確認された。   A comparison was made between the high-frequency module of the present invention produced by the above procedure and a conventional high-frequency module in which no slit was formed. As test conditions, after moisture absorption treatment for 40 hours in an atmosphere of temperature 60 ° C. and humidity 60%, reflow heating (peak temperature 260 ° C.) was repeated three times, and the defect rate was compared. While the defect rate was about 40%, it was confirmed that the defect rate was improved to 0% in the high-frequency module sample having the slit of the structure of the present invention.

本発明の高周波モジュールの一実施形態を示す概略平面図である。It is a schematic plan view which shows one Embodiment of the high frequency module of this invention. 図1に示す矢印方向に見たときの高周波モジュールの概略説明図である。It is a schematic explanatory drawing of the high frequency module when it sees in the arrow direction shown in FIG. 図2に示す弾性表面波素子2の圧電基板21一方主面の説明図である。FIG. 3 is an explanatory view of one main surface of a piezoelectric substrate 21 of the surface acoustic wave element 2 shown in FIG. 2. 図2に示す配線基板1表面の弾性表面波素子2が実装される領域の説明図である。It is explanatory drawing of the area | region where the surface acoustic wave element 2 of the wiring board 1 surface shown in FIG. 2 is mounted. 本発明の高周波モジュールの一製造方法の説明図であるIt is explanatory drawing of one manufacturing method of the high frequency module of this invention. 本発明の高周波モジュールの他の製造方法の説明図である。It is explanatory drawing of the other manufacturing method of the high frequency module of this invention. 本発明の高周波モジュールの他の実施形態を示す概略平面図である。It is a schematic plan view which shows other embodiment of the high frequency module of this invention. 本発明の高周波モジュールの回路構成例を示すブロック図である。It is a block diagram which shows the circuit structural example of the high frequency module of this invention. 従来の高周波モジュールの概略断面図である。It is a schematic sectional drawing of the conventional high frequency module.

符号の説明Explanation of symbols

1・・・配線基板
11・・誘電体層
12・・平面導体層
13・・ビアホール導体
14・・入出力電極用パッド
15・・環状封止電極用パッド
2・・・弾性表面波素子
21・・圧電基板
22・・IDT電極
23・・入出力電極
24・・環状封止電極
31・・半導体チップ
32・・チップコンデンサ
33・・チップインダクタ
4・・・封止樹脂
41・・溝状空隙部
42・・光硬化樹脂
421・未硬化部
43・・孔状空隙部
5・・・半田
61・・金型
611・注入口
62・・マスクパターン
71・・送信信号入力端子
72・・バンドパスフィルタ
73・・電力増幅器
74・・デュプレクサ
75・・アンテナ接続端子
76・・受信信号出力端子
DESCRIPTION OF SYMBOLS 1 ... Wiring board 11 ... Dielectric layer 12 Plane conductor layer 13 Via hole conductor 14 Input / output electrode pad 15 Ring-sealing electrode pad 2 Surface acoustic wave element 21 -Piezoelectric substrate 22-IDT electrode 23-Input / output electrode 24-Ring sealing electrode 31-Semiconductor chip 32-Chip capacitor 33-Chip inductor 4-Sealing resin 41-Groove-shaped gap 42 .. Photo-curing resin 421. Uncured portion 43.. Hole gap 5... Solder 61... Die 611 / Injection port 62.. Mask pattern 71. 73 .. Power amplifier 74 .. Duplexer 75 .. Antenna connection terminal 76 .. Received signal output terminal

Claims (2)

圧電基板の一方主面上に外周に沿って環状封止電極が設けられ、該環状封止電極の内側領域にIDT電極と該IDT電極に接続する入出力電極とが設けられた弾性表面波素子が、複数の誘電体層および複数の導体層からなる積層構造を有する配線基板の表面にフリップチップ実装されるとともに、その他の表面実装部品が前記配線基板の表面に実装され、前記弾性表面波素子および前記その他の表面実装部品を封止するように上面平坦に形成された封止樹脂層で前記配線基板の表面が被覆された高周波モジュールにおいて、前記封止樹脂層には、前記配線基板における積層方向から見て前記封止樹脂層を分割するように前記弾性表面波素子に沿って溝状空隙部が形成されていることを特徴とする高周波モジュール。 A surface acoustic wave device in which an annular sealing electrode is provided along the outer periphery on one main surface of a piezoelectric substrate, and an IDT electrode and an input / output electrode connected to the IDT electrode are provided in an inner region of the annular sealing electrode Is mounted on the surface of the wiring board having a laminated structure composed of a plurality of dielectric layers and a plurality of conductor layers, and other surface mount components are mounted on the surface of the wiring board, and the surface acoustic wave element. In the high-frequency module in which the surface of the wiring board is covered with a sealing resin layer formed flat on the upper surface so as to seal the other surface-mounted components, the sealing resin layer is laminated on the wiring board. A high-frequency module, characterized in that a groove-like void is formed along the surface acoustic wave element so as to divide the sealing resin layer when viewed from the direction. 圧電基板の一方主面上に外周に沿って環状封止電極が設けられ、該環状封止電極の内側領域にIDT電極と該IDT電極に接続する入出力電極とが設けられた弾性表面波素子が、複数の誘電体層および複数の導体層からなる積層構造を有する配線基板の表面にフリップチップ実装されるとともに、その他の表面実装部品が前記配線基板の表面に実装され、前記弾性表面波素子および前記その他の表面実装部品を封止するように上面平坦に形成された封止樹脂層で前記配線基板の表面が被覆された高周波モジュールにおいて、前記封止樹脂層には、前記配線基板における積層方向から見て複数の孔状空隙部が前記弾性表面波素子に沿って該弾性表面波素子との間隔未満の間隔で列をなすように形成されていることを特徴とする高周波モジュール。 A surface acoustic wave device in which an annular sealing electrode is provided along the outer periphery on one main surface of a piezoelectric substrate, and an IDT electrode and an input / output electrode connected to the IDT electrode are provided in an inner region of the annular sealing electrode Is mounted on the surface of the wiring board having a laminated structure composed of a plurality of dielectric layers and a plurality of conductor layers, and other surface mount components are mounted on the surface of the wiring board, and the surface acoustic wave element. In the high-frequency module in which the surface of the wiring board is covered with a sealing resin layer formed flat on the upper surface so as to seal the other surface-mounted components, the sealing resin layer is laminated on the wiring board. A high-frequency module characterized in that a plurality of hole-shaped voids are formed in a row along the surface acoustic wave element at intervals less than the distance from the surface acoustic wave element when viewed from the direction.
JP2006076661A 2006-03-20 2006-03-20 High-frequency module Pending JP2007258776A (en)

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US8093699B2 (en) * 2004-12-22 2012-01-10 Sanyo Electric Co., Ltd. Circuit device with circuit board and semiconductor chip mounted thereon
US8344490B2 (en) * 2005-02-18 2013-01-01 Fujitsu Semiconductor Limited Semiconductor device having a high frequency electrode positioned with a via hole
US9076789B2 (en) 2005-02-18 2015-07-07 Socionext Inc. Semiconductor device having a high frequency external connection electrode positioned within a via hole
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US9006750B2 (en) 2011-03-15 2015-04-14 Omron Corporation Optical semiconductor package, optical semiconductor module, and manufacturing method of these
US9478213B2 (en) 2012-06-28 2016-10-25 Taiyo Yuden Co., Ltd. Acoustic wave device built-in module and communication device
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