JP2007258691A - Device for laser irradiation, method of laser irradiation, and method of fabricating semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a device for laser irradiation and a method of laser irradiation, capable of eliminating an influence of stray light in a DMD and forming an irradiation pattern with a uniform beam spot, allowing improvement of usability of a laser beam. <P>SOLUTION: The laser irradiation device has at least a laser oscillator, a diffraction optical element and an optical component having a multitude of micro-mirrors arranged two-dimensionally. In the device a laser beam emitted from the laser oscillator is split by the diffraction optical element into a plurality of laser beams, which are deflected by a plurality of the micro-mirrors. The laser beams which are produced through the process of splitting into a plurality of laser beams have the same quantity of energy as each other, respectively. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a laser irradiation apparatus and a laser irradiation method for efficiently performing laser irradiation performed by a laser direct drawing method or the like. Further, the present invention relates to a method for manufacturing a semiconductor device manufactured including the laser irradiation step.

  In a semiconductor device manufacturing process, a printed circuit board manufacturing process, and the like, microfabrication is indispensable with circuit integration. In general, such fine processing is performed by a laser exposure technique in which a photomask on which a circuit pattern is written is prepared in advance and the pattern is transferred to a substrate. However, in the method using a photomask, the production of the mask takes cost and time. Therefore, in recent years, a process that does not use a photomask (hereinafter referred to as a maskless process) has attracted attention. As a typical maskless process, there is a laser direct writing method. In the laser direct drawing method, a photosensitive material is ejected or applied onto a conductive film formed by sputtering or the like, and a laser beam is irradiated thereon using a laser beam direct drawing apparatus. At that time, laser beam irradiation is selectively performed, and further development is performed to form a mask in the region irradiated with the laser beam. Next, the conductive film can be formed into a desired pattern by etching the conductive film using this mask. Thereby, a TFT (thin film transistor) or IC circuit pattern can be produced.

  In order to form a desired irradiation pattern by a laser direct drawing method, a method of dividing a laser beam into a plurality of beam spots using a digital micromirror device (DMD) is known. The DMD is a two-dimensional array of minute micromirrors, and a desired irradiation pattern can be created on the irradiation surface by operating each mirror individually. In addition, since the response time of the plurality of micromirrors constituting the DMD is as small as about μsec, a plurality of patterns can be switched at high speed. From such advantages, a laser exposure apparatus using DMD has been proposed (for example, Patent Document 1).

  The DMD is a reflective optical modulation element in which a plurality of minute micromirrors are two-dimensionally arranged. The DMD is composed of a micromirror, a hinge for fixing the micromirror, a yoke, a CMOS memory semiconductor, and the like, and controls the inclination of each micromirror by electrostatic force generated below the micromirror. The micromirror can be manufactured with a side of about several tens of μm, and the angle of each micromirror is variable by about ± 10 ° corresponding to the signals “1” and “0” applied to the address electrodes.

When laser irradiation is performed using DMD, beam spots formed by individual micromirrors must have the same beam characteristics. In particular, in a semiconductor film exposure process or the like, microfabrication of several μm size is required. Therefore, in order to perform such fine processing accurately, it is necessary to homogenize the spot size and energy of the beam spot at a high level. Therefore, when the laser beam is incident on the DMD and the irradiation pattern is formed, the energy distribution of the laser beam is made uniform in advance. As a method for making the laser beam uniform, there is a method using a diffusion plate, a kaleidoscope, an array lens, or the like.
JP 2005-275325 A

  However, even when a laser beam made uniform by the above method is used, each laser beam reflected by the DMD sometimes has different beam characteristics. Since the plurality of micromirrors constituting the DMD operate independently of each other, there are gaps between the mirrors. The gap between the mirrors is a margin area for operating each micromirror independently, and cannot be eliminated. The laser beam reflected by the gap and the outer edge of the mirror becomes stray light, and there is a problem that a beam spot is formed at a place other than a desired beam pattern. Also, the micromirror is not a perfect plane, and its shape may be distorted during the manufacturing process. This distortion is particularly large at the outer edge of the micromirror, and the laser beam reflected at this portion may become stray light. In view of this, a method has been proposed in which a slit is provided in front of or behind a microlens for condensing a laser beam to shield stray light. However, in this method, stray light may pass through the opening of the slit. Therefore, even if a plurality of slits are used, it is impossible to completely eliminate the influence of stray light.

  In addition, in a conventional exposure apparatus using a DMD, a microlens array for condensing each laser beam reflected by a micromirror constituting the DMD is indispensable. The microlens array is an array of a plurality of lenses corresponding to each laser beam. However, when a microlens array is used, for example, quartz or the like must be used as a base material of the microlens array for a laser beam in the ultraviolet region, resulting in a very expensive apparatus configuration. In addition, as a method that does not use a microlens array, there is a method in which a laser beam reflected by a micromirror is shaped by passing it through a pinhole, and an image of the pinhole opening is projected onto the irradiation surface by a reduction optical system. It has been. However, this method has a problem in terms of energy use efficiency because most of the laser beam is shielded by the pinhole. Further, it has been difficult to completely avoid the problem that the pinhole is deformed by heat and the shape and irradiation position of the beam spot are shifted.

  The present invention solves the above problems and improves the utilization efficiency of the laser beam, and at the same time, eliminates the influence of stray light in the DMD, and can form an irradiation pattern with a uniform beam spot and laser irradiation. It aims to provide a method.

  The laser irradiation apparatus of the present invention is called an optical element (digital micromirror device (DMD)) in which at least a laser oscillator, a diffractive optical element, and a minute mirror (hereinafter referred to as a micromirror) are two-dimensionally arranged. (Hereinafter referred to as DMD). The laser beam emitted from the laser oscillator is divided into a plurality of laser beams by a diffractive optical element, and the laser beam is deflected by a micromirror. Here, the plurality of micromirrors can be individually adjusted. By individually setting the angle of each micromirror, the laser beam deflected by each micromirror is irradiated to a desired position on the substrate.

  A laser irradiation apparatus of the present invention includes a laser oscillator that emits a laser beam, a diffractive optical element that divides the laser beam emitted from the laser oscillator into a plurality of laser beams, and a laser beam that is divided into a plurality of parts by the diffractive optical element. Each having a plurality of micromirrors for deflecting, and a transfer stage on which an irradiated body (hereinafter also referred to as an object) irradiated with each laser beam deflected by the plurality of micromirrors is mounted. And Each of the plurality of laser beams is collected at the center of each of the plurality of micromirrors or between the center and the corner. The spot size of each of the plurality of laser beams is preferably smaller than the size of the surface area of each of the plurality of micromirrors.

  In the laser irradiation apparatus of the present invention, the diffractive optical element is a transmissive diffractive optical element or a reflective diffractive optical element.

  In the laser irradiation apparatus of the present invention, each of the plurality of divided laser beams has the same energy.

  The laser irradiation apparatus of the present invention includes a projection lens disposed between the diffractive optical element and the transport stage.

  In the laser irradiation method of the present invention, a laser beam emitted from a laser oscillator is incident on a diffractive optical element and divided into a plurality of parts, and the divided laser beams are deflected by a plurality of micromirrors and placed on a transport stage. It is characterized by irradiating the irradiated object. Each of the plurality of laser beams is collected at the center of each of the plurality of micromirrors or between the center and the corner. The spot size of each of the plurality of laser beams is preferably smaller than the size of the surface area of each of the plurality of micromirrors.

  According to the laser irradiation method of the present invention, a laser beam emitted from a laser oscillator is incident on a diffractive optical element and divided into at least a first laser beam and a second laser beam, and the first laser beam is divided into a first micromirror. , The second laser beam is incident on the second micromirror, and the first laser beam and the second laser beam deflected by the first micromirror and the second micromirror are incident on the irradiated surface. It is characterized by irradiating. The first laser beam is focused between the center or the center and the corner of the first micromirror, and the second laser beam is focused between the center or the center and the corner of the second micromirror. Is done. The spot size of the first laser beam is preferably smaller than the surface area of the first micromirror, and the spot size of the second laser beam is preferably smaller than the surface area of the second micromirror.

  In the laser irradiation method of the present invention, the diffractive optical element is a transmissive diffractive optical element or a reflective diffractive optical element.

  In the laser irradiation method of the present invention, each of the laser beams divided into a plurality has the same energy.

  In the laser irradiation method of the present invention, the laser beam divided into a plurality is irradiated onto the irradiated surface after passing through the projection lens.

  According to a method for manufacturing a semiconductor device of the present invention, a plurality of island-shaped semiconductor layers having a source electrode or a drain electrode are formed over a substrate, a first interlayer insulating film is formed over the plurality of island-shaped semiconductor layers, A gate electrode is formed on each of the plurality of island-like semiconductor layers through the interlayer insulating film, a second interlayer insulating film is formed on the gate electrode, a resist is provided on the second interlayer insulating film, Then, after passing through the diffractive optical element and being branched into a plurality of parts, each of them is irradiated with a laser beam deflected by a micromirror, and the resist irradiated with the laser beam is developed to develop the first interlayer insulating film and the second interlayer insulating film. The interlayer insulating film is etched to selectively form contact holes. Each of the plurality of laser beams is collected at the center of each of the plurality of micromirrors or between the center and the corner. The spot size of each of the plurality of laser beams is preferably smaller than the size of the surface area of each of the plurality of micromirrors.

  According to the present invention, the beam spot of the laser beam can be set to a spot size smaller than that of the micromirror, so that it is possible to eliminate the influence of stray light caused by the gap between the micromirrors constituting the DMD or the outer edge of the micromirror. it can. In addition, the utilization efficiency of the laser beam can be improved. Furthermore, since it is possible to prevent the laser beam from entering the gap between the micromirrors, it is possible to prevent device damage and malfunction. In addition, when using a diffractive optical element having a function of uniformizing the energy of a laser beam, it is not necessary to newly install a beam homogenizer in the optical system, so the number of elements in the optical system can be reduced. Is possible. Further, since the beam spot can be condensed by the diffractive optical element, it is not necessary to condense the laser beam using the microlens array, and the number of elements in the optical system can be reduced. With the above configuration, the number of elements in the optical system can be reduced, and a laser irradiation apparatus can be configured at low cost. In addition, since the number of elements in the optical system can be reduced, the laser irradiation apparatus can be downsized.

  In addition, according to the present invention, since the deflection direction of the laser beam can be switched in a short time, laser irradiation can be performed while switching various irradiation patterns. In addition, a plurality of beam spots can be formed at a time. Therefore, even when a complicated irradiation pattern is formed, laser irradiation can be performed efficiently. When this apparatus is applied to a laser direct writing process on a semiconductor film, it is possible to easily improve mass productivity such as production of an ID chip ROM.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. Therefore, the present invention is not construed as being limited to the description of this embodiment mode. Note that in the drawings described below, the same portions or portions having similar functions are denoted by the same reference numerals, and repetitive description thereof is omitted.

(Embodiment 1)
In this embodiment mode, an example in which a laser beam is divided into a plurality of parts by a transmission type diffractive optical element and incident on a DMD, and the laser beam is selectively irradiated onto the substrate surface will be described.

  FIG. 1 shows a schematic diagram of the laser irradiation apparatus of the present embodiment. In FIG. 1, the direction indicated by the broken-line arrow is the direction of travel of the laser beam. Here, the laser beam emitted from the laser oscillator 101 is deflected by the mirror 102 and enters the expander 103. The expander 103 has a function of expanding the beam diameter of the laser beam by disposing, for example, two convex lenses.

  Next, the laser beam that has passed through the expander 103 enters the diffractive optical element 104. Here, the expander 103 is used for relaxing design restrictions such as a cutting interval of the diffractive optical element 104 by enlarging the beam diameter. Therefore, when the beam diameter of the laser beam emitted from the laser oscillator is sufficiently large, the expander 103 may not be used. The diffractive optical element 104 is used to divide the laser beam and form a plurality of beam spots. Although an example in which a transmission type diffractive optical element is used as the diffractive optical element 104 is shown here, the laser irradiation apparatus of the present invention is not limited to this configuration. For example, a reflective diffractive optical element may be arranged in the optical system.

  Since the diffractive optical element 104 can be designed so that each of the plurality of divided laser beams has the same beam parameter, for example, even if a laser beam having a Gaussian energy distribution is used, the diffractive optical element is By using it, a plurality of laser beams having the same energy can be formed. As a result, the exposure times of the plurality of laser beams can be made uniform, so that the processing time can be minimized. The diffractive optical element used here controls the behavior of the laser beam by the diffraction phenomenon of its surface structure. A diffractive optical element can be designed by optimizing the phase distribution by an ORA (Optical Rotation Angle) method or the like. It is also possible to automatically design a diffractive optical element with optical design software capable of performing wave optical analysis. As the physical shape of the diffractive optical element, a binary phase grating, a multilevel phase grating, a continuous phase grating, or the like can be applied.

  Next, the laser beams divided by the diffractive optical element 104 are focused on the DMD 105, respectively. The number of micromirrors constituting the DMD is preferably equal to or greater than the number of laser beams divided by the diffractive optical element, and each laser beam is focused on a different micromirror surface. Then, it is reflected by the micromirror and deflected toward the projection lens 106. Here, in order to explain the incident position of the laser beam on the micromirror, FIG. 2 shows a part of the DMD surface. Reference numeral 201 in FIG. 2 denotes a micromirror constituting the DMD. Note that although FIG. 2 illustrates a DMD having six micromirrors 201, the number of micromirrors is not limited to this. An area indicated by 202 indicates a gap between the micromirrors. When a laser beam enters the gap 202 between the micromirrors, stray light is caused. In addition, the laser beam enters the device from the gap 202 between the micromirrors 201 described above, which causes a temperature rise and device damage, and causes problems such as chattering. Therefore, in the laser irradiation apparatus of the present invention, the beam spot is divided by the diffractive optical element, and the laser beam is condensed to a spot size smaller than the surface area of the micromirror 201. For example, a laser beam may be condensed at the center of the micromirror 201 as shown by a spot 203 indicated by a dotted line in the drawing. Here, when there is a geometric distortion in the micromirror 201, the distortion becomes particularly large at the four corners of the micromirror. Therefore, by focusing the laser beam on the central portion of the micromirror 201, it is possible to prevent fluctuations in the beam spot shape due to distortion. A region 205 at the center of the micromirror 201 is a region where a hinge connected to a yoke that is an angle adjusting mechanism of the micromirror is formed. Therefore, when the hinge causes a variation in the shape of the beam spot, the beam spot is condensed at a position 204 between the center of the micromirror and the corner of the micromirror so as to avoid the region 205. It is good also as a structure. When it is desired to form a beam spot at such a position, it is necessary to collect the beam spot with a diameter of about several μm. In this case, although not shown, the beam spot formed by the diffractive optical element 104 may be reduced and projected onto the DMD 105 by the projection optical system. With the above configuration, in the DMD 105, loss of the laser beam due to stray light or the like can be prevented, and the utilization efficiency of the laser beam can be improved.

  Next, the laser beam reflected by the DMD 105 and deflected in the irradiation surface direction enters the projection lens 106 (FIG. 1). The projection lens 106 is arranged to project the beam spot formed on the DMD 105 onto the substrate 108 that is the irradiation surface. Therefore, the projection lens 106 is disposed at a position where the DMD 105 and the substrate 108 are conjugated with each other. Here, the installation angles of the plurality of micromirrors constituting the DMD 105 are controlled digitally. For example, when laser irradiation is performed on the substrate, the tilt angle of the micromirror is +10 degrees, and when laser irradiation is not performed on the substrate, the tilt angle of the micromirror is −10 degrees. Here, when the inclination angle of the micromirror is −10 degrees, the laser beam reflected by the micromirror reaches the light shielding plate 107 and is shielded from light, so that the surface of the substrate 108 is not irradiated. With the above structure, the case where the laser beam is irradiated onto the substrate 108 (on) and the case where it is not irradiated (off) can be controlled, so that a desired irradiation pattern can be formed on the substrate 108.

  In the present embodiment, the substrate 108 is adsorbed by the adsorption stage 109. Further, the suction stage 109 is installed on a transfer stage 110 that operates in the X direction and a transfer stage 111 that operates in the Y direction. Thereby, when irradiation of a certain exposure region is completed, the transfer stage 110 or 111 is operated, and laser irradiation is performed with a desired irradiation pattern on the new exposure region. By repeating this cycle, laser irradiation can be performed on the entire surface of the substrate. In the present embodiment, the substrate 108 is fixed to the suction stage 109. However, the fixing method is not limited to this, and other methods such as pressing the substrate against the stage from above with a simple fixing tool may be used.

  By performing laser irradiation by the method described in this embodiment mode, it is possible to switch the laser irradiation pattern at high speed and efficiently perform laser irradiation on the substrate. Since the laser irradiation apparatus of the present invention can perform an exposure process by irradiating a plurality of laser beams, the productivity can be improved by applying it to a manufacturing process of a product that frequently changes a pattern to be exposed like a ROM. Can do. For example, if it is applied to a ROM manufacturing process of an ID chip, ID chips having a plurality of patterns can be mass-produced at low cost.

(Embodiment 2)
In this embodiment mode, an example in which a laser beam is divided into a plurality of parts by a reflection type diffractive optical element and incident on a DMD for laser irradiation is shown.

  FIG. 3 shows a schematic diagram of the laser irradiation apparatus of the present embodiment. In FIG. 3, the laser beam emitted from the laser oscillator 301 enters the expander 302. In addition, the broken line arrow in FIG. 3 has shown the advancing direction of the laser beam. The expander 302 has a function of expanding the beam diameter of the laser beam, for example, by arranging two convex lenses. The laser beam that has passed through the expander 302 enters the reflective diffractive optical element 303. Here, the expander 302 is used for relaxing design restrictions such as a cutting interval of the diffractive optical element 303 by enlarging the beam diameter. Therefore, when the beam diameter of the laser beam emitted from the laser oscillator is sufficiently large, the expander 302 may not be used. The diffractive optical element 303 is used for splitting the laser beam and forming a plurality of beam spots. Further, since the diffractive optical element 303 can be designed so that each of a plurality of divided beam spots has the same beam parameter, even if a laser beam having a Gaussian energy distribution is used, for example, the diffractive optical element Can be used to form multiple beam spots with equal energy. As a result, the exposure times of the plurality of laser beams can be made uniform, so that the processing time can be minimized. The diffractive optical element used here controls the behavior of the laser beam by the diffraction phenomenon of its surface structure. A diffractive optical element can be designed by optimizing the phase distribution by an ORA (Optical Rotation Angle) method or the like. It is also possible to automatically design a diffractive optical element with optical design software capable of performing wave optical analysis. As the shape of the diffractive optical element, a binary phase grating, a multi-level phase grating, a continuous phase grating, or the like can be applied.

  Next, the laser beams divided by the diffractive optical element 303 are focused on the DMD 304, respectively. The number of micromirrors constituting the DMD is preferably equal to or greater than the number of laser beams divided by the diffractive optical element, and each laser beam is focused on a different micromirror surface.

  Next, the laser beam reflected by the DMD 304 and deflected in the irradiation surface direction enters the projection lens 305 (FIG. 3). The projection lens 305 is arranged to project the beam spot formed on the DMD 304 onto the substrate 307 that is the irradiation surface. Therefore, the projection lens 305 is disposed at a position where the DMD 304 and the substrate 307 are conjugated with each other. Here, the installation angles of the plurality of micromirrors constituting the DMD 304 are controlled digitally. For example, when laser irradiation is performed on the substrate, the tilt angle of the micromirror is +10 degrees, and when laser irradiation is not performed on the substrate, the tilt angle of the micromirror is −10 degrees. Here, when the tilt angle of the micromirror is −10 degrees, the laser beam reflected by the micromirror reaches the light shielding plate 306 and is shielded from light, so that the surface of the substrate 307 is not irradiated. With the above structure, it is possible to control whether the surface of the substrate 307 is irradiated with the laser beam (on) or not (off), so that a desired irradiation pattern can be formed on the substrate. In this embodiment, since the image of the diffractive optical element 303 is formed on the DMD 304, the DMD 304 has a conjugate relationship with the irradiation surface. However, the image of the diffractive optical element does not necessarily have to be formed on the DMD. An image of the diffractive optical element may be formed on the irradiation surface with a conjugate relationship between the image of the optical element and the irradiation surface.

  In the present embodiment, the substrate 307 is sucked by the suction stage 308. Further, the suction stage 308 is installed on a transfer stage 309 operating in the X direction and a transfer stage 310 operating in the Y direction. Thereby, when irradiation of a certain exposure region is completed, the transfer stage 309 or 310 is operated, and laser irradiation is performed with a desired irradiation pattern on the new exposure region. By repeating this cycle, laser irradiation can be performed on the entire surface of the substrate. In the present embodiment, the substrate is fixed to the suction stage 308. However, the fixing method is not limited to this, and other methods such as pressing the substrate against the stage from above with a simple fixing tool may be used.

  By performing laser irradiation by the method described in this embodiment mode, it is possible to switch the laser irradiation pattern at high speed and efficiently perform laser irradiation on the substrate. Since the laser irradiation apparatus of the present invention can perform an exposure process by irradiating a plurality of laser beams, the productivity can be improved by applying it to a manufacturing process of a product that frequently changes a pattern to be exposed like a ROM. Can do. For example, if it is applied to a ROM manufacturing process of an ID chip, ID chips having a plurality of patterns can be mass-produced at low cost.

(Embodiment 3)
In this embodiment mode, an example in which a laser beam reflected in two directions by a DMD is transferred to different regions on an irradiation surface and laser irradiation is performed with improved throughput will be described.

  FIG. 4 is a perspective view of the laser irradiation apparatus of the present embodiment. The laser beam emitted from the laser oscillator 401 is deflected by the mirror 402. The deflected laser beam passes through the diffractive optical element 403. The diffractive optical element 403 is used to split a laser beam and form a plurality of beam spots. In addition, since it is possible to design a diffractive optical element so that each of a plurality of divided beam spots has the same beam parameter, for example, even if a beam having a Gaussian energy distribution is used, the diffractive optical element is used. By doing so, a plurality of beam spots having equal energy can be formed. As a result, the exposure times of a plurality of laser beams can be made uniform, so that the processing time can be minimized. The diffractive optical element used here controls the behavior of the laser beam by the diffraction phenomenon of its surface structure. A diffractive optical element can be designed by optimizing the phase distribution by an ORA (Optical Rotation Angle) method or the like. It is also possible to automatically design with optical design software that can perform wave optical analysis. As the shape of the diffractive optical element, a binary phase grating, a multi-level phase grating, a continuous phase grating, or the like can be applied.

  Next, the laser beams divided by the diffractive optical element 403 are focused on the DMD 404, respectively. The number of micromirrors constituting the DMD 404 is preferably equal to or greater than the number of laser beams divided by the diffractive optical element, and each laser beam is focused on a different micromirror surface. With the above configuration, the DMD 404 can prevent loss of the laser beam due to stray light or the like, and can improve the utilization efficiency of the laser beam.

  The plurality of micromirrors constituting the DMD 404 can digitally control the angle of the reflecting surface. In the present embodiment, a DMD in which the inclination angle of a plurality of micromirrors constituting the DMD can be set to +12 degrees or −12 degrees will be described. In this embodiment, when the tilt angle of the micromirror is +12 degrees, the laser beam reflected by the DMD 404 passes through the projection lens 405. Note that the projection lens 405 has a function of transferring an image on the DMD 404 to the irradiation surface, and projects a beam spot formed on a micromirror having an inclination angle of +12 degrees onto the substrate 408 to perform laser irradiation. can do. On the other hand, when the inclination angle of the micromirror is set to −12 degrees, the laser beam reflected by the DMD is reflected again by the mirror 406. The laser beam reflected by the mirror 406 passes through the projection lens 407. The projection lens 407 has a function of transferring an image on the DMD to the irradiation surface, and projects a beam spot formed on a micromirror having an inclination angle of −12 degrees onto the substrate 408 to perform laser irradiation. be able to. As described above, an ID chip or the like having a unique pattern can be formed by irradiating a desired position on a substrate with a laser beam using the DMD 404.

  Here, the optical path of the laser beam from the incidence on the DMD 404 to the irradiation on the substrate 408 will be described with reference to FIG. FIG. 5 is a schematic diagram of a cross section between the DMD 404 and the substrate 408. The direction indicated by the dotted line arrow is the traveling direction of the laser beam. FIG. 5A is an optical path diagram of a laser beam until the micro mirror has an inclination angle of +12 degrees, that is, until the substrate 408 is irradiated through the DMD 404 and the projection lens 405. Note that in FIG. 5A, a laser beam irradiated to the point 508 that is the center of the DMD 404 will be described for the sake of simplicity. The laser beam reflected by the DMD 404 is deflected at an angle of +24 degrees in the direction perpendicular to the paper surface (Y-axis direction). If the incident angle of the laser beam in the paper is θ, the laser beam is deflected at a reflection angle of θ in the X-axis direction and travels in the optical path 501. Further, the laser beam is incident on the projection lens 405. The projection lens 405 is installed such that an axis 503 passing through the center thereof passes through the center position of the DMD 404. Further, the projection lens 405 is disposed at a position where the DMD 404 and the substrate 408 are in a conjugate relationship with each other. With the above structure, the laser beam is transferred to the point 504 immediately below the DMD 404 on the substrate 408.

  FIG. 5B is an optical path diagram of a laser beam until the micro mirror has an inclination angle of −12 degrees, that is, until the substrate 408 is irradiated through the DMD 404, the mirror 406, and the projection lens 407. In FIG. 5B, a laser beam irradiated to the point 508 that is the center of the DMD 404 will be described for the sake of simplicity. The laser beam reflected by the DMD 404 is deflected at an angle of −24 degrees in the direction perpendicular to the paper surface (Y-axis direction). If the incident angle of the laser beam in the paper is θ, the laser beam is deflected at a reflection angle of θ in the X-axis direction and travels along the optical path 502. A mirror 406 is installed in the middle of the optical path 502, and the laser beam reflected by the mirror 406 enters the projection lens 407. The projection lens 407 is disposed at a position where the DMD 404 and the substrate 408 are conjugated with each other. Here, the mirror 406 is installed such that its reflection surface is perpendicular to the laser beam irradiation surface. Thereby, the optical path 501 and the optical path 502 can be made equal distance. Therefore, the projection lenses 405 and 407 can use lenses having the same focal length. Further, the configurations of FIGS. 5A and 5B can have the same projection magnification.

  In the configuration of FIG. 5B, the laser beam is deflected by the mirror 406 in the optical path, so that the position of the laser beam irradiated on the substrate 408 can be adjusted. For example, when the laser beam reflected by the mirror 406 is extended in the direction opposite to the traveling direction of the laser beam, a point 505 intersects with a straight line obtained by extending the position of the DMD 404 in the horizontal direction on the paper surface. Here, the line segment from the mirror 406 to the point 505 and the line segment from the point 508 to the mirror 406 in the optical path 502 are symmetrical with respect to the mirror 406 as an axis. Therefore, virtually, it can be considered that there is a point 508 that is the center of the DMD 404 at the position of the point 505. Here, if the distance from the center of the DMD 404 to the point 505 is d, the central axis 506 of the projection lens is installed at a position away from the axis 503 passing through the center of the DMD 404 by a distance d. As a result, the laser beam can be transferred to a point 507 almost directly below the point 505. By configuring the optical system of FIGS. 5A and 5B by the above method, different irradiation patterns can be simultaneously formed in the two regions.

  The substrate 408 on which the irradiation pattern is formed is adsorbed by the adsorption stage 409. Further, the suction stage 409 is installed on a transfer stage 410 that operates in the X-axis direction and a transfer stage 411 that operates in the Y-axis direction. Thereby, when irradiation of a certain exposure region is completed, the transfer stage 410 or 411 is operated to perform laser irradiation with a desired irradiation pattern on the new exposure region. By repeating this cycle, laser irradiation can be performed on the entire surface of the substrate. In the present embodiment, the substrate is fixed to the suction stage 409. However, the fixing method is not limited to this, and other methods such as pressing the substrate against the stage from above with a simple fixing tool may be used.

  Here, the irradiation pattern formed on the irradiation surface will be described with reference to FIG. FIG. 6 shows an example in which a drawing pattern of 3 rows × 3 columns is formed. Pattern A (601, 603, 605, 607) is an irradiation pattern formed by the configuration of FIG. Pattern B (602, 604, 606, 608) is an irradiation pattern formed by the configuration shown in FIG. In the patterns A and B, the hatched area is an area irradiated with the laser beam, and the pattern A and the pattern B are irradiation patterns that are reversed from each other. For example, the irradiation pattern 602 is a pattern in which laser irradiation is performed only on a portion corresponding to an unirradiated region of the irradiation pattern 601. The center of the pattern A and the center of the pattern B are formed in a region separated by a distance d in the X-axis direction. Thereby, irradiation patterns having different patterns can be formed simultaneously. Therefore, when laser irradiation is performed while the substrate is transported in the Y-axis direction in the figure, the laser irradiation can be performed while simultaneously forming the pattern A and the pattern B, so that the throughput is improved.

  By performing laser irradiation by the above method, it is possible to switch the laser irradiation pattern at high speed and to efficiently perform laser irradiation on the substrate. In addition, the method of creating such an irradiation pattern is particularly suitable for producing an ID chip that requires the formation of a random irradiation pattern. Therefore, if the laser irradiation apparatus of the present invention is applied to a ROM manufacturing process of an ID chip, ID chips having a plurality of patterns can be mass-produced at a low cost.

  In this embodiment, a method for manufacturing a TFT used for a nonvolatile memory circuit, a modulation circuit, a demodulation circuit, a logic circuit, or the like over an insulating substrate will be described with reference to FIGS. Note that in this embodiment, an n-channel thin film transistor (hereinafter referred to as TFT) and a p-channel TFT are shown as examples of the semiconductor element. However, in the present invention, the semiconductor element included in the memory portion and the logic circuit portion is described here. It is not limited. Further, the manufacturing method shown in this embodiment is an example, and the manufacturing method of a semiconductor element over an insulating substrate is not limited. The TFT manufactured in this embodiment is a method called contact writing in which binary information of “0” or “1” is determined depending on whether or not a transistor is connected to a bit line when data is stored in a memory portion. Remember.

  First, base films 3001 and 3002 made of an insulating film such as a silicon oxide film or a silicon nitride film, or an insulating film such as a silicon oxynitride film or a silicon nitride oxide film are formed over an insulating substrate 3000 which is a glass substrate. For example, a silicon oxynitride film is formed to a thickness of 10 nm to 200 nm as the base film 3001, and a silicon oxynitride film is stacked as the base film 3002 in order to a thickness of 50 nm to 200 nm.

  Next, a semiconductor film having an amorphous structure is formed over the base film 3002, and the semiconductor film is crystallized by a laser crystallization method or a thermal crystallization method to form a crystalline semiconductor film. Next, the crystalline semiconductor film is processed to form island-shaped semiconductor layers 3003, 3004, and 3005. The island-shaped semiconductor layers 3003, 3004, and 3005 are formed with a thickness of about 25 nm to 80 nm. There is no limitation on the material of the crystalline semiconductor film, but it is preferably formed of silicon or a silicon-germanium (SiGe) alloy.

  Next, a gate insulating film 3006 is formed to cover the island-shaped semiconductor layers 3003, 3004, and 3005. The gate insulating film 3006 is formed of an insulating material containing silicon with a thickness of approximately 10 nm to 80 nm by a plasma CVD method or a sputtering method.

  Then, a first conductive layer is formed over the gate insulating film 3006. Subsequently, a second conductive layer is formed over the first conductive layer, and the stacked first conductive layer and second conductive layer are etched together to form TFT gate electrodes 3011, 3012, and 3013. Form.

  In this embodiment, the first conductive layer is formed with TaN to a thickness of 50 to 100 nm, and the second conductive layer is formed with W to a thickness of 100 to 300 nm. However, the material of the conductive layer is not particularly limited, and any of them may be formed of an element selected from Ta, W, Ti, Mo, Al, Cu, or the like, or an alloy material or a compound material containing the element as a main component. Good.

  Next, the p-channel TFT used in the logic circuit portion is doped with an element imparting p-type conductivity to form first impurity regions 3016 and 3017. Subsequently, in order to form an LDD region of an n-channel TFT used in the memory portion and the logic circuit portion, doping with an element imparting n-type is performed to form second impurity regions 3018 and 3019. After that, sidewalls 3020 and 3021 are formed, and third impurity regions 3022 and 3023 are formed by doping the n-channel TFT used in the memory portion and the logic circuit portion with n-type. These doping methods may be performed by an ion doping method or an ion implantation method. Through the above steps, impurity regions are formed in the island-like semiconductor layers 3003, 3004, and 3005, respectively.

  Next, a step of activating the impurity element added to each of the island-shaped semiconductor layers 3003, 3004, and 3005 is performed. This step is performed by a thermal annealing method using a furnace annealing furnace. In addition, a laser annealing method or a rapid thermal annealing method (RTA method) can be applied. Alternatively, a heat treatment is performed at 300 to 450 ° C. for 1 to 12 hours in an atmosphere containing 3% or more of hydrogen to perform a step of hydrogenating the island-shaped semiconductor layer. As another means of hydrogenation, plasma hydrogenation (using hydrogen excited by plasma) may be performed.

Next, a first interlayer insulating film 3024 is formed using a silicon oxynitride film. The thickness of the first interlayer insulating film 3024 is set to 10 to 80 nm, which is the same as that of the gate insulating film. Subsequently, a second interlayer insulating film 3025 made of an organic insulating material such as acrylic is formed. Alternatively, an inorganic material can be used for the second interlayer insulating film 3025 instead of the organic insulating material. As the inorganic material, inorganic SiO ₂ , SiO ₂ (PCVD-SiO ₂ ) produced by a plasma CVD method, SOG (Spin on Glass; coated silicon oxide film), or the like is used.

  Subsequently, a resist is provided over the entire surface of the second interlayer insulating film 3025 by spin coating, and contact holes 3031 and 3032 are formed in the gate insulating film 3006, the first interlayer insulating film 3024, and the second interlayer insulating film 3025. (FIG. 7). In the present embodiment, the etching process for portions other than the memory portion of the nonvolatile memory circuit is performed by a first exposure means (for example, mirror projection exposure, step-and-repeat exposure (stepper exposure), step-and-scan exposure, etc.). Is going. The first exposure means exposes the resist provided on the second interlayer insulating film 3025 to form a pattern, and etching is performed using the resist as a mask. In this step, as shown in FIG. 8A, a resist is first applied over the second interlayer insulating film 3025 and baked. Next, a portion other than the memory portion of the nonvolatile memory circuit is exposed by exposing the resist by the above-described first exposure means, that is, mirror projection exposure, step-and-repeat exposure, step-and-scan exposure, etc. (FIG. 8B). Such exposure means is very effective when exposing the same pattern several times.

  Next, the resist is exposed by the second exposure means using the laser irradiation apparatus described in Embodiments 1 to 3, so that the contact hole pattern of the memory part of the nonvolatile memory circuit or the contact hole of the memory part is obtained. Then, a contact hole pattern of a part of the chip is formed (FIG. 8C). In FIG. 7, the contact hole 3033 of the memory portion is formed by the second exposure means.

  Next, after processing such as development (FIG. 8D), the interlayer film is etched, and contact holes 3031, 3032, 3033 in which patterns are formed by the first exposure means and the second exposure means are formed. It is formed (FIG. 8E).

  Then, electrodes 3026 and 3027 are formed in contact with the source and drain regions of the island-like semiconductor layer in the memory portion. Similarly, in the logic circuit portion, electrodes 3028, 3029, and 3030 are formed.

  In the above description, in the contact hole forming step, the first exposure means (mirror projection exposure, step-and-repeat exposure, or step-and-scan exposure) and the second exposure means (in the first to third embodiments). The step of forming a plurality of contact holes on the same substrate by combining with the exposure method using the laser irradiation method shown) has been described. However, the above method is not limited to the contact hole forming step, and the source wiring or the drain wiring It may be used in other processes such as a forming process and a doping process. Further, it is not always necessary to combine the first exposure unit and the second exposure unit, and the second exposure unit may be used in all the exposure steps. By using the second exposure means, it is possible to perform laser irradiation at a desired position at high speed while switching the laser irradiation pattern at high speed, thereby shortening the manufacturing time of the semiconductor device and manufacturing it with high accuracy. .

  In the above description, the second exposure unit is used after the first exposure unit. First, the second exposure unit forms a memory unit, and then the first exposure unit performs another circuit. A portion may be formed.

  As described above, the memory portion including the memory element 3034 and the logic circuit portion including the n-channel TFT 3035 having the LDD structure and the p-channel TFT 3036 having the single drain structure can be formed over the same substrate ( (See FIG. 7).

  In addition, as shown in the flowchart of FIG. 9, a region other than the memory portion may be formed once, and then the memory portion of the nonvolatile memory circuit may be formed. In the step shown in FIG. 9, first, a resist is applied over the second interlayer insulating film 3025, and baking is performed (FIG. 9A). Next, the resist is exposed in order to form a pattern in an area other than the memory portion by the first exposure means (mirror projection exposure, step-and-repeat exposure, step-and-scan exposure, etc.). (FIG. 9B). Next, the resist exposed by the first exposure means is developed and baked. (FIG. 9C). Next, etching is performed to form a pattern in a region other than the memory portion (FIG. 9D). Next, a resist is applied again over the interlayer insulating film 3025 and baked (FIG. 9E). Next, the resist is exposed to form the pattern of the memory portion of the nonvolatile memory circuit by the second exposure means using the exposure apparatus described in Embodiments 1 to 3 (FIG. 9F). . Next, the resist exposed by the second exposure means is developed and baked (FIG. 9G). Finally, etching is performed to form a memory portion of the nonvolatile memory circuit (FIG. 9H). In this way, different data can be stored for each individual chip, and a semiconductor device can be manufactured without reducing the throughput. Since the laser irradiation apparatus described in Embodiments 1 to 3 can accurately irradiate a complicated or a plurality of irradiation points at once with high accuracy, it requires laser irradiation to a plurality of irradiation points as in a ROM manufacturing process. Laser irradiation can be performed efficiently in the manufacturing process of the device. Therefore, it is possible to easily improve mass productivity such as production of an ID chip ROM.

  In this embodiment, a manufacturing method until a memory portion and a logic circuit portion are formed and transferred to a flexible substrate will be described with reference to FIGS. In this embodiment, as a semiconductor element, a nonvolatile memory element, an n-channel TFT, and a p-channel TFT are shown as examples. However, in the present invention, the semiconductor element included in the memory portion and the logic circuit portion is described here. It is not limited. Further, this manufacturing method is an example, and the manufacturing method over an insulating substrate is not limited.

  First, as illustrated in FIG. 10, the peeling layer 4000 is formed over the insulating substrate 3000. As the separation layer 4000, a layer containing silicon as its main component such as amorphous silicon, polycrystalline silicon, single crystal silicon, or microcrystalline silicon (including semi-amorphous silicon) can be used. The peeling layer 4000 can be formed by a sputtering method, a plasma CVD method, or the like. In this embodiment, amorphous silicon having a thickness of about 500 nm is formed by a sputtering method and used as the peeling layer 4000. Subsequently, a base film 3001 is formed over the separation layer 4000, and then, similarly to the working process described in Embodiment 1, a memory portion having a memory element 3034, a logic circuit portion having an n-channel TFT 3035 and a p-channel TFT 3036 Form.

  Next, a third interlayer insulating film 4001 is formed over the second interlayer insulating film 3025, and pads 4002 to 4005 are formed. As the pads 4002 to 4005, a conductive material having one or more metals such as Ag, Au, Cu, Pd, Cr, Mo, Ti, Ta, W, and Al, or a metal compound can be used.

  Then, a protective layer 4006 is formed over the third interlayer insulating film 4001 so as to cover the pads 4002 to 4005. The protective layer 4006 is formed using a material that can protect the pads 4002 to 4005 when the peeling layer 4000 is later removed by etching. For example, the protective layer 4006 can be formed by applying an epoxy resin, an acrylate resin, or a silicone resin soluble in water or alcohols over the entire surface (FIG. 10A).

  Next, a groove 4007 for separating the separation layer 4000 is formed (see FIG. 10B). The groove 4007 may be formed so long as the peeling layer 4000 is exposed. The groove 4007 can be formed by etching, dicing, scribing, or the like.

Next, the peeling layer 4000 is removed by etching (see FIG. 11A). In this embodiment, halogen fluoride is used as an etching gas, and the gas is introduced from the groove 4007. In this embodiment, for example, ClF ₃ (chlorine trifluoride) is used, and the temperature is 350 ° C., the flow rate is 300 sccm, the atmospheric pressure is 800 Pa, and the time is 3 hours. Further, a gas in which nitrogen is mixed with ClF ₃ gas may be used. By using halogen fluoride such as ClF ₃ , the peeling layer 4000 is selectively etched, and the insulating substrate 3000 can be peeled off. The halogen fluoride may be either a gas or a liquid.

  Next, the peeled memory portion and logic circuit portion are attached to a support body 4009 with an adhesive 4008 (see FIG. 11B). As the adhesive 4008, a material capable of bonding the support body 4009 and the base film 3001 is used. As the adhesive 4008, various curable adhesives such as a reactive curable adhesive, a thermosetting adhesive, a photocurable adhesive such as an ultraviolet curable adhesive, and an anaerobic adhesive can be used.

  As the support 4009, an organic material such as flexible paper or flexible plastic can be used. Alternatively, a flexible inorganic material may be used as the support body 4009. The support 4009 desirably has a high thermal conductivity of about 2 W / mK or more and about 30 W / mK or less in order to diffuse the heat generated in the integrated circuit.

  Note that the method for separating the integrated circuit of the memory portion and the logic circuit portion from the insulating substrate 3000 is not limited to the method using etching of a layer containing silicon as a main component as shown in this embodiment mode, and other various methods. The method can be used. For example, a metal oxide film can be provided between a substrate having high heat resistance and an integrated circuit, and the integrated circuit can be peeled by weakening the metal oxide film by crystallization. Further, for example, the integrated layer can be peeled from the substrate by breaking the peeling layer by laser light irradiation. Further, for example, the integrated circuit can be peeled from the substrate by mechanically removing the substrate on which the integrated circuit is formed or removing the substrate by etching with a solution or gas.

  In addition, when the surface of the object has a curved surface, and the ID chip support bonded to the curved surface is bent so as to have a curved surface drawn by movement of the generatrix such as a cone surface or a column surface, It is desirable to align the direction of the bus and the direction in which the TFT carrier moves. With the above configuration, even if the support is bent, it can be suppressed that the characteristics of the TFT are affected thereby. In addition, the ratio of the area occupied by the island-shaped semiconductor film in the integrated circuit is set to about 1% to 30%, so that even if the support is bent, the TFT characteristics are further suppressed from being affected. be able to.

  In this example, the memory portion is manufactured using the laser irradiation apparatus described in any of Embodiments 1 to 3. Therefore, the laser irradiation pattern can be switched at high speed, and laser irradiation can be performed efficiently in the process of creating an apparatus that needs to form a random irradiation pattern such as a ROM. Therefore, it is possible to easily improve the mass productivity such as the production of the ROM of the ID chip.

  Next, an example of a nonvolatile memory circuit using a mask ROM is shown in FIG. The nonvolatile memory circuit shown in FIG. 12 is manufactured using the laser irradiation apparatus of the present invention, and represents a memory state depending on whether or not a contact hole of a drain terminal of a TFT is opened.

  Hereinafter, the operation of the nonvolatile memory circuit using the mask ROM will be described with reference to FIG. The non-volatile memory circuit of FIG. 12 is a 4-bit memory circuit for the sake of simplicity, but the implementation of the present invention is not limited to 4 bits. 12 includes a column decoder 701, a row decoder 702, an amplifier 715, n-channel TFTs 703 to 706, bit lines (data lines) 709 and 710, word lines 707 and 708, a power supply line 713, and a column switch 711. 712, output wiring 717, load resistor 714, output terminal 716, power supply 1, and power supply 2. A constant current source may be used instead of the load resistor 714.

  The power source 1 is a potential for setting a high potential, and the power source 2 is a potential for setting a low potential. However, when the TFTs 703 to 706 are p-channel TFTs, the power supply 1 sets a low potential and the power supply 2 sets a high potential. In the following description, the TFTs 703 to 706 are n-channel TFTs, the power source 1 supplies +3 V, and the power source 2 supplies 0 V, but may be changed as appropriate. The memory cells 718 to 721 are constituted by TFTs 703 to 706.

  Hereinafter, a case where reading is performed will be described. When reading data from the memory cell 718, the row decoder 702 is operated, and the word line 707 is activated. Thereby, the TFTs 703 and 704 are turned on. Next, the column decoder 701 is operated to turn on the column switch 711. Accordingly, the bit line (data line) 709, the output wiring 717, the load resistor 714, and the amplifier 715 are connected. Since the TFT 703 is on, current flows from the power source 1 to the power source 2 via the load resistor 714, output wiring 717, column switch 711, bit line 709, TFT 703, and power source line 713. As a result, the output of the memory cell 718 goes low.

  When reading data from the memory cell 719, the row decoder 702 is operated to activate the word line 707. Thereby, the TFTs 703 and 704 are turned on. Next, the column decoder 701 is operated to turn on the column switch 712. Thereby, the bit line (data line) 710, the output wiring 717, the load resistor 714, and the amplifier 715 are connected. Although the TFT 703 is turned on, no current flows because the drain terminal of the TFT 704 is not connected anywhere. The potential of the power supply 1 is supplied to the load resistor 714, the output wiring 717, the column switch 712, and the bit line 710, but since no current flows, the output of the memory cell 719 becomes high.

  When reading data from the memory cell 720, the row decoder 702 is operated to activate the word line 708. Thereby, the TFTs 705 and 706 are turned on. Next, the column decoder 701 is operated to turn on the column switch 711. Thereby, the bit line 709, the output wiring 717, the load resistor 714, and the amplifier 715 are connected. Although the TFT 705 is on, no current flows because the drain terminal of the TFT 705 is not connected anywhere. The potential of the power supply 1 is supplied to the load resistor 714, the output wiring 717, the column switch 711, and the bit line 709, but since no current flows, the output of the memory cell 720 becomes high.

  When reading data from the memory cell 721, the row decoder 702 is operated to activate the word line 708. Thereby, the TFTs 705 and 706 are turned on. Next, the column decoder 701 is operated to turn on the column switch 712. As a result, the bit line 710, the output wiring 717, the load resistor 714, and the amplifier 715 are connected. Since the TFT 706 is on, current flows from the power source 1 to the power source 2 via the load resistor 714, the output wiring 717, the column switch 712, the bit line 710, the TFT 706, and the power source line 713. As a result, the output of the memory cell 721 becomes low. In this way, data stored in the memory can be read to the output terminal 716.

  In this embodiment, an example in which an external antenna is attached to a nonvolatile memory circuit formed using the present invention will be described with reference to FIGS.

  In FIG. 13A, the non-volatile memory circuit is covered with a single antenna. An antenna 1001 is formed over a substrate 1000, and a nonvolatile memory circuit 1002 formed using the present invention is connected. In the drawing, the periphery of the nonvolatile memory circuit 1002 is covered with the antenna 1001. However, the entire surface of the substrate is covered with the antenna 1001, and the nonvolatile memory circuit 1002 having electrodes is attached thereon. Also good.

  FIG. 13B shows a thin antenna arranged around a nonvolatile memory circuit. An antenna 1004 is formed over a substrate 1003 and a nonvolatile memory circuit 1005 formed by using the present invention is connected. The arrangement of the antenna wiring is merely an example, and the present invention is not limited to this.

  FIG. 13C illustrates a high frequency antenna. An antenna 1007 is formed over a substrate 1006, and a nonvolatile memory circuit 1008 formed using the present invention is connected.

  FIG. 13D illustrates an antenna that is 180 degrees omnidirectional (same reception is possible from any direction). An antenna 1010 is formed over a substrate 1009, and a nonvolatile memory circuit 1011 formed using the present invention is connected thereto.

  FIG. 13E shows an antenna elongated in a rod shape. An antenna 1013 is formed over a substrate 1012, and a nonvolatile memory circuit 1014 formed using the present invention is connected.

  The nonvolatile memory circuit formed using the present invention and connection to these antennas can be performed by a known method. For example, a method of connecting the antenna and the nonvolatile memory circuit using wire bonding connection or bump connection, or sticking the antenna to the antenna using one surface of the nonvolatile memory circuit as an electrode may be used. In this method, it can be attached using an ACF (anisotropy conductive film).

  The length required for the antenna differs depending on the frequency used for reception. In general, the length is preferably an integral number of a wavelength. For example, when the frequency is 2.45 GHz, it may be about 60 mm (1/2 wavelength) or about 30 mm (1/4 wavelength).

  Further, a substrate may be mounted on the nonvolatile memory circuit of the present invention, and an antenna may be further formed thereon. As an example, FIGS. 14A to 14C are a top view and a cross-sectional view of a substrate in which a substrate 1100 is mounted on a nonvolatile memory circuit and a spiral antenna 1101 is arranged. 14B and 14C are cross-sectional views taken along the chain lines AB and CD, respectively, of the top view shown in FIG. 14A.

  Note that the example shown in this embodiment is just an example, and does not limit the shape of the antenna. The present invention can be implemented with any shape of antenna.

  In this embodiment, a specific method for manufacturing a thin film integrated circuit device including a TFT will be described with reference to FIGS. Here, for the sake of simplicity, a manufacturing method will be described by showing a cross-sectional structure of a CPU (logic circuit portion) using n-channel TFTs and p-channel TFTs and a memory portion.

  First, the separation layer 61 is formed over the substrate 60 (FIG. 15A). Here, an a-Si film (amorphous silicon film) having a thickness of 50 nm was formed on a glass substrate (for example, a 1737 substrate manufactured by Corning) by a low pressure CVD method. In addition to the glass substrate, the substrate 60 may be a quartz substrate, a substrate formed of an insulating material such as alumina, a silicon wafer substrate, a plastic substrate having heat resistance that can withstand a processing temperature in a subsequent process, or the like. it can.

  In addition to the amorphous silicon, the separation layer 61 is mainly composed of silicon such as polycrystalline silicon, single crystal silicon, and SAS (semi-amorphous silicon (also referred to as microcrystalline silicon or microcrystalline silicon)). Although it is desirable to use a film | membrane, it is not limited to these. The peeling layer 61 may be formed by a plasma CVD method, a sputtering method, or the like in addition to the low pressure CVD method. Alternatively, a film doped with an impurity such as phosphorus may be used. In addition, the thickness of the release layer 61 is desirably about 50 nm to 60 nm. Regarding the SAS, the film thickness may be about 30 nm to 50 nm.

Next, a protective film 55 (also referred to as a base film or a base insulating film) is formed over the separation layer 61 (FIG. 15A). Here, in order from the peeling layer 61 side, the protective film 55 is composed of a 100 nm thick SiON (silicon oxide containing nitrogen) film, a 50 nm thick SiNO (silicon nitride containing oxygen) film, and a 100 nm thick SiON film. Although the layer structure is adopted, the material, film thickness, and number of layers are not limited to this. For example, instead of the lower SiON film, a heat-resistant resin such as siloxane having a thickness of about 0.5 μm to 3 μm may be formed by a spin coat method, a slit coater method, a droplet discharge method, or the like. Further, a silicon nitride film (SiN, Si ₃ N ₄ or the like) may be used. Further, a silicon oxide film may be used instead of the upper SiON film. Each film thickness is preferably about 0.05 μm or more and 3 μm or less, and can be freely selected from the range.

Here, the silicon oxide film uses a mixed gas such as a mixed gas of SiH ₄ and O _2, a mixed gas of TEOS (tetraethoxysilane) and O ₂ , etc., such as thermal CVD, plasma CVD, atmospheric pressure CVD, and bias ECRCVD. It can be formed by a method. The silicon nitride film can be formed by plasma CVD using a mixed gas of SiH ₄ and NH ₃ , for example. The SiON film or SiNO film can be formed by plasma CVD using a mixed gas of SiH ₄ and N ₂ O, for example.

  In addition, when using the material which has silicon as main components, such as a-Si, as the peeling layer 61 and the island-like semiconductor film 57, it is SiOxNy (x from the point of ensuring adhesiveness as the protective film 55 which touches them. > Y> 0) may be used.

  Next, a thin film transistor (TFT) constituting a CPU (logic circuit portion) and a memory portion of the thin film integrated circuit device is formed on the protective film 55. In addition to TFTs, thin film active elements such as organic TFTs and thin film diodes can also be formed.

  As a method for manufacturing a TFT, first, an island-shaped semiconductor film 57 is formed over the protective film 55 (FIG. 15B). The island-shaped semiconductor film 57 is formed using an amorphous semiconductor, a crystalline semiconductor, or a semi-amorphous semiconductor. In any case, a semiconductor film containing silicon, silicon germanium (SiGe), or the like as a main component can be used.

  Here, an amorphous silicon film having a thickness of 70 nm was formed, and the surface thereof was further treated with a solution containing nickel. Further, after a crystalline silicon semiconductor film was formed by a thermal crystallization process at 500 to 750 ° C., laser crystallization was performed to improve crystallinity. Further, as a method for forming the semiconductor film, a plasma CVD method, a sputtering method, an LPCVD method, or the like may be used. As a method for crystallizing a semiconductor film, laser crystallization, thermal crystallization, thermal crystallization using other catalysts (Fe, Ru, Rh, Pd, Os, Ir, Pt, Cu, Au, etc.), or You may perform them alternately several times.

Alternatively, a continuous wave laser may be used for the crystallization treatment of the amorphous semiconductor film. In order to obtain a crystal having a large grain size upon crystallization, it is preferable to use a solid-state laser capable of continuous oscillation and apply the second to fourth harmonics of the fundamental wave (the crystallization in this case is defined as CWLC). Called). For example, a second harmonic (532 nm) or a third harmonic (355 nm) of an Nd: YVO ₄ laser (fundamental wave 1064 nm) may be applied. In the case of using a continuous wave laser, laser light emitted from a continuous wave YVO ₄ laser having an output of 10 W is converted into a harmonic by a non-linear optical element. In addition, there is a method in which a YVO ₄ crystal or a GdVO ₄ crystal and a nonlinear optical element are placed in a resonator to emit harmonics. Preferably, the beam spot is shaped into a rectangular or elliptical laser beam on the irradiation surface by an optical system, and the object is irradiated. At this time, the energy density of approximately 0.01 to 100 MW / cm ² (preferably 0.1 to 10 MW / cm ²⁾ is required. Then, irradiation may be performed by moving the semiconductor film relative to the laser light at a speed of about 10 to 2000 cm / s.

  In the case of using a pulsed laser, a frequency band of several tens Hz to several hundreds Hz is usually used, but a pulsed laser having an oscillation frequency of 10 MHz or higher that is significantly higher than that may be used (in this case) Crystallization is referred to as MHzLC). It is said that the time from when the semiconductor film is irradiated with laser light by pulse oscillation until the semiconductor film is completely solidified is said to be several tens of nanoseconds to several hundreds of nanoseconds. The laser light of the next pulse can be irradiated after being melted by the laser light and solidifying. Therefore, unlike the case of using a conventional pulsed laser, the solid-liquid interface can be continuously moved in the semiconductor film, so that a semiconductor film having crystal grains continuously grown in the scanning direction is formed. Is done. Specifically, a set of crystal grains having a width of 10 to 30 μm in the scanning direction of the included crystal grains and a width of about 1 to 5 μm in a direction perpendicular to the scanning direction can be formed. By forming single crystal grains extending long along the scanning direction, it is possible to form a semiconductor film having almost no crystal grain boundaries in at least the channel direction of the TFT.

  Note that when siloxane which is a heat-resistant organic resin is used as a part of the protective film 55, heat can be prevented from leaking from the semiconductor film during the crystallization, and crystallization can be efficiently performed. It can be carried out.

A crystalline semiconductor film is obtained by the above method. Note that the crystal growth direction is preferably aligned in the source region, channel formation region, and drain region direction. The thickness of the crystal layer is preferably 20 to 200 nm (preferably 40 to 170 nm, more preferably 50 to 150 nm). Thereafter, an amorphous silicon film for gettering the metal catalyst is formed on the semiconductor film through an oxide film, and gettering is performed by heat treatment at 500 to 750 ° C. Further, in order to control the threshold voltage of the TFT element, boron ions having a dose of about 10 ¹³ / cm ² are implanted into the crystalline semiconductor film. Thereafter, the island-shaped semiconductor film 57 is formed by etching using the resist as a mask.

In forming the crystalline semiconductor film, the polycrystalline semiconductor film may be directly formed by LPCVD (low pressure CVD) using disilane (Si ₂ H ₆ ) and germanium fluoride (GeF ₄ ) as source gases. good. The gas flow rate ratio is Si ₂ H ₆ / GeF ₄ = 20 / 0.9, the film formation temperature is 400 to 500 ° C., and He or Ar can be used as a carrier gas, but is not limited thereto.

Note that in particular in the channel region in the TFT, hydrogen or halogen of 1 × 10 ¹⁹ cm ^{−3 to} 1 × 10 ²² cm ⁻³ , preferably 1 × 10 ¹⁹ cm ^{−3 to} 5 × 10 ²⁰ cm ^−3. Should be added. Regarding SAS, it is desirable to set it to 1 × 10 ¹⁹ cm ⁻³ or more and 2 × 10 ²¹ cm ⁻³ or less. In any case, it is desirable to contain more than the content of hydrogen or halogen contained in the single crystal used for the IC chip. Thereby, even if a local crack occurs in the TFT portion, it can be terminated (terminated) by hydrogen or halogen.

  Next, a gate insulating film 58 is formed over the island-shaped semiconductor film 57 (FIG. 15B). The gate insulating film 58 is preferably formed using a thin film formation method such as a plasma CVD method or a sputtering method, and a film containing silicon nitride, silicon oxide, silicon nitride oxide, or silicon oxynitride is formed as a single layer or a stacked layer. . In the case of stacking, for example, a three-layer structure of a silicon oxide film, a silicon nitride film, and a silicon oxide film is preferable from the substrate side.

  Next, the gate electrode 56 is formed (FIG. 15C). Here, after the Si and W (tungsten) layers are formed by sputtering, the gate electrode 56 is formed by etching using the resist 62 as a mask. Of course, the material, structure, and manufacturing method of the gate electrode 56 are not limited to this, and can be selected as appropriate. For example, a stacked structure of Si and NiSi (nickel silicide) doped with an n-type impurity or a stacked structure of TaN (tantalum nitride) and W (tungsten) may be used. Alternatively, the gate electrode may be formed as a single layer using various conductive materials.

  In place of the resist mask, a mask such as SiOx may be used. In this case, a pattern forming step of a mask (referred to as a hard mask) of SiOx, SiON or the like is added, but since the film thickness of the mask at the time of etching is less than that when a resist is used, a gate electrode having a desired width is formed. be able to. Alternatively, the gate electrode 56 may be selectively formed by using a droplet discharge method without using the resist 62.

  As the conductive material, various materials can be selected depending on the function of the conductive film. In the case where the gate electrode 56 and the antenna are formed at the same time, materials may be selected in consideration of their functions.

Note that although a mixed gas of CF ₄ , Cl ₂ , and O ₂ or a Cl ₂ gas is used as an etching gas for forming the gate electrode 56 by etching, the present invention is not limited to this.

Next, the portions to be the p-channel TFTs 70 and 72 are covered with a resist 63, and the gate electrode is used as a mask, and an impurity element 64 imparting n-type (for example, P) (Phosphorus) or As (arsenic)) is doped at a low concentration (first doping step, FIG. 15D). The conditions of the first doping step are a dose amount of 1 × 10 ¹³ / cm ^{2 to} 6 × 10 ¹³ / cm ² and an acceleration voltage of 50 kV to 70 kV, but is not limited thereto. In this first doping step, doping is performed through the gate insulating film 58, and a pair of low-concentration impurity regions 65 is formed. Note that the first doping step may be performed on the entire surface without covering the p-channel TFT region with the resist.

Next, after removing the resist 63 by ashing or the like, a resist 66 covering the n-channel TFT region is newly formed, and a p-type is formed in the island-shaped semiconductor films of the p-channel TFTs 70 and 72 using the gate electrode as a mask. The impurity element 67 (for example, B (boron)) imparting is doped at a high concentration (second doping step, FIG. 15E). The conditions of the second doping step are as follows: dose amount: 1 × 10 ¹⁶ / cm ^{2 to} 3 × 10 ¹⁶ / cm ² , acceleration voltage: 20 kV to 40 kV. By this second doping step, the impurity element 67 imparting p-type is doped through the gate insulating film 58, and a pair of p-type high-concentration impurity regions 68 are formed.

Next, after removing the resist 66 by ashing or the like, an insulating film 75 was formed on the substrate surface (FIG. 16A). Here, a SiO ₂ film having a thickness of 100 nm was formed by a plasma CVD method. Thereafter, the insulating film 75 and the gate insulating film 58 were removed by etching using an etch back method, and sidewalls (sidewalls) 76 were formed in a self-aligned manner (FIG. 16B). As an etching gas, a mixed gas of CHF ₃ and He was used. Note that the step of forming the sidewall is not limited to these.

The method for forming the sidewall 76 is not limited to the above. For example, the method shown in FIG. 17 can be used. FIG. 17A illustrates an example in which the insulating film 75 has a two-layer structure or more. The insulating film 75 has a two-layer structure of, for example, a 100 nm thick SiON (silicon oxynitride) film and a 200 nm thick LTO film (Low Temperature Oxide). Here, the SiON film was formed by the plasma CVD method, and the SiO ₂ film was formed by the low pressure CVD method as the LTO film. After that, by performing etch back, the sidewall 76 having an L shape and an arc shape is formed.

  FIG. 17B shows an example in which etching is performed so as to leave the gate insulating film 58 during etch back. In this case, the insulating film 75 may have a single layer structure or a laminated structure.

  The sidewall functions as a mask when a low concentration impurity region or a non-doped offset region is formed below the sidewall 76 by doping with an impurity imparting a high concentration n-type later. In any of the above sidewall formation methods, the etch-back conditions may be changed as appropriate depending on the width of the low-concentration impurity region or offset region to be formed.

Next, a resist 77 is newly formed to cover the p-channel TFT region, and an n-type impurity element 78 (for example, P (phosphorus) or As (arsenic)) is used with the gate electrode 56 and the sidewall 76 as a mask. Is doped at a high concentration (third doping step, FIG. 16C). The conditions of the third doping step are as follows: dose amount: 1 × 10 ¹³ / cm ^{2 to} 5 × 10 ¹⁵ / cm ² , acceleration voltage: 60 kV to 100 kV. In this third doping step, the n-type impurity element 78 is doped to form a pair of n-type high-concentration impurity regions 79.

  Note that after removing the resist 77 by ashing or the like, the impurity region may be thermally activated. For example, after a 50 nm SiON film is formed, heat treatment may be performed in a nitrogen atmosphere at 550 ° C. for 4 hours. In addition, after the SiNx film containing hydrogen is formed to a thickness of 100 nm, defects in the crystalline semiconductor film can be improved by performing heat treatment at 410 ° C. for 1 hour in a nitrogen atmosphere. This terminates dangling bonds existing in, for example, crystalline silicon, and is called a hydrogenation process. Thereafter, a SiON film having a film thickness of 600 nm is formed as a cap insulating film for protecting the TFT. Note that the hydrogenation process may be performed after the formation of the SiON film. In this case, SiNx and the SiON film formed on SiNx can be continuously formed. As described above, three layers of insulating films are formed on the TFT in the order of SiON, SiNx, and SiON from the substrate side, but the structure and material are not limited to these. In addition, these insulating films have a function of protecting the TFT, so that it is desirable to form them as much as possible.

  Next, an interlayer film 53 is formed over the TFT (FIG. 16D). As the interlayer film 53, a heat-resistant organic resin such as polyimide, acrylic, polyamide, or siloxane can be used. Depending on the material, spin coating, dipping, spray coating, droplet discharge methods (inkjet method, screen printing, offset printing, etc.), doctor knife, roll coater, curtain coater, knife coater, etc. are adopted as the forming method. be able to. In addition, an inorganic material may be used for the interlayer film 53. In this case, silicon oxide, silicon nitride, silicon oxynitride, PSG (phosphorus glass), BPSG (phosphorus boron glass), an alumina film, or the like can be used. . Note that the interlayer film 53 may be formed by stacking these insulating films.

  Further, a protective film 54 may be formed on the interlayer film 53. As the protective film 54, a film containing carbon such as DLC (diamond-like carbon) or carbon nitride (CN), a silicon oxide film, a silicon nitride film, a silicon nitride oxide film, or the like can be used. As a formation method, a plasma CVD method, an atmospheric pressure plasma, or the like can be used. Alternatively, a photosensitive or non-photosensitive organic material such as polyimide, acrylic, polyamide, resist, or benzocyclobutene, or a heat-resistant organic resin such as siloxane may be used.

  In order to prevent the film from peeling or cracking of these films due to the stress caused by the difference in thermal expansion coefficient between the interlayer film 53 or the protective film 54 and a conductive material or the like constituting the wiring to be formed later, A filler may be mixed in the film 53 or the protective film 54.

Next, after a resist is formed over the interlayer film 53, a contact hole is formed by etching, and a wiring 51 for connecting the TFTs and a connection wiring 21 for connecting to an external antenna are formed (FIG. 16D). ). In the above process, the contact hole in the memory portion 74 is formed by the second exposure means using the laser irradiation apparatus described in the first to third embodiments. Moreover, although the gas used for the etching at the time of opening the contact hole is a mixed gas of CHF ₃ and He, it is not limited to this. Moreover, the wiring 51 and the connection wiring 21 may be formed simultaneously using the same material, or may be formed separately. Here, the wiring 51 connected to the TFT has a five-layer structure in which Ti, TiN, Al—Si, Ti, and TiN are formed in this order, and is formed by sputtering and then etched.

  In addition, by mixing Si in the Al layer, generation of hillocks in resist baking at the time of wiring formation can be prevented. Further, instead of Si, about 0.5% Cu may be mixed. Further, the hillock resistance is further improved by sandwiching the Al—Si layer with Ti or TiN. It is desirable to use the hard mask made of SiON or the like when forming the wiring. Note that the wiring material and the formation method are not limited to these, and the material used for the gate electrode 56 described above may be employed.

  In this embodiment, the case where only the TFT region constituting the CPU 73, the memory unit 74, etc. and the terminal portion 80 connected to the antenna are formed on the same substrate is shown. However, the TFT region and the antenna are formed on the same substrate. The present embodiment can also be applied to the formation. In this case, an antenna is preferably formed on the interlayer film 53 or the protective film 54 and further covered with another protective film. As the conductive material of the antenna, Ag, Au, Al, Cu, Zn, Sn, Ni, Cr, Fe, Co, or Ti, or an alloy containing them can be used, but is not limited thereto. Further, the material may be different between the wiring and the antenna. Note that the wiring and the antenna are preferably formed so as to have a metal material having excellent malleability and ductility, and more preferably, the wiring and the antenna are made thick to withstand stress due to deformation.

  As a method for forming the antenna, the entire surface may be formed by sputtering and then etched using a resist mask, or may be selectively formed using a nozzle by a droplet discharge method. . Note that the droplet discharge method here includes not only an inkjet method but also an offset printing method and a screen printing. The wiring and the antenna may be formed at the same time, or may be formed so that the other rides on after forming one first.

  Through the above steps, a thin film integrated circuit device composed of TFTs is completed. Although the top gate structure is used in this embodiment, a bottom gate structure (reverse stagger structure) may be used. Note that a base insulating film material, an interlayer insulating film material, and a wiring material are mainly provided in a region where there is no thin film active element (active element) such as a TFT. It is desirable to occupy a ratio of about 50% or more, preferably about 70% or more and 95% or less. This makes it easy to bend the ID chip and facilitates handling of finished products such as ID labels. In this case, the island-shaped semiconductor region (island) of the active element including the TFT portion occupies a ratio of 1% to 30%, preferably 5% to 15% of the entire thin film integrated circuit device. Good.

Further, as shown in FIG. _16D , the distance ( _tunder ) from the semiconductor layer of the TFT to the lower protective film and the upper interlayer film (protective film from the semiconductor layer are formed in the thin film integrated circuit device. In this case, it is desirable to adjust the thicknesses of the upper and lower protective films or interlayer films so that the distance (t _over ) to the protective film is equal or substantially equal. Thus, by disposing the semiconductor layer in the center of the thin film integrated circuit device, stress on the semiconductor layer can be relieved and cracking can be prevented.

  In this example, the memory portion is manufactured using the laser irradiation apparatus described in any of Embodiments 1 to 3. Therefore, the laser irradiation pattern can be switched at high speed, and laser irradiation can be performed efficiently in the process of creating an apparatus that needs to form a random irradiation pattern such as a ROM. Therefore, it is possible to easily improve the mass productivity such as the production of the ROM of the ID chip.

  A semiconductor device manufactured using the present invention can be used for an IC card, an IC tag, an RFID tag, a transponder, a bill, a securities, a passport, an electronic device, a bag, and clothes. In this embodiment, an example of an IC card, an ID tag, an ID chip, and the like will be described with reference to FIG.

  FIG. 18A shows an IC card, which is a credit card or electronic money that can be used for payment without using cash by utilizing the fact that a built-in memory circuit can be rewritten in addition to personal identification. You can also use it. A memory circuit 1601 using the present invention is incorporated in an IC card 1600.

  FIG. 18B shows an ID tag, which can be used for admission management in a specific place because it can be miniaturized in addition to personal identification. A memory circuit 1611 using the present invention is incorporated in the ID tag 1610.

  FIG. 18C shows an example in which an ID chip 1622 for managing products when a product is handled in a retail store such as a supermarket is attached to the product 1620. The present invention is applied to a memory circuit in the ID chip 1622. By sticking the ID chip 1622 to the product 1620 in this way, not only inventory management is facilitated, but also damage such as shoplifting can be prevented. In the drawing, a protective film 1621 that also serves as an adhesive is used to prevent the ID chip 1622 from peeling off. However, the ID chip 1622 may be directly attached to the product 1620 with an adhesive. In addition, the ID chip 1622 is preferably manufactured using the flexible substrate described in Example 2 because of the structure attached to the product 1620.

  FIG. 18D shows an example in which an ID chip for identification is incorporated at the time of product manufacture. In the drawing, an ID chip 1631 is incorporated in a housing 1630 of a display as an example. The present invention is applied to a memory circuit in the ID chip 1631. By adopting such a structure, the manufacturer can easily identify the product or manage the distribution. Note that although the case of a display is taken as an example in the drawings, the present invention is not limited to this and can be applied to various electronic devices and articles.

  FIG. 18E shows an article transport tag. In the drawing, an ID chip 1641 is incorporated in a tag 1640. The present invention is applied to a memory circuit in the ID chip 1641. By adopting such a structure, it is possible to easily carry out transport destination selection, merchandise distribution management, and the like. In the drawings, the structure is such that the tag is attached to the article with a string, but the present invention is not limited to this, and the tag is directly attached to the article using a seal material or the like. You may take such a structure.

  FIG. 18F shows an ID chip 1652 incorporated in the book 1650. The present invention is applied to a memory circuit in the ID chip 1652. By adopting such a structure, distribution management at a bookstore or lending processing at a library or the like can be easily performed. Note that in the drawing, a protective film 1651 that also serves as an adhesive is used to prevent the ID chip 1652 from peeling off, but the ID chip 1652 is directly attached to the book 1650 with an adhesive, or the book The ID chip 1652 may be embedded in the cover of 1650.

  FIG. 18G illustrates an example in which an ID chip 1661 is incorporated into a banknote 1660. The present invention is applied to a memory circuit in the ID chip 1661. By adopting such a structure, it is possible to easily prevent the circulation of counterfeit bills. Note that it is more preferable to adopt a structure in which the ID chip 1661 is embedded in the banknote 1660 in order to prevent the ID chip 1661 from peeling off due to the nature of the banknote. The present invention is not limited to banknotes, and can be applied to papers such as securities and passports.

  FIG. 18H shows an shoe in which an ID chip 1672 is incorporated into a shoe 1670. The present invention is applied to a memory circuit in the ID chip 1672. By adopting such a structure, it is possible to easily identify the manufacturer or manage the distribution of goods. In the drawing, a protective film 1671 that also serves as an adhesive is used to prevent the ID chip 1672 from peeling off. However, the ID chip 1672 is structured to be directly attached using an adhesive or embedded in a shoe 1670. The structure may be taken. The present invention is applicable not only to shoes but also to items worn on bags, clothes, and the like.

  Next, in order to ensure security, for example, a case where ID chips are mounted on various articles for the purpose of preventing theft or forgery will be described.

  As an example of using an ID chip for the purpose of preventing theft, a case where the ID chip is mounted on a bag will be described. The present invention is applied to a memory circuit in the ID chip 2202. As shown in FIG. 19, an ID chip 2202 is mounted on a bag 2201. For example, the ID chip 2202 can be mounted on the bottom or part of the side surface of the bag 2201. Since the ID chip 2202 is very thin and small, it can be mounted without deteriorating the design of the bag 2201. In addition, since the ID chip 2202 has a light-transmitting property, it is difficult to determine whether or not the ID chip 2202 is mounted. Therefore, the possibility that the ID chip 2202 is removed by the theft is low.

  When the bag 2201 on which such an ID chip 2202 is mounted is stolen, information on the current position of the bag 2201 can be obtained using, for example, GPS (Global Positioning System). The GPS is a system that obtains a time difference between the time when a signal is sent from a GPS satellite and the time when the signal is received, and performs positioning based on the time difference.

In addition to the stolen article, information on the current position can be obtained using GPS even when the bag 2201 is forgotten or dropped.

  In addition to the bag 2201, an ID chip can be mounted on a vehicle such as an automobile or a bicycle, a watch, or an accessory.

  Next, as an example of using an ID chip for the purpose of preventing forgery, a case where the ID chip is mounted on a passport, a license, or the like will be described.

  FIG. 20A shows a passport 2301 on which an ID chip is mounted. In FIG. 20A, the ID chip 2302 is mounted on the cover of the passport 2301, but it may be mounted on another page. Further, since the ID chip 2302 has a light-transmitting property, it may be mounted on the surface. Further, the ID chip 2302 may be sandwiched between materials such as a cover and mounted inside the cover.

  FIG. 20B shows a license 2303 on which an ID chip is mounted. In FIG. 20B, the ID chip 2304 is mounted inside the license 2303. Further, since the ID chip 2304 has a light-transmitting property, it may be provided on the printing surface of the license 2303. For example, the ID chip 2304 is mounted on the printing surface of the license 2303, and a pair of thermosetting resin films is placed on the top and bottom of the ID chip 2304, and the film is pressure-bonded by heat to mount the ID chip 2304. The license 2303 can be covered. Further, the ID chip 2304 may be sandwiched between the materials of the license 2303 and mounted inside.

  Forgery can be prevented by mounting the ID chip on the article as described above. In addition, since a very thin and small ID chip is used, the design such as a passport and a license is not impaired. Furthermore, since the ID chip has translucency, it may be mounted on the surface.

  In addition, by installing the ID chip, it is possible to easily manage passports and licenses. Furthermore, since information can be stored in the ID chip without directly entering information in a passport or a license, privacy can be protected.

  Next, in order to perform safety management, a case where an ID chip is mounted on a commodity such as food will be described with reference to FIG.

  FIG. 21 shows a label 2402 on which an ID chip 2403 is mounted and a meat pack 2401 to which the label 2402 is attached. The ID chip 2403 may be mounted on the surface of the label 2402 or may be mounted inside the label 2402. In the case of fresh food such as vegetables, an ID chip may be mounted on a wrap that covers the fresh food.

  The ID chip 2403 can record basic items related to the product such as the product production location, producer, processing date, and expiration date. Such basic matters do not need to be rewritten, and are preferably recorded using a non-rewritable memory such as MROM. Furthermore, application items such as cooking examples using products can be recorded in the ID chip 2403. Such application items may be recorded using a rewritable and erasable memory such as an EEPROM.

  In addition, it is important to be able to know the state of animals and plants before processing in order to carry out food safety management. Therefore, it is preferable to embed an ID chip in animals and plants and acquire information on animals and plants by a reader device. Information on animals and plants includes breeding grounds, feed, breeders, presence of infectious diseases, and the like.

  Further, if the price of the product is recorded on the ID chip, the product can be settled more easily and in a shorter time than the method using the conventional barcode. That is, it is possible to settle a plurality of products on which the ID chip is mounted all at once. However, when reading a plurality of ID chips at the same time, it is necessary to mount an anti-collision function in the reader device.

  Furthermore, depending on the communication distance of the ID chip, the product can be settled even if the distance between the register and the product is long. The ID chip can be used for the purpose of preventing shoplifting.

  Furthermore, the ID chip can be used in combination with other information media such as a barcode and a magnetic tape. For example, basic items that do not need to be rewritten are recorded on the ID chip, and information to be updated, such as discount prices and special price information, may be recorded on the barcode. This is because, unlike an ID chip, a bar code can easily correct information.

  By mounting the ID chip on the product in this manner, information that can be provided to consumers can be increased.

  Next, a case where an ID chip is mounted on a product such as a beer bottle for distribution management will be described with reference to FIG. For example, as shown in FIG. 22A, a label 2501 can be used to mount an ID chip 2502 in a beer bottle.

  The ID chip 2502 records basic matters such as the date of manufacture of beer, the manufacturing location, and the materials used. Such basic matters do not need to be rewritten, and are preferably recorded using a non-rewritable memory such as a mask ROM. In addition, individual items such as the delivery destination and delivery date and time of each beer bottle are recorded in the ID chip. For example, as shown in FIG. 22B, when each of the beer bottles 2503 flows through the belt conveyor 2506 and passes through the writer device 2505, each delivery destination and delivery date and time are recorded on the ID chip 2507 built in the label 2504. can do. Such individual items may be recorded using a rewritable and erasable memory such as an EEPROM.

  When the product information purchased from the delivery destination is transmitted to the distribution management center through the network, the writer device or a personal computer that controls the writer device calculates the delivery destination and the delivery date and time based on this product information. A system that records on a chip should be constructed.

  Moreover, since delivery of a beer bottle is generally performed for each case, an ID chip can be mounted for each case or for each of a plurality of cases to record individual matters.

  By installing an ID chip in such a beverage product in which a plurality of delivery destinations can be recorded, the time required for manual input can be reduced, and input errors caused by the input can be reduced. In addition, labor costs that are the most expensive in the field of logistics management can be reduced. Therefore, by mounting the ID chip, it is possible to carry out low-cost logistics management with few mistakes.

  Furthermore, application items such as foods suitable for beer and cooking methods using beer may be recorded at the delivery destination. As a result, it can serve as an advertisement for foods and the like, and the consumer's willingness to purchase can be enhanced. Such application items may be recorded using a rewritable and erasable memory such as an EEPROM. By mounting the ID chip in this way, information that can be provided to the consumer can be increased, so that the consumer can purchase the product with peace of mind.

  In order to perform manufacturing management, a manufactured product on which an ID chip is mounted and a manufacturing apparatus (manufacturing robot) controlled based on information on the ID chip will be described.

  When producing an original product, an ID chip is mounted on the product on the production line, and the product can be produced based on the original information recorded on the ID chip. For example, in an automobile production line in which the paint color of a door is freely selected, an ID chip can be mounted on a part of the automobile, and the coating apparatus can be controlled based on information from the ID chip.

As described above, as a result of mounting the ID chip on a part of the automobile, it is not necessary to adjust the order of the automobiles to be put on the production line or the number having the same color in advance. For this reason, it is not necessary to set a program for controlling the painting apparatus to match the order and number of cars. That is, the manufacturing apparatus can operate individually based on the information of the ID chip mounted on the automobile.

  Thus, the ID chip can be used in various places. And the specific information regarding manufacture can be obtained from the information recorded on the ID chip, and the manufacturing apparatus can be controlled based on the information.

  Next, a mode in which an IC card using the ID chip according to the present invention is used as electronic money will be described. FIG. 23 shows how payment is performed using the IC card 2601. The IC card 2601 has an ID chip 2602 according to the present invention. When the IC card 2601 is used, a register 2603 and a reader / writer 2604 are used. The ID chip 2602 holds information on the amount deposited in the IC card 2601, and the reader / writer 2604 can read the amount information without contact and send it to the register 2603. The register 2603 confirms that the amount deposited in the IC card 2601 is equal to or greater than the amount to be settled, and performs settlement. Then, information on the remaining amount after settlement is transmitted to the reader / writer 2604. The reader / writer 2604 can write the remaining amount information into the ID chip 2602 of the IC card 2601.

  Note that a key 2605 capable of inputting a personal identification number or the like may be added to the reader / writer 2604 so that payment using the IC card 2601 by a third party can be restricted without permission.

  It should be noted that the examples shown in the present embodiment are only examples and are not limited to these applications.

  As described above, the application range of the present invention is extremely wide, and can be applied as a chip for individual recognition of any article.

  The present invention is a laser irradiation apparatus and a laser irradiation method capable of drawing an arbitrary pattern by simultaneously irradiating an irradiated object with a plurality of laser beams. As described above, the present invention can be applied not only to the ROM manufacturing process but also to an exposure process in a semiconductor process. Further, the present invention can be applied to an object to be irradiated with a laser beam to perform desired processing (for example, character marking).

Diagram showing the configuration of the laser irradiation device Diagram showing laser irradiation pattern Diagram showing the configuration of the laser irradiation device Diagram showing the configuration of the laser irradiation device Diagram showing the configuration of the laser irradiation device Diagram showing laser irradiation pattern The figure which shows the cross section of a semiconductor device The figure which shows the flow of the manufacturing method of a semiconductor device The figure which shows the flow of the manufacturing method of a semiconductor device The figure which shows the manufacturing process of a semiconductor device The figure which shows the manufacturing process of a semiconductor device The figure which shows the structure of a non-volatile memory circuit The figure which shows the Example of an antenna The figure which shows the Example of an antenna The figure which shows the manufacturing process of a semiconductor device The figure which shows the manufacturing process of a semiconductor device The figure which shows the manufacturing process of a semiconductor device FIG. 10 illustrates an application example of a semiconductor device manufactured according to the present invention. The figure which shows the bag using the semiconductor device produced by this invention. The figure which shows the certificate using the semiconductor device produced by this invention. The figure which shows the foodstuff management using the semiconductor device produced by this invention. The figure which shows the physical distribution management using the semiconductor device produced by this invention. The figure which shows IC card payment using the semiconductor device produced by this invention.

Explanation of symbols

101 Laser oscillator 102 Mirror 103 Expander 104 Diffractive optical element 105 DMD
106 Projection Lens 107 Light-shielding Plate 108 Substrate 109 Suction Stage 110 Transport Stage 111 Transport Stage

Claims (12)

A laser oscillator for emitting a laser beam;
A diffractive optical element for dividing a laser beam emitted from the laser oscillator into a plurality of laser beams;
A plurality of micromirrors for deflecting the laser beam divided by the diffractive optical element;
A laser irradiation apparatus comprising: a transfer stage on which an object to be irradiated to which each laser beam deflected by the plurality of micromirrors is irradiated is placed. In claim 1,
The diffractive optical element is a transmissive diffractive optical element or a reflective diffractive optical element. In claim 1 or claim 2,
The laser irradiation apparatus according to claim 1, wherein the plurality of divided laser beams have equal energy. In any one of Claims 1 thru | or 3,
A laser irradiation apparatus comprising a projection lens disposed between the diffractive optical element and the transfer stage. In any one of Claims 1 thru | or 4,
The laser irradiation apparatus according to claim 1, wherein a spot size of the plurality of divided laser beams is smaller than a surface area of the micromirror. The laser beam emitted from the laser oscillator is incident on the diffractive optical element and divided into a plurality of parts,
A laser irradiation method characterized in that the laser beam divided into a plurality of beams is deflected by a plurality of micromirrors and irradiated onto an irradiated object placed on a transfer stage. The laser beam emitted from the laser oscillator is incident on the diffractive optical element and divided into a plurality of parts,
One of the plurality of divided laser beams is incident on a first micromirror, and the other one laser beam is incident on a second micromirror, and the first micromirror and the first micromirror A laser irradiation method comprising irradiating an irradiated surface with the laser beam deflected by two micromirrors. In claim 6 or claim 7,
The laser irradiation method, wherein the diffractive optical element is a transmissive diffractive optical element or a reflective diffractive optical element. In any one of Claims 6 to 8,
The laser irradiation method, wherein the plurality of divided laser beams have equal energy. In any one of Claims 6 thru | or 9,
The laser beam splitting into a plurality of beams is irradiated onto the irradiated surface after passing through a projection lens disposed between the diffractive optical element and the transport stage. . In any one of Claims 6 to 10,
The laser irradiation method according to claim 1, wherein the laser beam divided into a plurality of portions is condensed between a central portion or a central portion and a corner of the micromirror. Forming a plurality of island-shaped semiconductor layers having a source electrode or a drain electrode on a substrate;
Forming a first interlayer insulating film on the plurality of island-shaped semiconductor layers;
Forming a gate electrode on each of the plurality of island-like semiconductor layers via the first interlayer insulating film;
Forming a second interlayer insulating film on the gate electrode;
Providing a resist on the second interlayer insulating film;
A laser beam branched into a plurality of beams through the diffractive optical element is deflected by a plurality of micromirrors,
Irradiating the resist with each laser beam deflected by the plurality of micromirrors;
Developing the resist irradiated with the laser beam;
A method of manufacturing a semiconductor device, wherein the first interlayer insulating film and the second interlayer insulating film are etched using the resist as a mask to selectively form contact holes.

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