JP2007256814A - Matrix display panel - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a matrix display panel for executing inspection even when a pitch between connection terminals to be connected to a drive circuit is narrowly formed. <P>SOLUTION: The matrix display panel constituted of arranging a plurality of signal lines 3 respectively having bump junction terminals 6 to be connected to signal line driving circuits and a plurality of scanning lines 4 having bump junction terminals to be connected to scanning line driving circuits in a matrix shape and arranging pixels 5 in respective intersections between the signal lines and the scanning lines is provided with: 3×n switching elements 7 each of which is connected to the bump junction terminal 6 of each of 3×n signal lines 3; n inspecting data input terminals 8-1 to 8-n arranged so that each three adjacent signal lines 3 are short-circuited through each switching element 7; and three switching element control signal input terminals 9R, 9G, 9B for switching each n switching elements 7 in common. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a matrix display panel in which a plurality of signal lines and a plurality of scanning lines are arranged in a matrix, and pixels are arranged at intersections of the signal lines and the scanning lines.

  In recent years, matrix display devices such as active matrix liquid crystal display devices and organic EL display devices using thin film transistors (TFTs) have been developed.

  Such a matrix display device includes a matrix display panel in which a plurality of signal lines and a plurality of scanning lines are arranged in a matrix, and pixels are arranged at intersections of the signal lines and the scanning lines, and the matrix display panel And a driving circuit for supplying a scanning signal to the scanning line and supplying a signal corresponding to video data to be displayed to the signal line.

  In the manufacturing process of the matrix display device, the matrix display panel is inspected before being connected to the drive circuit, and only non-defective products are actually connected to the drive circuit. In this matrix display panel inspection process, probe pins of the inspection device are brought into contact with output-side connection terminals among the connection terminals for connection to the drive circuits provided for the signal lines and the scanning lines. Various inspections are carried out by electrical connection and appropriate input of inspection signals.

  In recent years, high definition of matrix display panels has progressed, and accordingly, the number of connection terminals has increased, and the number of terminals per unit area has also increased. Therefore, the arrangement pitch of each connection terminal on the output side must be narrowed. Then, it is difficult to create an inspection device with probe pins corresponding to the pitch, and it becomes impossible to contact the probe pins with all the connection terminals, and the matrix display panel (all terminals (pixels)) is inspected. Will not be able to.

Therefore, in Patent Document 1, for example, by devising a method of arranging the probe pins in a staggered manner, the distance between the probe pins is secured to a predetermined distance or more, and each probe pin is brought into contact with all the connection terminals. Proposing technology.
JP 9-2111027 A

  However, even if the technique disclosed in Patent Document 1 is adopted, there is a limit, and it is not possible to cope with further narrowing of the terminal arrangement.

  The present invention has been made in view of the above points, and an object of the present invention is to provide a matrix display panel that can be inspected even if the pitch between connection terminals for connection to a drive circuit is narrow.

One aspect of the matrix display panel of the present invention is:
A plurality of signal lines each having a connection terminal for connecting to the driving circuit and a plurality of scanning lines each having a connection terminal for connecting to the driving circuit are arranged in a matrix, and the signal line and the scanning line A matrix display panel in which pixels are arranged at each intersection of
The signal line or the scanning line is composed of m × n (where m is an integer of 2 or more, n is an integer of 1 or more),
M × n switching elements connected one by one to the connection terminals of the m × n signal lines or scanning lines;
N test data input terminals arranged so as to short-circuit the adjacent signal lines or the scanning lines by m through each switching element;
M control signal input terminals for inspection for switching the n switching elements in common,
It is characterized by providing.

  According to the present invention, a switching element is connected to each of m × n connection terminals arranged at a narrow pitch of signal lines or scanning lines, and the switching elements are connected to n inspection data input terminals and m inspection terminals. Because it is connected to the control signal input terminal, it is only necessary to provide m + n inspection terminals, and the inspection terminals can be arranged at a sufficient pitch interval, so that the probe pins can be easily brought into contact with each other. be able to. Therefore, it is possible to provide a matrix display panel that can be inspected even if the pitch interval between the connection terminals is narrow.

  The best mode for carrying out the present invention will be described below with reference to the drawings.

  FIG. 1 is a schematic configuration diagram showing an example of the overall configuration of a matrix display panel 1 according to an embodiment of the present invention.

In the matrix display panel 1 according to the present embodiment, a plurality of signal lines 3 and a plurality of scanning lines 4 are arranged in a matrix on the display unit 2, and light emitting elements are arranged at intersections of the signal lines 3 and the scanning lines 4. A pixel 5 including (for example, liquid crystal), a switching element (for example, TFT), and the like is disposed. Here, the signal lines 3 in each column of the matrix are connected to bump bonding terminals 6 that are connection terminals (for example, bump bonding terminals 6 are formed at the ends of the signal lines 3). The bump bonding terminals 6 are bonded to output bumps of a signal line driving circuit (source driver) (not shown) mounted on a COG (Chip on Grass). Further, the scanning lines 4 in each row of the matrix are connected to unillustrated bump bonding terminals (for example, bump bonding terminals are formed at the ends of the scanning lines 4), and the bump bonding terminals are COG-mounted (not illustrated). The output bumps of the scanning line driving circuit (gate driver) are joined. Further, a counter electrode (not shown) is also provided on a counter electrode substrate (not shown) so that a counter electrode drive signal Vcom can be input. (Generally, the counter electrode drive signal can be inputted from the substrate side on which the signal line 3 and the scanning line 4 are disposed by a cloth material connecting both substrates (not shown).)
The bump bonding terminals 6 corresponding to the signal lines 3 are on the upper side or the lower side of the display unit 2, and the bump bonding terminals corresponding to the scanning lines 4 are on the left side or the right side of the display unit 2. In addition to being arranged on one side, a configuration is also known in which each is divided and arranged on both sides. In the present embodiment, description will be given by taking one-sided arrangement as an example, but it is needless to say that such arrangement on both sides can also be handled. Although the present invention can be applied to both the signal line 3 and the scanning line 4, the present embodiment will be described by taking the case where it is applied to the signal line 3 as an example.

  The signal lines 3 are composed of m × n (where m is an integer of 2 or more and n is an integer of 1 or more), and in this embodiment, 3 × n. That is, a matrix display panel using a color filter usually has a red (R), green (G), and blue (B) stripe-like color arrangement along the signal line 3, and display data for one pixel. In addition, a color image is displayed using three pixels 5. Therefore, the present embodiment also has three colors of RGB × n corresponding to it. In this way, for each pixel of display data, one scanning line 4, three signal lines 3, and three signal lines 3 are required for the signal line 3. The bump bonding terminals 6 are generally arranged at a higher density than that of the scanning lines 4. Therefore, it is more preferable to apply the present invention to the signal line 3 side as in this embodiment.

  One switching element 7 is connected to each bump bonding terminal 6. Here, the switching element 7 is, for example, a TFT, and its source or drain is connected to the bump bonding terminal 6. These 3 × n switching elements 7 are arranged in groups of three adjacent ones, that is, RGB, and inspection data input terminals 8-1, 8-2,. -N connected. That is, three drains or sources of TFTs serving as the switching elements 7 are connected to the inspection data input terminals 8-1, 8-2,. That is, n test data input terminals 8-1, 8-2,..., 8 -n are arranged so that three adjacent signal lines 3 are short-circuited via each switching element 7. Yes. These inspection data input terminals 8-1, 8-2,..., 8 -n are arranged and formed on the straight line at the same pitch.

  Further, on the same straight line as the inspection data input terminals 8-1, 8-2,..., 8-n at the same pitch as the inspection data input terminals 8-1, 8-2,. Three switching element control signal input terminals 9R, 9G, and 9B which are three inspection control signal input terminals are arranged and formed. Here, the R switching element control signal input terminal 9R is connected to the n switching elements 7 connected to the R bump bonding terminal 6 corresponding to the R signal line 3, in this case, to all the gates of the TFTs. Commonly connected. Similarly, the G switching element control signal input terminal 9G is connected to the n switching elements 7 connected to the G bump bonding terminal 6, and the B switching element control signal input terminal 9B is connected to the B bump bonding terminal. The n switching elements 7 connected to 6 are respectively connected. Therefore, these three switching element control signal input terminals 9R, 9G, and 9B can switch n switching elements 7 in common according to the control signal applied thereto.

  Next, an inspection method for the matrix display panel 1 having such a configuration will be described with reference to FIGS. 2 shows the signals input to the switching element control signal input terminals 9R, 9G, 9B, the signals input to the test data input terminals 8-1, 8-2,. FIG. 3 is a timing chart showing the relationship, and FIG. 3 is a diagram for explaining an example of a lighting pattern.

  That is, in this embodiment, probe pins arranged at an equal pitch of an inspection device (not shown) are connected to the inspection data input terminals 8-1, 8-2,..., 8-n and the switching element control signal input terminal 9R. , 9G, 9B to make electrical connection. Although not shown, the probe pin of the inspection apparatus (not shown) is also brought into contact with the bump bonding terminal on the scanning line 4 side for electrical connection.

  Further, the probe terminal of the inspection device (not shown) is also brought into contact with the input terminal of the common electrode drive signal Vcom (not shown) to be electrically connected. Hereinafter, it is assumed that an appropriate common electrode drive signal Vcom is given. .

  Then, a high-level selection scanning signal is input to an arbitrary bump bonding terminal (scanning signal input terminal) on the scanning line 4 side to select the scanning line 4, and corresponds to the color to be written as shown in FIG. The switching element control signal input terminal 9R, 9G or 9B to be inputted is inputted with a high level (selection level) signal for turning on the switching element 7, and at that timing, the test data input terminals 8-1 and 8-2 for each color. ,..., 8-n are input with write data signals for a desired display state. Thereby, the write data signals input from the test data input terminals 8-1, 8-2,..., 8-n are selected by the switching element control signal input terminals 9R, 9G, and 9B in a time-sharing manner according to colors. The signal is transmitted to each signal line 3 through the switching element 7 and is written in the pixel 5 arranged at the intersection with the selected scanning line 4 to obtain a desired display state.

  In the case of a normally white mode panel that darkens when a voltage is applied to the TFT panel, when a low level data signal is input to all of the inspection data input terminals 8-1, 8-2,. The pixels corresponding to all the colors are turned on, and the display is a white horizontal line. When high-level data signals are input to all of the inspection data input terminals 8-1, 8-2,..., 8-n, the pixels corresponding to all the colors are turned off, and the display is a black horizontal line. It becomes.

  For example, as shown as the lighting pattern 1 in FIG. 3, all of the test data input terminals 8-1, 8-2,..., 8-n are low at the timing when the R switching element control signal input terminal 9R becomes high. When a high-level data signal is input at a level or other timing (timing when the G switching element control signal input terminal 9G goes high, timing when the B switching element control signal input terminal 9B goes high), one red horizontal line appears. Will be displayed. If a high-level selection scanning signal is input as a scanning signal to all the scanning lines 4 and the same data is written to all the pixels 5, the matrix display panel displays the entire surface in red. The inspector can visually confirm the so-called dot missing of red.

  Alternatively, as shown as the lighting pattern 2 in FIG. 3, one scanning line 4 is selected, and the R switching element control signal is supplied to the inspection data input terminals 8-1, 8-2,. Write data signals of low level and high level are inputted every other time when the input terminal 9R becomes high, and other timings (timing when the G switching element control signal input terminal 9G becomes high, B switching element control signal input) When a high-level data signal is input at a timing when the terminal 9B goes high, one alternate horizontal red line is displayed.

  With this structure, the scanning line 4 is selected, and a desired write data signal is input to each of the inspection data input terminals 8-1, 8-2,. In addition, it is possible to reliably control the display state of any one pixel 5.

  In the above-described embodiment, the expression “high level” or “low level” is used as an input signal to the data input terminal. However, the input signal may be an analog signal and may be an intermediate voltage capable of displaying halftones. .

  Therefore, for example, it is possible to display an arbitrary inspection pattern such as a vertical gray scale pattern, horizontal line color bar pattern, character (character) pattern, resolution pattern, natural image, etc. Can be performed reliably.

  As described above, according to the present embodiment, the switching elements 7 are connected to the 3 × n bump bonding terminals 6 arranged at a narrow pitch of the signal lines 3, and the switching elements 7 are connected to the n inspections. .., 8-n and the three switching element control signal input terminals 9R, 9G, and 9B are connected to each other, so that the probe pins of the inspection apparatus are brought into contact with each other. Only n + 3 terminals need be provided, and the inspection terminals can be arranged at a sufficient pitch interval, so that the probe pins can be easily brought into contact with each other. Therefore, it is possible to provide a matrix display panel that can be inspected even if the pitch interval between the bump bonding terminals 6 is narrow.

  In addition, since the n test data input terminals 8-1, 8-2,..., 8-n are arranged adjacent to each other at the same pitch, complicated patterning is not required when these terminals are formed by a semiconductor manufacturing method. can do. Furthermore, there is no need for a complicated probe pin arrangement as an inspection apparatus, and there is a secondary effect that the inspection apparatus can be provided at low cost. Further, since the three switching element control signal input terminals 9R, 9G, and 9B are also arranged adjacent to each other with the same pitch as the inspection data input terminals 8-1, 8-2,. The effect is higher. Furthermore, since the adjacent arrangement with the same pitch is an arrangement in which the terminals are arranged in a straight line, the above effect can be further enhanced.

  The n test data input terminals 8-1, 8-2,..., 8-n and the three switching element control signal input terminals 9R, 9G, 9B are provided on the signal line 3 side. Therefore, the inspection can be performed even though the bump bonding terminals 6 are arranged at a higher density than the scanning line 4 side.

  According to the present embodiment, RGB color signals are output from the inspection data input terminals 8-1, 8-2,..., 8 -n, and the three switching element control signal input terminals 9 R, 9 G, and 9 B are connected. Thus, 3 × n signals are independently input to n terminals of the test data input terminals 8-1, 8-2,..., 8 -n. can do.

  In addition, according to the present embodiment, input signals corresponding to RGB colors can be controlled independently (for example, 3 × n signals are generated by creating three types of n signals for each color and controlling three switching elements. In order to synchronize with the timing at which the signal input terminals 9R, 9G, 9B are selected, the signals for the respective colors are switched by the multiplexer circuit, and the test data input terminals 8-1, 8-2,. Therefore, it is easy to make an inspection signal and the color panel can be easily inspected.

  Although the present invention has been described above based on the embodiments, the present invention is not limited to the above-described embodiments, and various modifications and applications are naturally possible within the scope of the gist of the present invention.

  For example, although m has been described as 3, it is not limited thereto, and may be plural (2 or more).

  In addition, n test data input terminals 8-1, 8-2,..., 8-n and m switching element control signal input terminals 9R, 9G, 9B are arranged adjacent to each other at the same pitch. Although it is more preferable, the pitch is not necessarily the same.

  In addition, three switching element control signal input terminals 9R, 9G, and 9B are connected, and one (switching element control signal input terminal 9R) is connected to n inspection data input terminals 8-1, 8-2,. On the left side of n, the remaining two (switching element control signal input terminals 9G, 9B) are separated and arranged on the right side of n test data input terminals 8-1, 8-2,. However, it may be carved in any way.

  In the above embodiment, the inspection data input terminals 8-1, 8-2,..., 8-n and the switching element control signal input terminals 9R, 9G, 9B are arranged on a straight line, but are arranged in a staggered manner. Thus, the arrangement space may be reduced.

It is a schematic block diagram which shows the example of whole structure of the matrix display panel which concerns on one Embodiment of this invention. It is a figure which shows the timing chart of the signal input into a switching element control signal input terminal, a test data input terminal, etc. It is a figure for demonstrating the example of a lighting pattern.

Explanation of symbols

    DESCRIPTION OF SYMBOLS 1 ... Matrix display panel, 2 ... Display part, 3 ... Signal line, 4 ... Scanning line, 5 ... Pixel, 6 ... Bump joint terminal, 7 ... Switching element, 8-1, 8-2, ..., 8-n ... data input terminal for inspection, 9R ... R switching element control signal input terminal, 9G ... G switching element control signal input terminal, 9B ... B switching element control signal input terminal.

Claims (7)

A plurality of signal lines each having a connection terminal for connecting to the driving circuit and a plurality of scanning lines each having a connection terminal for connecting to the driving circuit are arranged in a matrix, and the signal line and the scanning line A matrix display panel in which pixels are arranged at each intersection of
The signal line or the scanning line is composed of m × n (where m is an integer of 2 or more, n is an integer of 1 or more),
M × n switching elements connected one by one to the connection terminals of the m × n signal lines or scanning lines;
N test data input terminals arranged so as to short-circuit the adjacent signal lines or the scanning lines by m through each switching element;
M control signal input terminals for inspection for switching the n switching elements in common,
A matrix display panel comprising:   2. The matrix display panel according to claim 1, wherein the n test data input terminals are adjacently arranged at the same pitch.   3. The matrix display panel according to claim 2, wherein a total of n + m terminals of the n inspection data input terminals and the m inspection control signal input terminals are adjacently arranged at the same pitch. .   4. The matrix display panel according to claim 2, wherein the adjacent arrangement with the same pitch is an arrangement in which terminals are arranged in a straight line.   4. The matrix display panel according to claim 2, wherein the adjacent arrangement with the same pitch is an arrangement in which the terminals are arranged in a staggered manner.   6. The matrix display panel according to claim 1, wherein the n inspection data input terminals and the m inspection control signal input terminals are provided on the signal line side. The matrix display panel is a color panel composed of RGB pixels, and the m is 3.
7. The matrix display panel according to claim 6, wherein input data corresponding to RGB colors can be independently controlled.

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