JP2007243006A - Vapor deposition method of nitride semiconductor, epitaxial substrate, and semiconductor device using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a vapor deposition method of a nitride semiconductor, capable of suppressing a pit to be generated in a growing nitride semiconductor layer concerning the vapor deposition of the nitride semiconductor on a nonpolar surface, and allowing the surface roughness of a root mean square in the nitride semiconductor layer to be not more than 5nm in manufacturing a semiconductor device with high performance. <P>SOLUTION: In the vapor deposition method of the nitride semiconductor with the nonpolar surface as a main surface onto a substrate for vapor deposition of the nitride semiconductor, the pressure of an atmosphere in the vapor deposition is made to be 1-10kPa and the temperature of the substrate for growing the semiconductor is made to be ≥900°C and <1,100°C. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a method for vapor-phase formation of a nitride-based semiconductor layer whose main surface is a nonpolar surface, and an epitaxial substrate and a semiconductor device using the same.

Aluminum nitride (hereinafter referred to as AlN), gallium nitride (hereinafter referred to as GaN), indium nitride (hereinafter referred to as InN), or a mixed crystal of them, aluminum gallium indium nitride (hereinafter referred to as Al _x Ga _{1−). Since} nitride-based semiconductors such as _xy In _y N (referred to as 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1) can be used for light emitting / receiving elements and electron transit elements, A wide range of research has been conducted on crystal growth and application to semiconductor devices, and light-emitting diodes and laser diodes have already been put into practical use.

  Since nitride-based semiconductors cannot grow large bulk single crystals, in general, (0001) sapphire (hereinafter referred to as c-plane sapphire), (11-20) sapphire, or (0001) 4H-SiC, (0001 ) Heteroepitaxial growth is performed using a substrate such as 6H-SiC.

  Epitaxial growth methods include metalorganic vapor phase epitaxy (MOVPE), molecular beam epitaxy (MBE), and halide vapor phase epitaxy (HVPE). The most common method for practical use is MOVPE. .

  As described above, nitride-based semiconductors used in semiconductor devices that have already been put into practical use have large piezoelectric properties due to the fact that the crystal structure is a hexagonal wurtzite structure that does not have reversibility. It has sex. FIG. 7 shows a nitride-based semiconductor heterojunction in which two layers (first layer 71 and 272) made of different materials are stacked, and all crystal growth directions are heterojunction interfaces 71a. Is orthogonal to the c-axis 73, which is called c-axis orientation. Therefore, when a heterojunction formed by laminating two layers having different lattice constants, a large piezoelectric field is generated in the crystal due to strain.

  This piezo electric field has a great influence on the characteristics of the semiconductor device. First, a light emitting device such as a light emitting diode or a laser diode will be described.

  For example, in Patent Document 1, a GaN layer 82 is formed on a c-plane sapphire substrate 81 as shown in FIG. 8 and is used as a substrate to form an n-type buffer layer 83, an n-type cladding layer 84, and an n-type guide layer 85. The quantum well structure active layer 86, the p-type cap layer 87, the p-type guide layer 88, the p-type cladding layer 89, and the p-side contact layer 90 are sequentially stacked. Further, by using dry etching, the n-type cladding layer 104 and the p-type cladding layer 109 are respectively exposed, and the insulating layer 91, the p-side electrode 92, and the n-side electrode 93 are formed to constitute the laser diode 8. is doing. As described above, a quantum well structure is usually used for the active layer 86, but the band structure is changed by a large piezoelectric field, which causes a problem in improving characteristics.

  Laser diodes using other compounds, such as aluminum gallium arsenide, have improved characteristics, such as intentionally generating strain in the quantum well structure and changing the semiconductor band structure to reduce the laser threshold current. ing. However, in the current nitride-based semiconductor, even if distortion is intentionally generated, there is almost no reduction in the laser threshold current. The reason for this is that the band structure does not change effectively because the nitride-based semiconductor has the crystal c-axis oriented with respect to the growth direction.

  Also in the case of a light-emitting diode, the piezoelectric field generated in the active layer reduces the recombination probability of carriers and hinders improvement in luminance.

  Next, a case where the present invention is applied to an electronic traveling device such as a field effect transistor (hereinafter referred to as FET) will be described. Usually, by using a heterojunction of GaN and aluminum gallium nitride (hereinafter referred to as AlGaN), a two-dimensional electron gas is formed at the interface.

For example, in Patent Document 2, an FET is formed as shown in FIG. First, an undoped GaN layer 95 having a thickness of 2 μm is grown on a c-plane sapphire substrate 81 via a low-temperature buffer layer 94 having a thickness of 30 nm, and then an undoped Al _0.3 Ga _0.7 N layer 96 having a thickness of 30 nm. 10 nm undoped GaN layer 97, 10 nm undoped Al _0.3 Ga _0.7 N spacer layer 98, 10 nm n-type Al _0.3 Ga _0.7 N electron supply layer 99, 15 nm graded composition undoped Al _x Ga _{1 A} −xN barrier layer 100 and a 6 nm n-type Al _0.06 Ga _0.94 N contact layer 101 are sequentially stacked. Further, the source electrode 102, the drain electrode 103, and the gate electrode 104 are formed, and the FET 9 is obtained.

Thus, when a nitride-based semiconductor is grown using the c-plane sapphire substrate 101, a c-axis-oriented nitride-based semiconductor grows and is influenced by the piezoelectric field specific to the material and near the heterojunction interface. Therefore, a two-dimensional electron gas of about 1013 cm ⁻² is generated at the interface even if the inversion layer is formed without adding impurities. Therefore, the FET 9 manufactured using this is a so-called depletion type FET in which a drain current can already flow with a gate bias being zero.

  However, in reality, not only the depletion type FET but also a so-called enhancement type FET in which the drain current cannot flow when the gate bias is zero and the drain current flows by applying the gate bias is also necessary. This is especially essential when considering application to high-power inverters.

  However, FETs using nitride-based semiconductors currently do not have enhancement type, and there are many restrictions on circuit design and their applications are limited. Therefore, enhancement-type FETs using nitride-based semiconductors are strongly desired. It was.

  In order to manufacture the enhancement type FET, it is necessary to control the formation of the inversion layer in the semiconductor multilayer structure.

  For example, in an FET using an arsenide-based semiconductor, the formation of the inversion layer can be controlled by adjusting the thickness of the barrier layer made of aluminum gallium arsenide within a range of about several tens of nanometers. The depletion type and the enhancement type Can be manufactured separately.

  The circuit design may have to be a depletion type FET, but on the other hand, it requires two types of power sources, plus and minus, to operate it, which consumes a lot of power and the electronic circuit that uses it. There was a problem that the number of parts increased.

  As described above, the problem of the piezoelectric field in the nitride-based semiconductor greatly affects the characteristics of the semiconductor device. However, as a crystal growth method that does not have the problem due to the piezoelectric field, the (11-20) orientation (hereinafter referred to as a) It is an effective means to make it an axial orientation) or (1-100) orientation (hereinafter referred to as m-axis orientation).

In vapor phase growth of a nitride-based semiconductor on a nonpolar surface, pits generated in the growing nitride-based semiconductor layer are suppressed, and the root mean square surface roughness is 5 nm or less. Compared to the case of axial orientation, it is difficult to obtain a flat surface with good reproducibility. Patent Document 3 states that various conditions are specified and crystal growth with excellent surface flatness is possible. The configuration of the epitaxial growth process of Patent Document 3 will be described with reference to FIG. First, the r-plane substrate 11 is annealed, and then a nitride-based nucleation layer 12 is deposited on the substrate, and a nonpolar a-plane gallium nitride thin film 13 is grown on the nucleation layer. ing. Growth using a nucleation layer deposited at a low temperature of 400 to 900 ° C., growth of a non-polar a-plane gallium nitride thin film 13 at a growth pressure of 0.2 atm (about 20.3 kPa) or less. Although described, the rationale is not fully explained. A nitride-based semiconductor layer having a large surface roughness is unsuitable because it hinders improvement in characteristics of the semiconductor element structure laminated thereon.
JP-A-11-177175 Japanese Patent Laid-Open No. 10-335637 JP 2005-522889 A

  In vapor phase growth of nitride-based semiconductors on nonpolar surfaces, pits generated in a growing nitride-based semiconductor layer are suppressed, and a high-performance semiconductor device is manufactured. The root mean square surface roughness was required to be 5 nm or less.

  The present invention is a vapor phase growth method of a nitride-based semiconductor having a nonpolar surface as a main surface on a semiconductor growth substrate, the growth pressure is set to 1 kPa to 10 kPa, and the substrate temperature is set to 900 ° C. High and less than 1100 ° C.

In addition, the present invention is characterized in that the nitride semiconductor is GaN, AlN, InN, or a mixed crystal thereof (Al _x Ga _1-xy In _y N).

  Further, the present invention is characterized in that the nonpolar plane is an a plane or an m plane.

  In addition, the present invention is characterized by using an organic metal compound vapor phase growth method.

  In the present invention, the semiconductor growth substrate is an r-plane sapphire substrate.

In the present invention, the semiconductor growth substrate may be formed of silicon carbide (SiC), gallium nitride (GaN), aluminum nitride (AlN), boron nitride (BN), zinc oxide (ZnO), silicon (Si), germanium ( It is a single crystal of any one of Ge), lithium aluminate (LiAlO ₂ ), and lithium niobate (LiNbO ₃ ).

  In addition, the present invention is characterized in that a buffer layer having a thickness of 100 nm to 2 μm and grown at a substrate temperature of 900 ° C. to 1200 ° C. is inserted between the substrate for semiconductor growth and the nitride semiconductor. To do.

  Further, the present invention is characterized in that the buffer layer is made of any one of aluminum nitride, gallium nitride, or aluminum gallium nitride.

  In addition, the epitaxial substrate of the present invention is characterized by being grown using any one of the vapor phase growth methods described above.

  The epitaxial substrate of the present invention is characterized in that the root mean square RMS surface roughness is 5 nm or less.

  A semiconductor device according to the present invention uses the above epitaxial substrate.

  When the vapor phase growth method of the present invention is used, a nonpolar nitride semiconductor having excellent surface flatness can be obtained. Further, by using the epitaxial substrate, a high-performance semiconductor device that is not adversely affected by the piezoelectric field can be manufactured. In particular, when the growth pressure of the nitride-based semiconductor layer is 10 kPa or less, the RMS surface roughness is 5 nm or less. Further, by growing the buffer layer at a high temperature of 900 ° C. or higher, a nitride semiconductor layer having excellent crystallinity can be obtained.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is an example showing the structure of an epitaxial substrate 1 manufactured using the present invention.

A nitride-based semiconductor layer 13 is grown on the semiconductor growth substrate 11 via the buffer layer 12. The nitride-based semiconductor layer 13 is GaN, AlN, InN, or a mixed crystal thereof (Al _x Ga _1-xy In _y N). It is important to consider the substrate material and the plane orientation so that the nitride-based semiconductor layer 13 becomes a nonpolar plane because the characteristics of the semiconductor device are not adversely affected by the piezoelectric field. Here, the nonpolar plane means a plane orientation in which an electric field generated by polarization of a crystal does not occur. This is because a piezoelectric field can be generated in the c-axis direction but not in a direction perpendicular to the c-axis, for example, in the a-axis direction or the m-axis direction. Therefore, for example, by producing an epitaxial substrate having an a-plane or m-plane as a main surface, it is possible to prevent adverse effects due to a piezoelectric field in a semiconductor device. The plane orientation of the nitride-based semiconductor layer can be confirmed using X-ray diffraction.

  As a substrate for semiconductor growth, a single crystal of silicon carbide, gallium nitride, aluminum nitride, boron nitride, zinc oxide, silicon, germanium, lithium aluminate, or lithium niobate can be used. It is possible to grow a nitride-based semiconductor.

  The plane orientation of the nitride-based semiconductor layer 13 is uniquely determined by the plane orientation of the semiconductor growth substrate. For example, when an r-plane sapphire substrate is used, the nitride-based semiconductor layer 13 grown on the plane is mainly the a-plane. It becomes a surface. When the a-plane of the SiC substrate is used, an a-plane nitride-based semiconductor layer 13 is obtained, and when the m-plane is used, an m-plane nitride-based semiconductor layer is obtained. As described above, the nitride-based semiconductor layer 13 having a plane orientation corresponding to each of the semiconductor growth substrates can be obtained by appropriately selecting the plane orientation.

  As the crystal growth method of the present invention, the MOVPE method is preferably used, and a nonpolar plane nitride semiconductor excellent in surface flatness can be obtained using the conditions shown below. However, the present invention is not limited to this method, and other vapor phase growth methods such as the MBE method and the HVPE method may be used.

  The growth condition of the GaN layer 13 is important in suppressing pits on the surface of the epitaxial substrate. According to the present invention, the growth pressure is preferably 1 kPa or more and 10 kPa or less. The size and density of the pits are correlated with the growth pressure. When the nitride-based semiconductor layer 13 is grown under a growth pressure higher than 100 bmar, the pits cannot be completely suppressed, and such an epitaxial substrate 1 is a semiconductor device. Not suitable for manufacturing. On the other hand, if it is used at less than 1 kPa, equipment problems such as the capacity of the vacuum pump and the conductance of the exhaust increase, which is not suitable. The substrate temperature is preferably higher than 900 ° C. and lower than 1100 ° C. This is because the RMS surface roughness of the nitride-based semiconductor layer 13 increases at 900 ° C. or lower or 1100 ° C. or higher, and is not suitable for manufacturing a semiconductor device.

  Inserting the buffer layer 12 between the semiconductor growth substrate 11 and the nitride-based semiconductor layer 13 is also an effective means for suppressing pits, and is optimal as well as the growth conditions of the nitride-based semiconductor layer 13. It is necessary to make it. As a material of the buffer layer 12, AlN can be used. In general c-axis oriented growth, a layer of about several tens of nanometers is deposited on a semiconductor growth substrate at a low temperature of about 400 to 600 ° C. However, in the case of growth on a nonpolar surface such as a-axis orientation, it is not always necessary. Not so. However, in order to promote decomposition and deposition on the substrate of trimethylaluminum (TMA) used as a group III supply source, the substrate temperature is preferably set to a high temperature of 900 ° C. or higher and 1200 ° C. or lower. In addition, when the buffer layer 12 is grown at a temperature lower than 900 ° C., the crystal quality of the nitride-based semiconductor layer 13 grown thereon deteriorates. In general, it is difficult to set the substrate temperature higher than 1200 ° C. due to problems of heating devices such as a heater and a power source. Further, by using GaN or AlGaN as the buffer layer 12, the same surface flatness can be improved. The thickness of the buffer layer 12 is preferably 100 nm or more and 2 μm or less, and if it is out of this range, there is a problem that the RMS surface roughness of the nitride-based semiconductor layer 13 increases.

  The buffer layer 12 may be configured not only by laminating a single layer, but also by sequentially laminating layers composed of AlN, GaN, and AlGaN.

  The nitride-based semiconductor epitaxial substrate 1 manufactured by using this vapor phase growth method has excellent surface flatness, and the RMS surface roughness measured by an atomic force microscope (AFM) can be less than 10 nm. This value is an RMS surface roughness sufficient for manufacturing a semiconductor device. Therefore, when this epitaxial substrate 1 is used, a semiconductor device having excellent characteristics that is not adversely affected by the piezoelectric field can be obtained.

  Further, the off-angle of the main surface 21 of the r-plane sapphire substrate 11 used in the present invention is preferably inclined by about 0.5 ° in the direction in which the c-axis 22 approaches the R-axis 23 as shown in FIG. If used, crystal growth is facilitated, but if the off angle in any direction is 5 degrees or less, the effects of the present invention can be exhibited by adjusting the growth conditions. It's not an important point.

  Examples of the present invention will be described below.

(First embodiment)
MOVPE was used as the growth method, and an r-plane sapphire substrate 11 was used as the semiconductor growth substrate 11 as shown in FIG.

  First, a buffer layer 12 made of AlN was grown to 800 nm at a substrate temperature of 1100 ° C., and then a nitride-based semiconductor layer 13 made of GaN was grown to 2 μm. The growth conditions for the nitride-based semiconductor layer 13 were a substrate temperature of 1000 ° C. and a growth pressure of 8 kPa. As a result, a mirror-surface epitaxial substrate 1 was obtained over the entire surface of the substrate, and it was confirmed by X-ray diffraction that the a-plane nitride-based semiconductor layer was laminated. Moreover, the RMS surface roughness evaluated by AFM was 1 nm.

  Furthermore, in order to influence the surface flatness of the nitride-based semiconductor layer 13 by each growth condition, the following experiment was performed.

  First, FIG. 3 shows the relationship between the growth pressure and the RMS surface roughness of the nitride-based semiconductor layer 13. Note that the same conditions as described above were used, and only the growth pressure was changed. The RMS surface roughness at 10 kPa or less was obtained, and the surface flatness was improved. In particular, at 8 kPa or less, the RMS surface roughness is about 1 nm, which is more preferable. Although it is presumed that an epitaxial substrate excellent in surface flatness can be obtained even at less than 1 kPa, the experiment could not be carried out due to an apparatus problem. On the other hand, at a growth pressure greater than about 10 kPa, pits were generated, resulting in an RMS surface roughness exceeding 10 nm, which was not suitable for manufacturing a semiconductor device.

  Next, FIG. 4 shows the relationship between the substrate temperature and the RMS surface roughness of the nitride-based semiconductor layer 13. When grown at a temperature higher than 900 ° C. and lower than 1050 ° C., the RMS surface roughness was less than 10 nm. The flatness was the best at 1000 ° C., and the RMS surface roughness was 1 nm. At substrate temperatures of 900 ° C. or lower and 1100 ° C. or higher, the morphology deteriorated and the RMS surface roughness increased.

(Example 2)
Experiments on the buffer layer 12 were performed.

  First, as Comparative Example 1, a nitride-based semiconductor layer 13 made of GaN was grown directly on the r-plane sapphire substrate 11 without inserting the buffer layer 12. As a result, it was confirmed by X-ray diffraction that an a-plane nitride-based semiconductor layer was laminated. The growth conditions of the nitride semiconductor layer 13 at that time were fixed at 8 kPa and 1000 ° C., and were grown by 2 μm. As a result, pits are generated on the surface and the RMS surface roughness is increased to 100 nm, which is not preferable.

  Next, an experiment was performed using AlN as the buffer layer 12. At that time, the substrate temperature of the buffer layer 12 was constant at 1100 ° C. The growth conditions for the nitride-based semiconductor layer 13 were the same as described above. FIG. 4 shows the relationship between the thickness of the buffer layer 12 and the RMS surface roughness of the nitride-based semiconductor layer 13. With a film thickness of 100 nm or more and 2 μm or less, an RMS surface roughness of 10 nm or less was obtained. When the film thickness was larger than 2 μm, pits were generated, and when it was thinner than 100 nm, the RMS surface roughness was increased due to the streak morphology.

  Next, an experiment for changing the substrate temperature during the growth of the buffer layer 12 was performed. The film thickness of the buffer layer 12 was constant at 800 nm. As a result, all the samples had excellent surface flatness and RMS surface roughness of less than 10 nm. However, a change appeared in the crystallinity of the nitride-based semiconductor layer 13. FIG. 5 shows the relationship between the substrate temperature during the growth of the buffer layer 13 and the half width of the X-ray rocking curve. As the X-ray rocking curve, GaN symmetrical reflection (11-20) was used, and the sample was rocked along the c-axis of the nitride-based semiconductor layer 13. When the temperature was 900 ° C. or more and 1200 ° C. or less, a good half width of 850 arcsec or less was shown. However, when the temperature was less than 900 ° C., the temperature was 1000 ° C. or more and deterioration of crystallinity was recognized. Moreover, it was difficult on the apparatus to make the substrate temperature higher than 1200 ° C., and the experiment could not be performed.

(Example 3)
The material of the buffer layer 12 was examined. First, a buffer layer 13 made of AlN, GaN, and AlGaN was grown on the r-plane sapphire substrate at 1100 ° C. by 800 nm. Then, a nitride semiconductor layer 13 made of GaN was grown by 2 μm. The growth conditions for the nitride-based semiconductor layer 13 were a substrate temperature of 1000 ° C. and a growth pressure of 8 kPa. As a result, it was confirmed by X-ray diffraction that an a-plane nitride-based semiconductor layer was laminated. There was no noticeable change and it was confirmed that any material can be used. The RMS surface roughness was less than 10 nm and the crystallinity was good.

Example 4
Experiments were conducted using various SiC substrates 11 having a-plane and m-polar non-polar planes as principal planes. For comparison, a c-plane SiC substrate 11 was also prepared and the same experiment was performed. The growth conditions of the buffer layer 12 and the nitride semiconductor layer 13 grown on each SiC substrate 11 were the same.

  As a result, when the main surface of the SiC substrate is the c-plane, a-plane, and m-plane, it is confirmed by X-ray diffraction that the c-plane, a-plane, and m-plane nitride semiconductor layers 13 are obtained, respectively. did. That is, in the case of the SiC substrate 11, the plane orientation of the substrate coincided with the plane orientation of the nitride-based semiconductor layer 13. In any case, the RMS surface roughness of the nitride-based semiconductor layer 13 was less than 10 nm, indicating good crystallinity.

(Example 5)
Using the epitaxial substrate manufactured in Examples 1 to 4, a light emitting diode and a field effect transistor were manufactured as a semiconductor device. As a result, a high-performance semiconductor device that is not adversely affected by the piezoelectric field can be manufactured.

It is sectional drawing explaining the epitaxial substrate of this invention. It is a schematic diagram explaining the crystal orientation of the r surface sapphire substrate used by this invention. It is a graph showing the experimental result of the epitaxial substrate produced in the Example of this invention. It is a graph showing the experimental result of the epitaxial substrate produced in the Example of this invention. It is a graph showing the experimental result of the epitaxial substrate produced in the Example of this invention. It is a graph showing the experimental result of the epitaxial substrate produced in the Example of this invention. It is a schematic diagram explaining the heterojunction of nitride-based semiconductor with c-axis orientation. It is sectional drawing which shows the conventional laser diode. It is sectional drawing which shows the conventional semiconductor device (field effect transistor).

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Epitaxial substrate 11 Semiconductor growth substrate 12 Buffer layer 13 First layer 13 Nitride-based semiconductor layer 21 Sapphire unit cell 22 Main surface 23 of r-plane sapphire substrate c-axis 24 r-axis 71 Layer 71a Heterojunction interface 72 Layer 73 c-axis 8 Conventional semiconductor device (laser diode)
81 c-plane sapphire substrate 82 GaN layer 83 n-type buffer layer 84 n-type cladding layer 85 n-type guide layer 86 quantum well structure active layer 87 p-type cap layer 88 p-type guide layer 89 p-type cladding layer 90 p-side contact layer 91 Insulating layer 92 p-side electrode 93 n-side electrode 9 Conventional semiconductor device (field effect transistor)
94 Low-temperature buffer layer 95 Undoped GaN layer 96 Undoped Al0.3Ga0.7N layer 97 Undoped GaN layer 98 Undoped Al0.3Ga0.7N spacer layer 99 n-type Al0.3Ga0.7N electron supply layer 100 Graded composition undoped AlxGa1-xN barrier layer 101 n-type Al0.06Ga0.94N contact layer 102 Source electrode 103 Drain electrode 104 Gate electrode

Claims (11)

A nitride-based semiconductor vapor phase growth method in which a nitride-based semiconductor having a nonpolar surface as a main surface is vapor-grown on a semiconductor growth substrate, wherein the atmospheric pressure during the vapor-phase growth is 1 to 10 kPa. And the temperature of the said substrate for semiconductor growth shall be 900 degreeC or more and less than 1100 degreeC, The vapor phase growth method of the nitride type semiconductor characterized by the above-mentioned. 2. The vapor phase of a nitride semiconductor according to claim 1, wherein the nitride semiconductor is GaN, AlN, InN, or a mixed crystal thereof (Al _x Ga _1-xy In _y N). Growth method. The nitride semiconductor vapor phase growth method according to claim 1, wherein the nonpolar plane is an a plane or an m plane. The method for vapor phase growth of a nitride semiconductor according to any one of claims 1 to 3, wherein an organic metal compound vapor phase growth method is used. 5. The nitride semiconductor vapor phase growth method according to claim 1, wherein the semiconductor growth substrate is a sapphire substrate having an r-plane as a main surface. 5. The semiconductor growth substrate is a single crystal of any one of silicon carbide, gallium nitride, aluminum nitride, boron nitride, zinc oxide, silicon, germanium, lithium aluminate, and lithium niobate. A vapor phase growth method for a nitride semiconductor according to any one of the above. A method for vapor phase growth of a nitride semiconductor in which a buffer layer and a nitride semiconductor are formed in this order on the semiconductor growth substrate, wherein the substrate temperature during the formation of the buffer layer is 900 to 1200 ° C. The method of vapor phase growth of a nitride semiconductor according to claim 5 or 6, wherein the thickness is controlled to 100 nm to 2 µm. 8. The method for vapor phase growth of a nitride-based semiconductor according to claim 7, wherein the buffer layer is any one of aluminum nitride, gallium nitride, and aluminum gallium nitride. An epitaxial substrate using the nitride-based semiconductor vapor phase growth method according to claim 1. The epitaxial substrate according to claim 9, wherein the arithmetic average surface roughness or the root mean square RMS surface roughness is 5 nm or less. A semiconductor device using the epitaxial substrate according to claim 9.

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