JP2007214392A - Semiconductor wafer and wafer-probing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To enable a probing needle located inside a bonding pad to be improved in positioning accuracy when a wafer is inspected, and to reduce chip size. <P>SOLUTION: In a semiconductor wafer, two or more semiconductor integrated circuit devices have been formed with external connection bonding pads on their surfaces, under a bonding pad or an additionally provided aligning pad 4A that serves as an inspection pad. It is preferable that pressure-sensing elements 9, such as transistors etc, that vary in characteristics by pressure, be arranged in an array form, and a circuit unit be provided to separately measure the characteristic variations in the pressure-sensing elements 9. According to this setup, the contact position of the probing needle 6 inside the pad 4A can be detected easily and accurately, so that alignment of a probe card can be carried out properly with the semiconductor integrated circuit device. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor wafer and a wafer probe method, and more particularly to a technique for aligning a probe card.

  A plurality of semiconductor integrated circuit devices formed on a semiconductor wafer inspect the electrical characteristics of each semiconductor integrated circuit device using a probe card in which probe needles are arranged in the state of the semiconductor wafer.

A conventional semiconductor wafer inspection method (wafer probe method) will be described.
As shown in FIGS. 11A and 11B, a plurality of semiconductor integrated circuit devices 2 are formed in a grid pattern on the semiconductor wafer 1, and a scribe lane region 3 is provided on the outer peripheral side of each semiconductor integrated circuit device 2. On the main surface of each semiconductor integrated circuit device 2, a plurality of bonding pads 4 (input / output terminals) connected to wirings of internal circuits (not shown) are formed.

  In the wafer inspection, the probe card 5 is arranged above the semiconductor integrated circuit device 2 (or a plurality of semiconductor devices) to be inspected so that the bonding pads 4 and the probe needles 6 face each other, and then the bonding pads 4 And the probe needle 6 are brought into contact with each other and the semiconductor integrated circuit device 2 is inspected by inputting / outputting electrical signals through the probe needle 6 in this state. Do.

  In this case, for example, as shown in FIG. 12, at least one mark 7 arranged on the surface of the semiconductor integrated circuit device 2 to be inspected is read by image recognition and aligned with the probe card 5. Yes.

As another alignment method, as shown in FIG. 13, for each semiconductor integrated circuit device, three conduction detecting pads 8A, 8B, 8C having a predetermined area smaller than the bonding pad are electrically connected to each other. When the three probe needles 6A, 6B, and 6C are in contact with the three continuity detection pads 8A, 8B, and 8C, an electrical signal is observed from the central probe needle 6B, and the state Is a proper position, and the center probe needle 6B deviates from the continuity detection pad 8B and an electric signal cannot be observed. . As another alignment method, two monitor pads connected to the same bonding pad via metal wiring are provided, and a current is supplied between the bonding pad and one monitor pad, and the bonding pad and the other are connected. A method has also been proposed in which the voltage between the first and second monitor pads is measured to determine the contact resistance between the probe needle and the bonding pad, thereby confirming conduction (Patent Document 2).
JP-A-6-045419 JP-A-8-330368

  However, in the above-described alignment method using image recognition, the bonding pad 4 and the probe needle 6 are indirectly aligned, and the position of the probe needle 6 is also related to the accuracy of attaching the probe card 5 to the prober device body. Therefore, the positional accuracy of the probe needle 6 in each bonding pad 4 is not sufficient.

  In the method using the three continuity detection pads 8A, 8B, 8C, the central continuity detection pad 8B cannot be made smaller than the positional variation of the probe needles 6A, 6B, 6C, and the probe needles 6A, 6B. , 6C cannot be raised, and therefore the size of the conduction detection pads 8A, 8B, 8C depends on the positional variation of the probe needles 6A, 6B, 6C. As a result, the size of the bonding pad 4 to which the continuity detection pads 3A, 3B, 3C are associated also depends on the positional variation of the probe needles 8A, 8B, 8C, which is the recent pattern of semiconductor integrated circuits. Despite the remarkable miniaturization, the chip size cannot be reduced.

  In view of the above problems, an object of the present invention is to improve the positional accuracy of a probe needle in a bonding pad and reduce the chip size.

  In order to solve the above problems, a semiconductor wafer of the present invention is a semiconductor wafer on which a plurality of semiconductor integrated circuit devices having pads for external connection on the surface are formed. A pressure detecting element whose characteristic varies depending on pressure is disposed under the provided inspection pad, and a circuit unit for individually measuring the variation of the characteristic of the pressure detecting element is provided.

  The pressure sensing elements are preferably arranged in an array. A transistor can be used as the pressure sensing element. The circuit unit may include a decoding circuit that selects any one of the pressure detection elements. At least one of the inspection pad and the input / output pad of the circuit section is preferably arranged in a scribe lane for separating the semiconductor integrated circuit device.

  When inspecting the semiconductor integrated circuit device on the semiconductor wafer using a probe card, the pad provided with the pressure detecting element on the semiconductor integrated circuit device is brought into contact with the probe needle of the probe card to detect each pressure. The element characteristic variation is individually measured, the contact position of the probe needle in the pad is detected from the measured characteristic variation amount, and the semiconductor integrated circuit device and the probe card are aligned based on the detection result. be able to.

  Using a probe card designed so that at least two probe needles are in contact with a pad having a pressure detecting element on a semiconductor integrated circuit device, and a pad and a probe card having the pressure detecting element on the semiconductor integrated circuit device The probe needle is contacted, the fluctuation of the characteristics of each pressure sensing element is measured individually, the contact position of each probe needle within the pad is detected from the measured fluctuation amount of the characteristic, and the contact of each probe needle You may make it detect rotation of a probe card from a position.

  When at least two pads having a pressure detection element are formed on the semiconductor integrated circuit device, the pads having the pressure detection element on the semiconductor integrated circuit device are brought into contact with the probe needles of the probe card, Measures the fluctuations of the characteristics of each pressure sensing element individually, detects the contact position of the probe needle in each pad from the measured fluctuation amount of the characteristic, and detects the rotation of the probe card from the contact position of each probe needle You may make it do.

It is also possible to determine and adjust the needle pressure of the probe needle from the amount of variation in the characteristics of each pressure sensing element.
A semiconductor integrated circuit device singulated from the semiconductor wafer described above, having a pad for external connection on the surface, under the pad for external connection or an inspection pad provided separately from the pad. Also, a semiconductor integrated circuit device in which pressure detecting elements whose characteristics vary with pressure are arranged in an array forms part of the present invention.

  A probe apparatus configured to carry out the wafer probe method described above also forms part of the present invention.

  The semiconductor wafer of the present invention has a simple configuration in which the pressure sensing elements are preferably arranged in an array under the pad, and a circuit unit for individually measuring each characteristic variation is provided. It is possible to easily and accurately detect the position within the pad, and not only the pad for external connection but also the pad for inspection is naturally related to the pad for external connection. Therefore, the alignment accuracy between the probe needle and the external connection pad can be improved.

  It is also possible to determine the needle pressure of the probe needle from the amount of variation in the characteristics of each pressure sensing element and directly adjust it by controlling the drive amount of the probe card. Therefore, slip of the probe needle on the pad can be eliminated, thereby making it possible to reduce the pad size and further reducing the chip size of the semiconductor integrated circuit device.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a plan view schematically showing a part of a semiconductor wafer according to an embodiment of the present invention.
A plurality of semiconductor integrated circuit devices 2 are formed in a grid pattern on the semiconductor wafer 1, and a scribe lane region 3 is provided on the outer peripheral side of each semiconductor integrated circuit device 2. A plurality of bonding pads 4 connected to the wiring of an internal circuit (not shown) formed in the central portion are formed on the peripheral edge portion of.

  The semiconductor wafer 1 is different from the conventional one in that one of the bonding pads 4 on the semiconductor integrated circuit device 2 also has a function of alignment with the probe card (see FIG. 11 described above). Is a point. Hereinafter, the bonding pad 4 is referred to as an alignment pad 4A.

  Under the alignment pad 4A, as shown in FIG. 2, the pressure detection elements 9 whose electrical characteristics fluctuate depending on the pressure are arranged in an array. Here, the alignment pad 4A has a size of 50 μm × 50 μm, and below it, transistors with a gate width of 2 μm and a gate length of 2 μm are arranged at a pitch of 10 μm in 5 rows and 5 columns in the X and Y directions along the pad outline. Has been. For ease of explanation, a position number in the X direction and Y direction is attached to the outside of the alignment pad 4A, and the probe needle 6 is shown in contact with the pad surface.

  Under or near the alignment pad 4A, as shown in FIG. 3, a circuit unit 10 for individually measuring the characteristic variation of the pressure detecting element 9 is provided. A transistor is formed as the pressure detection element 9. It is known that the saturation current value of a transistor, particularly a MOS transistor, varies with pressure, and that the saturation current value varies greatly with the pressure as the gate width and gate length are increased. The gate electrode of each transistor is connected to the decode circuit 11 and the gate terminal 12, the drain electrode of each transistor is connected to the decode circuit 13 and the drain terminal 14, and the source electrodes of all the transistors are connected to the common source terminal 15. Yes. The decode circuits 11 and 13 are connected to the signal input terminal 16.

  Then, the measurement position setting signal S1 input from the signal input terminal 16 instructs the decoder circuit 11 to select the gate of one transistor and apply the gate voltage Vg to the gate terminal 12, and the decode circuit. 13 selects the drain of one transistor and instructs the drain terminal 14 to apply the drain voltage Vd.

  Therefore, for example, when the measurement position setting signal S1 is given from the signal input terminal 16 in a state where the probe needle 6 is in contact with the positioning pad 4A as shown in FIG. The measurement positions corresponding to the positions are sequentially designated, and a drain current corresponding to the needle pressure of the probe needle 6 flows through the transistors at each measurement position, and is output from the source terminal 15 as the measurement signal S2.

  FIG. 4 shows the variation rate of the drain current when the probe needle 6 contacts the position shown in FIG. 2 in the positioning pad 4A. The fluctuation rate of the drain current at position (2, 2) is 6%, whereas there is no fluctuation of the drain current at other positions. Thus, the position (2, 2) can be detected as the position where the probe needle 6 is in contact.

  In this way, it is possible to easily detect which position in the alignment pad 4A the probe needle 6 is in contact with from the variation in characteristics of the transistor as the pressure detection element 9. Based on the detection result, alignment (position correction) can be performed so that the semiconductor integrated circuit device 2 and the probe card 5 face each other appropriately.

  The size and number of the pressure detection elements 9 arranged below the alignment pad 4A are not limited as described above. For example, by changing the arrangement pitch of the pressure detection elements 9, the contact of the probe needle 6 can be changed. The position accuracy for detecting the position (measurement position) can be changed. The pressure detection element 9 may be an element other than a transistor as long as the characteristic varies depending on the pressure.

  FIG. 5 is a correlation diagram between the probe load and the drain current fluctuation when the probe needle 6 is in contact with the positioning pad 4A. As shown in the figure, the probe load and the drain current fluctuation amount are substantially proportional to each other. Therefore, it can be determined whether the needle pressure of the probe needle 6 is excessive from the drain current fluctuation amount, and if it is excessive, it can be directly adjusted by controlling the drive amount of the probe card. Therefore, it is possible to eliminate the sliding of the probe needle 6 on the alignment pad 4A, thereby making it possible to reduce the pad size and further reduce the chip size of the semiconductor integrated circuit device. Become.

As shown in FIG. 6, the alignment pad 4A or the probe card may be configured such that the two probe needles 6 are in contact with the alignment pad 4A at the same time.
In this way, as shown in FIG. 7, the characteristics of the pressure detecting element 9 under the contact position of each probe needle 6 vary, so that each probe in the alignment pad 4A is determined based on the measured characteristic variation. The contact position of the needle 6 can be detected, and the relative rotation angle θ of the probe card can be detected from the contact position of both probe needles 6. Therefore, based on the detection result, the semiconductor integrated circuit device and the probe card can be aligned (position correction) so as to face each other properly. The number of probe needles 6 that simultaneously contact the alignment pad 4A may be three or more.

  As shown in FIG. 8, the two alignment pads 4 </ b> A may be arranged at diagonal positions in the semiconductor integrated circuit device 2, for example. As a result, the contact position of the two probe needles 6 that are simultaneously in contact with the two alignment pads 4A can be detected, and the relative rotation angle of the probe card can be detected from the contact position of both probe needles 6. Therefore, based on the detection result, the semiconductor integrated circuit device and the probe card can be aligned (position correction) so as to face each other properly. The number of alignment pads 4A arranged in the semiconductor integrated circuit device may be three or more.

As shown in FIG. 9, a dedicated alignment pad 4 </ b> B separate from the external connection pad 4 may be arranged outside the semiconductor integrated circuit device 2, for example, in the scribe lane region 3.
Here, the input / output pads (gate terminal 12, drain terminal 14, source terminal 15, signal input terminal 16) of the circuit unit 10 described above are also arranged in the scribe lane region.

  The alignment pad 4B may be arranged in the semiconductor integrated circuit device 2, but it is advantageous to arrange the pad 4B in the scribe lane region 3 in this way because the chip size can be reduced. It is. For the dedicated positioning pad 4B, a dedicated probe needle needs to be provided on the probe card.

  FIG. 10 shows the configuration of a probe apparatus for carrying out the wafer probe method of the present invention described above. This probe apparatus includes a probe card 5 on which probe needles 6 are arranged, a movable wafer stage 21 on which a semiconductor wafer 1 is mounted, and a measurement position setting circuit that sends a measurement position setting signal S1 to the semiconductor wafer 1 through the probe needles 6. 22, a measurement circuit 23 that measures the amount of variation in electrical characteristics from a measurement signal S 2 sent from the semiconductor wafer 1 through the probe needle 6 in response to the measurement position setting signal S 1, and a position correction unit 24.

  Then, based on the measurement position set by the measurement position setting circuit 21 and the measurement result by the measurement circuit 23, the pressure detection element 9 in which the electrical characteristics under the alignment pads 4A and 4B described above are fluctuated. Specifically, the contact position of the probe needle 6 in the alignment pads 4A and 4B is detected, the detection result is compared with the reference position setting, and if there is a predetermined difference, the position correction is determined, and the wafer stage The position correction signal S3 is output toward the position 21.

  INDUSTRIAL APPLICABILITY The semiconductor wafer and the wafer probe method of the present invention are useful for improving the quality and efficiency of the inspection of the semiconductor integrated circuit device formed on the semiconductor wafer, and for reducing the chip size of the semiconductor integrated circuit device. .

The top view which showed typically a part of semiconductor wafer of one Embodiment of this invention FIG. 1 is an external view for explaining the principle of alignment of alignment pads formed on a semiconductor integrated circuit device on the semiconductor wafer of FIG. Circuit diagram showing the configuration under or near the alignment pad Schematic diagram showing the drain current fluctuation rate when the probe needle contacts the alignment pad Correlation diagram of probe load and drain current fluctuation when the probe needle contacts the alignment pad External view explaining the principle of alignment when two probe needles are in contact with the alignment pad Schematic diagram showing the drain current fluctuation rate in the state of FIG. The top view which showed typically a part of semiconductor wafer of other embodiment of this invention The top view which showed typically a part of semiconductor wafer of further another embodiment of this invention Configuration diagram of a probe apparatus for carrying out the wafer probe method of the present invention Plan view and sectional view for explaining a conventional wafer inspection method Partial plan view of a conventional semiconductor wafer on which a mark for alignment with a probe card is formed Partial plan view of a conventional semiconductor wafer on which a conduction detection pad for alignment with a probe card is formed

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Semiconductor wafer 2 ... Semiconductor integrated circuit device 3 ... Scribe lane 4 ... Bonding pad
4A, 4B ・ Positioning pad 5 ... Probe card 6 ... Probe needle 9 ... Pressure detection element
10 ... Circuit part

Claims (11)

  In a semiconductor wafer formed with a plurality of semiconductor integrated circuit devices having external connection pads on the surface, characteristics vary depending on pressure under the external connection pads or inspection pads provided separately from the external connection pads. A semiconductor wafer provided with a circuit unit for measuring a variation in characteristics of the pressure detection element individually.   The semiconductor wafer according to claim 1, wherein the pressure detection elements are arranged in an array.   The semiconductor wafer according to claim 1, wherein the pressure sensing element is a transistor.   The semiconductor wafer according to claim 1, wherein the circuit unit includes a decoding circuit that selects any one of the pressure detection elements.   2. The semiconductor wafer according to claim 1, wherein at least one of the inspection pad and the input / output pad of the circuit unit is arranged in a scribe lane for separating the semiconductor integrated circuit device.   A wafer probe method for inspecting a semiconductor integrated circuit device on a semiconductor wafer according to claim 1 using a probe card, comprising: a pad provided with a pressure detecting element on the semiconductor integrated circuit device; and a probe needle of the probe card. Contact is made, and the variation of the characteristics of each pressure sensing element is individually measured, the contact position of the probe needle in the pad is detected from the measured variation amount of the characteristic, and the semiconductor integrated circuit device and the probe are detected based on the detection result A wafer probe method for aligning a card.   Using a probe card designed so that at least two probe needles are in contact with a pad having a pressure detecting element on a semiconductor integrated circuit device, and a pad and a probe card having the pressure detecting element on the semiconductor integrated circuit device The probe needle is contacted, the fluctuation of the characteristics of each pressure sensing element is measured individually, the contact position of each probe needle within the pad is detected from the measured fluctuation amount of the characteristic, and the contact of each probe needle The wafer probe method according to claim 6, wherein the rotation of the probe card is detected from the position.   When at least two pads having a pressure detection element are formed on the semiconductor integrated circuit device, the pads having the pressure detection element on the semiconductor integrated circuit device are brought into contact with the probe needles of the probe card, Measures the fluctuations of the characteristics of each pressure sensing element individually, detects the contact position of the probe needle in each pad from the measured fluctuation amount of the characteristic, and detects the rotation of the probe card from the contact position of each probe needle The wafer probe method according to claim 6.   The wafer probe method according to any one of claims 6 to 8, wherein the probe pressure of the probe needle is determined and adjusted based on a variation amount of characteristics of each pressure detection element.   2. A semiconductor integrated circuit device singulated from a semiconductor wafer according to claim 1, wherein a pad for external connection is provided on the surface, and the pad for external connection or a pad for inspection provided separately from the pad. A semiconductor integrated circuit device in which pressure sensing elements whose characteristics vary with pressure are arranged in an array.   A probe apparatus configured to perform the wafer probe method according to claim 6.

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