JP2007208145A - Semiconductor device manufacturing method - Google Patents

Semiconductor device manufacturing method Download PDF

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JP2007208145A
JP2007208145A JP2006027601A JP2006027601A JP2007208145A JP 2007208145 A JP2007208145 A JP 2007208145A JP 2006027601 A JP2006027601 A JP 2006027601A JP 2006027601 A JP2006027601 A JP 2006027601A JP 2007208145 A JP2007208145 A JP 2007208145A
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semiconductor wafer
semiconductor
blade
wafer
main surface
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Fumiaki Mita
文章 三田
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Sanken Electric Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method which can effectively prevent breakage of a semiconductor wafer, and can favorably perform a semiconductor device manufacturing process. <P>SOLUTION: A circular notch is formed in an manner such that a blade 21 is abutted vertical to one main surface of a semiconductor wafer 11, and the blade 21 is rotated. Then the blade 21 is moved in the circumferential direction of the semiconductor wafer 11. The process for forming the circular notch is carried out several times, whereby, a reinforcement portion 11a having the thickness of semiconductor wafer 11 before grinding is formed on the semiconductor wafer 11. The reinforcement portion 11a functions as a reinforcement member when a semiconductor manufacturing process, such as process for transferring the semiconductor wafer 11, diffusion process, metal film forming process etc. is carried out. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、半導体装置の製造方法に関する。   The present invention relates to a method for manufacturing a semiconductor device.

従来、パワートランジスタ等のパワー系半導体素子は、複数の半導体領域が形成される半導体基板と、半導体基板の両面に形成された電極とを備える。そして、半導体素子の放熱特性向上、換言すれば半導体素子の更なる大電力化に伴い、パワー系半導体素子においても半導体基板を薄く形成する試みが行われている。   Conventionally, a power semiconductor element such as a power transistor includes a semiconductor substrate on which a plurality of semiconductor regions are formed, and electrodes formed on both sides of the semiconductor substrate. With the improvement of the heat dissipation characteristics of the semiconductor element, in other words, with the further increase in power of the semiconductor element, an attempt has been made to form a semiconductor substrate thin also in the power semiconductor element.

従来、薄い半導体基板を備えるパワー系半導体素子は、次のような手順で製造されている(例えば、特許文献1)。   Conventionally, a power semiconductor device including a thin semiconductor substrate is manufactured by the following procedure (for example, Patent Document 1).

まず、半導体ウエハを用意し、半導体ウエハの一方の主面に不純物を拡散させ、複数の半導体領域を形成する。次に、粘着テープが貼り付けられた環状のウエハ補強部材を用意し、半導体ウエハの一方の主面にウエハ補強部材を貼り付ける。   First, a semiconductor wafer is prepared, and impurities are diffused on one main surface of the semiconductor wafer to form a plurality of semiconductor regions. Next, an annular wafer reinforcing member to which an adhesive tape is attached is prepared, and the wafer reinforcing member is attached to one main surface of the semiconductor wafer.

続いて、ウエハ補強部材を取り付けた状態で、半導体ウエハの他方の主面に研削加工を施し、半導体ウエハを薄く加工する。研削加工は、半導体ウエハの他方の主面に研削砥石を当接し、研削砥石を高速回転させる。   Subsequently, with the wafer reinforcing member attached, the other main surface of the semiconductor wafer is ground to process the semiconductor wafer thinly. In the grinding process, the grinding wheel is brought into contact with the other main surface of the semiconductor wafer, and the grinding wheel is rotated at a high speed.

次に、研削加工の施された半導体ウエハの他方の主面に、金属膜を蒸着させ、裏面電極を形成する。その後、半導体ウエハを分割し、薄い半導体基板を有する半導体素子(半導体チップ)を得る。   Next, a metal film is vapor-deposited on the other main surface of the semiconductor wafer subjected to grinding to form a back electrode. Thereafter, the semiconductor wafer is divided to obtain a semiconductor element (semiconductor chip) having a thin semiconductor substrate.

この製造方法によれば、薄型化された半導体ウエハは補強部材によって支持されるため、種々の工程や基板搬送中に半導体ウエハが破損することを防止することができる。
特開2002−100589号公報
According to this manufacturing method, since the thinned semiconductor wafer is supported by the reinforcing member, it is possible to prevent the semiconductor wafer from being damaged during various processes and substrate transport.
JP 2002-100589 A

ところで、上述した製造方法では、補強部材を半導体ウエハに固定させるため粘着テープ等の接着剤を用いている。しかし、接着剤の耐熱温度は200℃程度であるため、半導体ウエハの他方の主面に金属膜を形成する際、接着剤等の成分が揮発し、金属膜の形成に悪影響を及ぼすことがある。   By the way, in the manufacturing method described above, an adhesive such as an adhesive tape is used to fix the reinforcing member to the semiconductor wafer. However, since the heat-resistant temperature of the adhesive is about 200 ° C., when the metal film is formed on the other main surface of the semiconductor wafer, components such as the adhesive volatilize, which may adversely affect the formation of the metal film. .

また、薄型化した半導体ウエハの他方の主面に不純物拡散を行う場合、不純物の拡散温度は例えば800℃〜1000℃と高温であるため、補強部材を取り付けた状態でこのような拡散工程を行うことができないという問題がある。   Further, when impurity diffusion is performed on the other main surface of the thinned semiconductor wafer, the diffusion temperature of the impurity is as high as, for example, 800 ° C. to 1000 ° C. Therefore, such a diffusion step is performed with the reinforcing member attached. There is a problem that can not be.

本発明は上記実情に鑑みてなされたものであり、半導体ウエハの破損を良好に防止することができ、更に良好に不純物拡散工程等の半導体製造工程を施すことが可能な半導体装置の製造方法を提供することを目的とする。   The present invention has been made in view of the above circumstances, and provides a method for manufacturing a semiconductor device that can satisfactorily prevent a semiconductor wafer from being damaged and that can be more satisfactorily subjected to a semiconductor manufacturing process such as an impurity diffusion process. The purpose is to provide.

上記目的を達成するため、本発明の第1の観点に係る半導体装置の製造方法は、
ブレードを半導体ウエハの一方の主面に対して垂直に当接させ、該ブレードを回転させることにより、該半導体ウエハを研削する研削工程と、
前記ブレードを前記半導体ウエハに当接させる位置を調節し、研削位置を調節する研削位置調節工程と、を備え、
前記研削位置調節工程では、前記半導体ウエハの外周縁部が、前記半導体ウエハの中心領域と比較して厚く形成されるように、前記ブレードの位置を調節することを特徴とする。
In order to achieve the above object, a method of manufacturing a semiconductor device according to the first aspect of the present invention includes:
A grinding step of grinding the semiconductor wafer by bringing the blade perpendicularly into contact with one main surface of the semiconductor wafer and rotating the blade;
A grinding position adjusting step of adjusting a position where the blade is brought into contact with the semiconductor wafer and adjusting a grinding position;
In the grinding position adjusting step, the position of the blade is adjusted so that an outer peripheral edge portion of the semiconductor wafer is formed thicker than a central region of the semiconductor wafer.

前記研削位置調節工程では、前記ブレードを前記半導体ウエハの周方向に移動させ、更に前記ブレードを前記半導体ウエハの径方向に移動させてもよい。   In the grinding position adjusting step, the blade may be moved in the circumferential direction of the semiconductor wafer, and the blade may be further moved in the radial direction of the semiconductor wafer.

前記研削位置調節工程では、前記半導体ウエハを載置するウエハテーブルを回転させ、更に前記ブレードを前記半導体ウエハの径方向に移動させてもよい。   In the grinding position adjusting step, a wafer table on which the semiconductor wafer is placed may be rotated, and the blade may be moved in the radial direction of the semiconductor wafer.

前記研削位置調節工程では、前記半導体ウエハを載置するウエハテーブルを回転させ、更に前記ウエハテーブルを前記半導体ウエハの径方向に移動させてもよい。   In the grinding position adjusting step, a wafer table on which the semiconductor wafer is placed may be rotated, and the wafer table may be moved in the radial direction of the semiconductor wafer.

前記研削位置調節工程では、円形の溝を形成するため、前記半導体ウエハと同心円である溝が複数連続して形成されるように前記ブレードの位置を調節してもよい。   In the grinding position adjusting step, since the circular groove is formed, the position of the blade may be adjusted so that a plurality of grooves that are concentric with the semiconductor wafer are continuously formed.

本発明によれば、ブレードを回転させながら半導体ウエハの周方向に移動させ、更に径方向に内側に移動させ半導体ウエハを研削することによって、接着剤等を用いずに半導体ウエハの外周縁部に補強部を良好に形成することができるため、半導体ウエハの破損を良好に防止することができ、更に良好に半導体製造工程を施すことが可能な半導体装置の製造方法を提供することができる。   According to the present invention, by rotating the blade in the circumferential direction of the semiconductor wafer and further moving inward in the radial direction to grind the semiconductor wafer, the outer peripheral edge of the semiconductor wafer can be obtained without using an adhesive or the like. Since the reinforcing portion can be formed satisfactorily, it is possible to provide a method for manufacturing a semiconductor device that can prevent damage to the semiconductor wafer and can perform a semiconductor manufacturing process more satisfactorily.

本発明の各実施の形態に係る半導体装置の製造方法について図を用いて説明する。   A method of manufacturing a semiconductor device according to each embodiment of the present invention will be described with reference to the drawings.

まず、半導体装置を複数得ることが可能な面積を備え、例えばシリコン単結晶からなる半導体ウエハ11を用意する。半導体ウエハ11は、図1(a)に示すようにオリフラ(oriental flat)を備え、半導体ウエハ11の平面形状はほぼ円形である。また、例えば半導体ウエハ11の厚みは800μmであり、直径は200mm(8インチ)である。   First, a semiconductor wafer 11 having an area capable of obtaining a plurality of semiconductor devices and made of, for example, a silicon single crystal is prepared. As shown in FIG. 1A, the semiconductor wafer 11 includes an oriental flat, and the planar shape of the semiconductor wafer 11 is substantially circular. For example, the semiconductor wafer 11 has a thickness of 800 μm and a diameter of 200 mm (8 inches).

半導体ウエハ11の一方の主面(図1(b)に示す上面)に熱拡散法、イオン注入法等によりP型不純物又はN型不純物を拡散させ、所定の半導体領域を形成する。また、半導体ウエハ11の一方の主面上にスパッタリング、真空蒸着等を用いて金属膜12を形成する。例えば、パワートランジスタを例に挙げると、半導体ウエハ11の一方の主面にエミッタ領域、ベース領域等を形成し、ウエハ11の一方の主面上に形成された金属膜12は、例えばエミッタ電極、ベース電極を構成する。   A predetermined semiconductor region is formed by diffusing P-type impurities or N-type impurities on one main surface (the upper surface shown in FIG. 1B) of the semiconductor wafer 11 by a thermal diffusion method, an ion implantation method, or the like. Further, the metal film 12 is formed on one main surface of the semiconductor wafer 11 by using sputtering, vacuum deposition or the like. For example, taking a power transistor as an example, an emitter region, a base region, and the like are formed on one main surface of the semiconductor wafer 11, and the metal film 12 formed on one main surface of the wafer 11 includes, for example, an emitter electrode, A base electrode is configured.

これらの工程から、図1(b)に示すように一方の主面側に複数の半導体領域、電極膜12が形成された半導体ウエハ11を得る。なお、図1では半導体領域の図示は省略している。   From these steps, a semiconductor wafer 11 having a plurality of semiconductor regions and an electrode film 12 formed on one main surface side is obtained as shown in FIG. In FIG. 1, the semiconductor region is not shown.

次に、半導体ウエハ11の他方の主面に研削加工を施すため、例えば図2に示すダイサ40を用意する。図2に示すダイサ40は、半導体ウエハ11を保持するウエハテーブル30と、ウエハテーブル30に対して所定の間隔を有して配置された研削機構20とを有する。   Next, in order to grind the other main surface of the semiconductor wafer 11, for example, a dicer 40 shown in FIG. 2 is prepared. The dicer 40 shown in FIG. 2 includes a wafer table 30 that holds the semiconductor wafer 11 and a grinding mechanism 20 that is disposed at a predetermined interval with respect to the wafer table 30.

ウエハテーブル30は、円盤状の平面形状を有しており、半導体ウエハ11を真空吸着して保持できるように構成されている。また、ウエハテーブル30は、図示しない回転駆動機構に連結されており、その中心軸(θ軸)を中心として円周方向に回転可能となっている。   The wafer table 30 has a disk-like planar shape, and is configured to hold the semiconductor wafer 11 by vacuum suction. The wafer table 30 is connected to a rotation drive mechanism (not shown) and is rotatable in the circumferential direction about the central axis (θ axis).

研削機構20は、主軸スピンドル22に連結されたブレード(研削刃)21と、主軸スピンドル22を回転させる主軸モータ23と、主軸スピンドル22及び主軸モータ23が固定されたモータブラケット24と、モータブラケット24を中心軸(θ軸)を中心として回転させる回転機構(図示せず)と、モータブラケット24をZ軸方向(ウエハテーブル30の主面から離間させるZ1軸方向と、ウエハテーブル30の主面に近接させるZ2方向と)に移動させるZ軸移動キャリッジ25と、Z軸移動キャリッジ25をZ軸方向に移動させるZ軸移動機構26と、このZ軸移動機構26が固定され且つ図示しないレール上をY軸方向(ウエハテーブル30の主面に平行するY1方向と、Y2方向と)に移動させるY軸移動キャリッジ27と、を有している。Y軸移動キャリッジ27は、図示しないY軸移動機構によってY1方向及びY2方向に移動する。   The grinding mechanism 20 includes a blade (grinding blade) 21 connected to the spindle spindle 22, a spindle motor 23 that rotates the spindle spindle 22, a motor bracket 24 to which the spindle spindle 22 and the spindle motor 23 are fixed, and a motor bracket 24. A rotation mechanism (not shown) that rotates about the center axis (θ axis), the motor bracket 24 in the Z-axis direction (the Z1 axis direction separating from the main surface of the wafer table 30), and the main surface of the wafer table 30. A Z-axis moving carriage 25 that moves in the Z2 direction), a Z-axis moving mechanism 26 that moves the Z-axis moving carriage 25 in the Z-axis direction, and a Z-axis moving mechanism 26 that is fixed and moves on a rail (not shown). A Y-axis moving carriage 27 that moves in the Y-axis direction (Y1 direction parallel to the main surface of the wafer table 30 and Y2 direction); The has. The Y-axis moving carriage 27 moves in the Y1 direction and the Y2 direction by a Y-axis moving mechanism (not shown).

続いて、半導体ウエハ11を、その中心が中心軸(θ軸)上に位置するようにウエハテーブル30上に固定し、Z軸移動キャリッジ25を降下、すなわちウエハテーブル30に近接させるZ2方向に移動して、ブレード21を、ウエハテーブル30上に固定した半導体ウエハ11の上面に対して垂直に当接させる。ブレード21は主軸モータ23によって主軸スピンドル22を回転させることにより、主軸スピンドル22の中心軸の周りを高速回転する。これにより、例えばブレード21の下面を半導体ウエハ11の表面から厚みの例えば3/4程度(本実施の形態では半導体ウエハ11の厚みが800μmであるので、600μm程度)まで降下させ研削すれば、半導体ウエハ11の主面に深さ600μmの溝を形成することができる。つまり、研削されて残る半導体ウエハ11は厚さ200μmとなる。   Subsequently, the semiconductor wafer 11 is fixed on the wafer table 30 so that the center thereof is located on the central axis (θ axis), and the Z-axis moving carriage 25 is lowered, that is, moved in the Z2 direction to be close to the wafer table 30. Then, the blade 21 is brought into perpendicular contact with the upper surface of the semiconductor wafer 11 fixed on the wafer table 30. The blade 21 rotates at high speed around the central axis of the spindle spindle 22 by rotating the spindle spindle 22 by the spindle motor 23. Thus, for example, if the lower surface of the blade 21 is lowered from the surface of the semiconductor wafer 11 to about 3/4 of the thickness (in this embodiment, the thickness of the semiconductor wafer 11 is about 800 μm, and thus about 600 μm) and is ground, A groove having a depth of 600 μm can be formed on the main surface of the wafer 11. That is, the semiconductor wafer 11 that remains after grinding has a thickness of 200 μm.

本実施の形態では、ブレード21によって半導体ウエハ11を研削する際に、モータブラケット24を中心軸(θ軸)を中心として回転させる。これにより、図3(a)に示すように、ブレード21は矢印R方向に点線に沿うようにして、半導体ウエハ11の外周縁に沿って半導体ウエハ11と同心円状に移動し、半導体ウエハ11の主面に環状の溝(第1環状溝)が形成される。   In the present embodiment, when the semiconductor wafer 11 is ground by the blade 21, the motor bracket 24 is rotated about the central axis (θ axis). As a result, as shown in FIG. 3A, the blade 21 moves concentrically with the semiconductor wafer 11 along the outer peripheral edge of the semiconductor wafer 11 along the dotted line in the arrow R direction. An annular groove (first annular groove) is formed on the main surface.

また、本実施の形態では、図3(a)〜(c)に示すように半導体ウエハ11の外周側からウエハの中心側へと研削を進めるため、最初に形成される溝より外側領域が、補強部11aとして残存する。従って、補強部11aをどの程度の幅に形成するかに応じて、最初にブレード21を半導体ウエハ11上に当接させる位置を決定する。補強部11aは、後述するように半導体ウエハ11を搬送する際、拡散工程、金属膜形成工程等の際の補強部材として機能する。   Further, in the present embodiment, as shown in FIGS. 3A to 3C, since the grinding proceeds from the outer peripheral side of the semiconductor wafer 11 to the center side of the wafer, the outer region from the groove formed first is It remains as the reinforcing part 11a. Accordingly, the position at which the blade 21 is first brought into contact with the semiconductor wafer 11 is determined according to how wide the reinforcing portion 11a is formed. As will be described later, the reinforcing portion 11a functions as a reinforcing member in the diffusion process, the metal film forming process, and the like when the semiconductor wafer 11 is transferred.

次に、Z軸方向にはブレード21を移動させず、Y軸移動キャリッジ27をブレード21の厚み分、又は厚み分よりも若干小さな距離だけ半導体ウエハ11の中心側、図2で示すY1方向に移動させる。これにより、ブレード21は第1の環状溝の内側の半導体ウエハ11の主面領域に当接し、この領域を環状に研削する。この結果、図3(c)に示すように第1の環状溝50aに連続する第2の環状溝50bが形成される。   Next, the blade 21 is not moved in the Z-axis direction, and the Y-axis moving carriage 27 is moved to the center side of the semiconductor wafer 11 by the thickness of the blade 21 or a distance slightly smaller than the thickness, in the Y1 direction shown in FIG. Move. As a result, the blade 21 comes into contact with the main surface area of the semiconductor wafer 11 inside the first annular groove, and this area is ground in an annular shape. As a result, as shown in FIG. 3C, a second annular groove 50b continuous with the first annular groove 50a is formed.

このような研削工程を繰り返すことにより、半導体ウエハ11の主面には第2の環状溝に連続する第3の環状溝、第3の環状溝に連続する第4の環状溝、というように順次環状溝が形成され、図4(a)及び(b)に示すような幅広の環状溝が形成される。   By repeating such a grinding process, a third annular groove continuous with the second annular groove, a fourth annular groove continuous with the third annular groove, and the like are sequentially formed on the main surface of the semiconductor wafer 11. An annular groove is formed, and a wide annular groove as shown in FIGS. 4A and 4B is formed.

最終的にブレード21を半導体ウエハ11の中心まで移動させることにより、図5(a)及び(b)に示すように半導体ウエハ11の中央側は、周辺領域より薄くなり、円形の溝が形成される。このようにして半導体ウエハ11に補強部11aと素子形成領域11bとが形成される。   Finally, by moving the blade 21 to the center of the semiconductor wafer 11, the central side of the semiconductor wafer 11 becomes thinner than the peripheral region as shown in FIGS. 5A and 5B, and a circular groove is formed. The In this way, the reinforcing portion 11a and the element forming region 11b are formed on the semiconductor wafer 11.

素子形成領域11bは図5(a)及び(b)に示すように円形状の平面形状を有し、その厚みTbは200μmである。また、素子形成領域11bの直径は約19cmである。また、半導体ウエハ11の外周縁には、研削が施される前の半導体ウエハ11の厚みを備える補強部11aが残存する。補強部11aは、図5(a)に示すように環状に形成される。補強部11aの厚みTaは、例えば800μmの厚みを備え、補強部11aの幅は約5mmに形成される。補強部11aは、半導体ウエハ11の搬送、素子形成領域11bへの不純物拡散工程、電極形成工程を施す際、半導体ウエハ11に加わる種々の衝撃によって、素子形成領域11bが破損しないよう機能する。   The element formation region 11b has a circular planar shape as shown in FIGS. 5A and 5B, and its thickness Tb is 200 μm. The element formation region 11b has a diameter of about 19 cm. Further, the reinforcing portion 11 a having the thickness of the semiconductor wafer 11 before being ground remains on the outer peripheral edge of the semiconductor wafer 11. The reinforcing portion 11a is formed in an annular shape as shown in FIG. The reinforcing portion 11a has a thickness Ta of, for example, 800 μm, and the reinforcing portion 11a has a width of about 5 mm. The reinforcing portion 11a functions so that the element forming region 11b is not damaged by various impacts applied to the semiconductor wafer 11 when the semiconductor wafer 11 is transferred, the impurity is diffused into the element forming region 11b, and the electrode forming step.

次に、半導体ウエハ11の他方の主面に半導体拡散領域を形成するため、半導体ウエハ11を拡散処理を行う装置に搬送する。続いて、補強部11aによって半導体ウエハ11の素子形成領域11bが補強された状態で半導体ウエハ11に不純物拡散処理を施す。これにより、半導体ウエハの他方の主面に半導体領域(例えばコレクタ領域)を形成する。このように補強部11aによって補強された状態で不純物拡散等を行うため、素子形成領域11bに破損が生ずることを防止できる。   Next, in order to form a semiconductor diffusion region on the other main surface of the semiconductor wafer 11, the semiconductor wafer 11 is transferred to an apparatus for performing a diffusion process. Subsequently, an impurity diffusion process is performed on the semiconductor wafer 11 in a state where the element forming region 11b of the semiconductor wafer 11 is reinforced by the reinforcing portion 11a. Thereby, a semiconductor region (for example, a collector region) is formed on the other main surface of the semiconductor wafer. Since impurity diffusion or the like is performed while being reinforced by the reinforcing portion 11a as described above, it is possible to prevent the element formation region 11b from being damaged.

続いて、電極を形成するための装置に搬送し、スパッタリング、真空蒸着等を施すことによって、半導体ウエハ11の他方の主面に金属電極(例えば、コレクタ電極)を形成する。電極を形成する際も、半導体ウエハ11は補強部11aが形成された状態で、処理が施されるため、素子形成領域11bに破損が生ずることを防止することができる。   Subsequently, a metal electrode (for example, a collector electrode) is formed on the other main surface of the semiconductor wafer 11 by carrying it to an apparatus for forming an electrode and performing sputtering, vacuum deposition, or the like. Even when the electrodes are formed, the semiconductor wafer 11 is processed in a state in which the reinforcing portion 11a is formed. Therefore, it is possible to prevent the element formation region 11b from being damaged.

以上により、一方の主面と他方の主面との双方に半導体領域と電極とが形成された肉薄(200μm)の半導体ウエハ11が得られる。   As described above, a thin (200 μm) semiconductor wafer 11 in which a semiconductor region and an electrode are formed on both one main surface and the other main surface is obtained.

次に、この半導体ウエハ11を分割して多数の半導体チップを得るために半導体ウエハ11を周知のダイシング装置に搬送する。   Next, in order to divide the semiconductor wafer 11 to obtain a large number of semiconductor chips, the semiconductor wafer 11 is transferred to a known dicing apparatus.

半導体ウエハ11をダイシングする際は、半導体ウエハ11の一方の主面にテープ部材を貼着し、ブレード21を半導体ウエハ11の他方の主面に網目状に操作する。これにより、半導体ウエハ11は、平面形状が方形であり、一方の主面と他方の主面に半導体領域と電極とが形成された多数の半導体チップに分割される。
以上の工程から半導体装置が製造される。
When dicing the semiconductor wafer 11, a tape member is attached to one main surface of the semiconductor wafer 11, and the blade 21 is operated in a mesh pattern on the other main surface of the semiconductor wafer 11. Thus, the semiconductor wafer 11 is divided into a large number of semiconductor chips each having a square planar shape and having a semiconductor region and electrodes formed on one main surface and the other main surface.
A semiconductor device is manufactured from the above steps.

上述したように本実施の形態の半導体装置の製造方法によれば、素子形成領域11bが補強部11aによって支持されるため、搬送、不純物拡散工程、電極形成工程等で、半導体ウエハ11に破損が生じることを良好に防止することができる。   As described above, according to the manufacturing method of the semiconductor device of the present embodiment, since the element forming region 11b is supported by the reinforcing portion 11a, the semiconductor wafer 11 is damaged in the transport, impurity diffusion process, electrode forming process, and the like. This can be prevented well.

また、補強部11aが半導体ウエハ11と一体に形成されていることによって、補強部11aは素子形成領域11bと同じ耐熱性を有し、種々の半導体プロセス(不純物拡散工程、金属膜形成工程等)の処理温度を上回る耐熱性を備える。従って、補強部11aによって半導体ウエハ11が補強された状態で半導体ウエハ11に種々の半導体プロセスを施すことができる。また、補強部11aは半導体ウエハ11と一体に形成されるため、補強部材を半導体ウエハ11に取り付けるために接着剤等を必要としない。このため、高温の熱処理を施しても、接着剤の成分等が揮発して金属膜形成等に悪影響を及ぼすことがない。   Further, since the reinforcing portion 11a is formed integrally with the semiconductor wafer 11, the reinforcing portion 11a has the same heat resistance as the element forming region 11b, and various semiconductor processes (impurity diffusion process, metal film forming process, etc.). It has heat resistance exceeding the processing temperature. Therefore, various semiconductor processes can be performed on the semiconductor wafer 11 in a state where the semiconductor wafer 11 is reinforced by the reinforcing portion 11a. Further, since the reinforcing portion 11 a is formed integrally with the semiconductor wafer 11, no adhesive or the like is required to attach the reinforcing member to the semiconductor wafer 11. For this reason, even if a high temperature heat treatment is performed, the components of the adhesive and the like are not volatilized and the metal film formation or the like is not adversely affected.

また、半導体ウエハ11をブレード21を用いて研削することによって、補強部11aと素子形成領域11bとを形成するため、例えばエッチングを用いる場合と比較して、素子形成領域11bの厚みを均一に形成することができる。例えば、エッチング等を用いて素子形成領域、補強部等を形成する場合、素子形成領域の厚みを面方向に均一に形成することが難しい。更に、選択的に特定の領域をエッチングするためには半導体ウエハ上にマスクを形成する必要があるが、素子形成領域を形成した後このマスクを除去する際に、半導体ウエハが破損するおそれがあるという問題がある。   Further, since the reinforcing portion 11a and the element formation region 11b are formed by grinding the semiconductor wafer 11 using the blade 21, for example, the thickness of the element formation region 11b is uniformly formed as compared with the case where etching is used. can do. For example, when forming an element formation region, a reinforcing portion, or the like using etching or the like, it is difficult to form the thickness of the element formation region uniformly in the surface direction. Further, in order to selectively etch a specific region, it is necessary to form a mask on the semiconductor wafer. However, when the mask is removed after forming the element formation region, the semiconductor wafer may be damaged. There is a problem.

また、本実施の形態では、半導体ウエハ11の主面に垂直にブレード21を当接させ、半導体ウエハ11の外周縁に沿って環状に複数回移動させることによって素子形成領域11bを形成するため、所望の幅を有する補強部11aを良好に形成することができ、半導体ウエハ11の強度が安定して得られる。これに対して、例えば図6に示すように半導体ウエハの他方の主面(研削を施す面)に、研削砥石を当接させ、研削砥石を図6に示す矢印M1方向に高速回転させ、更に半導体ウエハの周縁に沿うよう矢印M2のように周方向に回転させる方法も考えられる。しかし、この方法では補強部は、矢印M2方向に回転する際に形成されるため、補強部の幅を安定して形成することができない。補強部の幅を安定して形成することができないと、半導体ウエハ11の強度が低下するおそれがある。   In the present embodiment, since the blade 21 is brought into contact with the main surface of the semiconductor wafer 11 perpendicularly and moved in an annular manner along the outer peripheral edge of the semiconductor wafer 11, the element formation region 11b is formed. The reinforcing portion 11a having a desired width can be formed satisfactorily, and the strength of the semiconductor wafer 11 can be obtained stably. On the other hand, for example, as shown in FIG. 6, the grinding wheel is brought into contact with the other main surface (surface to be ground) of the semiconductor wafer, and the grinding wheel is rotated at a high speed in the direction of arrow M1 shown in FIG. A method of rotating in the circumferential direction as indicated by arrow M2 along the periphery of the semiconductor wafer is also conceivable. However, in this method, since the reinforcing portion is formed when rotating in the direction of the arrow M2, the width of the reinforcing portion cannot be formed stably. If the width of the reinforcing portion cannot be stably formed, the strength of the semiconductor wafer 11 may be reduced.

本発明は上述した実施の形態に限られず、様々な変形及び応用が可能である。
例えば、上述した実施の形態ではブレード21をZ軸方向には移動させず、Y1方向に連続して移動させる構成を例に挙げて説明した。しかし、これに限られずブレード21をY1方向に移動する際に、Z軸移動キャリッジ25によってブレード21をZ1方向に移動し、ブレード21を半導体ウエハ11の主面から一度離間させてから、再びZ軸移動キャリッジ25によってブレード21をZ2方向に移動して、ブレード21を半導体ウエハの主面に当接させて研削を行っても良い。
The present invention is not limited to the above-described embodiments, and various modifications and applications are possible.
For example, in the above-described embodiment, the configuration in which the blade 21 is continuously moved in the Y1 direction without moving in the Z-axis direction has been described as an example. However, the present invention is not limited to this, and when the blade 21 is moved in the Y1 direction, the blade 21 is moved in the Z1 direction by the Z-axis moving carriage 25, the blade 21 is once separated from the main surface of the semiconductor wafer 11, and then again Z Grinding may be performed by moving the blade 21 in the Z2 direction by the axial movement carriage 25 and bringing the blade 21 into contact with the main surface of the semiconductor wafer.

また、上述した実施の形態では、半導体ウエハ11の外周縁側から中心に向かって研削する場合を例に挙げたが、これに限られず、中心から外周縁側に向かうように研削することも可能である。   In the above-described embodiment, the case where grinding is performed from the outer peripheral edge side of the semiconductor wafer 11 toward the center has been described as an example. However, the present invention is not limited to this, and grinding may be performed from the center toward the outer peripheral edge side. .

また、上述した実施の形態では、モータブラケット24を中心軸(θ軸)を中心に回転させブレード21を半導体ウエハ11の周方向に移動させ、研削を施し環状溝を形成し、更にY軸移動キャリッジ27によって半導体ウエハ11の径方向にブレード21を移動させる構成を例に挙げたが、これに限られない。例えば、ブレード21をθ軸を中心として移動させず、ウエハテーブル30を回転させ、さらにY軸移動キャリッジ24によってブレード21を径方向に移動させる構成、ウエハテーブル30を回転させ、さらにウエハテーブル30を径方向に移動させる構成等を採ることも可能である。   Further, in the above-described embodiment, the motor bracket 24 is rotated around the central axis (θ axis), the blade 21 is moved in the circumferential direction of the semiconductor wafer 11, grinding is performed to form an annular groove, and further the Y axis is moved. Although the configuration in which the blade 21 is moved in the radial direction of the semiconductor wafer 11 by the carriage 27 has been described as an example, the configuration is not limited thereto. For example, the configuration is such that the blade 21 is rotated without moving the blade 21 about the θ axis, the blade 21 is moved in the radial direction by the Y-axis moving carriage 24, the wafer table 30 is rotated, and the wafer table 30 is further moved. It is also possible to adopt a configuration that moves in the radial direction.

また、上述した実施の形態では半導体ウエハ11の一方の主面に半導体領域、電極膜を形成した後、補強部11aを形成したが、補強部11aを形成した後に、一方の主面に半導体領域、電極膜を形成してもよい。また、補強部11aを形成した後、半導体ウエハ11の他方の主面に半導体領域を形成し、更に半導体ウエハ11の一方の主面に半導体領域を形成しても良い。なお、半導体ウエハ11の一方の主面、他方の主面のいずれか、もしくは双方に半導体領域、電極を形成するかは任意に設定することができ、更に補強部11aをいずれの段階で形成するかは任意に設定することが可能である。   In the embodiment described above, the semiconductor region and the electrode film are formed on one main surface of the semiconductor wafer 11, and then the reinforcing portion 11a is formed. However, after the reinforcing portion 11a is formed, the semiconductor region is formed on one main surface. An electrode film may be formed. Further, after forming the reinforcing portion 11 a, a semiconductor region may be formed on the other main surface of the semiconductor wafer 11, and a semiconductor region may be further formed on one main surface of the semiconductor wafer 11. Note that it is possible to arbitrarily set whether the semiconductor region and the electrode are formed on one or both of the main surface and the other main surface of the semiconductor wafer 11, and at which stage the reinforcing portion 11a is formed. It is possible to set arbitrarily.

本発明では、半導体基板の一方の主面及び他方の主面に電極を形成したパワー半導体素子の製造方法に特に適するが、半導体基板の一方の主面のみに電極を形成する薄厚半導体素子の製造方法に適用することもできる。   The present invention is particularly suitable for a method of manufacturing a power semiconductor device in which electrodes are formed on one main surface and the other main surface of a semiconductor substrate, but manufacturing a thin semiconductor device in which electrodes are formed only on one main surface of a semiconductor substrate. It can also be applied to the method.

また、上述した実施の形態では半導体ウエハの厚みの3/4を研削する場合を例に挙げたが、いかなる深さだけ研削するかは任意に設定することができる。また、半導体ウエハ11が、シリコン単結晶からなる場合を例に挙げたが、これに限られない。   In the above-described embodiment, the case where 3/4 of the thickness of the semiconductor wafer is ground is taken as an example, but what depth is ground can be arbitrarily set. Moreover, although the case where the semiconductor wafer 11 consists of a silicon single crystal was mentioned as an example, it is not restricted to this.

(a)は本発明の実施の形態に係る半導体装置の製造方法で用いられる半導体ウエハを示す斜視図であり、(b)は断面図である。(A) is a perspective view which shows the semiconductor wafer used with the manufacturing method of the semiconductor device which concerns on embodiment of this invention, (b) is sectional drawing. 本発明の実施の形態に係る半導体装置の製造方法で用いられる研削装置を示す図である。It is a figure which shows the grinding device used with the manufacturing method of the semiconductor device which concerns on embodiment of this invention. (a)は本発明の実施の形態に係る半導体装置の製造方法を示す斜視図であり、(b)は断面図である。(c)は本発明の実施の形態に係る半導体装置の製造方法を示す断面図である。(A) is a perspective view which shows the manufacturing method of the semiconductor device which concerns on embodiment of this invention, (b) is sectional drawing. (C) is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on embodiment of this invention. (a)は本発明の実施の形態に係る半導体装置の製造方法を示す斜視図であり、(b)は断面図である。(A) is a perspective view which shows the manufacturing method of the semiconductor device which concerns on embodiment of this invention, (b) is sectional drawing. (a)は本発明の実施の形態に係る半導体装置の製造方法を示す斜視図であり、(b)は断面図である。(A) is a perspective view which shows the manufacturing method of the semiconductor device which concerns on embodiment of this invention, (b) is sectional drawing. 他の研削方法を模式的に示す図である。It is a figure which shows the other grinding method typically.

符号の説明Explanation of symbols

11 半導体ウエハ
11a 補強部
11b 素子形成領域
20 研削機構
21 ブレード
22 主軸スピンドル
23 主軸モータ
24 モータブラケット
25 Z軸移動キャリッジ
26 Z軸移動機構
27 Y軸移動キャリッジ
30 ウエハテーブル
40 ダイサ
DESCRIPTION OF SYMBOLS 11 Semiconductor wafer 11a Reinforcement part 11b Element formation area 20 Grinding mechanism 21 Blade 22 Spindle spindle 23 Spindle motor 24 Motor bracket 25 Z axis moving carriage 26 Z axis moving mechanism 27 Y axis moving carriage 30 Wafer table 40 Dicer

Claims (5)

ブレードを半導体ウエハの一方の主面に対して垂直に当接させ、該ブレードを回転させることにより、該半導体ウエハを研削する研削工程と、
前記ブレードを前記半導体ウエハに当接させる位置を調節し、研削位置を調節する研削位置調節工程と、を備え、
前記研削位置調節工程では、前記半導体ウエハの外周縁部が、前記半導体ウエハの中心領域と比較して厚く形成されるように、前記ブレードの位置を調節することを特徴とする半導体装置の製造方法。
A grinding step of grinding the semiconductor wafer by bringing the blade perpendicularly into contact with one main surface of the semiconductor wafer and rotating the blade;
A grinding position adjusting step of adjusting a position where the blade is brought into contact with the semiconductor wafer and adjusting a grinding position;
In the grinding position adjusting step, the position of the blade is adjusted so that the outer peripheral edge portion of the semiconductor wafer is formed thicker than the central region of the semiconductor wafer. .
前記研削位置調節工程では、前記ブレードを前記半導体ウエハの周方向に移動させ、更に前記ブレードを前記半導体ウエハの径方向に移動させることを特徴とする請求項1に記載の半導体装置の製造方法。   2. The method of manufacturing a semiconductor device according to claim 1, wherein in the grinding position adjusting step, the blade is moved in a circumferential direction of the semiconductor wafer, and further, the blade is moved in a radial direction of the semiconductor wafer. 前記研削位置調節工程では、前記半導体ウエハを載置するウエハテーブルを回転させ、更に前記ブレードを前記半導体ウエハの径方向に移動させることを特徴とする請求項1に記載の半導体装置の製造方法。   2. The method of manufacturing a semiconductor device according to claim 1, wherein in the grinding position adjusting step, a wafer table on which the semiconductor wafer is placed is rotated, and the blade is further moved in the radial direction of the semiconductor wafer. 前記研削位置調節工程では、前記半導体ウエハを載置するウエハテーブルを回転させ、更に前記ウエハテーブルを前記半導体ウエハの径方向に移動させることを特徴とする請求項1に記載の半導体装置の製造方法。   2. The method of manufacturing a semiconductor device according to claim 1, wherein, in the grinding position adjusting step, a wafer table on which the semiconductor wafer is placed is rotated, and the wafer table is further moved in a radial direction of the semiconductor wafer. . 前記研削位置調節工程では、円形の溝を形成するため、前記半導体ウエハと同心円である溝が複数連続して形成されるように前記ブレードの位置を調節することを特徴とする請求項1乃至4のいずれか1項に記載の半導体装置の製造方法。   5. The grinding position adjusting step includes adjusting the position of the blade so that a plurality of grooves concentric with the semiconductor wafer are continuously formed in order to form a circular groove. The method for manufacturing a semiconductor device according to any one of the above.
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