JP2007208143A - Semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid imaging element that prevents disconnection even in a contact on which a contact hole of a high aspect ratio is formed and has high reliability. <P>SOLUTION: The semiconductor device has an impurity area formed on the substrate surface and a contact portion electrically connected with electrode wiring. Further, the device includes a contact hole which is formed so as to contain the edge of the electrode wiring and to open to the impurity area under wiring composed of a silicon conductive film which electrically connects the electrode wiring and the impurity area to each other in the contact hole, and a metal wiring layer which is formed on the upper layer of the under wiring and connected at least to the under wiring in the contact hole. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to a contact structure in a connecting portion between a rotating diffusion portion and a gate electrode of a solid-state imaging device.

  The present invention includes a floating diffusion portion that accumulates signal charges, and an output circuit that includes a transistor having a gate electrode electrically connected to the floating diffusion portion, and outputs a signal corresponding to a potential change in the floating diffusion portion. A CCD type solid-state image pickup device having the above has been proposed.

A CCD type solid-state imaging device includes a plurality of photoelectric conversion elements composed of photodiodes arranged vertically and horizontally on a light receiving surface, a vertical transfer register arranged corresponding to the vertical direction of each photoelectric conversion element, and a termination of the vertical transfer register. And a signal output unit that is arranged at the end of the horizontal transfer register, converts the transfer charge from the horizontal transfer register into a voltage signal, and outputs the voltage signal.
FIG. 4 is a plan view of a part of the horizontal transfer register of the CCD solid-state imaging device, the floating diffusion, and the periphery of the reset drain.

  For example, in a p-type well region formed on an n-type substrate, a horizontal CCD register 11, a floating diffusion 26, and a reset drain 28 are formed by, for example, an n-type diffusion layer, and a silicon oxide serving as a gate insulating film thereon. The transfer electrodes 21 and 23 and the gate electrode 27 of the reset gate portion are formed by the first polycrystalline silicon layer through the film (not shown), and further the second electrode through the silicon oxide film (not shown). The transfer electrodes 22 and 24 and the gate electrode 25 of the horizontal output gate portion are formed by the polycrystalline silicon layer.

  FIG. 5 shows a cross-sectional view in the vicinity of the floating diffusion 26. As shown in FIGS. 4 and 5, the floating diffusion 26 is connected to a wiring portion 9 made of an Al layer through a contact portion 29. The wiring portion 9 extends from the gate output of the output amplifier. Is connected to the wiring (gate electrode 3) consisting of In FIG. 5, 1 is a semiconductor substrate on which a p-type well region is formed, and 2 and 4 are insulating films such as a silicon oxide film.

  The wiring unit 3 patterns the Al layer formed on the entire surface into a predetermined pattern together with the light shielding film covering the horizontal CCD register 11 shown in FIG. 4 and the wiring of the output unit (for example, the first layer wiring). (Patent Document 1).

  In order to achieve further miniaturization in such a situation, the wiring (gate electrode) 3 made of the polycrystalline silicon layer is extended to the vicinity of the n-type diffusion layer constituting the floating diffusion 26, where the aluminum layer There has been proposed a connection method using the.

  In this method, first, a p-well layer 1P is formed on the surface of an n-type silicon substrate 1, a field oxide film (not shown) such as a LOCOS film is formed thereon, and an n + region 1N serving as a floating diffusion portion, After forming a photodiode, a vertical transfer register, a horizontal transfer register, and the like (not shown) by ion implantation or the like, a gate insulating film 2 made of an ONO film or the like is formed on the p well layer 1P.

  Next, although not shown in the drawing, a drive electrode made of polysilicon or the like for driving the vertical transfer register or horizontal transfer register formed on the surface of the p-well layer 1P (when reading the charge from the photodiode) (Also serving as a readout electrode) is formed through the gate insulating film 2. Simultaneously with the formation of the drive electrode, the wiring 3 such as the gate electrode of the reset transistor and the gate electrode of the transistor included in the output circuit electrically connected to the floating diffusion portion is formed on the silicon substrate using the same material as the drive electrode. 1 is formed.

  Next, an insulating film 8 made of a BPSG film or the like covering the gate insulating film 2, the wiring 3 such as the gate electrode, and the silicon substrate 1 on which the driving electrode is formed is formed and reflowed.

  Next, a resist pattern R1 is formed, and contact holes are formed in the insulating film 8 by reactive ion etching (RIE) or the like (FIG. 6A).

  Then, as shown in FIG. 6B, an aluminum layer is formed by sputtering and patterned to form a wiring 9 that electrically connects the gate electrode and the floating diffusion portion.

JP 2000-22122 A

  According to the above method, since the wiring is formed in the contact hole having a high aspect ratio by the sputtering method, a location where aluminum is disconnected may occur depending on the device shape.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a solid-state imaging device that prevents disconnection and has high reliability even in a contact portion in which a contact hole having a high aspect ratio is formed. .

The semiconductor device of the present invention is a semiconductor device including an impurity region formed on the substrate surface and a contact portion for electrically connecting the electrode wiring, and includes an end portion of the electrode wiring in the impurity region. A contact hole formed so as to be opened; a base wiring made of a silicon-based conductive film that electrically connects the electrode wiring and the impurity region in the contact hole; and a top layer of the base wiring. And a metal wiring layer connected to at least the base wiring in the contact hole.
With this configuration, the electrode wiring and the impurity region are connected by the base wiring, and a good contact can be obtained even if the aspect ratio of the contact hole is large simply by connecting the metal wiring layer formed in the upper layer to the base wiring. Obtainable.

The present invention includes the above semiconductor device, wherein the metal wiring layer is an aluminum wiring layer.
With this configuration, aluminum is likely to be disconnected, but since the electrode wiring and the impurity region are electrically connected by the base wiring, electrical connection can be achieved even if aluminum is disconnected.

  In the semiconductor device, the present invention includes a floating diffusion portion that accumulates signal charges and a transistor having a gate electrode electrically connected to the floating diffusion portion, and a signal corresponding to a potential change of the floating diffusion portion. An output circuit for outputting, a contact hole formed so that a connection wiring of the output circuit includes an end portion of the gate electrode and opens to the floating diffusion portion, and within the contact hole, the gate electrode A base wiring made of a silicon-based conductive film that electrically connects the floating diffusion portion, and an aluminum wiring layer formed in an upper layer of the base wiring and connected to at least the base wiring in the contact hole Including things.

  The present invention includes the above semiconductor device, wherein the silicon-based conductive film is a doped polycrystalline silicon film.

  The present invention includes the above semiconductor device, wherein the silicon-based conductive film is a thin film formed by a low pressure CVD method.

  The present invention is also a method for manufacturing a semiconductor device comprising an impurity region formed on a substrate surface and a contact portion for electrically connecting the electrode wiring, the impurity including an end portion of the electrode wiring. Forming a contact hole so as to open in the region; forming a base wiring made of a silicon-based conductive film that electrically connects the electrode wiring and the impurity region in the contact hole; Forming a metal wiring layer on an upper layer of the base wiring so as to be connected to at least the base wiring in the contact hole.

  According to the present invention, in the method of manufacturing a semiconductor device, the step of forming the metal wiring layer includes a step of forming an aluminum thin film by a sputtering method.

  According to another aspect of the present invention, there is provided a method of manufacturing the semiconductor device, the step of forming a charge transfer region including the floating diffusion portion on the semiconductor substrate and forming a gate electrode through a gate insulating film; Forming an opening in the insulating film to cover and exposing at least a part of the floating diffusion portion; forming a silicon-based conductive film on the semiconductor substrate by a CVD method; and forming a base wiring; Forming an aluminum wiring by a sputtering method on the base wiring and patterning, and including a floating diffusion part for storing signal charges, and a transistor having a gate electrode electrically connected to the floating diffusion part, Floating diffusion section Including those adapted to produce a solid-state imaging device having an output circuit that outputs a signal corresponding to the potential change.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a partial cross-sectional schematic view of a signal output portion of a solid-state imaging device for explaining an embodiment of the present invention. A floating diffusion portion for accumulating signal charges and a gate electrode electrically connected to the floating diffusion portion. In a solid-state imaging device including a transistor connected to the output circuit, and an output circuit that outputs a signal according to a change in potential of the floating diffusion portion, a connection wiring constituting the output circuit connects the end of the gate electrode 3 A contact hole formed so as to open to the floating diffusion portion 1N, and a base wiring 7 made of a polycrystalline silicon film for electrically connecting the gate electrode and the floating diffusion portion 1N in the contact hole; , Formed in an upper layer of the base wiring 7 and the contour Including those having at least the underlying wiring 7 aluminum wiring layer 9 connected to in Tohoru.
In this configuration, the aluminum wiring layer 9 constituting the connection wiring is not necessarily connected to both the gate electrode and the floating diffusion portion by being connected to the base wiring 7 in the contact hole H. Since the gate electrode 3 and the floating diffusion portion are connected to the base wiring 7, the aluminum wiring layer 9 can constitute a good output wiring layer.

  The signal output unit of the solid-state imaging device according to the present embodiment accumulates signal charges from the horizontal transfer register and becomes a potential corresponding to the signal charge from the horizontal transfer register, similarly to the configuration of the conventional example described above, and then reset to a predetermined reset potential. The configuration includes a floating diffusion portion that repeats the operation at a constant period, a reset transistor that resets the floating diffusion portion, and an output circuit that outputs a signal corresponding to a potential change in the floating diffusion portion. The output circuit includes a source follower circuit connected in two or three stages, and each source follower circuit includes a drive transistor and a load transistor. FIG. 1 illustrates a connection portion between the floating diffusion portion 1N and the gate electrode 3 of the driving transistor of the first-stage source follower circuit included in the output circuit.

  As shown in FIG. 1, a floating diffusion portion 1N composed of an n + region is formed in a p-well layer 1P formed on an n-type silicon substrate 1, and a field oxide film (such as a LOCOS film near the floating diffusion portion 4) ( A gate electrode 3 made of polysilicon or the like is formed on a gate insulating film 2 made of an ONO film or the like formed on the p well layer 1P. The gate electrode 3 corresponds to the gate electrode of the driving transistor of the first-stage source follower circuit described above. An opening is formed in the gate insulating film 2 above the floating diffusion portion 1N.

  As described above, the base wiring 7 made of a polycrystalline silicon film and the metal wiring layer 9 made of aluminum wiring formed thereon are formed on the end of the gate electrode 3 and the floating diffusion portion 1N, and the gate The electrode 3 and the floating diffusion portion 1N are electrically connected by the base wiring 7 and the metal wiring layer 9.

  In the signal output unit configured as described above, the signal charge transferred from a horizontal transfer register (not shown) is temporarily accumulated in the floating diffusion unit 1N. Then, the potential of the floating diffusion portion 1N changes according to the accumulated signal charge, and this potential change is applied as an output signal to the gate electrode 3 via the base wiring 7 and the metal wiring layer 9, and this output signal is output. Amplified by the circuit and output to the outside.

Hereinafter, a method for manufacturing the solid-state imaging device shown in FIG. 1 will be described.
2 and 3 are process diagrams for explaining a method of manufacturing the solid-state imaging device shown in FIG. First, a p-well layer 1P is formed on the surface of an n-type silicon substrate 1, and a field oxide film (not shown) such as a LOCOS film is formed thereon. Further, an n + region 1N to be a floating diffusion portion, a photodiode (not shown), a vertical transfer register, a horizontal transfer register, and the like are formed in the p well layer 1P by ion implantation, and then an ONO film is formed on the p well layer 1P. A gate insulating film 2 made of or the like is formed.

  Next, although not shown in the drawing, on a vertical transfer register or a horizontal transfer register formed on the surface of the p-well layer 1P, a drive electrode made of polysilicon or the like for driving them (when reading out charges from a photodiode) Are also formed via the gate insulating film 2. Simultaneously with the formation of the drive electrode, the gate electrode 3 made of the same material as the drive electrode is formed on the field oxide film in the vicinity of the floating diffusion portion 1N via the gate insulating film 2. Thereafter, a silicon oxide film 8 is formed as an interlayer insulating film (FIG. 2A). Then, in order to expose at least a part of the floating diffusion portion 1N, a resist pattern R1 is formed by photolithography. Then, using this resist pattern R1 as a mask, at least a part of the gate insulating film 2 on the floating diffusion portion 1N is removed to form an opening (FIG. 2 (b)), the resist pattern R1 is peeled off and removed for contact. An opening H is formed (FIG. 2C) .After forming the opening in the gate insulating film 2, the gate electrode 3 and the like may be formed, and the steps up to here are usual steps.

  Next, a base wiring 7 made of a polycrystalline silicon film is formed on the silicon substrate 1 by a low pressure CVD method (FIG. 3A), and an aluminum thin film as a metal wiring layer 9 is formed on the upper layer by a sputtering method. (FIG. 3B). Then, the underlying wiring 7 and the metal wiring layer 9 are patterned by photolithography using the resist pattern R2 as a mask (FIG. 3C) In this way, the portion in contact with the floating diffusion portion 1N is contacted with the gate electrode 3. Etching is selectively removed so as to leave up to the portion that has been removed.

  As described above, aluminum is prone to breakage, but since the gate electrode 3 and the floating diffusion portion 1N are electrically connected by the polycrystalline silicon layer 7, even if breakage occurs in the aluminum, Connection can be achieved, and connection failure due to disconnection of connection wiring due to variation in contact shape can be reduced.

  In the above-described embodiment, the formation of the wiring connected to the gate electrode 3 and the floating diffusion portion 1N has been described. However, the present invention is not limited to this, and an impurity region such as a diffusion layer formed on the surface of the semiconductor substrate. Can be applied as appropriate when the electrode wiring is connected to the electrode wiring by an upper wiring.

  As described above, the semiconductor device and the manufacturing method thereof according to the present invention can be applied to various semiconductor fields such as wiring for connecting the floating diffusion portion of the solid-state imaging device and the gate electrode and extracting them to the output circuit.

The figure which shows the signal output part of the solid-state image sensor of embodiment of this invention Process drawing for demonstrating the manufacturing method of the solid-state image sensor shown in FIG. Process drawing for demonstrating the manufacturing method of the solid-state image sensor shown in FIG. The figure which shows the formation process of the contact of the signal output part of the solid-state image sensor of a prior art example The figure which shows the manufacturing process of the signal output part of a prior art example The figure which shows the manufacturing process of the signal output part of a prior art example

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Silicon substrate 1P P well layer 1N Floating diffusion part 2 Gate insulating film 3 Gate electrode 4 Insulating film 6 Insulating film 7 Base wiring layer 8 BPSG film 9 Metal wiring layer

Claims (8)

A semiconductor device comprising an impurity region formed on a substrate surface and a contact portion for electrically connecting an electrode wiring,
A contact hole formed to open to the impurity region including an end of the electrode wiring;
In the contact hole, a base wiring made of a silicon-based conductive film that electrically connects the electrode wiring and the impurity region;
A semiconductor device comprising a metal wiring layer formed in an upper layer of the base wiring and connected to at least the base wiring in the contact hole. The semiconductor device according to claim 1,
The semiconductor device, wherein the metal wiring layer is an aluminum wiring layer. The semiconductor device according to claim 1,
A floating diffusion part for storing signal charges; and a transistor having a gate electrode electrically connected to the floating diffusion part, and an output circuit for outputting a signal corresponding to a potential change of the floating diffusion part,
The connection wiring of the output circuit is
A contact hole formed to open to the floating diffusion portion including an end of the gate electrode;
In the contact hole, a base wiring made of a silicon-based conductive film that electrically connects the gate electrode and the floating diffusion portion;
A semiconductor device including a solid-state image sensor provided with an aluminum wiring layer formed in an upper layer of the base wiring and connected to at least the base wiring in the contact hole. A semiconductor device according to any one of claims 1 to 3,
The semiconductor device in which the silicon-based conductive film is a doped polycrystalline silicon film. The solid-state imaging device according to any one of claims 1 to 4,
The semiconductor device, wherein the silicon-based conductive film is a thin film formed by a low pressure CVD method. A method for manufacturing a semiconductor device comprising an impurity region formed on a substrate surface and a contact portion for electrically connecting an electrode wiring,
Forming a contact hole so as to open to the impurity region including an end of the electrode wiring;
Forming a base wiring made of a silicon-based conductive film that electrically connects the electrode wiring and the impurity region in the contact hole;
Forming a metal wiring layer on an upper layer of the base wiring so as to be connected to at least the base wiring in the contact hole. A method of manufacturing a semiconductor device according to claim 6,
The step of forming the metal wiring layer includes a step of forming an aluminum thin film by a sputtering method. A method of manufacturing a semiconductor device according to claim 6,
Forming a charge transfer region including the floating diffusion portion on a semiconductor substrate and forming a gate electrode via a gate insulating film;
Forming an opening in an insulating film covering the surface of the semiconductor substrate and exposing at least a part of the floating diffusion portion; and
Forming a silicon-based conductive film on the semiconductor substrate by a CVD method and forming a base wiring;
Forming an aluminum wiring on the base wiring by a sputtering method and patterning,
A solid-state imaging device having a floating diffusion part that accumulates signal charges, and an output circuit that includes a transistor having a gate electrode electrically connected to the floating diffusion part, and that outputs a signal corresponding to a potential change of the floating diffusion part A method of manufacturing a semiconductor device in which a semiconductor device is manufactured.

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