JP2007201793A - Ask (amplitude shift keying) demodulating circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To shorten a time until a dutycycle of a demodulated signal is settled to a reference dutycycle. <P>SOLUTION: While a switch circuit 21 is changed to an averaging circuit 20 side, a comparator 14 compares a signal Sd detected by a detection circuit 15 and an average value Vavg of the averaging circuit 20, and outputs a demodulated signal So. A counter 25 counts clock numbers of N1 and N2 in each interval of H and L of the signal So. A regulator 27 calculates the dutycycle of the signal So based on the clock numbers N1 and N2, and sets a reference instruction value Dr so that the dutycycle approximates to the reference dutycycle (50%). Afterward, the switch circuit 21 is switched to a regulator circuit 26 side, and regulation processing is repeated by a sequential search method or a binary search method. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an ASK demodulation circuit that demodulates a signal encoded by Manchester code and modulated by an ASK method.

Patent Document 1 describes an ASK receiving circuit that receives an input signal encoded by a Manchester code and modulated by the ASK method, detects the input signal by envelope detection, and outputs the input signal. FIG. 6 shows the electrical configuration. In this ASK receiving circuit 1, a logarithmic amplifier 2 envelope-detects an ASK-modulated signal given from an input terminal 3 via a low-pass filter 4, and a comparison circuit 5 compares the detected signal and a reference voltage. A signal demodulated by comparing with the output signal (reference signal Vr1) of the control circuit 6 is output from the output terminal 7. Here, the reference voltage control circuit 6 is an integrating circuit composed of an operational amplifier 6a, a capacitor 6b, and a resistor 6c. The ASK receiving circuit 1 controls the duty ratio of the demodulated output signal to 50% by feedback control by the reference voltage control circuit 6.
JP 2001-211214 A

  In the reference voltage control circuit 6 of the ASK receiving circuit 1, since the capacitor 6b is charged and discharged through the resistor 6c, the time until the duty ratio of the demodulated output signal is stabilized (set) to 50% is long. Become. For example, in road-to-vehicle communication in ETC (Electronic Toll Collection System), communication time for one time is limited, and communication is performed a plurality of times in a short time during which the vehicle passes.

  Therefore, if it is necessary to ensure the long stabilization time at the start of each communication, the time during which actual communication can be performed is shortened, and the data amount of one communication is reduced. In addition, when the distortion of the ASK waveform as defined by the DSRC (Dedicated Short Range Communication) standard is large, the change width of the reference voltage Vr1 becomes large and the settling time becomes longer.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an ASK demodulation circuit capable of shortening the time until the duty ratio of a demodulated signal is set to a reference duty ratio.

  According to the first aspect of the present invention, a signal encoded by Manchester code and ASK-modulated is detected, and the detected signal is compared with a reference voltage to be composed of a first level and a second level. Output the demodulated signal. In this case, the demodulated signal is demodulated by measuring the width of the first period at the first level and the width of the second period at the second level, respectively, and determined by the width of the first period and the width of the second period. The level of the reference voltage is adjusted based on the duty ratio of the received signal and the reference duty ratio.

  According to this configuration, the level of the reference voltage can be set and changed to an arbitrary value for each measurement / adjustment process. Therefore, various search methods for driving the demodulated signal duty ratio to the reference duty ratio can be used. By combining them, it is possible to greatly shorten the time until the duty ratio of the demodulated signal is stabilized (settling). Also, by setting the reference duty ratio to an arbitrary value, not limited to 50%, the duty ratio of the demodulated signal can be adjusted to an arbitrary value.

  According to the means described in claim 2, since the measurement circuit generates a clock and measures the width of the first period and the second period by counting the clock, the frequency of the demodulated signal and the clock The period width can be measured and the duty ratio can be adjusted with a resolution (accuracy) determined from the frequency. Therefore, if the clock frequency is sufficiently higher than the demodulated signal frequency, the demodulated signal can be controlled with high accuracy so that the duty ratio of the demodulated signal becomes equal to the reference duty ratio.

  According to the third aspect of the present invention, the width of the first period and the width of the second period are measured for each 1-bit period (level is inverted at the center of the period) of the encoded signal by Manchester code. . According to this measuring means, the duty ratio of the Manchester code is always set to 50% (or other) not only when the encoded signal data continues as 0 or 1, but also when it changes from 0 to 1 and 1 to 0. Target value).

  According to the means described in claim 4, when there is a deviation between the duty ratio of the demodulated signal and the reference duty ratio, sequential (sequentially) so that the duty ratio of the demodulated signal approaches the reference duty ratio. ) Increase or decrease the reference voltage level by a constant value at predetermined intervals according to the search method. Thereby, when the deviation of the duty ratio is relatively small, the duty ratio of the demodulated signal can be correctly set to the reference duty ratio.

  According to the means described in claim 5, when there is a difference between the duty ratio of the demodulated signal and the reference duty ratio, the detection circuit is configured so that the duty ratio of the demodulated signal approaches the reference duty ratio. The level of the reference voltage is changed every predetermined period in accordance with the binary (binary) search method within the range of the maximum value and the minimum value of the output signal. Thereby, when the deviation of the duty ratio is relatively large, the time until the duty ratio of the demodulated signal is settled can be further shortened.

  According to the means described in claim 6, at the start of the demodulation operation where there is no settling (or during settling) reference voltage, the comparison circuit is initialized with the indefinite reference voltage output from the adjustment circuit. Since the reference voltage is applied, the time until the duty ratio of the demodulated signal is set can be further shortened by setting the initial reference voltage in the vicinity of the final set value.

  According to the means described in claim 7, since the average voltage of the output signal of the detection circuit is used as the initial reference voltage, even if the final set value of the reference voltage is unknown or changes each time. The demodulation operation can be started using the initial reference voltage (the above average voltage) close to the final set value.

(First embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to FIGS.
FIG. 1 shows a configuration of an ASK demodulating circuit that demodulates a signal encoded by Manchester code and modulated by the ASK method. The ASK demodulator circuit 11 is used in an ETC vehicle-mounted device or the like. The ASK demodulator circuit 11 demodulates an ASK-modulated signal Si input to a terminal 12 from a receiver circuit (not shown) and outputs the demodulated signal So from a terminal 13. It has become. FIG. 2 shows the waveforms of (a) ASK-modulated input signal Si, (b) detected signal Sd, and (c) demodulated output signal So. ASK demodulation is described below with reference to these waveforms. The configuration of the circuit 11 will be described.

  A detection circuit 15 provided between the terminal 12 and the inverting input terminal of the comparator 14 (corresponding to the comparison circuit) is a signal Sd (envelope-detected from the ASK-modulated input signal Si (see FIG. 2A)). 2 (see FIG. 2B), and includes a rectifier circuit 16 that performs full-wave rectification or half-wave rectification using an AGC (Automatic Gain Control) amplifier, and an integration circuit 17 that uses a capacitor and a resistor. ing. The rectifier circuit 16 may be configured by a logarithmic amplifier or the like instead of the AGC amplifier. Since an ASK modulated signal in wireless communication has a wide dynamic range, these AGC amplifier and logarithmic amplifier are required.

  An averaging circuit 20 (corresponding to an average value circuit) composed of a series circuit of a resistor 18 and a capacitor 19 is connected between the inverting input terminal of the comparator 14 and the ground. An average value voltage Vavg of the signal Sd is generated at a common connection point between the resistor 18 and the capacitor 19, and this average value voltage Vavg (corresponding to an initial reference voltage) is generated by a switch circuit 21 composed of an analog switch or the like. The reference voltage Vref can be input to the non-inverting input terminal of the comparator 14. An inverter 22 is interposed between the output terminal of the comparator 14 and the output terminal 13 of the ASK demodulator circuit 11.

  The measurement circuit 23 includes an oscillation circuit 24 that generates a clock Ck, and a counter 25 (counter) that counts the clock Ck for each period of H level and L level of the demodulated output signal So (see FIG. 2C). Equivalent to a circuit).

  The adjustment circuit 26 includes a regulator 27 and a D / A converter 28. The adjuster 27 compares or calculates a difference between the duty ratio of the demodulated output signal So determined from the count value of the counter 25 and the reference duty ratio, and a reference command value Dr that is a digital value so as to match both duty ratios. Is output. The D / A converter 28 converts the reference command value Dr into an analog reference voltage Vr, and the reference voltage Vr can be input to the non-inverting input terminal of the comparator 14 as the reference voltage Vref via the switch circuit 21. ing.

Next, the operation of this embodiment will be described with reference to FIGS.
FIG. 3 shows an example of a signal encoded by Manchester code. (A) shows the case of data “1111”, (b) shows the case of data “1010”, and (c) shows the case of data “1100”. Further, T shown in the figure represents the width of one bit period. The signal encoded by the Manchester code is inverted in level at the center of one bit period in the case of a normal 50% duty. In communication using the ASK modulation method, a preamble having a predetermined bit pattern (for example, “1111...” Or “1010...”) Is usually transmitted at the initial stage. Therefore, the ASK demodulation circuit 11 uses the preamble to reference voltage Vref. Is stabilized (settling).

  FIG. 4 is a waveform diagram for explaining the demodulation operation, and shows waveforms of (a) the detected signal Sd, (b) the demodulated output signal So, and (c) the clock Ck. The ASK-modulated signal Si input to the terminal 12 is subjected to envelope detection by the detection circuit 15, and the averaging circuit 20 generates an average value voltage Vavg of the detected signal Sd. When the ASK-modulated signal Si is input to the terminal 12, the ASK demodulation circuit 11 switches the switch circuit 21 to the averaging circuit 20 side prior to the demodulation operation.

  This is necessary in order to normally start the adjustment operation described later in the convergence direction in the early stage of demodulation when the reference voltage Vr output from the adjustment circuit 26 is indefinite. Accordingly, when the reference voltage Vr is released from the indefinite state by the adjustment operation, the ASK demodulation circuit 11 switches the switch circuit 21 to the adjustment circuit 26 side. In the present embodiment, the switching timing at this time is set to the time when a predetermined control cycle (for example, cycle T) has elapsed since the start of the adjustment operation. Instead, the reference voltage Vr is set to a predicted set value. On the other hand, when the voltage falls within a predetermined voltage range, the reference voltage Vr may fall within a predetermined voltage range with respect to the average value voltage Vavg.

Subsequently, the adjustment operation of the reference voltage Vref will be described.
The comparator 14 compares the detected signal Sd with the reference voltage Vref (average voltage Vavg) in a state where the switch circuit 21 is switched to the averaging circuit 20 side, and compares the detected signal Sd with the H level and the L level via the inverter 22. A demodulated signal So consisting of

  The counter 25 counts the number N1 and N2 of the clocks Ck in the first period in which the output signal So is at the H level (first level) and in the second period in which the output signal So is at the L level (second level). And measure the width of the second period. In this case, the frequency of the clock Ck needs to be at least higher than the frequency of the output signal So, and the accuracy of adjusting the duty ratio, which will be described later, can be increased as the ratio between the two frequencies increases.

  In addition, in order to correctly measure the clock numbers N1 and N2 in any of the encoded signals shown in FIGS. 3A to 3C, the first period, for each 1-bit period T of the encoded signal, It is preferable to count the numbers N1 and N2 of the clocks Ck in the second period. According to this counting method, a correct duty ratio corresponding to each bit period can be obtained even when the duty ratio does not become 50% when attention is paid to the H level and the L level as after the preamble is finished. The 1-bit period T may be detected in the preamble period, or may be obtained from a predetermined communication rate.

  The adjuster 27 calculates the duty ratio of the demodulated output signal So based on the clock number N1 in the first period and the clock number N2 in the second period. Since the ideal duty ratio of the signal encoded by the Manchester code is 50%, in the present embodiment, this 50% is set as the reference duty ratio. In the example shown in FIG. 4, when demodulating using the current reference voltage Vref (average voltage Vavg) indicated by a one-point difference line, the clock number N1 is 15, the clock number N2 is 5, and the duty ratio is 15 / (15 + 5 ) × 100 = 75% (> 50%).

  Therefore, the regulator 27 sets a reference command value Dr corresponding to a reference voltage Vr higher than the current reference voltage Vref (average value voltage Vavg) in order to lower the duty ratio. The D / A converter 28 outputs a reference voltage Vr according to the reference command value Dr. Thereafter, the ASK demodulation circuit 11 switches the switch circuit 21 to the adjustment circuit 26 side. Thereafter, the counter 25 continues to count the number of clocks N1 and N2 in the first period and the second period, and the adjustment circuit 26 uses the duty ratio of the demodulated output signal So as a reference duty ratio (50%). The reference command value Dr and thus the reference voltage Vref (reference voltage Vr) are adjusted so as to approach.

  The adjuster 27 performs this adjustment by digital processing using a CPU or the like. This adjustment process uses at least one of a sequential (sequential) search method and a binary (binary) search method. The detected signal Sd is controlled such that the maximum value and the minimum value for each bit period T (control period T) are substantially constant. In the sequential search method, the reference command value Dr, that is, the level of the reference voltage Vref is increased or decreased by a constant value every control cycle T so that the duty ratio of the demodulated output signal So approaches the reference duty ratio (50%). Let This method is effective when the duty ratio shift is relatively small.

  On the other hand, in the binary search method, the reference command value Dr, that is, within the range between the maximum value and the minimum value of the detected signal Sd so that the duty ratio of the demodulated output signal So approaches the reference duty ratio (50%). The level of the reference voltage Vref is changed every control cycle T while the search range is halved. This method is particularly effective when the duty ratio shift is relatively large, and can reduce the settling time required to stabilize the duty ratio of the output signal So to 50%. If the deviation of the duty ratio is relatively large, adjustment may be performed by the binary search method, and switching to the adjustment by the sequential search method may be performed after the deviation of the duty ratio becomes small.

  As described above, the ASK demodulation circuit 11 of the present embodiment includes the detection circuit 15 that performs envelope detection, and the comparator 14 that compares the detected signal Sd and the reference voltage Vref. It is possible to demodulate the signal Si encoded and ASK modulated by. In this case, the measurement circuit 23 measures the width of the first period when the demodulated output signal So is at the H level and the width of the second period when the demodulated output signal So is at the L level, respectively, and the adjustment circuit 26 measures these measurements. The level of the reference voltage Vref is adjusted using at least one of the sequential search method and the binary search method by digital processing so that the duty ratio of the output signal So based on the width approaches the reference duty ratio (50%).

  As a result, the time until the duty ratio of the output signal So is set to the reference duty ratio (50%) can be greatly shortened, and the reference voltage Vref can be reduced during a relatively short preamble period (for example, 16 bits). It can be stabilized to an appropriate level. As a result, even in a system that performs communication a plurality of times within a limited time, such as road-to-vehicle communication in ETC, it is possible to prevent a reduction in the data amount of each communication as much as possible.

  Since the measurement circuit 23 is configured to count the clock Ck generated by the oscillation circuit 24 with the counter 25, by increasing the frequency accuracy of the clock Ck and setting the frequency ratio between the clock Ck and the output signal So sufficiently large, The width of the first period and the width of the second period can be measured with high accuracy. Further, if the number of clocks N1 and N2 in the first period and the second period are counted for each 1-bit period T of the encoded signal, correct measurement can always be performed regardless of the data string.

  At the start of the demodulation operation, the switch circuit 21 is switched to the averaging circuit 20 side, and the average value voltage Vavg of the detected signal Sd is used as the reference voltage Vref. It can be shortened. Even when the amplitude, maximum value, minimum value, etc. of the detected signal Sd vary, the demodulation operation can be started using the reference voltage Vref (average value voltage Vavg) close to the final settling value.

(Second Embodiment)
Next, a second embodiment of the present invention will be described with reference to FIG.
The ASK demodulating circuit 31 shown in FIG. 5 demodulates the signal Si encoded by the Manchester code and modulated by the ASK method so that the two different duty ratios are 50% and 25%, and the demodulated signal SoA, SoB is output to the microcomputers 32 and 33, respectively. The microcomputer 32 is configured to receive a data signal having a duty ratio of 50%, and the microcomputer 33 is configured to be able to receive a data signal having a duty ratio of 25%.

  The demodulating circuit for generating the output signal SoA with the duty ratio of 50% has the same configuration as that in FIG. 1, and the demodulating circuit for the output signal SoB with the duty ratio of 25% has the same configuration as that in FIG. Among these, the detection circuit 15 and the averaging circuit 20 are shared. In FIG. 5, “a” (a demodulator circuit with a duty ratio of 50%) or “b” is added at the end of the code used for the corresponding component in FIG. (A demodulator circuit with a duty ratio of 25%) is shown.

  In this configuration, the adjustment circuit 26b in the demodulation circuit related to the output signal SoB with a duty ratio of 25% performs an adjustment operation with the duty ratio of 25% as a reference. Other operations are the same as those in the first embodiment. As described above, the ASK demodulation circuit 31 can demodulate so as to have an arbitrary duty ratio (50%, 25% in the present embodiment) suitable for the configuration of the microcomputers 32 and 33. Can be achieved, and the degree of freedom in design is improved.

(Other embodiments)
The present invention is not limited to the embodiments described above and shown in the drawings, and can be modified or expanded as follows, for example.
In the first embodiment, switching the switch circuit 21 from the averaging circuit 20 side to the adjustment circuit 26 side is not limited to after the demodulation operation is started and the reference command value Dr is initially set. For example, switching may be performed when the reference command value Dr is repeatedly adjusted a predetermined number of times (2, 3,...).

  The adjustment process of the adjuster 27 is not limited to the sequential search method and the binary search method. For example, the difference between the demodulated output signal So and the reference duty ratio may be calculated, and the reference command value Dr may be changed by a value corresponding to the difference. Further, a table indicating the relationship between the difference and the change amount may be provided, and the reference command value Dr may be changed by referring to the table based on the difference. Furthermore, the adjustment method using this difference and the above-described search method may be used in combination.

As the initial reference voltage, a constant voltage value may be used instead of the average value voltage Vavg. Further, the adjustment circuit 26 may give an initial value to the reference command value Dr. In these cases, the averaging circuit 20 and the switch circuit 21 are not necessary.
Instead of the clock Ck output from the oscillation circuit, an externally supplied clock may be used. In FIG. 5, the oscillation circuits 24a and 24b may be shared.

1 is a configuration diagram of an ASK demodulator circuit showing a first embodiment of the present invention. The figure which shows each waveform of (a) input signal Si, (b) detected signal Sd, (c) demodulated output signal So. The figure which shows the example of the signal encoded by Manchester code | symbol FIG. 6 is a diagram for explaining a demodulation operation, and is a diagram illustrating waveforms of (a) a detected signal Sd, (b) a demodulated output signal So, and (c) a clock Ck. FIG. 1 equivalent diagram showing a second embodiment of the present invention 1 equivalent diagram showing the prior art

Explanation of symbols

  In the drawings, 11 and 31 are ASK demodulation circuits, 14, 14 a and 14 b are comparators (comparison circuits), 15 is a detection circuit, 20 is an averaging circuit (average value circuit), and 21, 21 a and 21 b are switch circuits (switching circuits). , 23, 23a and 23b are measurement circuits, 24, 24a and 24b are oscillation circuits, 25, 25a and 25b are counters (counting circuits), and 26, 26a and 26b are adjustment circuits.

Claims (7)

In an ASK demodulator that demodulates a signal encoded by Manchester code and modulated by the ASK method,
A detection circuit for detecting the ASK modulated signal;
A comparison circuit that compares the output signal of the detection circuit with a reference voltage and outputs a demodulated signal composed of a first level and a second level;
A measurement circuit for measuring a width of a first period in which the demodulated signal is at the first level and a width of a second period at the second level;
An adjustment circuit that adjusts the level of the reference voltage based on the duty ratio of the demodulated signal and the reference duty ratio determined by the width of the first period and the width of the second period measured by the measurement circuit; An ASK demodulating circuit characterized by comprising: The measuring circuit is
An oscillation circuit for generating a clock having a frequency higher than the frequency of the demodulated signal;
2. The ASK demodulating circuit according to claim 1, wherein the ASK demodulating circuit comprises a counting circuit for counting the number of clocks in the first period and the number of clocks in the second period.   3. The ASK demodulation according to claim 1, wherein the measurement circuit measures the width of the first period and the width of the second period for each bit period of the encoded signal by the Manchester code. circuit.   The adjustment circuit increases or decreases the level of the reference voltage by a constant value for each predetermined period according to a sequential search method so that the duty ratio of the demodulated signal approaches the reference duty ratio. The ASK demodulator circuit according to claim 1.   4. The adjustment circuit according to claim 1, wherein the level of the reference voltage is changed every predetermined period according to a binary search method so that a duty ratio of the demodulated signal approaches the reference duty ratio. The ASK demodulation circuit according to any one of the above.   6. A switching circuit for applying an initial reference voltage to the comparison circuit in place of the reference voltage output from the adjustment circuit at the start of a demodulation operation. The ASK demodulator circuit according to 1.   7. The ASK demodulator circuit according to claim 6, further comprising an average value circuit that outputs an average voltage of an output signal of the detection circuit as the initial reference voltage.

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