JP2007194274A - Manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce stress of an electrode itself without limiting a forming method of the electrode. <P>SOLUTION: At least one set of first electrodes 120 of a first semiconductor chip 100 and second electrodes 220 of a second semiconductor chips 200 becomes detection electrodes 132 and 232, which are brought into contact with each other previous to the other electrodes when the semiconductor chips 100 and 200 are brought close in a state where circuit forming faces 110 and 210 are confronted. When the semiconductor chips 100 and 200 are brought close, the contact state of the detection electrodes 132 and 232 is detected, and a relative position of the semiconductor chips 100 and 200 connecting the other electrodes is decided based on the contact state. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor in which a first semiconductor chip and a second semiconductor chip each having a plurality of electrodes formed on a circuit formation surface are heated and melted in a state where the circuit formation surfaces are opposed to each other to connect the electrodes to each other. The present invention relates to a device manufacturing method.

  In recent years, with the downsizing and high functionality of electronic devices, there is an increasing demand for SiP (System-in-Package) technology that integrates a plurality of semiconductor chips in one package at a device level. Among them, CoC (Chip-on-Chip) technology, which is an elemental technology of SiP technology, integrates devices with optimum design parameters for different wafer processes such as CMOS logic and DRAM, and integration in wafer processes such as Si devices and compound semiconductor devices. It is expected as a technology that has the possibility of realizing various performances of devices as well as high speed of devices by electrically connecting element forming surfaces of devices that are difficult to realize with the shortest distance.

  Normally, CoC connection is performed by making the circuit formation surfaces of two chips face each other and aligning the positions of the electrodes provided on each other's circuit formation surfaces. In recent years, as the miniaturization and higher functionality of semiconductor elements have progressed, the number of pins has increased along with the miniaturization of chips, and accordingly, miniaturization of the size of electrodes has been required.

  For example, a method for manufacturing a semiconductor device described in Patent Document 1 has been proposed in order to avoid stress concentration of a bump electrode having a high height, which is caused by variation in formation of the bump electrode, and to reduce damage to a functional element below the bump. Are known. According to this manufacturing method, first, an electrode having a larger area than that in the element region is formed outside the element region of the semiconductor chip. Then, a protruding electrode made of Ni, Cu or the like is formed on the electrode of at least one chip by using an electroless plating method. As a result, a protruding electrode higher than the electrode in the element region is formed on the electrode outside the element region having a large area. Thereafter, a conductive material having a hardness lower than that of the protruding electrode is formed on the protruding electrode inside and outside the element region.

When the chips configured as described above are connected to face each other, the conductive material having low hardness in the electrode outside the element region first contacts and deforms, and then the protruding electrode outside the element region contacts and deforms the electrode. Ends. For the electrodes in the element region, only the conductive material having low hardness on the protruding electrodes is deformed, and the protruding electrodes do not contact each other.
Japanese Patent Laid-Open No. 9-232506

However, in the manufacturing method described in Patent Document 1, a protruding electrode having a relatively high hardness and a large protruding amount has to be formed outside the element region. Therefore, the protruding electrode formation method is limited to electroless plating or the like. It is limited to the method and application of electrolytic plating or the like is difficult.
In addition, since the protruding electrode having a relatively high hardness and a large protruding amount is formed, the structure remains that the stress of the electrode itself is difficult to relax.

  According to the present invention, a first semiconductor chip in which a plurality of first electrodes are formed on a circuit forming surface and a second semiconductor chip in which a plurality of second electrodes are formed on the circuit forming surface are connected to each other. Positioning the respective first electrodes and the respective second electrodes so as to face each other, heating and melting the fusion material forming at least one surface of each of the first electrodes and the respective second electrodes, In connecting each first electrode and each second electrode, the fusion material is formed so as to protrude from at least one of the circuit forming surfaces of the first semiconductor chip and the second semiconductor chip, and each of the first electrodes. For detection, at least one pair of one electrode and each of the second electrodes comes into contact with other electrodes in advance when the first semiconductor chip and the second semiconductor chip are brought close to each other with the circuit forming surfaces facing each other. Electricity to be an electrode Forming an electrode, a chip approaching step in which the first semiconductor chip and the second semiconductor chip are brought close to each other with the circuit formation surface facing each other, and the first semiconductor chip in the chip approaching step And when the second semiconductor chip approaches, a contact state detection step for detecting a contact state between the detection electrodes of the first semiconductor chip and the second semiconductor chip, and a contact state detection step. Based on the contact state between the detection electrodes, a connection position determining step for determining a relative position between the first semiconductor chip and the second semiconductor chip for connecting the other electrodes, and a connection position determining step. And a position control step for controlling the positions of the first semiconductor chip and the second semiconductor chip so as to be the relative positions determined in the above. Method of manufacturing a conductor arrangement is provided.

According to this method for manufacturing a semiconductor device, when the first semiconductor chip and the second semiconductor chip are brought close to each other, the detection electrode comes into contact with the other electrode in advance, and the detection electrodes are in contact with each other. The first semiconductor chip and the second semiconductor chip are stationary. At this time, the other electrodes are separated from each other on the first semiconductor chip side and the second semiconductor chip side, and no load is applied to the electrodes other than the detection electrodes.
Thereafter, by heating each first electrode and each second electrode, the fusing material is melted, and the first semiconductor chip and the second semiconductor chip become accessible to each other. Then, based on the contact state between the detection electrodes, the relative positions of the first semiconductor chip and the second semiconductor chip that connect the other electrodes are determined, and the first semiconductor chip and the second semiconductor are set so as to be the relative positions. The position of the chip is controlled. Then, the fusion material is cooled and hardened while the relative positions of the first semiconductor chip and the second semiconductor chip are constant, and the connection is completed for all the electrodes.

According to the present invention, since the fusion material that is melted by heating protrudes from the circuit formation surface, the electrode formation method is not limited to a limited method such as electroless plating, for example, electrolytic plating or the like. Can be applied. And since the protrusion part of the electrode was formed with the melt | fusion material fuse | melted by heating, the stress which arises in the electrode after the connection of each semiconductor chip can be relieved.
Further, since the detection electrodes are brought into contact with each other in advance and the other electrodes are brought into contact with each other after the fusion material is heated and melted, the load applied to the other electrodes can be reduced. Moreover, since the relative positions of the first semiconductor chip and the second semiconductor chip when connecting other electrodes are determined based on the contact state of the detection electrodes, the connection positions of the other electrodes can be controlled with high accuracy. Can do.

  A preferred embodiment of a semiconductor wafer polishing apparatus according to the present invention will be described in detail with reference to the drawings. In the description of the drawings, the same elements are denoted by the same reference numerals, and redundant description is omitted.

  1 to 4 show a first embodiment of the present invention. FIG. 1 is a schematic cross-sectional view of a first semiconductor chip and a second semiconductor chip before connection, and FIG. 2 is a state where detection electrodes are in contact with each other. FIG. 3 is a schematic cross-sectional view of the first semiconductor chip and the second semiconductor chip, FIG. 3 is a schematic cross-sectional view of the first semiconductor chip and the second semiconductor chip in a state where the fusion material of each electrode is melted, and FIG. It is a schematic cross section of the 1st semiconductor chip and the 2nd semiconductor chip which were positioned in the position. In FIGS. 3 and 4, for the sake of explanation, some of the reference numerals are omitted.

  In this manufacturing method, the first semiconductor chip 100 (see FIG. 1) in which a plurality of first electrodes 120 are formed on the circuit formation surface 110 and the second in which a plurality of second electrodes 220 are formed on the circuit formation surface 210. As shown in FIG. 2, the semiconductor chip 200 (see FIG. 1) is positioned so that the circuit forming surfaces 110 and 210 face each other and the first electrodes 120 and the second electrodes 220 are in contact with each other, as shown in FIG. As shown in FIG. 4, the first electrode 120 and the second electrode 220 are connected to each other by heating and melting the fusion material that forms at least one surface of each first electrode 120 and each second electrode 220. Then, a CoC-connected semiconductor device 300 is manufactured.

  Specifically, as shown in FIG. 1, the first electrode 120 of the circuit formation surface 110 of the first semiconductor chip 100 is formed on the pad electrode portion 122 formed on the circuit formation surface 110 and the pad electrode portion 122. And a barrier metal layer 124 made of, for example, Ni, and a fusion material 126 formed on the barrier metal layer 124 and containing solder as a main component. As the solder of the fusion material 126, for example, a solder containing Sn or Ag is used. The fusion material 126 is generally referred to as a “bump” and has a substantially hemispherical shape in a sectional view as shown in FIG.

  In the present embodiment, the first electrode 120 includes two types of electrodes, that is, a normal electrode 130 for electrical connection with the second semiconductor chip 200 and a detection electrode 132 disposed on the peripheral side of the circuit formation surface 110. The normal electrode 130 has a smaller diameter of the bonding material (bump) 126 and a smaller amount of protrusion from the circuit forming surface 110 than the detection electrode 132. That is, in the electrode formation step, the fusion material 126 is formed so as to protrude from the circuit formation surface 110 of the first semiconductor chip 100, and at least one set of each first electrode 120 and each second electrode 220 is the first. When the semiconductor chip 100 and the second semiconductor chip 200 are brought close to each other with the circuit forming surfaces 110 and 210 facing each other, a detection electrode 132 that comes into contact with other electrodes is formed. The detection electrode 132 is a so-called dummy electrode that physically connects the semiconductor chips 100 and 200 but does not electrically connect them.

  Further, as shown in FIG. 1, the second electrode 220 on the circuit formation surface 210 of the second semiconductor chip 200 is formed on the pad electrode portion 222 formed on the circuit formation surface 210 and the pad electrode portion 222, for example. And a barrier metal layer 224 made of Ni or the like. In the second electrode 220, bumps are not formed as in the first electrode 120, but a surface electrode portion in which, for example, Au or the like is formed on the surface of the barrier metal layer 224 in order to improve the wettability of the solder. 228 is formed.

  In the present embodiment, the second electrode 220 is disposed on the peripheral side of the normal electrode 230 and the circuit forming surface 210 that are electrically connected to the first electrode 120 of the first semiconductor chip 100 and is detected by the first semiconductor chip 100. It consists of two types of electrodes 232 for detection connected to the electrode 132 for electrodes.

  The manufacturing method of the semiconductor device 300 according to the present embodiment includes a chip approach process in addition to the electrode forming process of forming the first electrode 120 and the second electrode 220 of the first semiconductor chip 100 and the second semiconductor chip 200 as described above. And a contact state detection step, a connection position determination step, and a position control step. In the chip forming process, the first semiconductor chip 100 and the second semiconductor chip 200 are brought close to each other with the circuit forming surfaces 110 and 210 facing each other. At this time, the semiconductor chips 100 and 200 are held by a pair of upper and lower heads (not shown) in a state where the first electrodes 120 and the second electrodes 220 are aligned in a plan view. Then, by applying a constant load to each head, the heads are brought relatively close to each other.

  Here, in the above-described electrode forming step, the detection electrode 132 of the first semiconductor chip 100 is formed so that the protruding amount from the circuit forming surface 110 is larger than the normal electrode 130, as shown in FIG. When the first semiconductor chip 100 and the second semiconductor chip 200 are brought close to each other with the circuit forming surfaces 110 and 210 facing each other, the detection electrodes 132 and 232 come into contact with the normal electrodes 130 and 230 in advance. At this time, the contact state between the detection electrodes 132 and 232 of the semiconductor chips 100 and 200 is detected (contact state detection step).

  Specifically, the contact state detection step includes a contact detection step, a load control step, and a melting detection step. The contact detection step is a step of detecting contact between the detection electrodes 132 and 232 of the first semiconductor chip 100 and the second semiconductor chip 200. As described above, since the detection electrodes 132 and 232 are in contact with the normal electrodes 130 and 230 in advance, the semiconductor chips 100 and 200 are stationary (see FIG. 2). In the present embodiment, the contact between the detection electrodes 132 and 232 is detected when the respective heads do not move relatively and the load detected by each head exceeds a predetermined value. As shown in FIG. 2, the normal electrodes 130 and 230 are separated from each other on the first semiconductor chip 100 side and the second semiconductor chip 200 side, and loads are applied to the normal electrodes 130 and 230 other than the detection electrodes 132 and 232. There is no participation.

  In the load control process, after the contact between the detection electrodes 132 and 232 is detected in the contact detection process, the fusion material 126 is heated, and the first semiconductor chip 100 and the second semiconductor chip 200 approach each other. Apply a preset load in the direction of In the present embodiment, a constant load is constantly applied to each head from the chip proximity process, and the load applied to each head in the load control process does not change.

  Thereafter, as shown in FIG. 3, the first electrode 120 and the second electrode 220 are heated to melt the fusion material 126 so that the first semiconductor chip 100 and the second semiconductor chip 200 can approach each other. Become. In the melting detection step, after the load control step, it is detected that the fusion material 126 of the detection electrode 132 has melted and the first semiconductor chip 100 and the second semiconductor chip 200 have started approaching. In the present embodiment, as shown in FIG. 3, the fusion material 126 of the detection electrode 132 is melted and softened, and the fusion material 126 cannot resist the load applied to each head. By detecting that the head has moved from the contact position of each of the detection electrodes 132 and 232 by a certain amount, the melting of the fusion material 126 is detected.

  Then, relative to the first semiconductor chip 100 and the second semiconductor chip 200 that connect the normal electrodes 130 and 230 with reference to the position where the first semiconductor chip 100 and the second semiconductor chip 200 start approaching in the melting detection step. The position is determined (connection position determination step). In the present embodiment, the relative positions of the semiconductor chips 100 and 200 in which the fusion material 126 of the detection electrodes 132 and 232 is melted and the semiconductor chips 100 and 200 that are optimal for connecting the normal electrodes 130 and 230 are connected. The difference from the relative position is calculated in advance. Then, by subtracting this difference from the relative position of each semiconductor chip 100, 200 in which the fusion material 126 of the detection electrodes 132, 232 is melted, each semiconductor chip 100, optimum for connecting the normal electrodes 130, 230 is obtained. 200 relative positions are determined.

  After the relative positions of the semiconductor chips 100 and 200 are thus determined, the positions of the first semiconductor chip 100 and the second semiconductor chip 200 are controlled so as to be the relative positions as shown in FIG. Control process). In this embodiment, the relative movement of the heads is stopped and the circuit forming surfaces 110 of the semiconductor chips 100 and 200 are solidified until the fusion material 126 of the normal electrodes 130 and 230 and the detection electrodes 132 and 232 is solidified. , 210 is maintained. When the fusion material 126 of the normal electrodes 130 and 230 and the detection electrodes 132 and 232 is cooled and hardened, the connection is completed for all the electrodes.

  As described above, according to the present embodiment, the fusion material 126 that connects each first electrode 120 and each second electrode 220 is formed to protrude from the circuit formation surface 110. Therefore, as a method for forming the fusion material 126, for example, Many methods such as electrolytic plating, solder ball transfer, and solder printing can be used. In addition, since the solder used as the fusion material 126 is relatively easy to plastically deform, the first electrode 120 and the second electrode after connection are compared to those formed of Ni, Cu or the like and having a relatively high hardness. The stress generated in 220 can be relaxed.

  In addition, since the detection electrodes 132 and 232 are brought into contact with each other in advance and the fusion material 126 is heated and melted, the normal electrodes 130 and 230 are brought into contact with each other, so that the load applied to the normal electrodes 130 and 230 is increased. Can be reduced. Further, since the relative positions of the first semiconductor chip 100 and the second semiconductor chip 200 when the normal electrodes 130 and 230 are connected are determined based on the contact state of the detection electrodes 132 and 232, the normal electrodes 130 and 230 are determined. Can be accurately controlled.

  Further, by recognizing the moment when the solder is melted as the origin position in the contact state detection step, it is possible to reduce an error due to the influence of the thermal expansion of the apparatus or the like due to heating.

  FIGS. 5 to 8 show a second embodiment of the present invention, FIG. 5 is a schematic cross-sectional view of the first semiconductor chip and the second semiconductor chip before connection, and FIG. 6 is a state in which the detection electrodes are in contact with each other. 7 is a schematic cross-sectional view of the first semiconductor chip and the second semiconductor chip, FIG. 7 is a schematic cross-sectional view of the first semiconductor chip and the second semiconductor chip in a state where the fusion material of each electrode is melted, and FIG. It is a schematic cross section of the 1st semiconductor chip and the 2nd semiconductor chip which were positioned in the position. The second embodiment is different from the first embodiment in that a fusion material is formed on the normal electrode and the detection electrode of the second semiconductor chip.

  As shown in FIG. 5, in this embodiment, in the electrode forming process, the normal electrode 230 and the detection electrode 232 of the second semiconductor chip 200 are fused to the surface of the barrier metal layer 224, for example, from solder. A material (bump) 226 is formed. In the second semiconductor chip 200, similarly to the first semiconductor chip 100, the fusion material 226 of the detection electrode 232 is configured to protrude from the circuit formation surface 210 more than the fusion material 226 of the normal electrode 230. Note that the configuration of the first semiconductor chip 100 is the same as that of the first embodiment, and thus the description thereof is omitted here.

  Also in the present embodiment, as shown in FIG. 6, the first semiconductor chip 100 and the second semiconductor chip 200 are brought close to each other with the circuit forming surfaces 110 and 210 facing each other (chip approaching step). In the electrode formation step, the detection electrodes 132 and 232 of the first semiconductor chip 100 and the second semiconductor chip 200 are formed so that the protruding amount from the circuit formation surfaces 110 and 210 is larger than the normal electrodes 130 and 230. Therefore, when the first semiconductor chip 100 and the second semiconductor chip 200 are brought close to each other with the circuit forming surfaces 110 and 210 facing each other, the detection electrodes 132 and 232 precede the respective normal electrodes 130 and 230. Contact. At this time, the contact state between the detection electrodes 132 and 232 of the semiconductor chips 100 and 200 is detected (contact state detection step). Also in the present embodiment, the contact state detection step includes a contact detection step, a load control step, and a melting detection step.

  Then, the first semiconductor that connects the normal electrodes 130 and 230 with reference to the position (see FIG. 7) where the first semiconductor chip 100 and the second semiconductor chip 200 start approaching in the melting detection step of the contact state detection step. The relative positions of the chip 100 and the second semiconductor chip 200 are determined (connection position determination step). Then, after the relative positions of the semiconductor chips 100 and 200 are determined, as shown in FIG. 8, the positions of the first semiconductor chip 100 and the second semiconductor chip 200 are controlled so as to be the relative positions (position control step). ).

  As described above, in the present embodiment, in addition to the operational effects of the first embodiment, the fusion materials 126 and 226 are formed on both the first electrode 120 and the second electrode 220, so that the detection electrodes 132 and 232 are formed. A large stroke of the relative movement of each of the semiconductor chips 100 and 200 from when they come into contact with each other until the melting of the fusing materials 126 and 226 is detected can be secured. Therefore, high accuracy is not required for the melting detection of the bonding materials 126 and 226, and the configuration of the drive device of each head, the load detection device, and the like can be simplified. In addition, the melting of the bonding materials 126 and 226 can be accurately detected, and there is no connection failure between the semiconductor chips 100 and 200 due to erroneous recognition of melting.

  FIGS. 9 to 12 show a third embodiment of the present invention. FIG. 9 is a schematic cross-sectional view of the first semiconductor chip and the second semiconductor chip before connection, and FIG. 11 is a schematic cross-sectional view of the first semiconductor chip and the second semiconductor chip in a state, FIG. 11 is a schematic cross-sectional view of the first semiconductor chip and the second semiconductor chip in a state where the fusion material of each electrode is melted, and FIG. It is a schematic cross section of the first semiconductor chip and the second semiconductor chip positioned at the connection position. In the third embodiment, the shape of the fusion material is different from that of the second embodiment.

  As shown in FIG. 9, in this embodiment, in the electrode forming process, the normal electrode 230 and the detection electrode 232 of the second semiconductor chip 200 are fused to the surface of the barrier metal layer 224, for example, from solder. The material 226 is formed flat.

  Also in the present embodiment, as shown in FIG. 10, the first semiconductor chip 100 and the second semiconductor chip 200 are brought close to each other with the circuit forming surfaces 110 and 210 facing each other (chip approaching step). Then, the contact state between the detection electrodes 132 and 232 of each semiconductor chip 100 and 200 is detected (contact state detection step).

  Next, the first semiconductor chip 100 and the first semiconductor chip 100 that connect the normal electrodes 130 and 230 with reference to the position (see FIG. 11) where the first semiconductor chip 100 and the second semiconductor chip 200 start approaching in the contact state detection step. 2 The relative position of the semiconductor chip 200 is determined (connection position determination step). Then, after the relative positions of the semiconductor chips 100 and 200 are determined, as shown in FIG. 12, the positions of the first semiconductor chip 100 and the second semiconductor chip 200 are controlled to be the relative positions (position control process). ).

  Also in this embodiment, many methods can be used as a method for forming the fusion materials 126 and 226, and stress generated in each first electrode 120 and each second electrode 220 after connection can be relaxed. Further, the load applied to the normal electrodes 130 and 230 can be reduced, and the connection position of the normal electrodes 130 and 230 can be controlled with high accuracy.

  FIGS. 13 to 16 show a fourth embodiment of the present invention. FIG. 13 is a schematic sectional view of the first semiconductor chip and the second semiconductor chip before connection, and FIG. 15 is a schematic cross-sectional view of the first semiconductor chip and the second semiconductor chip in a state, FIG. 15 is a schematic cross-sectional view of the first semiconductor chip and the second semiconductor chip in a state where the fusion material of each electrode is melted, and FIG. It is a schematic cross section of the first semiconductor chip and the second semiconductor chip positioned at the connection position. The fourth embodiment is different from the third embodiment in that the second electrode of the second semiconductor chip has a metal post.

  As shown in FIG. 13, in the present embodiment, in the electrode forming process, the metal posts 240 that protrude from the circuit forming surfaces 110 and 210 and have a higher melting temperature than the fusion materials 126 and 226 are formed on the second electrodes 220. To do. That is, in the normal electrode 230 and the detection electrode 232 of the second semiconductor chip 200, a metal post 240 made of, for example, Ni, Cu or the like is formed on the pad electrode portion 222, and a melt made of solder or the like is formed on the surface of the metal post 240. A dressing 226 is formed. The fusion material 226 is formed flat on the surface of the metal post 240.

  Also in this embodiment, as shown in FIG. 14, the first semiconductor chip 100 and the second semiconductor chip 200 are brought close to each other with the circuit formation surfaces 110 and 210 facing each other (chip approaching step). Then, the contact state between the detection electrodes 132 and 232 of each semiconductor chip 100 and 200 is detected (contact state detection step).

  Next, the first semiconductor chip 100 and the first semiconductor chip 100 that connect the normal electrodes 130 and 230 with reference to the position (see FIG. 15) where the first semiconductor chip 100 and the second semiconductor chip 200 start approaching in the contact state detection step. 2 The relative position of the semiconductor chip 200 is determined (connection position determination step). Then, after the relative positions of the semiconductor chips 100 and 200 are determined, as shown in FIG. 16, the positions of the first semiconductor chip 100 and the second semiconductor chip 200 are controlled so as to be the relative positions (position control step). ).

  In the present embodiment, in addition to the operational effects of the third embodiment, each second electrode 220 includes a metal post 240, so that the distance between the circuit forming surfaces 110 and 210 of each semiconductor chip 100 and 200 after connection is reached. Can be secured greatly. Thereby, it is easy to inject an underfill between the semiconductor chips 100 and 200, and the workability of the post-process when manufacturing the semiconductor device 300 is improved.

  FIGS. 17 to 20 show a fifth embodiment of the present invention. FIG. 17 is a schematic cross-sectional view of the first semiconductor chip and the second semiconductor chip before connection, and FIG. 18 shows the detection electrodes in contact with each other. 19 is a schematic cross-sectional view of the first semiconductor chip and the second semiconductor chip in a state, FIG. 19 is a schematic cross-sectional view of the first semiconductor chip and the second semiconductor chip in a state where the fusion material of each electrode is melted, and FIG. It is a schematic cross section of the first semiconductor chip and the second semiconductor chip positioned at the connection position. The fifth embodiment is different from the first embodiment in that the fusing material is formed not on the upper first semiconductor chip but on the lower second semiconductor chip.

  As shown in FIG. 17, in the present embodiment, the first electrode 120 on the circuit formation surface 110 of the first semiconductor chip 100 includes the pad electrode portion 122 formed on the circuit formation surface 110 and the pad electrode portion 122. And a barrier metal layer 124 made of, for example, Ni. In the present embodiment, the first electrode 120 is not formed with bumps as in the first embodiment. For example, Au or the like is used on the surface of the barrier metal layer 124 to improve the wettability of the solder. The formed surface electrode portion 128 is formed.

  On the other hand, the second electrode 220 on the circuit formation surface 210 of the second semiconductor chip 200 includes a pad electrode portion 222 formed on the circuit formation surface 210 and a barrier metal layer formed on the pad electrode portion 222 and made of, for example, Ni. 224 and a fusion material 226 formed on the barrier metal layer 224 and containing solder as a main component. The fusing material 226 is generally referred to as “bump” and has a substantially hemispherical shape in a sectional view as shown in FIG.

  Also in the present embodiment, as shown in FIG. 18, the first semiconductor chip 100 and the second semiconductor chip 200 are brought close to each other with the circuit formation surfaces 110 and 210 facing each other (chip approaching step). Then, the contact state between the detection electrodes 132 and 232 of each semiconductor chip 100 and 200 is detected (contact state detection step).

  Next, the first semiconductor chip 100 and the first semiconductor chip 100 that connect the normal electrodes 130 and 230 with reference to the position (see FIG. 19) where the first semiconductor chip 100 and the second semiconductor chip 200 start approaching in the contact state detection step. 2 The relative position of the semiconductor chip 200 is determined (connection position determination step). Then, after the relative positions of the semiconductor chips 100 and 200 are determined, as shown in FIG. 20, the positions of the first semiconductor chip 100 and the second semiconductor chip 200 are controlled so as to be the relative positions (position control step). ).

  In the present embodiment, in addition to the effects of the first embodiment, the upper first semiconductor chip 100 has no fusion material, so the head of the upper first semiconductor chip 100 is constantly heated at a high temperature. However, it is possible to prevent the bumps from being crushed when the first semiconductor chip 100 is transferred to the tool. Therefore, the heating / cooling time of the upper head can be shortened, and the CoC connection time can be greatly shortened.

  In each of the above embodiments, the fuses 126 and 226 are made of solder, but may be made of other materials. Even if the fusing materials 126 and 226 are materials other than solder, as long as they are melted by heating, the stress generated after cooling can be relaxed.

  In each of the above embodiments, the connection position of the normal electrodes 130 and 230 is determined based on the position where the detection electrodes 132 and 232 are melted. However, the position where the detection electrodes 132 and 232 are in contact with each other is shown. Of course, the connection position of the normal electrodes 130 and 230 may be determined as a reference.

  In the above embodiments, the detection electrodes 132 and 232 are dummy electrodes, but the semiconductor chips 100 and 200 may be electrically connected. Further, the arrangement of the normal electrodes 130 and 230 and the detection electrodes 132 and 232 is arbitrary, and it is needless to say that the specific detailed structure and the like can be appropriately changed.

It is a schematic cross section of the 1st semiconductor chip and the 2nd semiconductor chip before the connection which show the 1st embodiment of the present invention. It is a schematic cross section of the 1st semiconductor chip and the 2nd semiconductor chip in the state where the detection electrode which shows a 1st embodiment of the present invention contacted. It is a schematic cross section of the 1st semiconductor chip and the 2nd semiconductor chip in the state where the fusion material of each electrode showing the 1st embodiment of the present invention was melted. It is a schematic cross section of the 1st semiconductor chip and the 2nd semiconductor chip which were positioned in the connection position of the usual electrode which shows the 1st embodiment of the present invention. It is a schematic cross section of the 1st semiconductor chip and the 2nd semiconductor chip before the connection which show the 2nd Embodiment of this invention. It is a schematic cross section of the 1st semiconductor chip and the 2nd semiconductor chip in the state where the electrode for detection showing the 2nd embodiment of the present invention contacted. It is a schematic cross section of the 1st semiconductor chip and the 2nd semiconductor chip in the state where the fusion material of each electrode showing the 2nd embodiment of the present invention was melted. It is a schematic cross section of the 1st semiconductor chip and the 2nd semiconductor chip which were positioned in the connection position of the usual electrode which shows the 2nd embodiment of the present invention. It is a schematic cross section of the 1st semiconductor chip and the 2nd semiconductor chip before the connection which shows the 3rd Embodiment of this invention. It is a schematic cross section of the 1st semiconductor chip and the 2nd semiconductor chip in the state where the detection electrode which shows a 3rd embodiment of the present invention contacted. It is a schematic cross section of the 1st semiconductor chip and the 2nd semiconductor chip in the state where the fusion material of each electrode showing the 3rd embodiment of the present invention was melted. It is a schematic cross section of the 1st semiconductor chip and the 2nd semiconductor chip which were positioned in the connection position of the usual electrode which shows the 3rd embodiment of the present invention. It is a schematic cross section of the 1st semiconductor chip and the 2nd semiconductor chip before the connection which shows the 4th Embodiment of this invention. It is a schematic cross section of the 1st semiconductor chip and the 2nd semiconductor chip in the state where the electrode for detection showing the 4th embodiment of the present invention contacted. It is a schematic cross section of the 1st semiconductor chip and the 2nd semiconductor chip in the state where the fusion material of each electrode showing the 4th embodiment of the present invention was melted. It is a schematic cross section of the 1st semiconductor chip and the 2nd semiconductor chip which were positioned in the connection position of the usual electrode which shows the 4th embodiment of the present invention. It is a schematic cross section of the 1st semiconductor chip and the 2nd semiconductor chip before the connection which shows the 5th Embodiment of this invention. It is a schematic cross section of the 1st semiconductor chip and the 2nd semiconductor chip in the state where the detection electrode which shows a 5th embodiment of the present invention contacted. It is a schematic cross section of the 1st semiconductor chip and the 2nd semiconductor chip in the state where the fusion material of each electrode showing the 5th embodiment of the present invention was melted. It is a schematic cross section of the 1st semiconductor chip and the 2nd semiconductor chip which were positioned in the connection position of the usual electrode which shows the 5th embodiment of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Semiconductor chip 110 Circuit formation surface 120 1st electrode 122 Pad electrode part 124 Barrier metal layer 126 Fusion material 128 Surface electrode part 130 Normal electrode 132 Detection electrode 200 Semiconductor chip 210 Circuit formation surface 220 2nd electrode 222 Pad electrode part 224 Barrier metal layer 226 Fusion material 228 Surface electrode part 230 Normal electrode 232 Detection electrode 240 Metal post 300 Semiconductor device

Claims (4)

A first semiconductor chip having a plurality of first electrodes formed on a circuit formation surface and a second semiconductor chip having a plurality of second electrodes formed on the circuit formation surface are opposed to each other with the circuit formation surfaces facing each other. Positioning so that one electrode and each said 2nd electrode contact, heating the fusion material which makes at least one surface of each said 1st electrode and each said 2nd electrode, and melting each said 1st electrode and said In connecting each second electrode,
The fusion material is formed so as to protrude from the circuit forming surface of at least one of the first semiconductor chip and the second semiconductor chip, and at least one set of the first electrode and the second electrode is the An electrode forming step of forming an electrode to be a detection electrode that comes into contact with the other electrode in advance when the first semiconductor chip and the second semiconductor chip are brought close to each other with the circuit formation surfaces facing each other;
A chip approaching step of bringing the first semiconductor chip and the second semiconductor chip close to each other with the circuit formation surface facing each other;
A contact state detection step of detecting a contact state between the detection electrodes of the first semiconductor chip and the second semiconductor chip when the first semiconductor chip and the second semiconductor chip approach in the chip approach step. When,
Connection position determination for determining the relative positions of the first semiconductor chip and the second semiconductor chip that connect the other electrodes based on the contact state of the detection electrodes detected in the contact state detection step. Process,
A position control step of controlling the positions of the first semiconductor chip and the second semiconductor chip so as to be the relative positions determined in the connection position determination step. The contact state detection step includes
A contact detection step of detecting contact between the detection electrodes of the first semiconductor chip and the second semiconductor chip;
After the contact between the detection electrodes is detected in the contact detection step, the load is set in advance in a direction in which the fusion material is heated and approaches the first semiconductor chip and the second semiconductor chip. A load control process for applying
After the load control step, a melting detection step of detecting that the fusion material of the detection electrode is melted and the first semiconductor chip and the second semiconductor chip start approaching, and
In the connection position determination step, the first semiconductor chip and the first semiconductor chip that connect the other electrodes to each other on the basis of the position where the first semiconductor chip and the second semiconductor chip start approaching in the melting detection step. 2. The method of manufacturing a semiconductor device according to claim 1, wherein a relative position of the two semiconductor chips is determined.   3. The method of manufacturing a semiconductor device according to claim 1, wherein, in the electrode forming step, the fusion material is disposed on a surface of each of the first electrodes and each of the second electrodes. In the electrode forming step, a metal post protruding from the circuit forming surface and having a higher melting temperature than the fusion material is formed on at least one of the first electrode and the second electrode. Item 4. The method for manufacturing a semiconductor device according to any one of Items 1 to 3.

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