JP2007193366A - Liquid crystal display device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce a parasitic capacity between Cs wiring line (a storage capacitor electrode line) and a source wiring line which constitute a pixel part, to obtain characteristics of low cross-talk and to increase a numerical aperture to increase luminance of an LCD. <P>SOLUTION: The numerical aperture is enhanced by disposing the Cs wiring line on the source wiring line so as to cover the source wiring line, disposing and forming a pixel electrode on the Cs wiring line so as to partially overlap the Cs wiring line and shortening the distance between the source wiring line and the pixel electrode. The parasitic capacity generated between the source wiring line and the pixel electrode is reduced and storage capacity is secured by forming a structure wherein the source wiring line, the Cs wiring line and the pixel electrode are sequentially layered. Low resistance and enhancement of redundancy of the Cs wiring line are attained by disposing a Cs wiring line in a gate wiring line direction without disposing the Cs wiring line on the gate wiring line to form a mesh-shaped Cs wiring lines together with the Cs wiring line disposed on the source wiring line. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a liquid crystal display device having a thin film transistor array substrate and a manufacturing method thereof, which are used in a matrix display device.

The matrix type display device normally constitutes a thin film transistor array substrate (hereinafter referred to as TFT array substrate) provided with a thin film transistor (hereinafter referred to as TFT) and a counter substrate provided with a color filter, a black matrix and the like. A display material such as liquid crystal is sandwiched between two substrates, and a voltage is selectively applied to the display material.
In the TFT array substrate, pixels are arranged in a matrix as shown in the equivalent circuit of FIG.

In FIG. 10, G1, G2, and G3 are scanning signal lines (hereinafter referred to as gate wirings), S1, S2, and S3 are video signal lines (hereinafter referred to as source wirings) Cs1, Cs2, and Cs3 are storage capacitor formations. A storage capacitor electrode line (hereinafter referred to as Cs wiring) is shown.
In addition, reference numerals 1a to 1i denote TFTs that control charge / discharge of charges to and from the pixel electrodes using the TFTs as switching elements. Reference numerals 2a to 2i denote storage capacitors (hereinafter referred to as Cs capacitors), which are formed by forming an insulating film between the pixel electrode and the Cs wiring. The pixel electrode is formed of a transparent electrode such as ITO, and a liquid crystal capacitor Clc indicated by reference numerals 3a to 3i is formed by sandwiching a liquid crystal with the counter electrode. Further, reference numerals 4a to 4i are parasitic capacitances Cdp formed parasitically between the source wiring and the pixel electrode. The TFT is turned on and off using the scanning signal line as a gate electrode.

  The pixel electrode is connected to the source wiring through the TFT, and the amount of charge charged in the pixel electrode changes depending on the signal level of the source wiring, and the potential of the pixel electrode is set. Depending on the voltage between the pixel electrode and the counter electrode, the amount of displacement of the liquid crystal changes and the amount of transmitted light from the back surface changes. Therefore, by controlling the signal level of the source wiring, an optical signal change is suppressed and the image is displayed as an image.

  In order to improve the quality of the video, it is necessary to minimize the fluctuation of the pixel potential due to the change in the signal level of the gate wiring and the like, and the Cs capacitors 2a to 2i are provided in the pixel electrodes to increase the total capacity of the pixels. Yes. The Cs capacitors 2a to 2i are formed by providing an insulating film between the Cs wirings Cs1 to Cs3 having the same potential as the counter electrode and the pixel electrode.

  Next, FIG. 11 shows a pixel layout in a conventional TFT array substrate. FIG. 12 shows a cross-sectional view of the area indicated by AA in FIG. 11 when viewed from the direction of the arrow. Further, with reference to FIGS. 13 and 14, a conventional method for forming a pixel portion will be described by taking a cross-sectional view of an AA region as an example.

In FIG. 11, reference numeral 102 denotes a gate wiring, 104 denotes a semiconductor thin film, 107 denotes a source wiring, 108 denotes a source electrode, 109 denotes a drain electrode, 111 denotes a Cs wiring, and 114 denotes a pixel electrode.
In FIG. 12, 101 is a glass substrate, 103 is a gate insulating film, 105 is an i layer (a semiconductor layer made of non-doped amorphous silicon, etc.), and 106 is an n layer (for example, an amorphous layer containing n-type impurities). Reference numeral 113 denotes an insulating film, and the same reference numerals as those already used for the description indicate the same or corresponding parts.

Next, a manufacturing process of the matrix type display device having the cross-sectional structure shown in FIG. 12 will be described with reference to FIGS.
First, as shown in FIG. 13A, a metal film 102a to be the gate electrode 102 is formed on the glass substrate 101, and a resist pattern having a planar shape corresponding to the gate electrode 102 as shown in FIG. 13B. 110a is formed and the metal film 102a is etched using this as an etching mask to obtain the gate electrode 102, and then the resist pattern 110a is removed.

  Next, as shown in FIG. 13C, the gate insulating film 103, the i layer 105, and the n layer 106 are sequentially stacked, and on the region where the i layer 105 and the n layer 106 are left as shown in FIG. A resist pattern 110b is formed on the n-layer 106 and the i-layer 105 are sequentially etched using the resist pattern 110b as an etching mask to remove the resist pattern 110b.

  Thereafter, as shown in FIG. 13E, an ITO thin film 114a to be the pixel electrode 114 is laminated, and as shown in FIG. 14A, a resist pattern 110c patterned into a shape corresponding to the pixel electrode 114 is etched. The ITO thin film 114a is etched to obtain the pixel electrode 114, and then the resist pattern 110c is removed.

  Next, as shown in FIG. 14B, a metal film 112a to be the source wiring 107, the source electrode 108, and the drain electrode 109 is laminated, and as shown in FIG. 14C, the source wiring 107 and the source electrode 108 are stacked. Then, a resist pattern 110d corresponding to a region necessary for the drain electrode 109 is patterned, and the metal film 112a is etched using the resist pattern 110d as an etching mask, and a part of the n layer 106 and the i layer 105 is also selectively etched. Thereafter, the resist pattern 110d is removed, and an insulating film 113 is formed, whereby a conventional matrix display device having the cross-sectional structure shown in FIG. 12 can be obtained.

Next, the structure and function of a conventional TFT will be described using an example. In FIG. 12 already used for explanation, when the pixel electrode 114 is charged, a voltage of about 9 V is applied to the source electrode 108, and a positive voltage of about 20 V is applied to the gate electrode 102, so that the TFT Becomes ON, and the drain electrode 109 and the pixel electrode 114 are charged to near 9V.
After that, when the potential of the pixel electrode 114 is sufficiently increased, a negative voltage of about −5 V is applied to the gate electrode 102 to turn off the TFT and confine the charge in the pixel.

In the conventional pixel structure, as described above, the pixel electrode 114 is connected to the source wiring 107 via the TFT, and the potential of the pixel electrode 114 is set depending on the signal level of the source wiring 107. The amount of displacement of the liquid crystal changes according to the voltage between the pixel electrode 114 and the counter electrode, and the amount of transmitted light from the back surface changes.
Therefore, by controlling the signal level of the source wiring 107, the optical signal change is controlled and displayed as an image.

The maximum brightness of the liquid crystal display device is determined by the light transmittance of the pixel, and the transmittance increases as the area of the light transmitting portion, that is, the area of the opening in the pixel increases. In order to obtain a high-brightness liquid crystal display device, it is necessary to increase the area of the opening (hereinafter referred to as the aperture ratio) in the area of the entire pixel.
One method for increasing the aperture ratio is to reduce the distance between the pixel electrode 114 and the source wiring 107 in FIG. However, when the distance between the pixel electrode 114 and the source wiring 107 is reduced, the parasitic capacitance Cdp generated between the source wiring 107 and the pixel electrode 114 in FIG. 10 increases.

  Normally, when the source signal changes, the pixel potential changes via the parasitic capacitance Cdp. The amount of change in the pixel potential increases as the parasitic capacitance Cdp increases and the amount of change in the source signal increases. When the parasitic capacitance Cdp increases, the problem of crosstalk occurs. This crosstalk will be described with reference to FIG. 10. The amplitude of the source signal is increased only when writing to the pixel (liquid crystal capacitor 3a), and the source signal is written when writing to other pixels (liquid crystal capacitors 3b to 3i). When the amplitude is reduced, the potential of the pixel having the liquid crystal capacitors 3d and 3g on the source line S1 varies depending on the large source signal amplitude when data is written to the pixel having the liquid crystal capacitor 3a, and the adjacent liquid crystal capacitors 3e and 3h. This is a phenomenon in which the pixel potential is different from that of the pixel having the.

  Due to this crosstalk, except for the pixel having the liquid crystal capacitance 3a, a difference in luminance occurs between the pixel on the source line S1 and the pixels on S2 and S3, which should have the same luminance with the same display data. . That is, when the distance between the pixel electrode 114 and the source line 107 is reduced, crosstalk occurs. Therefore, the distance between the pixel electrode and the source line needs to be a certain value or more, which increases the aperture ratio of the liquid crystal display device. There was a problem that it was not possible.

  Further, there is Patent Document 1 as one of documents showing conventional techniques. This document shows a liquid crystal display device having a structure in which a wiring corresponding to a Cs wiring and a pixel electrode partially overlap each other.

JP-A-3-288824

As described above, in the conventional pixel structure in the TFT array substrate, the parasitic capacitance Cdp increases and crosstalk occurs when the distance between the pixel electrode and the source wiring is reduced in order to improve the aperture ratio. There was a general problem.
The present invention has been made to solve the above-described problems. By disposing the pixel electrode on the source wiring via the Cs wiring, the parasitic capacitance Cdp is hardly increased, the crosstalk is small, and the display quality is improved. The TFT-LCD (LCD is an abbreviation for a liquid crystal display device) is a problem to be solved, and the pixel electrode is formed on the source wiring through the Cs wiring. An object of the present invention is to realize a TFT-LCD having a high aperture ratio and high luminance.

  The liquid crystal display device according to the present invention is provided at a plurality of gate wirings arranged at regular intervals on an insulating substrate, a plurality of source wirings crossing the gate wirings, and at an intersection of the gate wirings and the source wirings. A matrix type display device having a pixel electrode connected to a drain electrode constituting the thin film transistor and a storage capacitor electrode line that forms a storage capacitor by sandwiching an insulating film between the pixel electrode In the thin film transistor array substrate, the drain electrode has an extending portion extending in the arrangement direction of the gate wiring, and the storage capacitor electrode line formed on the source wiring with an insulating film interposed therebetween A mesh connected to the storage capacitor electrode lines of adjacent pixels on the upper, lower, left, and right sides having wiring and wiring components in the arrangement direction of the gate wiring. The wiring component in the arrangement direction of the source wiring is arranged wider than the source wiring so as to cover the source wiring, and the wiring component in the arrangement direction of the gate wiring The pixel electrode is arranged so as not to be covered, and is surrounded and formed so as to partially overlap the extended portion of the drain electrode and the upper layer of the storage capacitor electrode line.

  In addition, the liquid crystal display device according to the present invention includes a plurality of gate wirings arranged at a predetermined interval on an insulating substrate, a plurality of source wirings crossing the gate wirings, and an intersection of the gate wirings and the source wirings. A matrix type display device including a thin film transistor provided, a pixel electrode connected to a drain electrode constituting the thin film transistor, and a storage capacitor electrode line that forms a storage capacitor by sandwiching an insulating film between the pixel electrode In the thin film transistor array substrate, the drain electrode has an extending portion extending in the arrangement direction of the gate wiring, and the storage capacitor electrode line formed on the source wiring with an insulating film interposed therebetween It is arranged to extend in one direction along the wiring arrangement direction, and is wider than the source wiring so as to cover the source wiring Formed and arranged, around the pixel electrodes, the gate lines, those which are arranged to be surrounded by such a part is superimposed formed above the extending portion and the storage capacitor electrode line of the drain electrode.

  Furthermore, the manufacturing method of the liquid crystal display device according to the present invention is the manufacturing method of the liquid crystal display device according to any one of claims 1 to 4, wherein the source wiring and the drain electrode, the storage capacitor electrode line, the pixel It includes a step of forming electrodes in order and arranging them so as to partially overlap each other.

  According to the liquid crystal display device of the present invention, the pixel structure of the liquid crystal display device is arranged so that the wider Cs wiring is overlapped so as to cover the source wiring, and a part thereof is further overlapped on the Cs wiring. By arranging the pixel electrode in this manner, it is possible to reduce the parasitic capacitance between the source wiring and the pixel electrode and improve the crosstalk. In addition, when the planar structure is viewed, the distance between the pixel electrode and the source wiring can be reduced by overlapping each other, and the aperture ratio can be increased, so that the luminance of the LCD can be improved. Furthermore, by forming the Cs wiring in a mesh shape (ring shape when viewed within one pixel), the wiring resistance of the Cs wiring can be suppressed to a low level, so that a liquid crystal display device resistant to crosstalk can be obtained. It is.

  According to the liquid crystal display device of the present invention, the Cs wiring extends in one direction along the source wiring in the pixel, and is superimposed on a part of the Cs wiring and further on a part of the gate wiring. Thus, by arranging and forming the pixel electrodes so as to occupy a wider area, a high aperture ratio can be obtained, and the luminance of the liquid crystal display device can be increased.

  Furthermore, according to the method for manufacturing a liquid crystal display device of the present invention, a liquid crystal display device having the above-described effects can be manufactured.

Embodiment 1 FIG.
Embodiment 1 of the present invention will be described.
The feature of the present invention lies in the structure of the pixel portion of the TFT array substrate, and different points from the prior art will be described below with reference to the drawings.
In the liquid crystal display device according to the present invention, the Cs wiring is formed in an upper layer so as to cover the source wiring, and further, a pixel electrode is disposed and formed so as to partially overlap the upper layer.
Note that the configuration of the basic liquid crystal display device is the same as the conventional one.

  1 is a plan view of a liquid crystal display device according to Embodiment 1 of the present invention. In this figure, reference numeral 2 is a gate wiring, 4 is a semiconductor thin film constituting a TFT, 7 is a source wiring, and 8 is a source electrode. , 9 is a drain electrode, 11 is a Cs wiring, 14 is a pixel electrode, and 13 is a contact for electrically connecting the pixel electrode 14 and the drain electrode 9. In FIG. 1, the Cs wiring 11 is disposed on the source wiring 7 formed so as to extend in the vertical direction via an insulating film, and the source wiring 7 is covered with the Cs wiring 11. . Furthermore, a part of the pixel electrode 14 is disposed on the Cs wiring 11 so as to overlap with the source wiring 7 via an insulating film. As shown in FIG. 1, the drain electrode 9 has an extending portion extending in the arrangement direction of the gate wiring 2, and a part of the periphery of the pixel electrode 14 is on the extending portion of the drain electrode 9. Is superimposed.

Next, a method for manufacturing the pixel portion having the structure shown in FIG. 1 will be described with reference to FIGS.
First, as shown in FIG. 2, a gate wiring 2 is formed on a glass substrate (not shown). Thereafter, after forming a gate insulating film (not shown) on the gate wiring 2, as shown in FIG. 3, the semiconductor thin film 4 constituting the TFT serves as a gate electrode on the gate wiring 2 by patterning. Place on the area. The semiconductor thin film 4 is a multilayer film in which an i layer (reference numeral 5 is shown in FIG. 8B) and an n layer (reference numeral 6 is shown in FIG. 8B) are sequentially laminated. And

  Thereafter, as shown in FIG. 4, a source wiring 7, a source electrode 8, and a drain electrode 9 are formed. The source wiring 7 is disposed in a direction extending in a direction orthogonal to the extending direction of the gate wiring 2, and the source electrode 8 is electrically connected to the source wiring 7 and is disposed on the semiconductor thin film 4 on the gate wiring 2. The Further, the drain electrode 9 is disposed so as to face the source electrode 8 through a region where a part thereof becomes a channel of the semiconductor thin film 4. During this etching, the n layer constituting the semiconductor thin film 4 is also patterned, and the i layer remains without being etched.

Next, after forming the source insulating film, as shown in FIG. 5, the Cs wiring 11 having the wiring component in the arrangement direction of the source wiring 7 and the wiring component in the direction of the gate wiring 2 is patterned so as to cover the source wiring 7. To form.
Thereafter, after a Cs insulating film is formed on the Cs wiring 11, a contact 13 is formed on the drain electrode 9, as shown in FIG.

Further, as shown in FIG. 7, the pixel electrode 14 is formed so as to overlap with at least a part of the directional component of the Cs wiring 11 and at least the source wiring 2, and the storage capacitor is provided between the Cs wiring 11 and the pixel electrode 14. The structure has Cs.
Here, the Cs wiring 11 is formed wider than the source wiring 7 so as to reduce the parasitic capacitance Cdp generated between the source wiring 2 and the pixel electrode 14.

8A and 8B are cross-sectional configuration diagrams of the AA region and the BB region in FIG. In this figure, reference numeral 3 is a gate insulating film formed on the gate wiring 2, 5 and 6 are i layers constituting the semiconductor thin film 4 of the TFT, and n layer 10 is formed on the source wiring 7. A source insulating film 12 indicates a Cs insulating film formed on the Cs wiring 11, and the same reference numerals as those already used for the description indicate the same or corresponding parts.
As can be seen from these drawings, a wider Cs wiring 11 is disposed and formed on the source wiring 7 so as to cover the source wiring 7, and a part of the Cs wiring 11 overlaps the Cs wiring 11. In addition, the pixel electrode 14 is arranged and formed.

  As described above, according to the TFT in the TFT array substrate according to the first embodiment of the present invention, the Cs wiring 11 is formed on the source wiring 2 via the source insulating film 10, and the Cs wiring 11 is further formed on the Cs wiring 11. Since the pixel electrode 14 is formed through the insulating film 12, the distance between the source wiring 7 and the pixel electrode 14 can be reduced and the aperture ratio can be increased, so that the brightness of the LCD can be increased.

  In the pixel portion of the conventional liquid crystal display device, there is a problem that the Cs wiring is disposed below the source wiring, the parasitic capacitance between the source wiring and the pixel electrode is large, and the crosstalk increases. Since the Cs wiring 11 is formed so as to cover the source wiring 7 on the upper part, and the pixel electrode 14 is formed on the upper part of the Cs wiring 11, the parasitic capacitance Cdp between the source wiring 7 and the pixel electrode 14 can be reduced. Talk can be improved.

  Further, since the conventional Cs wiring is arranged in parallel with the gate wiring and the adjacent Cs wiring is connected at the end of the panel, an attempt is made to improve the aperture ratio by reducing the width of the electrode. As a result, the wiring resistance of the Cs wiring increases, causing an increase in crosstalk. However, by adopting the pixel structure shown in the first embodiment, that is, the Cs wiring 11 in the pixel has a ring shape (the Cs wiring 11 has a mesh shape when the entire panel is viewed), and adjacent pixels. By making a connection with the upper Cs wiring, the Cs wiring resistance can be reduced by two or more digits. Therefore, a liquid crystal display device that is resistant to crosstalk can be obtained.

Embodiment 2. FIG.
Next, a second embodiment of the present invention will be described.
The manufacturing method of the pixel portion shown in the first embodiment and the manufacturing method of the second embodiment are the same up to the step before the Cs wiring 11a is formed.
As shown in FIG. 9, the Cs wiring 11a does not form a wiring portion parallel to the gate wiring 2 in the pixel, and a part of the pixel electrode 14a is overlapped on the adjacent gate wiring 2, and the source wiring 7 and It is arranged and formed above the adjacent source wiring 7 via a source insulating film. Unlike the first embodiment, the Cs wiring 11a is not formed in a ring shape, but is arranged in the horizontal direction in order to arrange the Cs wiring 11a along the vertical direction (direction shorter than the horizontal direction). The wiring resistance can be suppressed smaller than the case.

By forming the pixel electrode 14a as shown in FIG. 9, the distance between the source wiring 7 and the pixel electrode 14a can be reduced and the aperture ratio can be increased, so that the brightness of the LCD can be increased. is there.
Similarly to the first embodiment, since the Cs wiring 11a is disposed between the source wiring 7 and the pixel electrode 14a so as to cover the source wiring 7, the parasitic capacitance Cdp can be reduced. Needless to say, crosstalk can be improved.

  As described above, according to the present invention, the pixel structure of the liquid crystal display device is arranged so that a wider Cs wiring is overlapped in a state covering the source wiring, and a part of the pixel structure is further formed on the Cs wiring. By arranging the pixel electrodes so as to overlap, parasitic capacitance between the source wiring and the pixel electrode can be reduced and crosstalk can be improved. In addition, when the planar structure is viewed, the distance between the pixel electrode and the source wiring can be reduced by overlapping each other, and the aperture ratio can be increased, so that the luminance of the LCD can be improved.

  Furthermore, by forming the Cs wiring in a mesh shape (ring shape when viewed within one pixel), the wiring resistance of the Cs wiring can be suppressed to a low level, so that a liquid crystal display device resistant to crosstalk can be obtained. It is.

 Further, in the pixel, the Cs wiring extends in one direction along the source wiring, and the pixel electrode is arranged in a wider area so as to overlap with part of the Cs wiring and further overlap with part of the gate wiring. Therefore, a high aperture ratio can be obtained and the luminance of the liquid crystal display device can be increased.

It is a top view of the liquid crystal display device of Embodiment 1 of this invention. It is a manufacturing process figure of the liquid crystal display device of Embodiment 1 of this invention. It is a manufacturing process figure of the liquid crystal display device of Embodiment 1 of this invention. It is a manufacturing process figure of the liquid crystal display device of Embodiment 1 of this invention. It is a manufacturing process figure of the liquid crystal display device of Embodiment 1 of this invention. It is a manufacturing process figure of the liquid crystal display device of Embodiment 1 of this invention. It is a manufacturing process figure of the liquid crystal display device of Embodiment 1 of this invention. 1 is a cross-sectional structure diagram of a liquid crystal display device according to a first embodiment of the present invention. It is a top view of the liquid crystal display device of Embodiment 2 of this invention. It is a block diagram of a basic liquid crystal display device. It is a top view of the liquid crystal display device by a prior art. It is a cross-sectional block diagram of the liquid crystal display device by a prior art. It is a manufacturing process figure of the liquid crystal display device by a prior art. It is a manufacturing process figure of the liquid crystal display device by a prior art.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Glass substrate, 2 Gate wiring, 3 Gate insulating film 4 Semiconductor thin film, 5 i layer, 6 n layer 7 Source wiring, 8 Source electrode, 9 Drain electrode 10 Source insulating film, 11, 11a Cs wiring, 12 Cs insulating film 13 Contact, 14, 14a Pixel electrode.

Claims (5)

  A plurality of gate wirings arranged at a predetermined interval on an insulating substrate, a plurality of source wirings intersecting the gate wirings, and a thin film transistor provided at an intersection of the gate wirings and the source wirings. In the thin film transistor array substrate for a matrix type display device having a pixel electrode connected to the drain electrode to be formed and a storage capacitor electrode line that forms a storage capacitor by sandwiching an insulating film between the pixel electrode, the drain electrode Has an extending portion extending in the arrangement direction of the gate wiring, and the storage capacitor electrode line formed on the source wiring with an insulating film interposed therebetween is arranged in the arrangement direction of the source wiring and the gate wiring. This is a mesh-like structure connected to the storage capacitor electrode lines of adjacent pixels in the top, bottom, left, and right with wiring components. The wiring component in the placement direction is disposed and formed wider than the source wiring so as to cover the source wiring, and the wiring component in the placement direction of the gate wiring is disposed and formed so as not to cover the gate wiring. The liquid crystal display device, wherein the periphery of the pixel electrode is surrounded and arranged so as to partially overlap the extended portion of the drain electrode and the upper layer of the storage capacitor electrode line.   2. The liquid crystal display device according to claim 1, wherein the pixel electrode and the gate line partially overlap each other.   A plurality of gate wirings arranged at a predetermined interval on an insulating substrate, a plurality of source wirings intersecting the gate wirings, and a thin film transistor provided at an intersection of the gate wirings and the source wirings. In a thin film transistor array substrate for a matrix type display device having a pixel electrode connected to a constituent drain electrode and a storage capacitor electrode line that forms a storage capacitor by sandwiching an insulating film between the pixel electrode and the pixel electrode, the drain electrode is The storage capacitor electrode line, which has an extending portion extending in the arrangement direction of the gate wiring and is formed on the source wiring with an insulating film interposed therebetween, extends in one direction along the arrangement direction of the source wiring. It is arranged so as to extend and is wider than the source wiring so as to cover the source wiring, and the periphery of the pixel electrode is The gate lines, a liquid crystal display device, characterized in that a part is arranged form is surrounded by so as to overlap the upper layer of the extending portion and the storage capacitor electrode line of the drain electrode.   4. The liquid crystal display device according to claim 1, wherein the pixel electrode is disposed and formed so as to partially overlap an upper layer of the source wiring. 5.   5. The method of manufacturing a liquid crystal display device according to claim 1, wherein a source wiring, a drain electrode, a storage capacitor electrode line, and a pixel electrode are formed in this order, and each of them is partially overlapped. The manufacturing method of the liquid crystal display device characterized by including the process arrange | positioned so that it may do.

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