JP2007193260A - Method for manufacturing electro-optical device, electro-optical device, and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing an electro-optical device with which exposure time on a resist can be shortened in photolithography and to provide an electro-optical device and an electronic apparatus. <P>SOLUTION: Prior to a photolithographic process (b) of forming a resist mask 210a on the inner surface IS of a TFT array substrate 10, a WSi film 201 as a reflection film and a silicon oxide film 202 are formed (a) on the outer surface OS. Since a resist 210 is exposed to exposure light E in the photolithography process and to the reflected light R reflected on the WSi film 201 after transmitting the resist 210, intensity of the exposure light E to expose the resist 210 can be decreased. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a method for manufacturing an electro-optical device, an electro-optical device, and an electronic apparatus, and more particularly to a method for manufacturing an electro-optical device using a photolithography process, the electro-optical apparatus, and the electronic apparatus.

Conventionally, photolithography using a resist and an etching process are generally used as a method for manufacturing a substrate of a liquid crystal device which is an electro-optical device. In photolithography, a resist is applied on a substrate, a predetermined pattern is exposed to the applied resist by an exposure device, and the exposed resist is developed to form a resist mask.
JP 2001-339069 A

  However, when a pattern with a predetermined shape is exposed to a resist on a transparent substrate like a liquid crystal device, the exposure light transmitted through the resist passes through the transparent substrate as it is and exits from the back surface. This causes a problem that the exposure time is long, and the exposure cannot be performed sufficiently on the resist.

  SUMMARY An advantage of some aspects of the invention is that it provides an electro-optical device manufacturing method, an electro-optical device, and an electronic apparatus that can shorten the exposure time of a resist in photolithography. To do.

  In the method for manufacturing an electro-optical device according to the present invention, an electro-optical material is sandwiched between two substrates facing each other and at least one of which is translucent, and an image display area and a periphery of the image display area are formed. A method of manufacturing an electro-optical device having a frame region that defines a high melting point on a first surface that is a surface opposite to a surface facing the other substrate of the light-transmitting substrate. A reflective film forming step of forming a reflective film made of metal or refractory metal silicide and further forming an insulating film on the reflective film is opposite to the first surface of the light-transmitting substrate. Applying a resist on the second surface, exposing the resist in a pattern of a predetermined shape, developing the exposed resist to form a resist mask; and Formed on the first surface And having a reflective film removing step of removing at least a portion of the reflective film.

  In the electro-optical device according to the present invention, an electro-optical material is sandwiched between two substrates facing each other and at least one of which is translucent to define an image display area and the periphery of the image display area. A refractory metal on at least a part of the frame region on the surface opposite to the surface facing the other substrate of the translucent substrate. Alternatively, a reflective film made of refractory metal silicide and an insulating film formed on the reflective film are formed.

  According to such a configuration of the present invention, in the photoresist process, the exposure light transmitted through the resist is reflected by the reflective film formed on the back surface opposite to the resist of the transparent substrate, thereby allowing the resist to be formed. It is possible to contribute to exposure. Therefore, the resist can be more efficiently exposed as compared with the prior art, so that the resist exposure process can be completed in a small exposure amount, that is, in a short time.

  Further, the present invention provides the reflective film left on the first surface by removing a part of the reflective film formed on the first surface of the light-transmitting substrate. It is preferable to form as a light shielding film.

  According to such a configuration, the reflection film used for shortening the exposure time of the photoresist process in the manufacture of the electro-optical device can be used as a light-shielding film of the completed electro-optical device, and thus less. An electro-optical device can be manufactured with a man-hour.

  According to the present invention, by removing the reflective film in the display area of the light-transmitting substrate, the remaining area of the reflective film is formed as a frame light shielding film that shields the frame area. Is preferred.

  According to such a configuration, it is possible to block light from entering the drive circuit formed in the frame region by the light shielding film, and the characteristics of the TFT do not deteriorate.

  The electro-optical device manufacturing method according to the present invention is an electro-optical device manufacturing method in which an electro-optical material is sandwiched between two substrates facing each other and at least one of which is translucent. A reflective film forming step of forming a reflective film made of aluminum on a first surface which is a surface opposite to a surface facing the other substrate of the light-transmitting substrate; and the light-transmitting property A resist is applied on a second surface opposite to the first surface of the substrate, the resist is exposed with a pattern having a predetermined shape, and the exposed resist is developed to form a resist mask. A photolithography step and a reflection film removal step for removing all of the reflection film formed on the first surface, and each of the reflection film formation step, the photolithography step, and the reflection film removal step In between Characterized in that the temperature of the substrate having the light-transmitting property is kept below the melting point of aluminum.

  According to such a configuration of the present invention, since the reflective film is made of aluminum, the reflectance of light is high, and it becomes possible to efficiently expose the resist. This exposure process can be completed.

  In addition, an electronic apparatus according to the present invention includes the electro-optical device.

(First embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to FIGS.
[Configuration of electro-optical device]
First, the configuration of the electro-optical device according to the first embodiment of the invention will be described with reference to FIGS. 1 to 5. Here, a TFT active matrix driving type liquid crystal device with a built-in driving circuit as an example of an electro-optical device is taken as an example. Here, FIG. 1 is a plan view of the electro-optical device when the TFT array substrate is viewed from the side of the counter substrate together with each component formed thereon. 2 is a cross-sectional view taken along the line H-H 'in FIG. FIG. X is a rear view of the electro-optical device as viewed from the TFT array substrate side. FIG. 4 is an equivalent circuit of various elements, wirings, and the like in a plurality of pixels formed in a matrix that forms an image display region of the electro-optical device. FIG. 5 is a cross-sectional view of a pixel switching TFT formed for each pixel. In each drawing used for the description of the present embodiment, each layer or each member has a different scale so that each layer or each member can be recognized on the drawing.

  1 and 2, in the electro-optical device according to the present embodiment, a TFT array substrate 10 and a counter substrate 20 are disposed to face each other. The electro-optical device according to this embodiment modulates light by controlling the orientation and order of liquid crystal sandwiched between the TFT array substrate 10 and the counter substrate 20, and displays an image in the image display region 10a. The TFT array substrate 10 and the counter substrate 20 are configured by a rectangular plate member having translucency such as a quartz substrate and a glass substrate. A liquid crystal layer 50, which is an electro-optical material, is sealed between the TFT array substrate 10 and the counter substrate 20, and the TFT array substrate 10 and the counter substrate 20 are in a seal region located around the image display region 10a. They are adhered to each other by the provided sealing material 52.

  The sealing material 52 is made of, for example, an ultraviolet curable resin, a thermosetting resin, or the like for bonding the two substrates, and is applied on the TFT array substrate 10 in the manufacturing process and then cured by ultraviolet irradiation, heating, or the like. It is. In addition, in the sealing material 52, gap materials such as glass fibers or glass beads are provided so as to make the interval between the TFT array substrate 10 and the counter substrate 20 (a gap between the substrates) a predetermined value. Note that such a gap material may be included in the liquid crystal layer 50 as long as the liquid crystal device is a large-sized liquid crystal device such as a liquid crystal display or a liquid crystal television that performs the same size display.

  A light-shielding peripheral light-shielding film 53 is provided on the counter substrate 20 side in a frame region that defines the periphery of the image display region 10a in parallel with the inside of the seal region where the sealing material 52 is disposed. A part or all of the peripheral light shielding film 53 may be provided as a built-in light shielding film on the TFT array substrate 10 side. In the present embodiment, the frame area refers to an area that is outside the image display area 10 a of the TFT array substrate 10 and the counter substrate 20.

  A data line driving circuit 101 and an external circuit connection terminal 102 are provided along one side of the TFT array substrate 10 in a region located outside the sealing region where the sealing material 52 is disposed. The scanning line driving circuit 104 is provided along two sides adjacent to the one side so as to be covered with the peripheral light shielding film 53. Further, in order to connect the two scanning line driving circuits 104 provided on both sides of the image display region 10a in this way, the TFT is arranged along the remaining side of the TFT array substrate 10 and covered with the peripheral light shielding film 53. A plurality of wirings 105 are provided.

  In addition, vertical conduction members 106 functioning as vertical conduction terminals between the two substrates are disposed at the four corners on the counter substrate 20. On the other hand, vertical conduction terminals are provided on the TFT array substrate 10 in regions facing these corner portions. Electrical conduction between the TFT array substrate 10 and the counter substrate 20 is made by the vertical conductive member 106 and the vertical conductive terminal.

  In FIG. 2, on the TFT array substrate 10, an alignment film 16 is formed on the pixel electrode 9a after the pixel switching TFT, the scanning line, the data line and the like are formed. On the other hand, on the counter substrate 20, in addition to the counter electrode 21, a lattice-shaped or striped light-shielding film 23 is provided, and an alignment film 22 is formed on the uppermost layer portion. Further, the liquid crystal layer 50 is made of, for example, a liquid crystal in which one or several types of nematic liquid crystals are mixed, and takes a predetermined alignment state between the pair of alignment films.

  Note that the data line driving circuit 101 and the scanning line driving circuit 104 are configured using TFTs for driving circuits formed simultaneously with TFTs for pixel switching. On the TFT array substrate 10 shown in FIGS. 1 and 2, in addition to the data line driving circuit 101, the scanning line driving circuit 104, etc., sampling is performed to sample an image signal on the image signal line and supply it to the data line. A circuit, a precharge circuit for supplying a precharge signal of a predetermined voltage level to a plurality of data lines in advance of an image signal, an inspection circuit for inspecting quality, defects, etc. of the electro-optical device during manufacturing or at the time of shipment Etc. may be formed.

  Further, for example, the TN (twisted nematic) mode, the STN (super TN) mode, and the D-STN (double- A polarizing film, a retardation film, a polarizing plate, and the like are arranged in a predetermined direction according to an operation mode such as an STN mode or a normally white mode / normally black mode.

  In the electro-optical device of this embodiment, as shown in FIGS. 2 and 3, the frame on the first surface of the TFT array substrate 10, which is the surface opposite to the surface facing the counter substrate 20. In the region, a frame light-shielding film 200 having a light-shielding property is formed so as to surround the periphery of the image display region 10a (the region indicated by the right-upward hatching in FIG. 3). The frame light shielding film 200 is formed in a shape that covers the data line driving circuit 101 and the scanning line driving circuit 104 formed in the frame region when the electro-optical device of this embodiment is viewed from the TFT array substrate 10 side. ing. Thus, by covering the data line driving circuit 101 and the scanning line driving circuit 104 with the frame light-shielding film 200, it is possible for light to be incident on the channel regions of the TFTs constituting the data line driving circuit 101 and the scanning line driving circuit 104. Can be prevented. Therefore, the characteristics of the TFTs of the data line driver circuit 101 and the scanning line driver circuit 104 do not deteriorate due to generation of a photocurrent caused by the incidence of light. Further, the presence of the frame light shielding film 200 prevents stray light that is not originally transmitted light such as light reflected by a housing for fixing the electro-optical device from entering the image display area 10a. It is also possible. Therefore, the contrast of the image is improved and the image quality can be improved.

  Note that the frame light shielding film 200 covers at least the data line driving circuit 101 and the scanning line driving circuit 104 in a case where the frame light shielding film 200 is provided for the purpose of shielding light incident on the data line driving circuit 101 and the scanning line driving circuit 104. What is necessary is just to form in an area | region. That is, the frame light-shielding film 200 only needs to be formed in at least a part of the frame region, and does not necessarily have to be formed so as to surround the image display region 10a. Similarly to the TFT array substrate 10, a frame light shielding film may be provided in the frame region of the surface of the counter substrate 20 opposite to the surface facing the TFT array substrate 10.

  In FIG. 4, a pixel electrode 9a and a TFT 30 for controlling the switching of the pixel electrode 9a are formed in each of a plurality of pixels formed in a matrix constituting the image display area of the electro-optical device according to the present embodiment. The data line 6 a to which the image signal is supplied is electrically connected to the source of the TFT 30. The image signals S1, S2,..., Sn written to the data lines 6a may be supplied line-sequentially in this order, or may be supplied for each group to a plurality of adjacent data lines 6a. Good.

  Further, the scanning line 3a is electrically connected to the gate of the TFT 30, and the scanning signals G1, G2,..., Gm are pulse-sequentially applied to the scanning line 3a and the scanning line 3a in this order at a predetermined timing. It is comprised so that it may apply. The pixel electrode 9a is electrically connected to the drain of the TFT 30, and the image signal S1, S2,..., Sn supplied from the data line 6a is obtained by closing the TFT 30 as a switching element for a certain period. The data is written in the pixels of the scanning line 3a selected at a predetermined timing.

  Image signals S1, S2,..., Sn written to the pixels are held for a certain period between the pixel electrode 9a and the counter electrode formed on the counter substrate. The liquid crystal modulates light and enables gradation display by changing the orientation and order of the molecular assembly depending on the applied voltage level. In the normally white mode, the transmittance for incident light is reduced according to the voltage applied in units of each pixel, and in the normally black mode, the light is incident according to the voltage applied in units of each pixel. The light transmittance is increased, and light having a contrast corresponding to the image signal is emitted from the electro-optical device as a whole.

  In order to prevent the image signal held here from leaking, a capacitor element 70 is added in parallel with the liquid crystal capacitor formed between the pixel electrode 9a and the counter electrode. The capacitive element 70 is provided side by side with the scanning line 3a, and the fixed potential side capacitive electrode is connected to the capacitive line 3b fixed at a constant potential.

With reference to FIG. 5, a specific configuration of the electro-optical device that realizes the above-described circuit operation including the data line 6 a, the scanning line 3 a, the capacitor line 3 b, the TFT 30 and the like will be described below.
As described above, the electro-optical device includes a transparent TFT array substrate 10 made of, for example, a quartz substrate or a glass substrate, and a transparent counter substrate 20 made of, for example, a glass substrate or a quartz substrate. I have. On the TFT array substrate 10, as shown in FIG. 5, in addition to the pixel electrode 9a and the alignment film 16, various configurations such as a TFT 30 are provided in a laminated structure. A groove 12g, which is a recess, is formed on the surface of the TFT array substrate 10 on the liquid crystal layer 50 side, and the data line 6a, the scanning line 3a, the capacitor line 3b, the TFT 30 and the like are laminated on the bottom surface of the groove 12g. Is formed.

  On the surface of the TFT array substrate 10 on the liquid crystal layer 50 side, which is the second surface, the TFT 30, the scanning line 3 a and the capacitor line 3 b formed on the first layer and the first layer having the lower light shielding film 11 a are formed. , A third layer formed on the second layer and having the data line 6a, and a fourth layer formed on the third layer and having the pixel electrode 9a. Further, the first interlayer insulating film 12 is provided between the first layer and the second layer, the second interlayer insulating film 4 is provided between the second layer and the third layer, and the third layer and the fourth layer are further provided. A third interlayer insulating film 7 is formed between the layers. These first interlayer insulating film 12, second interlayer insulating film 4, and third interlayer insulating film 7 are, for example, NSG (non-silicate glass), PSG (phosphosilicate glass), BSG (boron silicate glass), BPSG (boron phosphorus). Silicate glass), a silicon nitride film, or a silicon oxide film.

  The lower light shielding film 11a of the first layer is provided at a position that covers each TFT 30 when viewed from the TFT array substrate 10 side, and has a light shielding function against the return light from the TFT array substrate 10 side to the TFT 30. . The lower light-shielding film 11a is made of a metal alloy film such as Ti, Cr, W, Ta, Mo, and Pd, which are opaque high-melting-point metals, and these metal silicides, and has a light-shielding property. With such a material, the lower light-shielding film 11a is destroyed or melted by the high-temperature treatment in the pixel switching TFT 30 forming process performed after the lower light-shielding film 11a forming process on the TFT array substrate 10. There is nothing to do. A first interlayer insulating film 12 is formed on the first layer including the lower light-shielding film 11a, and electrical insulation between the first layer and the second layer is achieved.

  The pixel switching TFT 30 has an LDD (Lightly Doped Drain) structure, and includes a scanning line 3a, a channel region 1a ′ of the semiconductor layer 1a in which a channel is formed by an electric field from the scanning line 3a, and the scanning line 3a. A gate insulating film 2 that insulates the semiconductor layer 1a; a low concentration source region (source side LDD region) 1b and a low concentration drain region (drain side LDD region) 1c of the semiconductor layer 1a; a high concentration source region 1d of the semiconductor layer 1a; A high concentration drain region 1e is provided. The TFT 30 preferably has an LDD structure as shown in FIG. 5, but may have an offset structure in which impurities are not implanted into the low concentration source region 1b and the low concentration drain region 1c, and the gate electrode 3a as a mask. It may be a self-aligned TFT in which impurities are implanted at a high concentration and a high concentration source region and a high concentration drain region are formed in a self-aligning manner. Note that such a structure basically includes TFTs formed in the data line driver circuit 101 and the scanning line driver circuit 104 as well.

  In the high-concentration drain region 1e of the TFT 30, a corresponding one of the plurality of pixel electrodes 9a is connected via a contact hole 8 formed through the second interlayer insulating film 4 and the third interlayer insulating film 7. Electrically connected. Further, the data line 6 a is electrically connected to the high concentration source region 1 d of the TFT 30 through a contact hole 5 formed so as to penetrate the second interlayer insulating film 4. A capacitor electrode 1f is electrically connected to the high-concentration drain region 1e, and a storage capacitor 70 is formed by sandwiching the gate insulating film 2 as a dielectric film between the capacitor electrode 1f and the capacitor line 3b. Is formed.

Here, the capacitor line 3b and the scanning line 3a are made of the same polysilicon film, and the dielectric film of the storage capacitor 70 and the gate insulating film 2 of the pixel switching TFT 30 are made of the same high-temperature oxide film. The electrode 1f, the channel formation region 1a ′, the source region 1d, the drain region 1e, and the like of the pixel switching TFT 30 are formed of the same semiconductor layer 1a.
On the other hand, on the surface of the counter substrate 20 on the liquid crystal layer 50 side, a light shielding film layer 23 composed of a light shielding film and a light shielding film 53 provided in an area other than the opening area of each pixel is formed. The light shielding film layer 23 is made of a metal such as Ti, Cr, W, Ta, Mo, and Pd, or a metal alloy film such as a metal silicide, and has light shielding properties. A counter electrode 21 made of a transparent conductive thin film such as ITO is formed on the light shielding film layer 23.

[Method of manufacturing electro-optical device]
Next, a method of manufacturing the electro-optical device having the above configuration will be described with reference to FIGS. 6 to 10 are process diagrams showing each layer on the TFT array substrate 10 side in each process corresponding to the same cross section as that in FIG.

  First, as shown in FIG. 6A, in the reflective film forming step, the first surface of the TFT array substrate 10 made of quartz, glass, or the like that is opposite to the inner surface IS that is the second surface. A refractory metal film such as Ti, Cr, W, Ta, or Mo or a refractory metal silicide film that is a compound of these refractory metals and silicon is formed as a reflective film on the entire outer surface OS by sputtering. To do. Further, these refractory metal films and refractory metal silicide films have a property of reflecting light and a light shielding property of blocking at least part of the light. In this embodiment, a tungsten silicide (hereinafter referred to as WSi) film 201 is formed as the refractory metal silicide film. Further, a silicon oxide film 202 which is an insulating film is formed on the WSi film 201. The refractory metal in the present embodiment refers to a metal having a melting point of 1500 ° C. or higher. In addition, the insulating film is not a silicon oxide film, for example, a silicate glass film such as NSG (non-silicate glass), PSG (phosphorus silicate glass), BSG (boron silicate glass), BPSG (boron phosphorus silicate glass), or a silicon nitride film. It may be constituted by. Thus, by covering the WSi film 201 formed as the reflective film with the silicon oxide film 202, it is possible to prevent the WSi from contaminating the TFT 50 formed in a later process.

  Next, as shown in FIG. 6B, in the photolithography process, the inner surface IS, which is the surface facing the counter substrate 20 of the TFT array substrate 10 and facing the liquid crystal layer 50, corresponds to the pattern of the grooves 12g. A resist mask 210a having a shape is formed. This photolithography process will be described below with reference to FIG. FIG. 11 is an explanatory diagram for explaining the outline of the photolithography process in the same cross section as FIG.

  In the photolithography process, first, as shown in FIG. 11A, a resist 210 is applied on the inner surface IS of the TFT array substrate 10. Thereafter, as shown in FIG. 11B, the coated resist 210 is exposed in a predetermined pattern corresponding to the shape of the groove 12g from the direction of the inner surface IS of the TFT array substrate 10. Then, by developing the resist 210 exposed to a pattern having a predetermined shape, a resist mask 210a shown in FIG. 7B is formed on the inner surface IS of the TFT array substrate 10.

  As described above, when exposing the resist 210 on the inner surface IS of the TFT array substrate 10, since the semiconductor exposure apparatus is used, the optical axis of the exposure light E is substantially orthogonal to the inner surface of the TFT array substrate 10. The principal ray of the exposure light E travels substantially parallel to the optical axis.

  Since the resist 210 has translucency, a part of the exposure light E is transmitted to the TFT array substrate 10. Here, since the TFT array substrate 10 is transparent, the exposure light E passes through the TFT array substrate 10 and reaches the outer surface OS opposite to the inner surface IS. The exposure light E that has reached the outer surface OS is reflected at the interface between the WSi film 201 as a reflective film and the outer surface OS (reflected light R). Since the exposure light E is incident on the TFT array substrate 10 substantially orthogonally, most of the reflected light R travels in a direction opposite to the traveling direction of the exposure light E, and the exposure light E of the resist 210 is transmitted. Incident near the spot. For this reason, in this embodiment, the resist 210 is exposed by the exposure light E and the reflected light R.

  Conventionally, in the photolithography process on a transparent substrate, the exposure light that has passed through the resist is transmitted through the transparent substrate as it is and is emitted from the back surface. By reflecting the exposure light with a reflective film formed on the back surface of the transparent substrate, it is possible to contribute to the exposure of the resist. Therefore, according to the manufacturing method of the electro-optical device of the present embodiment, it becomes possible to provide exposure more efficiently with the resist as compared with the conventional case. Therefore, the exposure process of the resist in a shorter exposure amount, that is, in a shorter time than the conventional case. Can finish.

  Next, as shown in FIG. 6C, in the etching process, a TFT 30 and the like are formed on the inner surface IS of the TFT array substrate 10 by performing a dry and wet etching process on a portion where the resist mask 210a is not formed. A groove 12g is formed in the region to be processed.

  Next, as shown in FIG. 7D, the TFT array substrate 10 is preferably annealed in an inert gas atmosphere such as N 2 (nitrogen) and at a high temperature of about 900 to 1300 ° C. Is pre-processed so that distortion generated in the TFT array substrate 10 is reduced. That is, the TFT array substrate 10 is previously heat-treated at the same temperature or higher in accordance with the temperature at which the high temperature treatment is performed at the maximum temperature in the manufacturing process. Then, a metal alloy film such as a metal such as Ti, Cr, W, Ta, Mo and Pd or a metal silicide is sputtered on the entire surface of the TFT array substrate 10 thus processed, and a layer of about 1000 to 5000 angstroms is formed by sputtering. The thickness is preferably about 2000 angstroms. Further, a resist mask corresponding to the pattern of the lower light-shielding film 11a (see FIG. 2) is formed on the formed metal alloy film by photolithography, and etching is performed on the metal alloy film through the resist mask. Then, the lower light shielding film 11a is formed.

  Next, as shown in FIG. 7E, a TEOS (tetraethylorthosilicate) gas, TEB (tetraethylethylsilicate) gas, or the like is formed on the lower light shielding film 11a by, for example, atmospheric pressure or low pressure CVD. First interlayer insulating film made of silicate glass film such as NSG, PSG, BSG, BPSG, silicon nitride film, silicon oxide film, etc., using (boat rate) gas, TMOP (tetra-methyl-oxy-phosphate) gas, etc. 12 is formed. The thickness of the first interlayer insulating film 12 is, for example, about 5000 to 20000 angstroms, preferably about 5000 to 10000 angstroms.

  Alternatively, after a thermal oxide film is formed, a high-temperature silicon oxide film (HTO film) or a silicon nitride film is sequentially deposited to a relatively thin thickness of about 500 angstroms by a low pressure CVD method or the like, and a multilayer having a thickness of about 2,000 angstroms. A first interlayer insulating film 12 having a structure may be formed. Further, a flat film can be formed by spin coating SOG (spin-on glass: spun glass) or performing a CMP (Chemical Mechanical Polishing) process in place of or in place of such a silicate glass film. Good. By flattening the upper surface of the first interlayer insulating film 12 in this way, there is an advantage that the TFT 30 can be easily formed on the upper side later. Note that the first interlayer insulating film 12 may be planarized by annealing at about 900 ° C. to prevent contamination.

  Next, as shown in FIG. 7F, a monosilane gas having a flow rate of about 400 to 600 cc / min is formed on the first interlayer insulating film 12 in a relatively low temperature environment of about 450 to 550 ° C., preferably about 500 ° C. Then, an amorphous silicon film is formed by low pressure CVD (for example, CVD at a pressure of about 20 to 40 Pa) using disilane gas or the like. Thereafter, an annealing process is performed in a nitrogen atmosphere at about 600 to 700 ° C. for about 1 to 72 hours, preferably 4 to 6 hours, so that the polysilicon film 1 has a thickness of about 500 to 2000 angstroms. Preferably, the solid phase growth is performed until the thickness is about 1000 angstroms. At this time, when an n-channel TFT 30 is formed, a dopant of a group V element such as Sb (antimony), As (arsenic), or P (phosphorus) is slightly doped into the channel region by ion implantation or the like. Also good. When the TFT 30 is a p-channel type, a dopant of a group III element such as B (boron), Ga (gallium), or In (indium) may be slightly doped by ion implantation or the like. Note that a polysilicon film may be directly formed by a low pressure CVD method or the like without passing through an amorphous silicon film. Alternatively, a polysilicon film may be formed by implanting silicon ions into a polysilicon film deposited by a low pressure CVD method or the like to make it amorphous (amorphized) and then recrystallizing it by annealing or the like. Further, the semiconductor layer 1a having a predetermined pattern including the channel region 1a ', the capacitor electrode 1f and the like as shown in FIG. 5 is formed by a photolithography process, an etching process, and the like.

  Next, as shown in FIG. 8G, the semiconductor layer 1a including the channel region 1a ′ constituting the TFT 30, the capacitor electrode 1f constituting the storage capacitor 70, and the like is heated at a temperature of about 900 to 1300 ° C., preferably about 1000. A thermal oxide film with a relatively thin thickness of about 300 angstroms is formed by thermal oxidation at a temperature of 0 ° C., and a high-temperature silicon oxide film (HTO film) or silicon nitride film is formed by a low pressure CVD method or the like to about 500 angstroms. The insulating film 2 for the storage capacitor 70 is formed together with the gate insulating film 2 of the TFT 30 having a multilayer structure. As a result, the thickness of the semiconductor layer 1a is about 300-1500 angstroms, preferably about 350-500 angstroms, and the insulating film 2 is about 200-1500 angstroms thick, preferably Is about 300 to 1000 angstroms thick. By shortening the high-temperature thermal oxidation time in this way, it is possible to prevent warping due to heat, particularly when using a large wafer of about 8 inches. However, the insulating film 2 having a single layer structure may be formed only by thermally oxidizing the semiconductor layer 1a.

Although not particularly limited in the step (5), the resistance may be reduced by doping, for example, P ions with a dose of about 3 × 10 ¹² / cm ² into the semiconductor layer 1a portion to be the capacitor electrode 1f. .

  Next, as shown in FIG. 8H, after a polysilicon film is deposited by a low pressure CVD method or the like, phosphorus (P) is thermally diffused to make the polysilicon film conductive. Alternatively, a doped silicon film in which P ions are introduced simultaneously with the formation of the polysilicon film may be used.

  Then, the polysilicon film deposited in this manner is subjected to a photolithography process, an etching process, and the like to form the capacitor line 3b together with the scanning line 3a having a predetermined pattern as shown in FIG. The layer thickness of the capacitance line 3b and the scanning line 3a is, for example, about 3500 angstroms.

  However, the scanning line 3a and the capacitor line 3b may be formed of a metal film such as Al or a metal silicide film instead of the polysilicon film, or a combination of these metal film or metal silicide film and the polysilicon film. And may be formed in multiple layers. In this case, if the scanning line 3a is arranged as a light shielding film corresponding to one part or all of the region covered by the lower light shielding film 11a, the light shielding film on the counter substrate 20 side due to the light shielding property of the metal film or the metal silicide film. It is also possible to omit a part of 23. In this case, in particular, there is an advantage that the pixel aperture ratio can be prevented from being lowered due to the misalignment between the counter substrate 20 and the TFT array substrate 10.

Subsequently, when the pixel switching TFT 30 shown in FIG. 5 is an n-channel TFT having an LDD structure, scanning is first performed to form the low concentration source region 1b and the low concentration drain region 1c in the semiconductor layer 1a. Using the line 3a (gate electrode) as a diffusion mask, a dopant of a group V element such as P is doped at a low concentration (for example, P ions are doped at a dose of 1 to 3 × 10 ¹³ / cm ² ). As a result, the semiconductor layer 1a under the scanning line 3a becomes a channel region 1a ′. The resistance of the capacitor line 3b and the scanning line 3a is also reduced by this impurity doping.

Further, in order to form the high-concentration source region 1b and the high-concentration drain region 1c constituting the TFT 30, a resist is formed on the scanning line 3a with a mask wider than the scanning line 3a. The elemental dopant is doped at a high concentration (for example, P ions at a dose of 1 to 3 × 10 ¹⁵ / cm ² ). Further, when the TFT 30 is of a p-channel type, a group III such as B is formed to form the low concentration source region 1b and the low concentration drain region 1c, the high concentration source region 1d and the high concentration drain region 1e in the semiconductor layer 1a. Doping with elemental dopants.

  As described above, if the TFT 30 has the LDD structure by the two-stage doping of the low concentration and the high concentration, an advantage that the short channel effect can be reduced is obtained. However, it is not necessary to dope in two steps. For example, a TFT having an offset structure may be used without doping at a low concentration, or a self-aligned TFT may be formed by an ion implantation technique using P ions, B ions, or the like using the scanning line 3a as a mask. The resistance of the capacitor line 3b and the scanning line 3a is further reduced by doping the impurities.

  In parallel with the element forming process of these TFTs 30, peripheral circuits (not shown) such as a data line driving circuit and a scanning line driving circuit having a complementary structure composed of an n-channel TFT and a p-channel TFT. May be formed on the periphery of the TFT array substrate 10. As described above, in the present embodiment, the pixel switching TFT 30 has a semiconductor layer formed of polysilicon, so that a peripheral circuit can be formed in almost the same process when the pixel switching TFT 30 is formed, which is advantageous in manufacturing. is there.

  Next, as shown in FIG. 8 (i), NSG, PSG, BSG are used by using, for example, atmospheric pressure or reduced pressure CVD method, TEOS gas, or the like so as to cover the insulating film 2, the scanning line 3a, and the capacitor line 3b. Then, a second interlayer insulating film 4 made of a silicate glass film such as BPSG, a silicon nitride film or a silicon oxide film is formed. The layer thickness of the second interlayer insulating film 4 is preferably about 5000 to 15000 angstroms. Then, in order to activate the high-concentration source region 1d and the high-concentration drain region 1e, an annealing process at about 1000 ° C. is performed for about 20 minutes, and then the contact hole 5 for the data line 6a is subjected to reactive etching and reactive ion beam etching. Holes are formed by dry etching such as.

  Next, as shown in FIG. 9J, a light-shielding low-resistance metal such as Al, metal silicide, or the like is formed on the second interlayer insulating film 4 by a sputtering process or the like to a thickness of about 1000 to 5000 angstroms. The data line 6a is preferably formed by performing a photolithography process, an etching process, etc. after deposition at about 3000 angstroms.

  Next, as shown in FIG. 9 (k), a silicate glass film such as NSG, PSG, BSG, BPSG or the like is used so as to cover the data line 6a by using, for example, normal pressure or low pressure CVD or TEOS gas. Then, a third interlayer insulating film 7 made of a silicon nitride film, a silicon oxide film or the like is formed. The layer thickness of the third interlayer insulating film 7 is preferably about 5000 to 15000 angstroms. When the third interlayer insulating film 7 is formed, the surface of the silicate glass film or the like is subjected to a CMP process, or an organic film or SOG is formed in place of or overlaid on the silicate glass film or the like to form the third interlayer insulating film 7. You may planarize the upper surface of. By flattening in this way, the liquid crystal disclination (defective alignment) caused by the unevenness of the surface of the third interlayer insulating film 7 can be reduced.

  Thereafter, a contact hole 8 for electrically connecting the pixel electrode 9a and the high concentration drain region 1e is formed by dry etching such as reactive etching or reactive ion beam etching.

  Next, as shown in FIG. 9L, a transparent conductive thin film such as an ITO film is deposited on the third interlayer insulating film 7 to a thickness of about 500 to 2000 angstroms by sputtering or the like. The pixel electrode 9a is formed by a photolithography process, an etching process, or the like. Note that when the liquid crystal device is used for a reflective liquid crystal device, the pixel electrode 9a may be formed of an opaque material having a high reflectance such as Al.

  Subsequently, after applying a polyimide alignment film coating solution on the pixel electrode 9a, the alignment film 16 (see FIG. 5) is subjected to a rubbing process in a predetermined direction so as to have a predetermined pretilt angle. Is formed.

Then, as shown in FIG. 10 (m), in the reflective film removing step, a WSi film 201 which is a reflective film formed on the outer surface OS of the TFT array substrate 10, and a silicon oxide film 202 formed thereon The frame light shielding film 200 is formed by removing a region corresponding to the image display region 10a by a photolithography process, an etching process, or the like. That is, the frame light-shielding film in which the remaining region of the WSi film 201 that is a light-shielding reflective film and the silicon oxide film 202 formed thereon is shielded from the frame region of the electro-optical device after the reflective film removal step. 200.

  On the other hand, for the counter substrate 20 shown in FIG. 5, a quartz, glass substrate or the like is first prepared, and the light-shielding film 23 and the peripheral light-shielding film 53 as a peripheral parting are sputtered with, for example, metallic chromium, followed by a photolithography process and etching. It is formed through a process. The light shielding film 23 and the peripheral light shielding film 53 may be made of a metal material such as Cr, Ni, or Al, or a material such as resin black in which carbon or Ti is dispersed in a photoresist.

  Thereafter, a counter electrode 21 is formed by depositing a transparent conductive thin film such as ITO on the entire surface of the counter substrate 20 to a thickness of about 500 to 2000 angstroms by sputtering or the like. Further, the alignment film 22 is formed by applying a polyimide-based alignment film coating solution over the entire surface of the counter electrode 21 and then performing a rubbing process in a predetermined direction so as to have a predetermined pretilt angle.

Finally, the TFT array substrate 10 on which the respective layers are formed as described above and the counter substrate 20 are bonded together with a sealing material 52 so that the alignment films 16 and 22 face each other, and a space between the two substrates is obtained by vacuum suction or the like. Further, for example, a liquid crystal formed by mixing a plurality of types of nematic liquid crystals is sucked to form a liquid crystal layer 50 having a predetermined thickness.
As a result, the electro-optical device according to this embodiment shown in FIGS. 1 to 5 is manufactured.

  As described above, according to the method of manufacturing the electro-optical device of the present embodiment, the resist can be efficiently exposed, so that the resist exposure process can be completed in a short time. . In the present embodiment, as an example, the effect in the case where the groove 12g is formed in the TFT array substrate 10 has been described, but it goes without saying that the same effect can be obtained in other photolithography processes.

  In the present embodiment, the WSi film 201 that is a reflective film is formed on the outer surface OS of the TFT array substrate 10, but the reflective film may be formed on the counter substrate 20. For example, when a photolithographic process is performed in the manufacturing process of the counter substrate 20, a reflective film is formed on the surface opposite to the resist prior to the resist exposure process, so that the resist exposure process is performed. Time can be shortened.

  In the present embodiment, the frame light shielding film 200 is formed by removing a part of the WSi film 201 as a reflection film and the silicon oxide film 202 as an insulating film in the reflection film removing step. Depending on the case, all of the WSi film 201 and the silicon oxide film 202 may be removed.

[Electronics]
Next, an overall configuration, particularly an optical configuration, of an embodiment of a projection type color display device as an example of an electronic apparatus using the liquid crystal device as the light valve described above in detail will be described. FIG. 12 is a cross-sectional view illustrating a configuration example of a projection type color display device. In FIG. 12, a liquid crystal projector 1100, which is an example of a projection type color display device according to the present embodiment, prepares three liquid crystal modules including a liquid crystal device having a drive circuit mounted on a TFT array substrate, each of which is a light valve for RGB. It is configured as a projector used as 100R, 100G and 100B. In the liquid crystal projector 1100, when projection light is emitted from a lamp unit 1102 of a white light source such as a metal halide lamp, light components R, G, and B corresponding to the three primary colors of RGB are obtained by three mirrors 1106 and two dichroic mirrors 1108. And are guided to the light valves 100R, 100G, and 100B corresponding to the respective colors. In particular, the B light is guided through a relay lens system 1121 including an incident lens 1122, a relay lens 1123, and an exit lens 1124 in order to prevent light loss due to a long optical path. The light components corresponding to the three primary colors modulated by the light valves 100R, 100G, and 100B are synthesized again by the dichroic prism 1112 and then projected as a color image on the screen 1120 via the projection lens 1114.

  In addition to the electronic apparatus described with reference to FIG. 12, the electro-optical device according to this embodiment is a mobile computer, a liquid crystal television, a mobile phone, an electronic notebook, a word processor, a viewfinder type, or a monitor direct view type. The present invention can be applied to various electronic devices such as a video tape recorder, a workstation, a video phone, a POS terminal, or a touch panel.

  The electro-optical device according to the present invention includes an electrophoretic device such as electronic paper, an EL (Electro-Luminescence) display device, and an electron emission circuit element in addition to the active matrix driving liquid crystal device according to the present embodiment. It belongs to the technical field of electro-optical devices such as devices (Field Emission Display and Surface-Conduction Electron-Emitter Display).

(Second Embodiment)
Hereinafter, a second embodiment of the present invention will be described with reference to FIG. FIG. 13 is a process diagram showing each layer on the TFT array substrate 10 side in each process corresponding to the cross section similar to FIG. The electro-optical device of the second embodiment is different from the electro-optical device of the first embodiment in the material of the reflective film that reflects exposure light. In the present embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, and the description thereof is omitted as appropriate.

  In the second embodiment, an aluminum film 203 is formed as a reflective film on the outer surface OS of the TFT array substrate 10. A method for manufacturing the electro-optical device according to the second embodiment will be described below.

  First, as shown in FIG. 13A, in the reflective film forming step, an aluminum film 203 is formed on the entire outer surface OS of the TFT array substrate 10 made of quartz, glass or the like by sputtering.

  Next, as shown in FIG. 13B, a resist mask 210a having a shape corresponding to the pattern of the grooves 12g is formed on the inner surface IS of the TFT array substrate 10 in a photolithography process.

  Here, the step of exposing the resist can be performed in a short time due to the same effect as that of the first embodiment due to the formation of the aluminum film 203 on the outer surface OS of the TFT array substrate 10. In particular, since aluminum has a high light reflectance, it is possible to complete the exposure of the resist with a smaller exposure amount than in the first embodiment.

  Next, as shown in FIG. 13C, in the etching process, dry and wet etching processes are performed on portions where the resist mask 210a is not formed, thereby forming TFTs 30 and the like on the inner surface IS of the TFT array substrate 10. A groove 12g is formed in the region.

Next, as shown in FIG. 13D, in the reflective film removing step, all the aluminum film 203 formed on the outer surface OS of the TFT array substrate 10 is removed.
The subsequent steps are the same as the steps described with reference to FIG.

  That is, in the present embodiment, the aluminum film 203 that is a reflective film is removed before the thermal process in which the TFT array substrate 10 is subjected to a high-temperature process such as an annealing process. This is because the melting point of aluminum is approximately 660 ° C., which is lower than that of tungsten. For convenience, the process in which the temperature of the aluminum film 203 is 600 ° C. or higher is referred to as a thermal process. That is, in the present embodiment, the TFT array substrate 10 may not be subjected to a thermal process between the formation of the aluminum film 203, the completion of the resist exposure process of the photolithography process, and the removal of the aluminum film 203. . Therefore, the aluminum film 203 is formed after the TFT array substrate 10 is subjected to the thermal process and before the resist exposure process of the photolithography process, and further after the resist exposure process and before the thermal process. The film 203 may be removed. Since the aluminum film 203 may be a single layer and the exposure amount of the resist may be small, for example, if the aluminum film 203 is formed only by the process described with reference to FIG. 13, it is shorter than the first embodiment. The electro-optical device can be manufactured in time.

  Further, if the TFT array substrate 10 is not subjected to the heat process after the aluminum film 203 is formed, the frame light shielding film 200 may be formed by removing only a part of the aluminum film 203 after the resist exposure process. Good.

  The present invention is not limited to the above-described embodiments, and various modifications can be made as appropriate without departing from the spirit or concept of the invention that can be read from the claims and the entire specification. A manufacturing method, an electro-optical device, and an electronic apparatus including the same are also included in the technical scope of the present invention.

It is a top view of an electro-optical device. It is HH 'sectional drawing of FIG. It is a rear view of an electro-optical device. It is an equivalent circuit such as various elements and wirings in a plurality of pixels formed in a matrix that forms an image display region. It is sectional drawing of TFT for pixel switching formed for every pixel. It is process drawing which shows each layer of the TFT array substrate in each process. It is process drawing which shows each layer of the TFT array substrate in each process. It is process drawing which shows each layer of the TFT array substrate in each process. It is process drawing which shows each layer of the TFT array substrate in each process. It is process drawing which shows each layer of the TFT array substrate in each process. FIG. 6 is an explanatory diagram for explaining an outline of a photolithography process in the same cross section as FIG. 5. It is sectional drawing which shows the structural example of a projection type color display apparatus. It is process drawing which shows each layer of the TFT array substrate in each process of 2nd Embodiment.

Explanation of symbols

  10 TFT array substrate, 10 g groove, 201 WSi film, 202 silicon oxide film, 210a resist mask, IS inner surface, OS outer surface, E exposure light, R reflected light

Claims (6)

Manufacture of an electro-optical device having an image display region and a frame region that defines the periphery of the image display region, in which an electro-optical material is sandwiched between two substrates facing each other and at least one having translucency A method,
A reflective film made of a refractory metal or a refractory metal silicide is formed on the first surface which is the surface opposite to the surface facing the other substrate of the light-transmitting substrate, and the reflection is further performed. A reflective film forming step of forming an insulating film on the film;
A resist is applied on the second surface opposite to the first surface of the light-transmitting substrate, the resist is exposed in a pattern having a predetermined shape, and the exposed resist is developed. A photolithography process for forming a resist mask;
And a reflective film removing step of removing at least a part of the reflective film formed on the first surface of the light-transmitting substrate.   By removing a part of the reflective film formed on the first surface of the light-transmitting substrate, the reflective film left on the first surface is formed as a light shielding film. The method of manufacturing an electro-optical device according to claim 1.   3. The frame-shading film that shields the frame area from the remaining area of the reflective film is formed by removing the reflective film in the display area of the translucent substrate. 2. A method for manufacturing the electro-optical device according to 1. An electro-optical device manufacturing method in which an electro-optical material is sandwiched between two substrates facing each other and having at least one light-transmitting property,
A reflective film forming step of forming a reflective film made of aluminum on a first surface which is a surface opposite to a surface facing the other substrate of the light-transmitting substrate;
A resist is applied on the second surface opposite to the first surface of the light-transmitting substrate, the resist is exposed in a pattern having a predetermined shape, and the exposed resist is developed. A photolithography process for forming a resist mask;
A reflective film removing step of removing all of the reflective film formed on the first surface,
In the electro-optical device, the temperature of the light-transmitting substrate is kept below the melting point of aluminum between each of the reflective film forming step, the photolithography step, and the reflective film removing step. Production method. An electro-optical device having an image display region and a frame region that defines the periphery of the image display region, in which an electro-optical material is sandwiched between two substrates facing each other and having at least one light-transmitting property. And
A reflective film made of a refractory metal or a refractory metal silicide on at least a part of the frame region on the surface opposite to the surface facing the other substrate of the light-transmitting substrate, and the reflection An electro-optical device comprising: an insulating film formed on the film. An electronic apparatus comprising the electro-optical device according to claim 5.

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