JP2007190279A - Game machine - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a game machine capable of restoring a game state when power is interrupted without performing initialization even when an error is generated in data when the power is restored. <P>SOLUTION: Even when the result of comparing a check sum for respective rows and respective columns calculated when the power is restored and a check sum for the respective rows and the respective columns stored by check sum processing when the power is interrupted is no-match (S230:NO), error data are specified and whether or not normal data can be restored is judged (S320). Then, when they can be restored (S320:YES), restoration processing of restoring the error data to the normal data is executed (S330). Thus, even when the error is generated in the data when the power is restored, the game state when the power is interrupted is restored without performing initialization. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a gaming machine such as a pachinko machine or a revolving game machine that uses a game medium such as a game ball or game medal to play a game.

  In the gaming machine, when a power failure such as a power failure occurs, data for restoring the gaming state when the power failure occurs is checked after the power is restored, and the check result is stored together with the data. The stored data is also checked when the power is restored, and the check result when the power is cut off is compared with the check result when the power is restored. If the comparison results match, it is determined that the stored data is normal, and the gaming state at the time when the power interruption occurs is restored. On the other hand, if the comparison result does not match, a technique is disclosed in which it is determined that an error has occurred in the data at the time of power recovery, and data relating to the gaming state is initialized (Patent Document 1).

Japanese Patent Laid-Open No. 2002-210093

  However, in the above technique, if the comparison result does not match, it is always initialized, so even if error data exists only in a part of the data, it is initialized. For this reason, even if a power interruption occurs in a gaming state advantageous to the player, it will be initialized when the power is restored, so that the player will have an advantageous gaming state when the power interruption occurs. There was a problem that it was not possible to continue and interest in the game would be reduced.

  The present invention has been made in view of these problems, and even if an error has occurred in the data at the time of power recovery, it is possible to restore the gaming state at the time of power failure without initialization. An object is to provide a simple gaming machine.

In order to solve at least a part of the problems described above, the gaming machine of the present invention employs the following configuration. That is,
In a gaming machine comprising storage means for storing data for restoring the gaming state when a power interruption occurs after the power is restored,
When the data of the storage means is virtually arranged in a vertical and horizontal matrix, the exclusive OR of each row and each column is calculated at the time of power interruption, and the exclusive power sum is stored in the storage means. Occurrence calculation storage means,
Power supply return time calculating means for calculating the exclusive OR of each row and each column when the data of the storage means is virtually arranged in a vertical and horizontal matrix;
If the result of comparing the exclusive OR calculated for each row and each column at the time of power failure and the exclusive OR calculated for each row and each column at the time of power recovery does not match, the mismatch exclusion in the matrix Error data specifying means for specifying that the data at the position where the row and column to which the logical OR belongs are error data that causes the mismatch,
By calculating the exclusive OR of the exclusive OR of each data excluding the error data in the row to which the error data belongs and the exclusive OR stored at the time of power failure for the row to which the error data belongs Or, calculate the exclusive OR of the exclusive OR of each data excluding the error data in the column to which the error data belongs and the exclusive OR stored at the time of power failure for the column to which the error data belongs And a data recovery means for recovering the error data to normal data.

  In such a gaming machine of the present invention, when a power failure occurs, data for restoring the gaming state at the time of occurrence is stored in the storage means, and each row when these data are virtually arranged in a vertical and horizontal matrix. And the exclusive OR of each column is calculated and stored. Here, virtually arranging data in vertical and horizontal matrices means that the data itself may be stored, but it is only necessary to know where the data is arranged in the matrix. When the power is restored, the exclusive OR of each row and each column when virtually arranged in the vertical and horizontal matrix is calculated, and the calculated exclusive OR and each row and each column when the power interruption occurs Compare with exclusive OR. If the comparison result does not match, the error data causing the mismatch is identified, and the error data is restored to normal data. For this reason, even if error data is generated when the power is restored, it is possible to restore the gaming state when the power interruption occurs without initialization. Therefore, even if a power interruption occurs in a gaming state advantageous to the player, the player can continue the advantageous gaming state when the power interruption occurs, so the interest in the game will be reduced. Absent.

  In such a gaming machine, when there is no other error data in the row and column to which the error data belongs, the error data may be restored to normal data.

  In this way, if there is no other error data in the row and column to which the error data belongs, the exclusive OR of each data excluding the error data in the row (or column) to which the error data belongs and the row to which the error data belongs Error data can be restored to normal data by calculating an exclusive OR with the exclusive OR calculated at the time of power recovery for (or column). For this reason, even if error data is generated at the time of power recovery, it can be restored to the gaming state when the power interruption occurs without initialization, so the power interruption occurs in a gaming state advantageous to the player Even so, the player can continue the advantageous gaming state when the power cut occurs, and the interest in the game will not be reduced. In addition, since normal data is restored only when there is no other error data, no unnecessary processing is performed when there is other error data, and control is performed in comparison with control that makes processing impossible. Can be speeded up.

  In such a gaming machine, whether to store data for restoring the gaming state when a power interruption occurs may be determined according to the gaming state when the power interruption occurs.

  Here, examples of the gaming state when the power interruption occurs include a gaming state advantageous to the player and a case where a gaming medium is paid out. Specifically, a case where a big hit state, a probability change state, a short time state, a game medal lending or paying out, a ball lending or a winning ball is paying out, or the like can be considered.

  In this way, it is only necessary to store data for restoring the gaming state only when the gaming state is advantageous to the player, so that the gaming state is always restored when a power interruption occurs. Compared to a configuration for storing data, it is possible to reduce the control burden when a power interruption occurs.

Hereinafter, in order to clarify the contents of the present invention described above, examples will be described in the following order.
A. Pachinko machine configuration:
A-1. Configuration on the front side of the device:
A-2. Game board configuration:
A-3. Configuration of control circuit:
B. Overview of the game:
C. Recovery processing in the first embodiment:
C-1. Principle of recovery processing:
C-2. Example when recovery is not possible:
C-3. Processing when power failure occurs:
C-4. Processing when power is restored:
D. Recovery processing in the second embodiment:

A. Pachinko machine configuration:
A-1. Configuration on the front side of the device:
FIG. 1 is a front view of the gaming machine 1 of the present embodiment. As shown in FIG. 1, the front portion of the gaming machine 1 is mainly composed of a front frame 4, an upper plate portion 5, a lower plate portion 6, a game board 10, and the like. In FIG. 1, detailed illustration of the game board 10 is omitted. The front frame 4 is attached to a middle frame 3 (not shown), and the middle frame 3 is attached to a main body frame 2 (not shown). The middle frame 3 is formed of a plastic material and is attached to the inside of the main body frame 2. The main body frame 2 is a substantially rectangular frame formed by assembling wooden plate-like members, and forms an outer frame of the gaming machine 1. One end of the front frame 4 is pivotally supported with respect to the middle frame 3, and one end of the middle frame 3 is pivotally supported with respect to the main body frame 2. The game board 10 is detachably attached to the front side of the middle frame 3, and the front side is covered with the front frame 4.

  The front frame 4 is formed of a plastic material, and a circular opening 4a is formed at a substantially central portion. A transparent plate such as a glass plate is fitted in the opening 4a, and the board surface of the game board 10 disposed on the back side can be visually recognized. Further, the front frame 4 is provided with various LEDs 4b to 4f for enhancing the gaming effect.

  Further, an error LED display portion 4 h is provided on the upper portion of the front frame 4. The error LED display section 4h of the present embodiment lights or blinks in red when a severe error occurs and in orange when a minor error occurs. Here, a severe error is an error when, for example, it is necessary to work with the front frame 4 opened for recovery, or when parts need to be replaced. Is any other error.

  An upper dish portion 5 is provided below the front frame 4, and a lower dish portion 6 is provided below the upper dish portion 5. A locking device 9 is provided on the right side of the front frame 4, and a prepaid card type ball lending device 13 (CR unit) is provided on the left side of the front frame 4.

  The upper dish portion 5 is provided with a dish-shaped recess and a dish outer edge portion 5a formed so as to surround the recess. The game ball is thrown into a recess formed in the upper plate part 5 and supplied to the launching device unit 12 (see FIG. 5). The dish outer edge 5a is provided with various buttons such as a game ball lending switch 5b, a return switch 5c, and a discharge button for discharging the inserted game ball. Furthermore, a first speaker 5y having a plurality of long holes and a large number of small holes formed thereon is provided at a substantially central portion of the upper plate part 5.

  The lower plate part 6 is provided with a discharge port 6 a for discharging game balls from the inside of the gaming machine 1, and the discharged game balls are stored in the lower plate part 6. In order to discharge the game balls stored in the lower plate portion 6, a ball game hole (not shown) for discharging game balls from the lower plate portion 6 is provided on the bottom surface of the lower plate portion 6. A discharge knob 6b that opens and closes the ball hole is provided on the substantially central front side of the portion 6. The discharge knob 6b is normally in an upright state, but when the lower end is pressed to the back side, the upper end is rotated around the rotation shaft, the ball hole is opened, and the game balls accumulated in the lower dish portion 6 are discharged. It is possible. Moreover, the 2nd speaker 6c is provided in the right and left of the discharge knob 6b.

  An ashtray 7 is provided at the left end of the lower plate portion 6, and a firing handle 8 is provided at the right end of the lower plate portion 6. The firing handle 8 is provided with a touch switch 8a for detecting that the player is touching the handle. The rotation axis of the launching handle 8 is connected to a launching device unit 12 (not shown) mounted on the back side of the lower pan 6, and when the player rotates the firing handle 8, the movement of the launching handle 8 is caused to the launching device unit 12. Then, a launch motor (not shown) built in the unit rotates, and a game ball is launched with a strength corresponding to the rotation angle. On the left side surface of the launch handle 8, a launch stop switch 8b that is operated by the player to temporarily stop the launch of the game ball is disposed.

A-2. Game board configuration:
FIG. 2 is an explanatory diagram showing a board surface configuration of the game board 10. As described above, the game board 10 is detachably attached to the front side of the middle frame 3. As shown in FIG. 2, a substantially circular game area 11 surrounded by an outer rail 14 and an inner rail 15 is formed at the center of the game board 10.

  A central device 26 is provided in the approximate center of the game area 11, a variable winning device 18 is provided in a lower portion of the gaming area 11, and between the central device 26 and the variable winning device 18. A starting port (ordinary electric accessory) 17 is provided. The starting port (ordinary electric accessory) 17 is a so-called tulip type starting port configured such that a pair of blade pieces can be opened and closed on the left and right. Inside the start port 17, there are a start port (ordinary electric accessory) switch 17s (see FIG. 5) for detecting the passing of the game ball, and an ordinary electric accessory (start port) solenoid 17m for operating the wing piece. (See FIG. 5). When the pair of wing pieces are opened to the left and right, the game ball is in an open state in which the possibility of entering the game ball is increased, and the pair of wing pieces are upright, and the game ball is in a normal state in which the possibility of entering the game ball is reduced.

  An effect display device 27 is provided substantially in the center of the central device 26. The effect display device 27 is equipped with a liquid crystal screen, and can change and display various effect symbols such as character symbols and background symbols. Various symbols displayed on the screen of the effect display device 27 will be described later.

  A symbol display device 28 is provided at the lower left of the central device 26. Although the detailed configuration will be described later, the symbol display device 28 can display normal symbols, special symbols, and the like in a variable stop manner.

  A normal symbol operation gate 36 is provided at the left end of the game area 11, and a gate switch 36 s for detecting the passage of the game ball is provided inside the gate. Further, a lamp windmill 24 is provided between the normal symbol operating gate 36 and the central device 26. A number of obstacle nails 23 are provided between and around each of these gaming devices.

  A large winning device 31 is provided in the approximate center of the variable winning device 18. This special winning device 31 is composed of a special winning opening 31d that opens substantially in a substantially rectangular shape, a special winning opening solenoid 31m (see FIG. 5) for opening and closing the special winning opening 31d, and the like. The special winning opening 31d is opened when a predetermined condition to be described later is satisfied. As a result, the game ball enters the big winning opening 31d with a high probability, and is a special gaming state advantageous to the player. A gaming state is started. Note that a big prize opening switch 31s is provided inside the big prize opening 31d, and it is possible to detect a game ball won in the big prize opening 31d.

  An out port 48 is provided below the game board 10, and a back ball preventing member 58 is provided below the out port 48. The back ball prevention member 58 has a function of preventing a game ball that has returned without reaching the game area 11 from returning to the launch position. On the other hand, a foul ball prevention member (not shown) is attached to the tip of the inner rail 15, and a return rubber (not shown) is attached to the outer rail 14 on the substantially opposite side (the right half side of the game board 10). Attached along the fitting.

  FIG. 3 is an explanatory diagram showing the configuration of the symbol display device 28 mounted on the gaming machine 1 of this embodiment. The symbol display device 28 of the present embodiment is mainly composed of a normal symbol display unit 29 and a special symbol display unit 30. The normal symbol display unit 29 includes a left normal symbol display unit 29a and a right normal symbol display unit 29b, and the special symbol display unit 30 includes a left special symbol display unit 30a and a right special symbol display unit 30b. Has been. The two normal symbol display portions 29a and 29b are configured by using light emitting diodes (LEDs), the left normal symbol display portion 29a lights red light, and the right normal symbol display portion 29b lights green light. It is possible to do. The special symbol display unit 30 uses a so-called 7-segment LED. Of these, the 7 segment portion constitutes the left special symbol display portion 30a, and the comma portion constitutes the right special symbol display portion 30b. Yes. The 7-segment portion and the comma portion can be lit with red, orange, or green light. In addition, the symbol display device 28 is also provided with a normal symbol hold display unit 29c and a special symbol hold display unit 30c. Each of these consists of four LEDs. The display contents of the symbol display device 28 having such a configuration will be described later.

  FIG. 4 is an explanatory diagram showing the screen configuration of the effect display device 27 installed in the gaming machine 1 of this embodiment. As described above, the effect display device 27 is mainly configured by using a liquid crystal display screen, and on the liquid crystal screen, three character symbols 27a, 27b, 27c and a background symbol 27d displayed on the background thereof. And are displayed. Among these, the three character symbols 27a, 27b, and 27c are variably displayed in various manners in accordance with the display of the special symbol 30 shown in FIG. 3 so that a game can be produced. Detailed production contents will be described later.

A-3. Control circuit configuration:
Next, the configuration of the control circuit of the gaming machine 1 of this embodiment will be described. FIG. 5 is a block diagram showing the configuration of the control circuit in the gaming machine 1 of the present embodiment. As shown in the figure, the control circuit of the gaming machine 1 is composed of a number of control boards, various boards, relay terminal boards, and the like. A main control board 200 that controls whether or not it is involved, a sub-control board 220 that controls the production of games using symbols, LEDs, and sound effects, and a payout control that controls the operation of paying out balls and prize balls A board 240 and a launch control board 260 for controlling the launch of the game ball are configured. These control boards include a CPU that executes various logic operations and calculation operations, a ROM that stores various programs and data executed by the CPU, a RAM that stores temporary data when the program is executed, and peripheral devices. Peripheral device interface (PIO) for exchanging data with the CPU, an oscillator that outputs a clock for the CPU to perform operations, a watchdog timer for monitoring the runaway of the CPU, and a CTC (counter that periodically generates an interrupt signal) A variety of peripheral LSIs such as a timer circuit are connected to each other via a bus. Further, the direction of the arrow shown in FIG. 5 represents the direction in which data or signals are input / output. In FIG. 5, only the CPU 201 and RAM 202 mounted on the main control board 200 and the CPU 221 and ROM 223 mounted on the sub control board 220 are shown, and the ROM, PIO, and sub mounted on the main control board 200 are illustrated. The RAM and PIO mounted on the control board 220 and the CPU, RAM, ROM, etc. mounted on other control boards are not shown.

  The RAM 202 of the main control board 200 is provided with a stack area for storing the contents of all the registers by saving the contents of all the registers of the CPU 201 when a power failure occurs due to a power failure or the like. Here, the stack area is an area that is temporarily saved when it is not desired to erase the contents of all registers by overwriting. In addition, this stack area is sometimes called a backup area because power is supplied by a backup power source (for example, a button battery) even when the power is cut off.

  As shown in the drawing, the main control board 200 receives a game ball detection signal from the start port switch 17s, the big prize port switch 31s, the gate switch 36s, etc. Are determined, commands for instructing various operations are output toward the sub-control board 220, the payout control board 240, the launch control board 260, and the like. The main control board 200 is also connected with a count switch 8 s that detects a game ball launched from the launcher unit 12. Further, the main control board 200 includes a normal electric accessory solenoid 17m for opening and closing a pair of blade pieces provided at the start opening 17, a large winning opening solenoid 31m for opening and closing the large winning opening 31d, and The symbol display device 28 for displaying the fluctuation stop of the normal symbol and the special symbol is connected via the relay terminal board, and signals are output to these various solenoids 17m and 31m and the symbol display device 28. Thus, the operation is also controlled.

  When the sub-control board 220 receives various commands from the main control board 200, it analyzes the contents of the command and produces a game according to the result. In other words, the effect control board 230 that drives the effect display device 27 described above, the amplifier board 224 that drives the various speakers 5y and 6c, and the drive signals that drive the various decorative LEDs 4b to 4g are output from the decoration drive board 226. By doing this, the game is directed. Further, according to the output signal from the decorative drive board 226, the error LED display section 4h is lit or blinks in red or orange depending on the level of error occurrence.

  The payout control board 240 is responsible for various controls relating to so-called ball rental and prize ball payout. For example, when the player operates the ball lending switch 5b or the return switch 5c provided in the above-described upper plate part 5, this signal is transmitted from the ball lending display board 242 to the ball lending device 13 via the relay terminal board. Is done. The ball lending device 13 pays out a ball while exchanging data with the payout control board 240. When the main control board 200 outputs a prize ball payout command, the payout control board 240 receives this command and outputs a drive signal to the payout motor 109m to pay out the prize ball.

B. Overview of the game:
Next, an outline of the game performed in the gaming machine 1 of the present embodiment having the above-described configuration will be briefly described.

  In the gaming machine 1 of the present embodiment, a game is performed as follows. First, when a player throws a game ball into the recess of the upper plate portion 5 and rotates the launch handle 8, the game balls thrown into the upper plate portion 5 are supplied to the launcher unit 12 one by one, The game area 11 is fired as described above with reference to FIG. The strength at which the game ball is launched can be adjusted by the rotation angle of the launching handle 8, and the player can aim the game ball by changing the rotation angle of the launching handle 8.

  When the launched game ball passes through the normal symbol operation gate 36 provided on the left side of the game area 11, the normal symbol variation display is started on the symbol display device 28. As described above with reference to FIG. 3, the symbol display device 28 is provided with the left normal symbol display unit 29a and the right normal symbol display unit 29b. The left normal symbol display unit 29a is configured to be able to light red light, and the right normal symbol display unit 29b is configured to be able to light green light. When the normal symbol variation display is started, the left and right normal symbol display portions 29a and 29b perform blinking display.

  FIG. 6 is an explanatory diagram conceptually showing a state in which normal symbols are variably displayed. The normal symbol in the variable display can take the four states shown in the figure. First, the state shown in FIG. 6A represents a state in which the left normal symbol display unit 29a is turned on and the right normal symbol display unit 29b is turned off. FIG. 6B shows a state where both the left normal symbol display unit 29a and the right normal symbol display unit 29b are lit. FIG. 6C shows a state in which the left normal symbol display unit 29a is turned off and the right normal symbol display unit 29b is turned on. FIG. 6D shows the left normal symbol display unit 29a and the right normal symbol display. Each of the portions 29b represents a state where the light is extinguished. During the normal symbol variation display, these four display states are displayed in such a manner that they are switched one after another at a high speed, and when a predetermined time elapses, they are stopped and displayed in one of the four display states. At this time, when the display is stopped in a predetermined display state, a so-called normal symbol is hit and the start port 17 is opened for a predetermined time (for example, 0.5 seconds). In the present embodiment, the display state shown in FIG. 6C, that is, the state in which the left normal symbol display unit 29a is turned off and the right normal symbol display unit 29b is lit is set for the normal symbol. Yes.

  If the game ball passes through the normal symbol operation gate 36 during the normal symbol variation display, the passing of the game ball is stored as the number of holdings, and after the current normal symbol variation display is completed, the variation display is displayed. Done. Up to four normal symbol holds can be stored, and the stored number of normal symbols is displayed on the normal symbol hold display section 29c (see FIG. 3).

  Next, when a game ball enters the start port 17 that is in an open state, a special symbol variation display is started. The special symbol is displayed by the special symbol display unit 30 as described with reference to FIG. As described above, the special symbol display unit 30 of this embodiment is composed of the left special symbol display unit 30a composed of 7-segment LEDs and the right special symbol display unit 30b of the comma portion. The symbol display sections 30a and 30b can be lit in red, orange, or green.

  FIG. 7 is an explanatory diagram conceptually showing a state in which special symbols are variably displayed. During the special symbol variation display, the left special symbol display unit 30a displays any one of “A”, “Y”, and “−”, and the right special symbol display unit 30b displays a comma “.”. The Further, “A” and “Y” in the left special symbol display unit 30a and the comma “.” In the right special symbol display unit 30b can take three states of red, orange, and green. The “-” in 30a can take either a red or green state. In the special symbol display unit 30 of the present embodiment, these display states can be combined to display 12 types of states shown in FIG. In the figure, the 7-segment LED or the comma portion that is finely hatched indicates that it is lit in a red state. In addition, a little rough hatching indicates that it is lit and displayed in an orange state, and a rough hatching indicates that it is lit and displayed in a green state. . When the special symbol variation display is started, these 12 types of display states are displayed in such a manner that they are switched one after another at a high speed, and when a predetermined time elapses, the display is stopped and displayed in any state.

  If the symbol displayed as “-” is “-”, the special symbol is removed, but if any other combination of symbols is stopped, the special symbol is a hit and the gaming state is advantageous to the player. A special gaming state is started. In other words, there are 10 types of combinations of symbols that are won by the special symbol, excluding “−” from the 12 types of symbols shown in FIG. Further, the special gaming state of the present embodiment is configured such that the gaming state (round) in which the special winning opening 31d is in an open state is repeated a predetermined number of times. Since the big winning opening 31d is greatly opened, a game ball enters with high probability. As a result, the player can acquire many prize balls while a predetermined number of rounds are repeated.

  If a game ball enters the start port 17 during the special symbol fluctuation display, the game ball entry is stored as the number of special symbols held, and after the current special symbol fluctuation display ends, Fluctuation display is performed. It is possible to store up to four special symbols on hold, and the number of stored special symbols is displayed on the special symbol hold display section 30c (see FIG. 3).

  Among the 10 types of combinations for which the special symbol shown in FIG. 7 is a winning combination, the five types of combinations surrounded by a solid line are so-called “probability variation symbols”, and the special symbols that are variably displayed are those probability variation symbols. If the combination is stopped in any of the combinations, the probability that the winning symbol is stopped and displayed is higher than that in the normal state from the end of the special game to the start of the next special game. In this way, a gaming state in which the probability of being stopped and displayed with a winning symbol is high is called a probability variation state (or probability variation state).

  Furthermore, among the 10 types of combinations that the special symbol shown in FIG. 7 is a winning combination, the five types of combinations surrounded by a broken line are so-called “normal symbols”, and the special symbols that are variably displayed are these combinations. If you stop at one of the combinations of normal symbols, after the special game ends, until the special symbol is variably displayed a predetermined number of times (100 times in this embodiment) or until the next special game state is started, The variation time of the special symbol is shortened and the opening time of the start port 17 is set to be slightly longer. Such a gaming state is referred to as a variable time shortening state (or a short time state).

  Whether or not to stop the special symbol at the winning symbol, and whether to stop at the symbol of the probability variation symbol or the normal symbol is determined by the main control board 200.

  In the gaming machine 1 of the present embodiment, the time reduction function is activated not only when the stop symbol is displayed with the normal symbol but also when the stop symbol is displayed with the probability variable symbol. Eventually, if the special symbol is stopped and displayed in any of the ten types of winning symbols shown in FIG. 7, the time-saving function is always activated after the special gaming state ends.

  In accordance with the above-described change stop display of the special symbol, the effect display device 27 performs various effects using the effect symbols. FIG. 8 is an explanatory diagram illustrating an aspect of the effect performed by the effect display device 27. As described above with reference to FIG. 4, the three character symbols 27 a, 27 b and 27 c are displayed on the liquid crystal display screen constituting the effect display device 27. When the variation display of the special symbol is started on the symbol display device 28 described above, also on the effect display device 27, these three character symbols 27a, 27b, and 27c start the variation display all at once. In the present embodiment, as a character design, a design in which nine numbers from “1” to “9” are designed is prepared.

  FIG. 8 (a) conceptually shows how the three character symbols 27a, 27b, and 27c are variably displayed. When a predetermined time elapses after the variable display is started, the left character symbol 27a is first stopped and displayed in any one of “1” to “9”, and then the right character symbol 27c is stopped and displayed. The middle character symbol 27b is stopped and displayed.

  The combination of the three character symbols 27a, 27b, and 27c that are stopped and displayed on the effect display device 27 is configured to be interlocked with the combination of the special symbols that are stopped and displayed on the symbol display device 28 described above. For example, when the special symbol of the symbol display device 28 stops at the winning symbol, the three character symbols 27a, 27b, and 27c of the effect display device 27 are stopped and displayed with the same symbol. In particular, when the special symbol of the symbol display device 28 stops at the above-described probability variation symbol, the three character symbols 27a, 27b, 27c of the effect display device 27 are stopped and displayed with the same symbol representing an odd number. On the other hand, when the special symbol of the symbol display device 28 is out of position and stops at the symbol, the three character symbols 27a, 27b, and 27c are stopped and displayed in any combination that does not align with the same symbol.

  As described above, the special symbols displayed on the symbol display device 28 and the three character symbols 27a, 27b, and 27c displayed on the effect display device 27 correspond to each other in the display contents, and the respective display symbols are displayed. Since the timing for confirmation is set to be the same, it is possible to play a game while viewing either display. However, as shown in FIG. 2, the effect display device 27 is provided at a position that is more visible than the symbol display device 28, the display screen is larger, and the display content is easier to understand. It is normal to play a game while viewing the screen of the display device 27. Therefore, when the left character symbol 27a initially stopped and displayed on the display screen of the effect display device 27 and the right character symbol 27c subsequently stopped and displayed are the same symbol, it is stopped and displayed last. The player pays attention to the variation of the symbol so that the middle character symbol 27b may stop at the same symbol and become a so-called big hit state. In this way, the effect of variably displaying the last symbol with the two character symbols stopped at the same symbol is called a reach effect, and it is possible to increase the interest of the player by performing the reach effect. It has become.

C. Recovery processing in the first embodiment:
In the gaming machine 1, when the power is cut off, the contents of all registers of the CPU 201 are virtually stored in the stack area of the RAM 202 as a vertical and horizontal matrix, and the checksum calculated for each row and each column is calculated. Memorize Sam. Even when the power is restored, the checksum of each row and each column is calculated and compared with the checksum of each row and each column when the power failure occurs. If the comparison results match, the game state is restored to when the power is cut off. On the other hand, if the results of the comparison do not match, it is determined that an error has occurred when the power is restored, the error data is identified, the error data is restored to normal data, and the power failure occurs. Restore to the gaming state. In the following, first, the principle of the recovery process will be described, and then an example in the case where recovery cannot be performed will be described.

C-1. Principle of recovery processing:
FIG. 9 is an explanatory diagram showing the stack area of the RAM 202 when the power interruption occurs virtually as a vertical and horizontal matrix. As shown in the figure, the contents of all registers of the CPU 201 are virtually stored in the stack area of the RAM 202 as a vertical and horizontal matrix when a power interruption occurs. Then, an exclusive OR is calculated for each row and each column, and the calculated exclusive OR is stored as a checksum. Each data is represented by a 2-digit hexadecimal number.

  FIG. 10 is an explanatory diagram showing the stack area of the RAM 202 in a state where an error has occurred at the time of power recovery as a virtually vertical and horizontal matrix. As shown in the figure, when an error occurs when the power is restored and the value of the 3rd row and Eth column indicated by hatching is stored as “86”, the checksum of the 3rd row becomes “9C”. The checksum of column E is “3C”. Here, based on whether or not the checksum when the power is restored matches the checksum when the power is cut off, it is determined whether or not normal data is restored when the power is restored. Therefore, if the result of comparing the checksum at the time of power interruption and the checksum at the time of power recovery does not match, it can be determined that normal data could not be recovered at the time of power recovery.

  As shown in FIG. 10, when an error occurs in the data “86” in the third row and the E column when the power is restored, the check sum “9C” in the third row to which the error data belongs and the check sum “3C” in the E column are shown in FIG. Unlike the checksum “B4” in the three rows and the checksum “14” in the E column stored at the time of occurrence of the power interruption shown in FIG. For this reason, it is possible to specify that the data at the position where the row where the check sum does not match and the column where the check sum does not match is error data. In the error occurrence example shown in FIG. 10 (part 1), the checksum “3C” for 3 rows and the checksum “3C” for column E are stored when the power failure shown in FIG. Unlike “B4” and the checksum “14” in the E column, the data “86” in the 3rd row and the E column can be identified as error data.

  When the error data is specified in this way, by calculating the exclusive OR of the exclusive OR of each data excluding the error data in the row to which the error data belongs and the exclusive OR calculated when the power is restored. , Error data can be recovered to normal data. FIG. 11 is an explanatory diagram showing a state when error data is restored to normal data. As shown in the figure, exclusive OR of each data of 3 rows is calculated except error data “86” of 3 rows and E columns. That is, as shown in FIG. 9, when “5” of data “54” in 3 rows and A columns is the upper 4 bits, “4” is the lower 4 bits, and each is expressed in binary, “5” is “ “0, 1, 0, 1”, and “4” becomes “0, 1, 0, 0”. In addition, when “F” of the data “F5” in 3 rows and B columns is set to the upper 4 bits, “5” is set to the lower 4 bits, and each is expressed in binary, “F” is “1, 1, 1, 1”. "5" becomes "0, 1, 0, 1". Then, when calculating an exclusive OR (XOR) between the upper 4 bits and the lower 4 bits, the upper 4 bits are “1, 0, 1, 0” and the lower 4 bits are “0, 0, 0, 1 ".

  In this way, each data of 3 rows excluding data “86” of 3 rows and E columns, that is, data “92” of 3 rows and C columns, data “0C” of 3 rows and D columns, and data of 3 rows and F columns When the exclusive OR is sequentially calculated for “F5”, data “DB” in row 3 and column G, and data “0B” in row 3 and column H, as shown in FIG. , 0, 0, 1 ”, and the lower 4 bits are“ 1, 0, 1, 0 ”. When this is expressed in hexadecimal, it is “1A”.

  When the exclusive OR of the data “1A” obtained in this way and the checksum “B4” of three rows when the power interruption shown in FIG. 9 occurs, “AE” is obtained. This value “AE” is exactly the same as the data “AE” in the third row and the E column shown in FIG. That is, an exclusive OR is calculated for each of the three rows of data excluding the error data “86”, and a checksum of three rows when a power interruption occurs is further added to the calculated exclusive OR. By calculating the exclusive OR with “B4”, the error data can be restored to normal data.

  In this way, data expressed in 2-digit hexadecimal numbers can be expressed using “1” or “0” when expressed in binary numbers of upper 4 bits and lower 4 bits. Here, the case where error data occurs is a case where “1” expressed in binary number changes to “0” or “0” expressed in binary number changes to “1”. For this reason, error data is identified by comparing the checksum at power failure and the checksum at power recovery, and an exclusive OR is calculated for each data in the row to which the error data belongs. Further, by calculating the exclusive OR with the checksum of the row to which the error data when the power interruption occurs is further calculated with respect to the calculated exclusive OR, “0” is changed to “1”, “ Since “1” changes to “0”, the error data can be restored to normal data. In the above description, the description has been focused on “3 rows” in the 3rd row and the E columns, but it goes without saying that error data can be restored to normal data in the same manner even if the “E column” is focused. Yes.

  FIG. 12 is an explanatory diagram showing virtually the stack area of the RAM 202 as a vertical and horizontal matrix in a state where two errors have occurred in one column when the power is restored. As shown in the figure, when an error occurs in the data “86” in the 3rd row and the E column and the data “02” in the 5th row and E column when the power is restored, the checksum “3” to which the error data belongs is displayed. 9C ”, the checksum“ 56 ”of the five rows to which the error data belongs, and the checksum“ E2 ”of the E column to which the error data belong are stored in the case of the occurrence of the power interruption shown in FIG. Unlike the “B4”, the checksum “88” of the fifth row, and the checksum “14” of the E column, they are inconsistent. For this reason, error data can be specified based on the rows and columns whose checksums do not match. In the error occurrence example (part 2) shown in FIG. 12, the checksum “9C” in the third row, the checksum “56” in the fifth row, and the checksum “E2” in the E column are detected when the power failure shown in FIG. Unlike the checksum “B4”, the checksum “88” of the fifth row, and the checksum “14” of the E column when they are stored, they do not match, so the data “86” of the third row E column and the fifth row E The column data “02” can be specified as error data.

  When the error data is specified in this way, an exclusive OR is sequentially calculated for each data in the three rows excluding the data “86” in the third row and the E column. Then, when calculating the exclusive OR of the exclusive OR obtained by the calculation and the checksum “B4” of the three rows when the power interruption shown in FIG. 9 occurs, “AE” is obtained. This value “AE” is exactly the same as the data “AE” in the third row and E column shown in FIG. 9, and the error data can be restored to normal data.

  Further, exclusive OR is sequentially calculated for each of the data in the five rows excluding the data “02” in the fifth row and the E column. Then, by calculating the exclusive OR of the exclusive OR obtained by the calculation and the checksum “88” of the five rows when the power interruption shown in FIG. 9 occurs, “DC” is obtained. This value “DC” is exactly the same as the data “DC” in the 5th row and the Eth column shown in FIG. 9, and the error data can be restored to normal data.

C-2. Example when recovery is not possible:
As described above, when a power failure occurs, the contents of all the registers of the CPU 201 are virtually stored in the stack area of the RAM 202 as a vertical and horizontal matrix, the checksum of each row and each column is calculated, and then the calculated check I remember Sam. Even when the power is restored, the checksum of each row and each column is calculated and compared with the checksum of each row and each column when the power failure occurs. If the comparison results match, the game state is restored to when the power is cut off. On the other hand, if the comparison results do not match, it is determined that an error has occurred when the power is restored, and the data at the position where the checksum mismatch row and the checksum mismatch column intersect is the error data. It is determined that it is possible to restore error data to normal data. If recovery is possible, recovery processing is performed to recover error data to normal data.

  However, when other error data exists in the row and column to which the error data belongs, the error data cannot be restored to normal data. FIG. 13 is an explanatory diagram showing a stack area of the RAM 202 as a virtually vertical and horizontal matrix when other error data exists in the row and column to which the error data belongs. As shown in the figure, when an error occurs when the power is restored, the value of the third row E column indicated by hatching is stored as “86”, and the value of the third row G column indicated by hatching is also stored as “DB”. The checksum for the three rows is calculated as “9C”. Further, when an error occurs when the power is restored and the value of the 5th row and E column indicated by hatching is stored as “02”, the checksum of the E column is calculated as “E2”.

  At this time, even if the checksum of the fifth row is calculated as “56” and the checksum of the G column is calculated as “AD”, an error occurs when the power is restored, and the value of the third row and G column indicated by hatching is Since “DB” is stored and the value of the fifth row and E column indicated by hatching is stored as “02”, it is determined whether or not “32” of the fifth row and G column indicated by cross hatching is normal data. I can't do it.

  In addition, other error data (“DB” in the third row G column “DB”, ““ in the third row E column ”,“ 02 ") cannot be restored to normal data. That is, in the recovery process described above, only when error data is in one place in a row or column, the exclusive OR of each data excluding error data in the row to which the error data belongs and the power off for the row to which the error data belongs. By calculating the exclusive OR with the exclusive OR stored at the time of occurrence, or the exclusive OR of each data excluding error data in the column to which the error data belongs and the column to which the error data belongs This is because error data can be restored to normal data by calculating an exclusive OR with the exclusive OR stored at the time of occurrence. Therefore, when other error data exists in the row and column to which the error data belongs, the error data cannot be restored to normal data.

C-3. Processing when power failure occurs:
Next, a description will be given of a power failure occurrence process using the above-described recovery process principle. FIG. 14 is a flowchart showing a process when a power interruption occurs. This process is started when an interrupt is generated toward the CPU 201 of the main control board 200 when it is detected that the voltage supplied from the power source has dropped below a predetermined value. Further, since this processing is urgent, it is set as an interrupt that cannot be masked, and is executed immediately when an interrupt occurs.

  First, when a power failure occurs due to a power failure or the like, the CPU 201 saves the contents of all registers of the CPU 201 to the stack area of the RAM 202, thereby storing the contents of all registers in the stack area of the RAM 202 (S110). Subsequently, the CPU 201 stores the value of the stack pointer (SP) in the stack area of the RAM 202 (S120). The start address of the program is set in the stack pointer (SP). Therefore, if the contents of all the registers and the contents of the stack pointer are stored, even when the program is started again, it can be started from the same location under the same conditions.

  Next, the CPU 201 stops the payout motor 109m (S130) and executes the checksum process described above (S140). That is, as shown in FIG. 9, an exclusive OR is calculated for each data in each row and each column, and the calculated exclusive OR is stored in the stack area of the RAM 202 as a checksum.

  Subsequently, the CPU 201 sets “5AH” in the power-off check flag area of the RAM 202 (S150), and then prohibits access to the RAM 202 (S160). As described above, when “5AH” is set in the power-off check flag area, it is determined that the power-on is restored from the power-off when the power is turned on, and the contents stored in the RAM 202 when the power-off occurs are stored. By reading, it becomes possible to recover the gaming state when the power interruption occurs. Further, by prohibiting access to the RAM 202, the contents of all the registers of the CPU 201 saved in the stack area of the RAM 202 are prevented from being overwritten with other data.

  Next, the CPU 201 executes a process of resetting the watchdog timer mounted on the control board until the power is turned off (S170). A signal for initializing the CPU 201 is output from the watchdog timer, and the watchdog timer is reset on the program before the initialization signal is output from the watchdog timer. In this way, if the CPU 201 runs out of control, the watchdog timer cannot be reset, so the CPU 201 is initialized by the initialization signal output from the watchdog timer, and can immediately recover from the runaway. . Therefore, processing for resetting the watchdog timer is performed.

C-4. Processing at power recovery:
When the power is restored after the power is cut off due to a power failure or the like, the power recovery process is executed. FIG. 15 is a flowchart showing a process when the power is restored.

  When the power is restored, the CPU 201 determines whether or not “5AH” is set in the power-off check flag area of the RAM 202 (S210). When “5AH” is set in the power-off check flag area (S210: YES), it is determined that the power is turned on after the power-off occurs, that is, the power is restored. On the other hand, when “5AH” is not set in the power-off check flag area (S210: NO), it is determined that the power is normally turned on, and processing at the time of normal power-on is executed (S340 to S370). ). In addition, the process of S340-S370 is mentioned later.

  Next, the CPU 201 executes checksum processing (S220). That is, the exclusive OR is calculated for each row and each column when the power is restored as in the case of the occurrence of the power interruption shown in FIG. Then, it is determined whether or not the result of the checksum process is normal (S230). That is, whether or not the result of comparing the checksum for each row and each column calculated in S220 with the checksum for each row and each column stored by the checksum processing at the time of the power interruption coincides. Judging. If the comparison results match (S230: YES), the stack pointer (SP) is returned to the state when the power interruption occurred (S240). That is, the stack pointer (SP) stored in the stack area of the RAM 202 is returned.

  Subsequently, the CPU 201 clears the power-off check flag area of the RAM 202 (S250), sets an initial value when power is restored (S260), and then periodically generates an interrupt signal CTC (counter counter Timer circuit) is set (S270). Then, the contents of all the registers saved in the stack area of the RAM 202 are returned to all the registers of the CPU 201 (S280).

  Next, the CPU 201 determines whether or not the interruption is permitted when the power interruption occurs (S290). That is, it is determined by, for example, an interrupt request flag whether or not a so-called maskable interrupt is permitted when a power interruption occurs. If the interrupt is permitted when the power is cut off (S290: YES), the interrupt is permitted (S300). Then, after the interrupt is permitted, or when the interruption of power supply has not occurred (S290: NO), the program is resumed by returning to the program execution position when the power supply interruption has occurred (S310). As a result, it is possible to return to the gaming state when the power interruption occurs.

  If the checksum comparison result does not match in S230 (S230: NO), the CPU 201 determines whether recovery is possible (S320). As described above with reference to FIG. 10, since the data at the position where the row having the different checksum and the column having the different checksum intersect is the error data, the specified error data can be restored to the normal data. It is determined whether or not. That is, as described above with reference to FIG. 13, it is possible to restore specified error data to normal data by determining whether or not other error data exists in the row and column to which the error data belongs. It is determined whether or not. If the recovery is possible (S320: YES), the CPU 201 executes a recovery process for recovering the error data to normal data as described above with reference to FIG. 11 (S330).

  On the other hand, when it is impossible to recover (S320: NO) or when “5AH” is not set in the power-off check flag area in S210 (S210: NO), the CPU 201 turns on the normal power-on. Therefore, normal power-on processing is executed (S340 to S370). That is, after initializing the stack area of the RAM 202 (S340), initial values are set when the power is turned on (S350). Then, after setting a CTC (counter timer circuit) that periodically generates an interrupt signal (S360), an interrupt is permitted (S370). Thereby, since the process at the time of normal power-on is complete | finished, it becomes possible to launch a game ball from the launcher unit 12.

  The CPU 201 of the present embodiment constitutes one aspect of the “power failure occurrence calculation storage means, power supply return time calculation means, error data identification means, data recovery means, and determination means” of the present invention. The RAM 202 constitutes one aspect of the “storage means” of the present invention.

  As described above in detail, in the first embodiment, the checksum for each row and each column calculated at the time of power recovery, and the checksum for each row and each column stored by the checksum processing at the time of power failure are Even if the result of comparing the two is inconsistent, it is determined whether or not it is possible to identify error data and restore normal data. If recovery is possible, recovery processing for recovering error data to normal data is performed. For this reason, even if an error occurs in the data when the power is restored, it is possible to restore the gaming state when the power interruption occurs without initialization. Therefore, even if a power failure occurs in a gaming state that is advantageous to the player, if the recovery process is possible, the player will not be initialized when the power is restored. Therefore, the interest in the game is not reduced.

  Also, as shown in FIG. 9, in the first embodiment, each element when the data stored in the stack area of the RAM 202 is virtually arranged in a vertical and horizontal matrix is a 2-digit number expressed in hexadecimal. It is data. Therefore, if the data of each element arranged virtually in a vertical and horizontal matrix is reduced (for example, one digit in hexadecimal notation), the probability that other error data exists in the row and column to which the error data belongs is reduced. Therefore, the probability that error data can be restored to normal data increases. Therefore, if the data of each element is reduced, the reliability of the recovery process by such a method is improved.

D. Recovery processing in the second embodiment:
In the first embodiment described above, the case where one RAM 202 is mounted on the main control board 200 as shown in FIG. 5 has been described as an example. However, in the second embodiment, three RAMs 202 are main. A case where it is mounted on the control board 200 will be described. In the second embodiment, the three RAMs 202 are referred to as RAM 202-1, RAM 202-2, and RAM 202-3, respectively.

  FIG. 16 is an explanatory diagram showing a state in which the contents of all the registers of the CPU 201 are stored in the stack areas of the three RAMs 202-1, RAM 202-2, and RAM 202-3. As shown in the figure, the contents of all the registers of the CPU 201 are stored in the stack areas of the three RAMs 202-1 to 202-3 when a power failure occurs. That is, the contents of all the registers of the CPU 201 are saved in the stack areas of the three RAMs 202-1 to 202-3, thereby storing the contents of all the registers in the stack area. Specifically, the first half of the contents of all registers of the CPU 201 is stored in the stack area of the RAM 202-1 and the second half of the contents of all registers of the CPU 201 is stored in the stack area of the RAM 202-2. Then, a checksum between the data in the stack area of the RAM 202-1 and the data in the stack area of the RAM 202-2 is calculated, and the result is stored in the stack area of the RAM 202-3.

  When the power is restored, the checksum of the stack area of the RAM 202-1, RAM 202-2, and RAM 202-3 is calculated. Then, it is compared with the checksums of the stack areas of the RAMs 202-1, 202-2, and RAM 202-3 that are calculated and stored when the power interruption occurs. Even if error data is generated in the contents of the stack area of any one RAM 202 (for example, the stack area of the RAM 202-1), the data in the remaining stack areas of the RAM 202 (RAM 202) is the same as in the first embodiment. -2, the error data in the stack area of the RAM 202-1 can be restored to normal data. Therefore, even with such a method, it is possible to restore the gaming state when the power interruption occurs without initializing the RAM 202-1 and RAM 202-2.

  Note that even if the stack area of the RAM 202-1 and the stack area of the RAM 202-2 are normal and error data is generated in the stack area of the RAM 202-3, the stack area of the RAM 202-1 and the stack area of the RAM 202-2. Therefore, it is not necessary to restore the error data in the stack area of the RAM 202-3 to normal data. This is because the stack area of the RAM 202-3 is originally for storing a checksum between the stack area of the RAM 202-1 and the stack area of the RAM 202-2.

  FIG. 17 is a flowchart showing a recovery process when three RAMs 202-1 to 202-3 are mounted on the main control board 200. In the figure, the three RAMs 202-1 to 202-3 are abbreviated as RAM1 to RAM3, respectively. When the power is restored after the power interruption, the CPU 201 calculates the checksum of the stack areas of the three RAMs 202-1 to 202-3 (S410).

  Next, the CPU 201 determines whether or not the data in the stack area of the RAM 202-1 is normal (S420). As described in detail in the first embodiment, when the power interruption occurs, the check sum of the stack area of the RAM 202-1 is calculated and stored. By comparing the checksum at the time of return, it can be determined whether or not the data in the stack area of the RAM 202-1 is normal. If the data in the stack area of the RAM 202-1 is normal (S420: YES), the CPU 201 determines whether the data in the stack area of the RAM 202-2 is normal (S430). If the data in the stack area of the RAM 202-2 is normal (S430: YES), since the data in the stack area in the RAM 202-1 and the data in the stack area in the RAM 202-2 are both normal, this process ends. .

  On the other hand, if the data in the stack area of the RAM 202-2 is not normal (S430: NO), the CPU 201 determines whether the data in the stack area of the RAM 202-3 is normal (S440). When the data in the stack area of the RAM 202-3 is normal (S440: YES), the CPU 201 calculates the exclusive OR of the data in the stack area in the RAM 202-1 and the data in the stack area in the RAM 202-3. Thus, the error data in the stack area of the RAM 202-2 is restored to normal data (S450).

  On the other hand, if the data in the stack area of the RAM 202-3 is not normal (S440: NO), the CPU 201 returns error data in the stack area of the RAM 202-2 even if the data in the stack area of the RAM 202-1 is normal. Since normal data cannot be restored, the stack area of the RAM 202-1 and the stack area of the RAM 202-2 are initialized (S460).

  If the data in the stack area of the RAM 202-1 is not normal in S420 described above (S420: NO), the CPU 201 determines whether the data in the stack area of the RAM 202-2 is normal (S470). When the data in the stack area of the RAM 202-2 is normal (S470: YES), the CPU 201 determines whether or not the data in the stack area of the RAM 202-3 is normal (S480). When the data in the stack area of the RAM 202-3 is normal (S480: YES), the CPU 201 calculates the exclusive OR of the data in the stack area in the RAM 202-2 and the data in the stack area in the RAM 202-3. As a result, the error data in the stack area of the RAM 202-1 is restored to normal data (S490).

  On the other hand, if the data in the stack area of the RAM 202-2 is not normal (S470: NO), the CPU 201 converts the error data in the stack area in the RAM 202-1 and the error data in the stack area in the RAM 202-2 into normal data. Since it cannot be restored, the stack area of the RAM 202-1 and the stack area of the RAM 202-2 are initialized (S460).

  On the other hand, if the data in the stack area of the RAM 202-3 is not normal (S480: NO), the CPU 201 returns error data in the stack area of the RAM 202-1 even if the data in the stack area of the RAM 202-2 is normal. Since normal data cannot be restored, the stack area of the RAM 202-1 and the stack area of the RAM 202-2 are initialized (S460).

  The CPU 201 of the present embodiment constitutes one aspect of the “power failure occurrence calculation storage means, power supply return time calculation means, error data identification means, data recovery means, and determination means” of the present invention. The RAM 202 (202-1, 202-2, 202-3) constitutes one aspect of the “storage means” of the present invention.

  As described above in detail, in the second embodiment, three RAMs 202-1 to 202-3 are mounted on the main control board 200, and the first half of the contents of all the registers of the CPU 201 is stored in the RAM 202-1 when a power failure occurs. The second half of the contents of all registers of the CPU 201 is stored in the stack area of the RAM 202-2. Then, a checksum between the data in the stack area of the RAM 202-1 and the data in the stack area of the RAM 202-2 is calculated, and the result is stored in the stack area of the RAM 202-3. Therefore, even if the data in the RAM 202-1 becomes error data when the power is restored, if the checksum between the data in the RAM 202-2 and the data in the RAM 202-3 is calculated, the error data in the RAM 202-1 is returned to normal. Data can be recovered. Therefore, even with such a method, it is possible to restore the gaming state when the power interruption occurs without initializing the RAM 202-1 and RAM 202-2.

  In addition, in the second embodiment, the case where three RAMs 202-1 to 202-3 are mounted on the main control board 200 has been described as an example. However, even if the number of RAMs 202 increases, one checksum RAM 202 exists. Good. For this reason, it can be said that it is more efficient than so-called mirroring in which the same data is stored in two or more storage devices (for example, hard disks). Therefore, the investment cost for restoring the gaming state when the power interruption occurs can be suppressed at a low price.

  While various embodiments of the present invention have been described above, the present invention is not limited thereto, and is not limited to the wording of each claim unless it departs from the scope described in each claim. Improvements based on the knowledge that a person skilled in the art normally has can also be added as appropriate to the extent that those skilled in the art can easily replace them.

  In the second embodiment described above, the RAM 202-1, RAM 202-2, and RAM 202-3 checksums are calculated when the power is restored, and the RAM 202-1 and RAM 202- are calculated and stored when the power is cut off. 2, it is determined whether or not an error has occurred in comparison with the checksum of the stack area of the RAM 202-3. Instead, the checksum of the RAM 202-1 and the RAM 202-2 is restored when the power is restored. Is calculated. Next, an exclusive OR of the calculated check sum of the RAM 202-1 and the check sum of the RAM 202-2 is calculated and compared with the RAM 202-3. If the comparison results do not match, it is possible to determine that error data has occurred and implement the second embodiment described above.

It is a front view of the gaming machine of the present embodiment. It is explanatory drawing which shows the board surface structure of a game board. It is explanatory drawing which shows the structure of the symbol display apparatus mounted in the gaming machine of a present Example. It is explanatory drawing which shows the screen structure of the effect display apparatus mounted in the game machine of a present Example. It is the block diagram which showed the structure of the control circuit in the game machine of a present Example. It is explanatory drawing which showed notionally the mode that the normal symbol is variably displayed. It is explanatory drawing which showed notably the mode that the special symbol was variably displayed. It is explanatory drawing which illustrated the one aspect | mode of the effect performed with an effect display apparatus. It is explanatory drawing which shows the stack area | region of RAM at the time of a power failure occurring as a vertical and horizontal matrix virtually. It is explanatory drawing which shows the stack area of RAM in the state where the error generate | occur | produced one place at the time of a power supply return as a vertical / horizontal matrix. It is explanatory drawing which shows a mode when error data is restored to normal data. It is explanatory drawing which shows the stack area | region of RAM in the state where two places error generate | occur | produced in one column at the time of a power supply return as a vertical / horizontal matrix. It is explanatory drawing which shows the stack area | region of RAM when other error data exists in the row | line | column and column to which error data belongs as a vertical / horizontal matrix. It is a flowchart which shows a process when a power failure generate | occur | produces. It is a flowchart which shows a process when a power supply returns. It is explanatory drawing which shows a mode when the content of all the registers of CPU is memorize | stored in the stack area | region of three RAMs. It is a flowchart which shows the recovery process at the time of mounting three RAM on a main control board.

Explanation of symbols

1 ... A game machine,
201... CPU (power interruption occurrence calculation storage means, power restoration calculation means, error data identification means, data recovery means, determination means),
202 (202-1, 202-2, 202-3) ... RAM (storage means)

Claims (3)

In a gaming machine comprising storage means for storing data for restoring the gaming state when a power interruption occurs after the power is restored,
When the data of the storage means is virtually arranged in a vertical and horizontal matrix, the exclusive OR of each row and each column is calculated at the time of power interruption, and the exclusive power sum is stored in the storage means. Occurrence calculation storage means,
Power supply return time calculating means for calculating the exclusive OR of each row and each column when the data of the storage means is virtually arranged in a vertical and horizontal matrix;
If the result of comparing the exclusive OR calculated for each row and each column at the time of power failure and the exclusive OR calculated for each row and each column at the time of power recovery does not match, the mismatch exclusive in the matrix Error data specifying means for specifying that data at a position where a row and a column to which a logical OR belongs intersect is error data causing the mismatch,
By calculating the exclusive OR of the exclusive OR of each data excluding the error data in the row to which the error data belongs and the exclusive OR stored at the time of power failure for the row to which the error data belongs Or, calculate the exclusive OR of the exclusive OR of each data excluding the error data in the column to which the error data belongs and the exclusive OR stored at the time of power failure for the column to which the error data belongs And a data recovery means for recovering the error data to normal data. In the gaming machine according to claim 1,
The data recovery means recovers the error data to normal data when there is no other error data in the row and column to which the error data belongs. In the gaming machine according to claim 1 or 2,
A gaming machine comprising: a determination unit that determines whether or not to store data for restoring a gaming state when a power interruption occurs according to a gaming state when the power interruption occurs.

Images