JP2007181089A - Serial connection inverter piezoelectric oscillator - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To apply a serial connection inverter piezoelectric oscillator to a sensor oscillator of QCM or the like which detects a fine mass using a piezoelectric vibration chip, or an oscillation circuit of an osicllator used for a frequency reference for communication. <P>SOLUTION: A piezoelectric oscillation circuit is provided in which oscillation conditions of the circuit are made clear by simulation to facilitate the configuration of the oscillation circuit on the basis of a result, power supply variation characteristics are improved, a variable range is widened and further, reliability is improved. Thus, oscillation can be easily performed particularly in low frequency oscillation and further, reactance of the circuit can be enlarged to an inductive range without using an inductor. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a sensor oscillator such as a QCM that detects a minute mass using a piezoelectric vibrator, and an oscillation circuit of an oscillator used as a frequency reference for communication.

  FIG. 25 shows a conventional oscillation circuit example. In this circuit, the feedback point: Rf (in this case, 20 MΩ at 20 KHz to 60 KHz) larger than the output of the inverter is inserted to stabilize the operating point. The inverter input is grounded (GND) via a capacitor Cg, and is further connected to the inverter output via a piezoelectric vibrator and resistor Rd from the inverter input. In addition, the ground is connected (GND) through a capacitor: Cd from the connection point of the capacitor and the resistor. Connect the ground (GND) terminal of the inverter to the ground, connect the power supply terminal to the power supply, insert a pass capacitor between the power supply terminal and the ground, and ground the power supply line in an AC manner.

  FIG. 26 shows an oscillation output waveform of the circuit shown in FIG. The output waveform rises and falls slowly and is not a perfect rectangular wave.

  FIG. 27 shows the relationship between the oscillation frequency and current consumption versus power supply voltage of the circuit. The oscillation stops when the power supply voltage is 3.7 Vdc.

FIG. 28 shows a change in oscillation frequency due to the capacitance of the capacitor inserted in series with the piezoelectric vibrator. As a variable range, Δf / f0≈35 ppm is obtained. (Δf = oscillation frequency−f0; f0 = nominal frequency (= 32.768 kHz))
Next, simulation is performed according to the circuit block diagram of the conventional circuit of FIG. Capacitor: C5 is the output capacity of the inverter 1. Kirchhoff's law is applied to the figure. Equations (1), (2), and (3) are obtained from the current relationship. Equations (4), (5), and (6) are obtained from the voltage relationship.
Equation (7) indicating the critical condition of oscillation is obtained from Equations (1) to (6).
The circuit impedance from the oscillator impedance: zxt is obtained from the equation (7) to obtain the equation (8).
The impedances z1 to z6 are set as shown in the equation (9), and substituted into the equation (8), and the circuit impedance from the transducer impedance: zxt is obtained from the equation (7). Assuming that the circuit resistance is Rci and the circuit capacitance is Cci, the equation (10) is obtained.
The ra. ca. rb. cb is shown in equation (11).
The simulation results of Rci and Cci shown in Expression (10) are shown in FIGS. FIG. 30 shows the relationship between the oscillation frequency and circuit resistance: Rci, circuit capacitance: Cci, with resistance: R4 as a parameter, and constants C1 = 14 pF, C3 = 10 pF, C5 = 4 pF, R6 = 20 MΩ, gm = 0.1 mA / This is when V is set. 4pF included in C1 and C5 is a parasitic capacitance in the inverter. Increasing the resistance value decreases the negative resistance.

  FIG. 31 shows the relationship between the input / output resistance: R6 and the oscillation frequency and circuit resistance: Rci, circuit capacitance: Cci. The constants are C1 = 14 pF, C3 = 10 pF, C5 = 4 pF, R4 = 0.5 MΩ, gm = When 0.1 mA / V is set. In the vicinity of the oscillation frequency = 32 KHz, the negative resistance is lost when the resistance value is R6 = 10 MΩ or less.

  FIG. 32 shows the relationship between oscillation frequency and circuit resistance: Rci, circuit capacitance: Cci with mutual conductance: gm as a parameter. C1 = 14 pF, C3 = 10 pF, C5 = 4 pF, C5 = 4 pF, R4 = 0.5 MΩ, R6 = This is when 20 MΩ is set. In the vicinity of the oscillation frequency = 32 KHz, the negative resistance value shows the maximum value at gm: 0.1 mA / V, and the negative resistance becomes small whether it is larger or smaller. This indicates that the oscillation range is narrowed due to the mutual conductance variation caused by the power source variation.

  FIG. 33 shows a conventional circuit example-2. This figure is a circuit for causing an inverter gate to oscillate in two stages, and is described in “CRYSTAL OSCILLATOR DESIGN AND TEMPERATURE COMPENSATION MARVIN E. FRENKING COPYRIGHT 1978”. A series circuit of inductor and capacitor is inserted between the inverter and the input and output of the inverter. However, the oscillation condition is unknown and has not been put into practical use.

FIG. 34 shows a conventional circuit example-3. The figure is quoted from “Crystal Frequency Control Device by Shotaro Okano”. Since a TTL NAND gate is used, the oscillation is caused by an inductor corresponding to the delay caused by the NAND gate, which is unstable and cannot be put into practical use.
CRYSTAL OSCILLATOR DESIGN AND TEMPERATURE COMPENSATION MARVIN E. Frenking Copyright 1978 Quartz frequency control device by Shotaro Okano

  As described above, it is not easy to put it to practical use with the conventionally proposed technology. The present invention has been made in view of such circumstances, and particularly in a low-frequency piezoelectric oscillation circuit, the configuration of the oscillation circuit is easy, the power supply variation characteristics are excellent, the variable range is wide, and the oscillation conditions of the circuit are further improved. It is an object to provide a piezoelectric oscillation circuit that is clear and highly reliable.

  (1) In order to achieve the above object, the present invention takes the following measures. That is, the oscillation circuit according to the present invention is an oscillation circuit including a plurality of logic inverters, and includes a first two-terminal impedance circuit provided between an input of the first logic inverter and the ground, and the first logic. A second two-terminal impedance circuit provided between the output of the inverter and the ground; a third two-terminal impedance circuit connecting the output of the first logic inverter and the input of the second logic inverter; A second two-terminal impedance circuit provided between the input of the second logic inverter and the ground, a fifth two-terminal impedance circuit provided between the output of the second logic inverter and the ground, and the second A sixth two-terminal impedance provided between the output of the logic inverter and the input of the first logic inverter And Nsu circuit is characterized in that it comprises a two-terminal impedance circuit of a seventh provided between the input and output of the first logic inverter.

  (2) Further, the oscillation circuit according to the present invention includes the first two-terminal impedance circuit, the second two-terminal impedance circuit, the fourth two-terminal impedance circuit, and the fifth two-terminal impedance circuit. Reactance, wherein the third two-terminal impedance circuit and the seventh two-terminal impedance circuit are resistors, and the sixth two-terminal impedance circuit is a piezoelectric vibrator and an oscillation frequency adjusting circuit. Yes.

  (3) Further, the oscillation circuit according to the present invention further includes a voltage unit for supplying a predetermined voltage between a power supply terminal and a ground terminal of the first and second logic inverters, and a bypass capacitor for grounding an alternating current. It is characterized by providing.

  (4) Further, the oscillation circuit according to the present invention is characterized in that the resistance of the third two-terminal impedance circuit is set to 0Ω.

  (5) Further, in the oscillation circuit according to the present invention, the capacitive reactance circuit of the first, second, fourth, and fifth two-terminal impedance circuits is replaced with a parasitic capacitance inside the inverter, and the third 2 The terminal impedance circuit has a resistance of 0Ω.

  (6) Further, an oscillator according to the present invention includes the oscillation circuit according to any one of claims 1 to 5.

  According to the present invention, by configuring the oscillation circuit as described above, it is possible to easily oscillate particularly in the low frequency oscillation, and the reactance of the circuit can be reduced within an inductive range without using an inductor. Can be up to. As is clear from the variable capacity comparison shown in FIG. 24, a large frequency variable range can be obtained in variable capacity. These features have a great effect on sensor oscillation such as QCM (micromass measurement using a quartz resonator) and oscillation for communication, and are expected to develop technology in these fields.

  The present invention provides a first logic inverter and a second logic inverter, a first two-terminal impedance circuit between the input and ground of the first logic inverter, and a second two-terminal impedance between the output and ground. Insert the circuit. The first logic inverter output is connected to the input of the second logic inverter through a third two-terminal impedance circuit. A fourth two-terminal impedance circuit is inserted between the input of the second logic inverter and the ground, and a fifth two-terminal impedance circuit is inserted between the output and the ground. An oscillation circuit in which a sixth two-terminal impedance circuit is inserted between the output of the second logic inverter and the input of the first logic inverter, and a seventh two-terminal impedance circuit is inserted between the input and output of the first logic inverter; And an oscillator using the oscillation circuit.

  However, the first two-terminal impedance circuit, the second two-terminal impedance circuit, the fourth two-terminal impedance circuit, and the fifth two-terminal impedance circuit are capacitive reactances, and the third two-terminal impedance circuit, the seventh The two-terminal impedance circuit is a resistor, and the sixth two-terminal impedance circuit is a piezoelectric vibrator and an oscillation frequency adjusting circuit.

  An appropriate voltage and a bypass capacitor for grounding an alternating current are inserted between the power supply terminal and the ground terminal of the first and second logic inverters.

  Further, the present invention constitutes an oscillation circuit in which the resistance of the third two-terminal impedance circuit is 0Ω (short) and an oscillator using the oscillation circuit.

  Further, the capacitive reactance circuit of the first, second, fourth, and fifth two-terminal impedance circuits is replaced with a parasitic capacitance inside the inverter, and the resistance of the third two-terminal impedance circuit is set to 0Ω (short). An oscillation circuit and an oscillator using the oscillation circuit are configured.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows an oscillation circuit block model according to the present invention. z1 to z7 denote two-terminal impedance circuits. INV represents inverter logic, and gm represents mutual conductance.

Figure 1 applies Kirchhoff's law. Equations (12) to (14) are obtained from the current relationship, and equations (15) to (17) are obtained from the voltage relationship.
From Expressions (12) to (17), Expression (18) giving a critical condition leading to oscillation of the oscillation circuit is obtained.
The expression (18) is expanded, z6 is regarded as a piezoelectric vibrator (z6 = zxt), and the vibrator and the circuit impedance are separated to obtain the expression (19).
Each impedance is set in equation (20) and substituted into equation (19).
The resistance of the oscillation circuit is Rci, the capacitive reactance is Cci, and the inductive reactance is Lci. Ra. xa, rb, and xb are each given by equation (22).
Based on the equation (21), simulation is performed under the following condition settings. The constant at that time is C1 = C2 = C4 = C5 = 14 pF (the input / output of the inverter and the parasitic capacitance between the grounds is 4 pF), and is variable with R3, R7, and gm as parameters.

  FIG. 2 shows the relationship between the resistance between the output of the first inverter (INV-1) and the input of the second inverter (INV-2): R3, and the oscillation frequency, circuit resistance at startup: Rci, and circuit inductive reactance at startup. Indicates. The constants at that time are R7 = 820 KΩ and gm = 1 μA / V.

  The “difference” due to the value of R3 is large near the maximum value of Rci, but there is almost no difference near 30 KHz. Further, the reactance is inductive (L property) in the vicinity of 30 KHz, but exhibits capacitive properties in the vicinity of 10 KHz, and the inductivity is lost.

  FIG. 3 shows the relationship between the oscillation frequency versus the circuit resistance at start-up: Rci and the circuit-inductive reactance at start-up using the first inverter input / output resistance: R7 as a parameter. The constants at that time are R3 = 20 KΩ and gm = 1 μA / V.

  Resistance: By increasing R7, the frequency characteristic of the negative resistance becomes steep, its maximum value increases rapidly, and shifts to the lower frequency side. Resistance: By making R7 small, the negative resistance is lowered and the frequency characteristic is slowed down. However, the maximum value is shown at R7 = 560 kHz having the smallest resistance value at 30 kHz.

  FIG. 4 shows the relationship between the oscillation frequency, start-up circuit resistance: Rci, and start-up circuit inductive reactance using the inverter mutual conductance: gm as a parameter. The constants at that time are R3 = 20 KΩ and R7 = 820 KΩ.

  When gm is 1 μA / V or less, there is no significant change in the frequency characteristic, but when the characteristic is 5 μA / V, a large change appears in the characteristic, and the negative resistance value and the maximum value of reactance shift extremely to the high frequency side. However, the change is hardly seen when the frequency is around 30 kHz.

Example 1
FIG. 5 shows a first embodiment of an oscillation circuit according to the present invention. Setting constants are C1 = C2 = C4 = C5 = 10 pF, C6 = 0.1 μF, C7 = 33 μF, R3 = 20 kΩ, R4 = 820 kΩ, INV1 & 2: TC7SU04F (Toshiba), Zxt (Xtal): tuning fork type 32.76 KHz, VCC = 3V.

  FIG. 6 shows the output waveform. Compared to the output waveform of the conventional circuit shown in FIG. 26, a clear rectangular wave is shown.

  FIG. 7 shows power supply voltage versus oscillation frequency and current consumption characteristics. Compared with the characteristics of the conventional circuit shown in FIG. 27, it can be seen that the current decreases, in particular, the oscillation output reliably oscillates to a voltage of 5V.

  FIG. 8 shows the series capacitance of the vibrator: Cx vs. oscillation frequency characteristics. Compared with the frequency variable characteristic of the conventional circuit of FIG. 28, Δf / f0≈200 ppm, which is a variable range of about 5 times, is obtained as the frequency variable range.

(Example 2)
FIG. 9 shows a second embodiment of the oscillation circuit according to the present invention. This circuit is basically the same as the first embodiment of the oscillation circuit of FIG. That is, the first inverter (INV1) and the second inverter (INV2) in FIG. 5 are interchanged. Setting constants are C1 = C2 = C4 = C5 = 10 pF, C6 = 0.1 μF, C7 = 33 μF, R4 = 560 kΩ, R6 = 20 kΩ, INV1 & 2: TC7SU04F (Toshiba), Zxt (Xtal): tuning fork type 32.76 KHz, VCC = 3Vdc.

  FIG. 10 shows the output waveform. Compared with the output waveform of the conventional circuit shown in FIG. 26, a clear rectangular wave is shown as in FIG.

  FIG. 11 shows power supply voltage versus oscillation frequency and current consumption characteristics. Compared with the characteristics of the conventional circuit shown in FIG. 27, it can be seen that, as in FIG. 7, the current decreases, in particular, the oscillation output reliably oscillates to a voltage of 5V.

  FIG. 12 shows the series capacitance of the vibrator: Cx vs. oscillation frequency characteristics. Compared with the frequency variable characteristic of the conventional circuit of FIG. 28, as in FIG. 7, a variable range of Δf / f0≈200 ppm, which is approximately five times the variable range, is obtained.

(Example 3)
FIG. 13 shows a third embodiment of the oscillation circuit according to the present invention. In this circuit, the resistance R3 of the oscillation circuit shown in FIG. 5 is set to 0Ω (short). The setting constants are C1 = C2 = C3 = 10 pF, C4 = 0.1 μF, C7 = 33 μF, R1 = 820 kΩ, INV1 & 2: TC7SU04F (Toshiba), Zxt (Xtal): tuning fork type 32.76 KHz, VCC = 3V.

  FIG. 14 shows output waveform-1. Compared with the output waveform of the conventional circuit shown in FIG. 26, a clear rectangular wave is shown as in FIG.

  FIG. 15 shows power supply voltage versus oscillation frequency and current consumption characteristics. Compared with the characteristics of the conventional circuit shown in FIG. 27, it can be seen that, as in FIG. 7, the current decreases, in particular, the oscillation output reliably oscillates to a voltage of 5V.

  FIG. 16 shows the series capacitance of the vibrator: Cx vs. oscillation frequency characteristics. Compared to the frequency variable characteristic of the conventional circuit of FIG. 28, as in FIG. 7, a variable range of Δf / f0≈170 ppm, which is approximately five times the variable range, is obtained.

Example 4
FIG. 17 shows a fourth embodiment of the oscillation circuit according to the present invention. In this circuit, the capacitors C1, C2, C4, and C5 of the oscillation circuit shown in FIG. 5 are replaced with the parasitic capacitance in the inverter: Ca, and the resistance: R3 is set to 0Ω (short). The setting constants are C4 = 0.1 μF, C7 = 33 μF, R1 = 820 kΩ, INV1 & 2: TC7SU04F (Toshiba), Zxt (Xtal): tuning fork type 32.76 KHz, VCC = 3 Vdc.

  FIG. 18 shows the simulation result. However, Ca is a parasitic capacitance between the input / output of the inverter and the ground, and Ca = 4 pF. This shows that even if C1, C2, C4, and C5 are replaced by the parasitic capacitance in the inverter: Ca and the resistance: R3 is 0Ω (short), the oscillation is sufficiently possible in the simulation.

  FIG. 19 shows output waveform-1. Compared with the output waveform of the conventional circuit shown in FIG. 26, a clear rectangular wave is shown as in FIG.

  FIG. 20 shows power supply voltage versus oscillation frequency and current consumption characteristics. Compared with the characteristics of the conventional circuit shown in FIG. 27, it can be seen that, as in FIG. 7, the current decreases, in particular, the oscillation output reliably oscillates to a voltage of 5V.

  FIG. 21 shows the series capacitance of the vibrator: Cx vs. oscillation frequency characteristics. Compared with the frequency variable characteristic of the conventional circuit of FIG. 28, Δf / f0≈120 ppm, which is approximately four times the variable range as the frequency variable range. The frequency variable range is slightly narrower than the circuits according to other embodiments.

  FIG. 22 shows a comparison of current consumption between the oscillation circuit according to the present invention and the conventional circuit. Despite using two inverters compared to the conventional circuit, all of Examples 1 to 4 consume less current.

  FIG. 23 shows a comparison of frequency power supply fluctuation characteristics between the oscillation circuit according to the present invention and the conventional circuit. The conventional circuit has a large fluctuation, and the oscillation circuit according to the present invention has a small fluctuation in frequency as compared with the case where the oscillation is stopped at 3.7 Vdc.

  FIG. 24 shows a comparison of the variable frequency of the oscillation circuit according to the present invention and the conventional circuit. It can be seen that the first to fourth embodiments have a significantly wider variable range than the conventional circuit. However, Example 4 (capacitor is replaced with an inverter internal parasitic capacitance) is somewhat narrower.

It is a figure which shows an oscillation circuit block model. It is a figure which shows the simulation result-1 of the oscillation circuit block model-1 which concerns on this invention. It is a figure which shows the simulation result-2 of the oscillation circuit block model-1 which concerns on this invention. It is a figure which shows the simulation result-3 of the oscillation circuit block model-1 which concerns on this invention. 1 is a diagram illustrating a first embodiment of an oscillation circuit according to the present invention. FIG. It is a figure which shows the output waveform of Example 1 of the oscillation circuit which concerns on this invention. It is a figure which shows the power supply voltage vs. oscillation frequency and current consumption characteristic of Example 1 of the oscillation circuit which concerns on this invention. It is a figure which shows the frequency variable capacity: Cx vs. oscillation frequency characteristic of Example 1 of the oscillation circuit according to the present invention. It is a figure which shows Example 2 of the oscillation circuit which concerns on this invention. It is a figure which shows the output waveform of Example 2 of the oscillation circuit which concerns on this invention. It is a figure which shows the power supply voltage vs. oscillation frequency and current consumption characteristic of Example 2 of the oscillation circuit which concerns on this invention. It is a figure which shows the frequency variable capacity | capacitance: Cx vs. oscillation frequency characteristic of Example 2 of the oscillation circuit based on this invention. FIG. 10 is a diagram illustrating a third embodiment of the oscillation circuit according to the invention. It is a figure which shows the output waveform of Example 3 of the oscillation circuit which concerns on this invention. It is a figure which shows the power supply voltage vs. oscillation frequency and current consumption characteristic of Example 3 of the oscillation circuit which concerns on this invention. It is a figure which shows the frequency variable capacitor: Cx vs. oscillation frequency characteristic of Example 3 of the oscillation circuit according to the present invention. FIG. 9 is a diagram illustrating a fourth embodiment of the oscillation circuit according to the present invention. It is a figure which shows the simulation result of Example 4 of the oscillation circuit which concerns on this invention. It is a figure which shows the output waveform of Example 4 of the oscillation circuit which concerns on this invention. It is a figure which shows the power supply voltage vs. oscillation frequency and consumption current characteristic of Example 4 of the oscillation circuit which concerns on this invention. FIG. 10 is a diagram showing a frequency variable capacitor: Cx vs. oscillation frequency characteristic of an oscillation circuit according to Example 4 of the present invention. It is a figure which shows the comparison of the consumption current of the oscillation circuit which concerns on this invention, and a conventional circuit. It is a figure which shows the power supply fluctuation characteristic comparison of the oscillation circuit which concerns on this invention, and a conventional circuit. It is a figure which shows the frequency variable characteristic comparison of the oscillation circuit which concerns on this invention, and a conventional circuit. It is a figure which shows the conventional oscillation circuit example-1. It is a figure which shows the output waveform of the conventional oscillation circuit example-1. It is a figure which shows the power supply voltage versus the oscillating frequency, and current consumption of the conventional oscillation circuit example-1. It is a figure which shows the frequency variable capacitor: Cx vs. oscillation frequency characteristic of the example of the conventional oscillation circuit. It is a figure which shows the conventional inverter oscillation circuit block. It is a figure which shows the oscillation frequency versus circuit resistance and capacity | capacitance simulation result-1 of the conventional circuit-1. It is a figure which shows the oscillation frequency versus circuit resistance and capacity | capacitance simulation result-2 of the conventional circuit-1. It is a figure which shows the oscillation frequency versus circuit resistance and capacity | capacitance simulation result-3 of the conventional circuit-1. It is a figure which shows the conventional inverter oscillation circuit example-2. It is a figure which shows the conventional inverter oscillation circuit example-3.

Explanation of symbols

z1-z7 2-terminal impedance circuit INV inverter logic gm mutual conductance

Claims (6)

An oscillation circuit including a plurality of logic inverters,
A first two-terminal impedance circuit provided between the input of the first logic inverter and the ground;
A second two-terminal impedance circuit provided between the output of the first logic inverter and the ground;
A third two-terminal impedance circuit connecting the output of the first logic inverter and the input of the second logic inverter;
A fourth two-terminal impedance circuit provided between the input of the second logic inverter and the ground;
A fifth two-terminal impedance circuit provided between the output of the second logic inverter and the ground;
A sixth two-terminal impedance circuit provided between the output of the second logic inverter and the input of the first logic inverter;
And a seventh two-terminal impedance circuit provided between the input and output of the first logic inverter.   The first two-terminal impedance circuit, the second two-terminal impedance circuit, the fourth two-terminal impedance circuit, and the fifth two-terminal impedance circuit are capacitive reactances, and the third two-terminal impedance circuit, 8. The oscillation circuit according to claim 1, wherein the seventh two-terminal impedance circuit is a resistor, and the sixth two-terminal impedance circuit is a piezoelectric vibrator and an oscillation frequency adjusting circuit.   3. The oscillation circuit according to claim 2, further comprising: a voltage unit that supplies a predetermined voltage between a power supply terminal and a ground terminal of the first and second logic inverters; and a bypass capacitor that grounds an alternating current. .   4. The oscillation circuit according to claim 2, wherein the resistance of the third two-terminal impedance circuit is 0Ω.   The capacitive reactance circuit of the first, second, fourth, and fifth two-terminal impedance circuits is replaced with a parasitic capacitance inside an inverter, and the resistance of the third two-terminal impedance circuit is set to 0Ω. 4. The oscillation circuit according to claim 2 or 3, wherein:   An oscillator comprising the oscillation circuit according to any one of claims 1 to 5.