JP2007173860A - High-frequency module and method for manufacturing it - Google Patents

High-frequency module and method for manufacturing it Download PDF

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JP2007173860A
JP2007173860A JP2007048764A JP2007048764A JP2007173860A JP 2007173860 A JP2007173860 A JP 2007173860A JP 2007048764 A JP2007048764 A JP 2007048764A JP 2007048764 A JP2007048764 A JP 2007048764A JP 2007173860 A JP2007173860 A JP 2007173860A
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circuit
integrated circuit
frequency module
chip
recess
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Junichi Kimura
潤一 木村
Terumoto Akatsuka
輝元 赤塚
Ryoji Mitsuzono
良次 満園
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor

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Abstract

<P>PROBLEM TO BE SOLVED: To provide a miniaturized high-frequency module. <P>SOLUTION: In the present invention, to solve the subject, the high-frequency module is provided with: a recess 22 which is provided in a base mount 21 formed with an insulator; an integrated circuit 24 which is mounted in a bottom surface 22a of the recess 22 by flip chip bonding; a circuit formation portion 27 which is electrically connected to the integrated circuit 24 and is covered in the side of a top surface 26 of the recess 22; and chip capacitors 23a and 23b which are contained in the recess 22 and are electrically connected to the integrated circuit 24. The sizes of the circuit formation portion and the base mount 21 are made to be approximately equal, and the chip capacitors 23a and 23b are adhered on the circuit formation portion 27 by cream solder. Thereby, the miniaturized high-frequency module can be obtained. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、携帯電話等に使用される高周波モジュールとその製造方法に関するものである。   The present invention relates to a high-frequency module used for a mobile phone or the like and a manufacturing method thereof.

以下、従来の高周波モジュールについて説明する。従来の高周波モジュールは図１０に示すように、セラミック等の絶縁物で形成された基台１に電子部品が装着され、その上から金属製のシールドケース２が被せられたものであった。そして、その基台には図１１に示すようにワイヤー３で接続された集積回路４と、リフロー半田接続されたチップコンデンサ５及び水晶振動子（回路形成部の一例であり、またフィルタの一例としても用いた）６とで温度に対して安定した性能を有する高周波モジュールが構成されていた。   Hereinafter, a conventional high-frequency module will be described. As shown in FIG. 10, the conventional high-frequency module has an electronic component mounted on a base 1 made of an insulator such as ceramic, and a metal shield case 2 covered thereon. As shown in FIG. 11, an integrated circuit 4 connected by a wire 3, a chip capacitor 5 and a crystal resonator (which are an example of a circuit forming unit, and an example of a filter) 6) was used, and a high-frequency module having stable performance with respect to temperature was configured.

また、この高周波モジュールの小型化を図るために図１２に示すように基台７に凹部１０を設け、この凹部１０の底面に集積回路４をワイヤーボンディング接続し、この凹部１０側の天面に水晶振動子６を被せるとともにこの天面側１２に縦１．０ｍｍ横０．５ｍｍのチップコンデンサ５をクリーム半田１１でリフロー接続していた。このように水晶振動子６を集積回路４に重ねることにより小型化を図っていた。   In order to reduce the size of the high-frequency module, a recess 10 is provided in the base 7 as shown in FIG. 12, and the integrated circuit 4 is connected to the bottom surface of the recess 10 by wire bonding. The crystal resonator 6 was covered and a chip capacitor 5 having a length of 1.0 mm and a width of 0.5 mm was reflow-connected to the top surface 12 with cream solder 11. In this way, the crystal resonator 6 is superposed on the integrated circuit 4 to reduce the size.

次にその製造方法は、図１３に示すように、凹部１０を有するとともにこの凹部１０の底面に集積回路４をワイヤーボンディング接続する第１の工程１３と、この第１の工程１３の後に集積回路４を接着材で封止する第２の工程１４と、この第２の工程１４の後に接着材を硬化させる第３の工程１５と、この第３の工程１５の後に凹部１０の天面側１２にクリーム半田を印刷する第４の工程１６と、この第４の工程１６の後に塗布されたクリーム半田１１上にチップコンデンサ５と水晶振動子６を実装する第５の工程１７と、この第５の工程１７の後に熱を加えてチップコンデンサ５と水晶振動子６を基台７の天面側１２に接着する第６の工程１８とを有した製造方法であった。このように集積回路４の上方に水晶振動子６を装着することにより、高周波モジュールはますます小型化されてきた。   Next, as shown in FIG. 13, the manufacturing method includes a first step 13 having a recess 10 and wire bonding connection of the integrated circuit 4 to the bottom surface of the recess 10, and an integrated circuit after the first step 13. 4 with an adhesive, a third step 15 for curing the adhesive after the second step 14, and a top surface side 12 of the recess 10 after the third step 15. A fourth step 16 for printing the cream solder on the surface, a fifth step 17 for mounting the chip capacitor 5 and the crystal resonator 6 on the cream solder 11 applied after the fourth step 16, and the fifth step 17 After the step 17, the manufacturing method has a sixth step 18 in which heat is applied to bond the chip capacitor 5 and the crystal resonator 6 to the top surface 12 of the base 7. By mounting the crystal unit 6 above the integrated circuit 4 as described above, the high frequency module has been further miniaturized.

しかしながら、近年の更なる小型化の要求に対しては、このような従来の構成ではどうしても水晶振動子６とチップコンデンサ５を合わせた大きさより小型化するには限界があった。一方、近年の半導体技術の進歩により、集積回路は一段とサイズの小型化が進むとともにバンプ接続をベースにしたフリップチップ実装技術が開発されて、集積回路は非常に小さなスペースでの実装が可能になっている。また、チップコンデンサも例えば縦０．６ｍｍ横０．３ｍｍという小型部品が出現し、結果として集積回路とチップコンデンサの専有面積が水晶振動子の専有面積より小さくなり、この現実に合致した構造の提案が必要となってきた。   However, in response to the recent demand for further downsizing, there is a limit to downsizing from the combined size of the crystal unit 6 and the chip capacitor 5 with such a conventional configuration. On the other hand, due to recent advances in semiconductor technology, integrated circuits have been further reduced in size and flip chip mounting technology based on bump connection has been developed, enabling integrated circuits to be mounted in a very small space. ing. In addition, chip capacitors, for example, small parts of 0.6 mm in length and 0.3 mm in width have appeared, and as a result, the area occupied by the integrated circuit and the chip capacitor is smaller than the area occupied by the crystal unit. Has become necessary.

この発明は、このような問題点を解決するもので、小型化された高周波モジュールを提供することを目的としたものである。   The present invention is intended to solve such a problem and to provide a miniaturized high frequency module.

この目的を達成するために本発明の高周波モジュールは、絶縁体で形成された基台と、この基台に設けられた凹部と、この凹部の底面にフリップチップ実装された集積回路と、この集積回路と電気的に接続されるとともに前記基台の凹部の天面側に被せられた回路形成部と、前記凹部内に収納されるとともに前記集積回路と電気的に接続されたチップコンデンサとを備え、前記回路形成部と前記基台の大きさを略等しくするとともに、前記チップコンデンサは前記回路形成部上にクリーム半田で固着された構成としたものである。これにより、小型化された高周波モジュールが実現できる。   In order to achieve this object, a high-frequency module according to the present invention includes a base formed of an insulator, a recess provided in the base, an integrated circuit flip-chip mounted on the bottom surface of the recess, and the integrated A circuit forming portion that is electrically connected to the circuit and is placed on a top surface side of the concave portion of the base; and a chip capacitor that is housed in the concave portion and electrically connected to the integrated circuit. The circuit forming portion and the base are substantially equal in size, and the chip capacitor is fixed on the circuit forming portion with cream solder. Thereby, a miniaturized high frequency module can be realized.

以上のように本発明によれば、絶縁体で形成された基台と、この基台に設けられた凹部と、この凹部の底面にフリップチップ実装された集積回路と、この集積回路と電気的に接続されるとともに前記基台の凹部の天面側に被せられた回路形成部と、前記凹部内に収納されるとともに前記集積回路と電気的に接続されたチップコンデンサとを備え、前記回路形成部と前記基台の大きさを略等しくするとともに、前記チップコンデンサは前記回路形成部上にクリーム半田で固着することにより、基台を回路形成部の大きさに等しくすることができるので、小型化された高周波モジュールが実現できる。   As described above, according to the present invention, a base made of an insulator, a recess provided in the base, an integrated circuit flip-chip mounted on the bottom surface of the recess, and the integrated circuit and electrical A circuit forming portion that is connected to the top surface of the concave portion of the base and a chip capacitor that is housed in the concave portion and electrically connected to the integrated circuit. The size of the base and the base is made substantially equal, and the chip capacitor can be fixed to the circuit forming portion with cream solder, so that the base can be made equal to the size of the circuit forming portion, so that the size is small. A high-frequency module can be realized.

（実施の形態１）
図１は実施の形態１における高周波モジュールの断面図である。図１において、２１はセラミックで形成された基台であり、４枚のセラミックシート２１ａ，２１ｂ，２１ｃ，２１ｄが積層されている。その大きさは略縦３．０ｍｍ、横５．０ｍｍ、高さ０．６ｍｍであり、中央に凹部２２が形成されている。そして、この凹部２２の底面２２ａにはチップコンデンサ２３ａ，２３ｂと、フリップチップ実装された集積回路２４がバンプ２４ａで接続されている。また、２５は、絶縁材としての封止剤（アンダーフィル）であり、集積回路２４を底面２２ａに固着するとともに集積回路の回路面の保護をしている。２６は、基台２１の凹部２２を形成する側に設けられた天面であり、集積回路２４の端子がセラミック上を配線パターンで導出されている。 (Embodiment 1)
FIG. 1 is a cross-sectional view of the high-frequency module according to the first embodiment. In FIG. 1, reference numeral 21 denotes a base made of ceramic, and four ceramic sheets 21a, 21b, 21c, and 21d are laminated. The size is approximately 3.0 mm in length, 5.0 mm in width, and 0.6 mm in height, and a recess 22 is formed in the center. Further, chip capacitors 23a and 23b and flip-chip mounted integrated circuit 24 are connected to bottom surface 22a of recess 22 by bumps 24a. Reference numeral 25 denotes a sealing agent (underfill) as an insulating material, which fixes the integrated circuit 24 to the bottom surface 22a and protects the circuit surface of the integrated circuit. Reference numeral 26 denotes a top surface provided on the side of the base 21 where the concave portion 22 is formed, and the terminals of the integrated circuit 24 are led out on the ceramic by a wiring pattern.

２７は、１０〜２０ＭＨｚ帯の回路形成部であり、その大きさは略縦３．０ｍｍ、横５．０ｍｍ、高さ０．７ｍｍである。この回路形成部２７の電極は配線パターンで天面２６に対応する位置２８に導出され、クリーム半田で半田付けされて回路形成部２７の電極と集積回路２４の端子とは電気的に接続される。また、このように、凹部２２を覆うように回路形成部２７を被せて固着することにより、全体として、略縦３．０ｍｍ、横５．０ｍｍ、高さ１．３ｍｍの大きさを有する高周波モジュールが完成する。   Reference numeral 27 denotes a 10 to 20 MHz band circuit forming portion having a size of approximately 3.0 mm in length, 5.0 mm in width, and 0.7 mm in height. The electrodes of the circuit forming portion 27 are led out to a position 28 corresponding to the top surface 26 by a wiring pattern, and are soldered with cream solder to electrically connect the electrodes of the circuit forming portion 27 and the terminals of the integrated circuit 24. . Further, by covering and fixing the circuit forming portion 27 so as to cover the concave portion 22 as described above, the high frequency module having a size of approximately 3.0 mm in length, 5.0 mm in width, and 1.3 mm in height as a whole. Is completed.

このように、フリップチップ型の集積回路２４をバンプ２４ａで接続し、縦０．６ｍｍ、横０．３ｍｍの小型のチップコンデンサ２３ａ，２３ｂを凹部２２内に埋設することにより、回路形成部２７と同一の形状まで小型化することができる。   In this way, the flip-chip type integrated circuit 24 is connected by the bumps 24a, and the small chip capacitors 23a and 23b having a length of 0.6 mm and a width of 0.3 mm are embedded in the concave portion 22, whereby The size can be reduced to the same shape.

図２はその回路図である。図２において、２９ａ，２９ｂは集積回路２４内に設けられた増幅器であり、３０は温度補正回路であり、３１は電圧安定化回路であり、３２はバリキャップダイオード（可変容量ダイオード）であり共に集積回路２４内に収納されている。増幅器２９ａの入力と出力との間には回路形成部２７が接続されており、この増幅器２９ａの入力とグランドとの間に接続されたバリキャップダイオード３２とで共振回路を形成し、発振周波数を決定している。そして、この増幅器２９ａで形成された発振器の出力は次の増幅器２９ｂを介して出力端子３３ａに接続されている。また、この出力端子３３ａはチップコンデンサ２３ｃ（図１には示さず）を介して基台２１に設けられた端子３４ａに接続されている。温度補正回路３０は増幅器２９ａの入力に接続され、共振回路の温度に対する周波数変化の補正を行っている。また、３３ｅ，３４ｅは周波数制御電圧の入力端子であり、バリキャップダイオード３２に接続されて、制御電圧に応じて発振周波数を制御している。３３ｄと３４ｄは電源入力端子であり、電圧安定化回路３１を介して各回路に安定した電圧を供給している。３３ｂ，３４ｂはグランド端子である。また、電圧安定化回路３１には、端子３３ｃを介してチップコンデンサ２３ａが接続されている。   FIG. 2 is a circuit diagram thereof. In FIG. 2, 29a and 29b are amplifiers provided in the integrated circuit 24, 30 is a temperature correction circuit, 31 is a voltage stabilization circuit, and 32 is a varicap diode (variable capacitance diode). It is housed in the integrated circuit 24. A circuit forming unit 27 is connected between the input and output of the amplifier 29a, and a resonance circuit is formed by the varicap diode 32 connected between the input of the amplifier 29a and the ground, and the oscillation frequency is set. Has been decided. The output of the oscillator formed by the amplifier 29a is connected to the output terminal 33a via the next amplifier 29b. The output terminal 33a is connected to a terminal 34a provided on the base 21 through a chip capacitor 23c (not shown in FIG. 1). The temperature correction circuit 30 is connected to the input of the amplifier 29a and corrects the frequency change with respect to the temperature of the resonance circuit. Reference numerals 33e and 34e denote frequency control voltage input terminals, which are connected to the varicap diode 32 to control the oscillation frequency in accordance with the control voltage. Reference numerals 33 d and 34 d denote power supply input terminals, which supply a stable voltage to each circuit via the voltage stabilization circuit 31. 33b and 34b are ground terminals. The voltage stabilizing circuit 31 is connected to a chip capacitor 23a via a terminal 33c.

次にその製造方法を図３を用いて説明する。本実施の形態１における高周波モジュールの製造方法は、凹部２２を有するとともにこの凹部２２の底面２２ａに集積回路２４をフリップチップ実装する第１の工程３５と、この第１の工程３５の後に集積回路２４を接着材２５で封止する第２の工程３６と、この第２の工程３６の後に接着材２５を硬化させる第３の工程３７と、この第３の工程３７の後に凹部２２の底面２２ａにクリーム半田をディスペンサ等で塗布する第４の工程３８と、この第４の工程３８の後に塗布されたクリーム半田上にチップコンデンサ２３ａ，２３ｂを実装する第５の工程３９と、この第５の工程３９の後に熱を加えてチップコンデンサ２３ａ，２３ｂを接着する第６の工程４０と、この第６の工程４０の後に基台２１の天面２６側にクリーム半田を印刷する第７の工程４１と、この第７の工程４１の後に回路形成部２７を実装する第８の工程４２と、この第８の工程４２の後に回路形成部２７を天面２６側に熱を加えて接着する第９の工程４３とから成る高周波モジュールの製造方法であり、第４の工程３８で凹部２２の底面２２ａにクリーム半田を塗布し、第５の工程３９でチップコンデンサ２３ａ，２３ｂを凹部２２内に実装し、第６の工程４０で接着するので、小型化された高周波モジュールが実現できる。   Next, the manufacturing method will be described with reference to FIG. The manufacturing method of the high-frequency module according to the first embodiment includes a first step 35 having a concave portion 22 and flip-chip mounting the integrated circuit 24 on the bottom surface 22a of the concave portion 22, and the integrated circuit after the first step 35. A second step 36 for sealing 24 with an adhesive 25; a third step 37 for curing the adhesive 25 after the second step 36; and a bottom surface 22a of the recess 22 after the third step 37. A fourth step 38 for applying the cream solder to the surface by a dispenser, a fifth step 39 for mounting the chip capacitors 23a, 23b on the cream solder applied after the fourth step 38, and the fifth step 39. After the step 39, heat is applied to bond the chip capacitors 23a and 23b, and after this sixth step 40, cream solder is printed on the top surface 26 side of the base 21. 7, the eighth step 42 for mounting the circuit forming unit 27 after the seventh step 41, and the circuit forming unit 27 after the eighth step 42 is heated to the top surface 26 side. In the fourth step 38, cream solder is applied to the bottom surface 22a of the concave portion 22, and in the fifth step 39, the chip capacitors 23a, 23b are formed in the concave portion 22. Since it is mounted inside and bonded in the sixth step 40, a miniaturized high-frequency module can be realized.

（実施の形態２）
図４は実施の形態２における高周波モジュールの断面図である。図４において、実施の形態１と異なるところはチップコンデンサ２３ａ，２３ｂを回路形成部２７側にクリーム半田で固着したことである。即ち、チップコンデンサ２３ａ，２３ｂの配線は基台２１の凹部２２を形成する側の天面２６と対向する面２８に導出し、クリーム半田で集積回路２４と電気的に接続されている。このチップコンデンサ２３ａ，２３ｂは（実施の形態１に於いても同様であるが）凹部２２の内面２２ｃと集積回路２４の間に収納されることにより薄型化を図っている。 (Embodiment 2)
FIG. 4 is a cross-sectional view of the high-frequency module according to the second embodiment. In FIG. 4, the difference from the first embodiment is that the chip capacitors 23a and 23b are fixed to the circuit forming portion 27 side by cream solder. That is, the wiring of the chip capacitors 23a and 23b is led out to a surface 28 facing the top surface 26 on the side where the concave portion 22 of the base 21 is formed, and is electrically connected to the integrated circuit 24 with cream solder. The chip capacitors 23a and 23b are thinned by being housed between the inner surface 22c of the recess 22 and the integrated circuit 24 (as in the first embodiment).

このように、チップコンデンサ２３ａ，２３ｂを回路形成部２７側に設けることにより、クリーム半田を印刷することが可能となり、実施の形態１のようにディスペンサでクリーム半田を塗布する必要がなく、生産性が向上する。   Thus, by providing the chip capacitors 23a and 23b on the circuit forming portion 27 side, it becomes possible to print cream solder, and it is not necessary to apply the cream solder with a dispenser as in the first embodiment, so that productivity is improved. Will improve.

従って、その製造方法は図５に示すようになる。即ち、凹部２２を有するとともにこの凹部２２の底面２２ａに集積回路２４をフリップチップ実装する第１の工程４５と、この第１の工程４５の後に集積回路２４を接着材２５で封止する第２の工程４６と、この第２の工程４６の後に接着材２５を硬化させる第３の工程４７と、この第３の工程４７の後に基台２１の凹部２２の天面側２６にクリーム半田を印刷する第４の工程４８とを有する第１の部品４９と、この第１の部品４９とは別工程で、回路形成部２７にクリーム半田を印刷する第１の工程５０と、この第１の工程５０の後で印刷されたクリーム半田上にチップコンデンサ２３ａ，２３ｂを実装する第２の工程５１と、この第２の工程５１の後で熱を加えてチップコンデンサ２３ａ，２３ｂを接着する第３の工程５２とを有する第２の部品５３を第１の部品４９の基台２１の天面側２６に実装する工程５４と、その後で熱を加えて接着する工程５５とから成る高周波モジュールの製造方法であり、第２の部品５３においてはチップコンデンサ２３ａ，２３ｂを回路形成部２７側に装着するため、クリーム半田を印刷することが可能となり、生産効率が向上する。   Therefore, the manufacturing method is as shown in FIG. That is, the first step 45 having the recess 22 and flip-chip mounting the integrated circuit 24 on the bottom surface 22 a of the recess 22, and the second step of sealing the integrated circuit 24 with the adhesive 25 after the first step 45. Step 46, the third step 47 for curing the adhesive 25 after the second step 46, and printing the cream solder on the top surface 26 of the recess 22 of the base 21 after the third step 47 A first component 49 having a fourth step 48, and a first step 50 in which cream solder is printed on the circuit forming unit 27 in a step separate from the first component 49, and the first step. The second step 51 for mounting the chip capacitors 23a and 23b on the cream solder printed after 50, and a third step for bonding the chip capacitors 23a and 23b by applying heat after the second step 51 And having a step 52 The component 53 is mounted on the top surface 26 of the base 21 of the first component 49, and the method 55 is a method of manufacturing a high-frequency module comprising a step 55 of applying heat and then bonding the second component. In 53, since the chip capacitors 23a and 23b are mounted on the circuit forming portion 27 side, it becomes possible to print cream solder, and the production efficiency is improved.

（実施の形態３）
図６は実施の形態３における高周波モジュールの製造方法の工程図である。図６において実施の形態２との相違は、基台２１とチップコンデンサ２３ａ，２３ｂと回路形成部２７とを同時に一括して接着して生産効率を更に向上させるところにある。即ち、凹部２２を有するとともにこの凹部２２の底面２２ａに集積回路２４をフリップチップ実装する第１の工程５６と、この第１の工程５６の後に集積回路２４を接着材２５で封止する第２の工程５７と、この第２の工程５７の後に接着材２５を硬化させる第３の工程５８とを有する第１の部品５９と、この第１の部品５９とは別の工程であって、回路形成部２７にクリーム半田を印刷する工程６０と、この工程６０の後で印刷されたクリーム半田上に第１の部品５９とチップコンデンサ２３ａ，２３ｂを実装する工程６１と、この工程６１の後で熱を加えてチップコンデンサ２３ａ，２３ｂと第１の部品５９とを同時に接着する工程６２とから成る高周波モジュールの製造方法であり、工程６２でチップコンデンサ２３ａ，２３ｂと第１の部品５９とを同時に接着するので、生産効率が更に向上する。 (Embodiment 3)
FIG. 6 is a process diagram of the method for manufacturing the high-frequency module in the third embodiment. In FIG. 6, the difference from the second embodiment is that the base 21, the chip capacitors 23a and 23b, and the circuit forming portion 27 are bonded together at the same time to further improve the production efficiency. That is, a first step 56 having the concave portion 22 and flip-chip mounting the integrated circuit 24 on the bottom surface 22a of the concave portion 22, and a second step of sealing the integrated circuit 24 with the adhesive 25 after the first step 56. The first component 59 having the step 57 and the third step 58 for curing the adhesive 25 after the second step 57 are separate from the first component 59, and A step 60 of printing cream solder on the forming portion 27, a step 61 of mounting the first component 59 and the chip capacitors 23a and 23b on the cream solder printed after this step 60, and after this step 61 A method of manufacturing a high-frequency module comprising the step 62 of simultaneously bonding the chip capacitors 23a, 23b and the first component 59 by applying heat. In step 62, the chip capacitors 23a, 23b and the first capacitors Since adhering the component 59 at the same time, the production efficiency is further improved.

（実施の形態４）
図７は、携帯電話等に使用される受信器（高周波モジュールの一例として用いた）のブロック図である。図７において、６５ａ，６５ｂはＳＡＷ（表面弾性波）フィルタであり、ＵＨＦ帯の周波数を通過させるバンドパスフィルタである。また、６６は増幅器であり、６７は混合器であり、共に集積回路６９内に収納されている。また、６８ａ，６８ｂ，６８ｃ，６８ｄはチップコンデンサである。そして、これらの集積回路６９やチップコンデンサ６８ａ，６８ｂ，６８ｃ，６８ｄは、絶縁性を有するセラミック製の基台７０に設けられた凹部７０ａ（図示せず）に収納されている。この実施の形態４に於いても６５ａ，６５ｂで形成されたＳＡＷフィルタ６５の大きさは通過させる周波数によって決定されるものであり、基台７０の大きさをＳＡＷフィルタ６５の大きさに合わせることによって小型化を図っている。 (Embodiment 4)
FIG. 7 is a block diagram of a receiver (used as an example of a high-frequency module) used for a mobile phone or the like. In FIG. 7, 65a and 65b are SAW (surface acoustic wave) filters, which are band-pass filters that pass UHF band frequencies. Reference numeral 66 denotes an amplifier, and reference numeral 67 denotes a mixer, both of which are housed in an integrated circuit 69. 68a, 68b, 68c and 68d are chip capacitors. These integrated circuit 69 and chip capacitors 68a, 68b, 68c, and 68d are housed in a recess 70a (not shown) provided on an insulating ceramic base 70. Also in the fourth embodiment, the size of the SAW filter 65 formed by 65a and 65b is determined by the passing frequency, and the size of the base 70 is matched with the size of the SAW filter 65. To achieve miniaturization.

次に、この受信器の回路は図７に示すように、ＵＨＦ帯の高周波信号が入力される入力端子７１ａと、この入力端子７１ａが接続されたチップコンデンサ６８ａと、このチップコンデンサ６８ａに接続されたＳＡＷフィルタ６５ａと、このＳＡＷフィルタ６５ａの出力に接続された増幅器６６と、この増幅器６６の出力に接続されたＳＡＷフィルタ６５ｂと、このＳＡＷフィルタ６５ｂの出力に接続されたチップコンデンサ６８ｂと、このチップコンデンサ６８ｂの出力に一方の端子が接続された混合器６７と、この混合器６７の出力がチップコンデンサ６８ｃを介して接続された出力端子７１ｂと、局部発振周波数がチップコンデンサ６８ｄを介して混合器６７の他方の端子に接続される入力端子７２とから構成されている。   Next, as shown in FIG. 7, the circuit of this receiver is connected to an input terminal 71a to which a high-frequency signal in the UHF band is input, a chip capacitor 68a to which the input terminal 71a is connected, and the chip capacitor 68a. SAW filter 65a, amplifier 66 connected to the output of SAW filter 65a, SAW filter 65b connected to the output of amplifier 66, chip capacitor 68b connected to the output of SAW filter 65b, and A mixer 67 having one terminal connected to the output of the chip capacitor 68b, an output terminal 71b to which the output of the mixer 67 is connected via the chip capacitor 68c, and a local oscillation frequency mixed via the chip capacitor 68d The input terminal 72 is connected to the other terminal of the device 67.

なお、その製造方法は実施の形態２或いは実施の形態３と同様である。   The manufacturing method is the same as that in the second embodiment or the third embodiment.

（実施の形態５）
図８は、携帯電話等に使用される送信器（高周波モジュールの一例として用いた）のブロック図である。図８において、７３はＳＡＷフィルタであり、ＵＨＦ帯の周波数を通過させるバンドパスフィルタである。また、７４は電力増幅器であり集積回路（図示せず）内に収納されている。また、７６ａ，７６ｂ，７６ｃはチップコンデンサである。そして、これらの集積回路やチップコンデンサ７６ａ，７６ｂ，７６ｃは、絶縁性を有するセラミック製の基台７７に設けられた凹部（図示せず）に収納されている。この実施の形態５に於いてもＳＡＷフィルタ７３の大きさは通過させる周波数によって決定されるものであり、基台７７の大きさをＳＡＷフィルタ７３の大きさに合わせることによって小型化を図っている。 (Embodiment 5)
FIG. 8 is a block diagram of a transmitter (used as an example of a high frequency module) used in a mobile phone or the like. In FIG. 8, reference numeral 73 denotes a SAW filter, which is a band-pass filter that passes UHF band frequencies. A power amplifier 74 is housed in an integrated circuit (not shown). Reference numerals 76a, 76b, and 76c denote chip capacitors. These integrated circuits and chip capacitors 76a, 76b, and 76c are housed in recesses (not shown) provided on an insulating ceramic base 77. Also in the fifth embodiment, the size of the SAW filter 73 is determined by the passing frequency, and the size of the base 77 is matched with the size of the SAW filter 73 to reduce the size. .

次に、この送信器の回路は図８に示すように、ＵＨＦ帯の変調された高周波信号が入力される入力端子７９と、この入力端子７９が接続されたチップコンデンサ７６ａと、このチップコンデンサ７６ａに接続されたＳＡＷフィルタ７３と、このＳＡＷフィルタ７３の出力に接続されたチップコンデンサ７６ｂと、このチップコンデンサ７６ｂの出力に接続された増幅器７４と、この増幅器７４の出力に接続されたチップコンデンサ７６ｃと、このチップコンデンサ７６ｃの出力に接続された出力端子８０とから構成されている。また、その製造方法は実施の形態２或いは実施の形態３と同様である。   Next, as shown in FIG. 8, the transmitter circuit includes an input terminal 79 to which a UHF band modulated high-frequency signal is input, a chip capacitor 76a to which the input terminal 79 is connected, and the chip capacitor 76a. Connected to the output of the SAW filter 73, a chip capacitor 76b connected to the output of the SAW filter 73, an amplifier 74 connected to the output of the chip capacitor 76b, and a chip capacitor 76c connected to the output of the amplifier 74. And an output terminal 80 connected to the output of the chip capacitor 76c. The manufacturing method is the same as that in the second embodiment or the third embodiment.

（実施の形態６）
図９は、実施の形態６におけるＶＣＯ（電圧制御発振器）／ＰＬＬモジュール（高周波モジュールの一例として用いた）のブロック図である。図９において、本発明のＶＣＯ／ＰＬＬモジュールは、絶縁体で形成された基台８１と、この基台８１に設けられた凹部８２と、この凹部８２の底面にフリップチップ実装されたＰＬＬ集積回路８３と、このＰＬＬ集積回路８３と電気的に接続されるとともに基台８１の凹部の天面側に被せられたＶＣＯ８５とを備えた構成である。そして、凹部８２内にＰＬＬ集積回路８３と電気的に接続され、チップ部品で形成されたローパスフィルタ８４とを収納するとともに、ＶＣＯ８５と基台８１の大きさを略等しくしたものであり、このように凹部８２内にバンプ接続されたＰＬＬ集積回路８３とチップ部品で形成されたローパスフィルタ８４を収納することにより、基台８１を略ＶＣＯ８５の大きさに等しくすることができるので、小型化されたＶＣＯ／ＰＬＬモジュールが実現できる。 (Embodiment 6)
FIG. 9 is a block diagram of a VCO (voltage controlled oscillator) / PLL module (used as an example of a high frequency module) in the sixth embodiment. 9, the VCO / PLL module of the present invention includes a base 81 made of an insulator, a recess 82 provided in the base 81, and a PLL integrated circuit flip-chip mounted on the bottom surface of the recess 82. 83 and a VCO 85 that is electrically connected to the PLL integrated circuit 83 and is placed on the top surface side of the concave portion of the base 81. The recess 82 is electrically connected to the PLL integrated circuit 83 and houses a low-pass filter 84 formed of chip parts, and the VCO 85 and the base 81 are substantially equal in size. Since the base 81 can be made substantially equal to the size of the VCO 85 by accommodating the PLL integrated circuit 83 bump-connected in the recess 82 and the low-pass filter 84 formed of chip parts, the size of the base 81 is reduced. A VCO / PLL module can be realized.

このＶＣＯ／ＰＬＬモジュールは、ＶＣＯ８５の出力端子８５ａからチップコンデンサ８６（２ｐＦ）を介してＰＬＬ集積回路８３の一方の入力に接続されるとともに発振器出力として出力端子８７に出力している。８８は基準周波数信号が入力される入力端子であり、ＰＬＬ集積回路８３の他方の入力に接続されている。また、このＰＬＬ集積回路８３の出力はチップ部品で形成されたローパスフィルタ８４を介してＶＣＯ８５の入力端子８５ｂに接続されている。   This VCO / PLL module is connected to one input of the PLL integrated circuit 83 from the output terminal 85a of the VCO 85 via the chip capacitor 86 (2 pF) and outputs it to the output terminal 87 as an oscillator output. Reference numeral 88 denotes an input terminal to which a reference frequency signal is input, and is connected to the other input of the PLL integrated circuit 83. The output of the PLL integrated circuit 83 is connected to the input terminal 85b of the VCO 85 through a low-pass filter 84 formed of chip parts.

ここで、ローパスフィルタ８４は、入力に抵抗８９（１キロオーム）が接続され、この出力９０とグランドとの間にコンデンサ９１（１０００ピコファラッド）と、抵抗９２（５．６キロオーム）とコンデンサ９３（０．０４７マイクロファラッド）の直列接続体とが接続されている。また、抵抗９２の出力９０には抵抗９４（８．２キロオーム）が接続されてＶＣＯ８５の入力８５ｂに接続されている。また、この抵抗９４の出力とグランドとの間にはコンデンサ９５（４７００ピコファラッド）が接続されている。   Here, the low-pass filter 84 has a resistor 89 (1 kilohm) connected to the input, a capacitor 91 (1000 picofarad), a resistor 92 (5.6 kilohm) and a capacitor 93 (between the output 90 and ground. 0.047 microfarad) connected in series. A resistor 94 (8.2 kilohms) is connected to the output 90 of the resistor 92 and connected to the input 85b of the VCO 85. A capacitor 95 (4700 picofarad) is connected between the output of the resistor 94 and the ground.

なお、その製造方法は実施の形態２或いは実施の形態３と同様であり、フィルタの代わりにＶＣＯ８５を用いたものである。   The manufacturing method is the same as that in the second embodiment or the third embodiment, and a VCO 85 is used instead of the filter.

本発明にかかる高周波モジュールは、小型化された高周波モジュールを提供できるという効果を有し、携帯電話等に用いる高周波モジュールとして有用である。   The high-frequency module according to the present invention has an effect of providing a miniaturized high-frequency module, and is useful as a high-frequency module used for a mobile phone or the like.

本発明の実施の形態１による高周波モジュールの断面図Sectional drawing of the high frequency module by Embodiment 1 of this invention 同ブロック図Block diagram 同工程図Process diagram 本発明の実施の形態２による高周波モジュールの断面図Sectional drawing of the high frequency module by Embodiment 2 of this invention 同工程図Process diagram 同実施の形態３による高周波モジュールの工程図Process diagram of high-frequency module according to Embodiment 3 同実施の形態４による受信器のブロック図Block diagram of a receiver according to the fourth embodiment 同実施の形態５による送信器のブロック図Block diagram of a transmitter according to the fifth embodiment 同実施の形態６によるＶＣＯ／ＰＬＬのブロック図Block diagram of VCO / PLL according to the sixth embodiment 従来の高周波モジュールの斜視図Perspective view of conventional high-frequency module 同断面図Cross section 同第２の例による従来の高周波モジュールの断面図Sectional view of a conventional high-frequency module according to the second example 同工程図Process diagram

符号の説明Explanation of symbols

２１ 基台
２２ 凹部
２２ａ 底面
２３ａ チップコンデンサ
２３ｂ チップコンデンサ
２４ 集積回路
２４ａ バンプ
２６ 天面
２７ 回路形成部 21 Base 22 Recess 22a Bottom 23a Chip Capacitor 23b Chip Capacitor 24 Integrated Circuit 24a Bump 26 Top Surface 27 Circuit Forming Section

Claims (7)

絶縁体で形成された基台と、この基台に設けられた凹部と、この凹部の底面にフリップチップ実装された集積回路と、この集積回路と電気的に接続されるとともに前記基台の凹部の天面側に被せられた回路形成部と、前記凹部内に収納されるとともに前記集積回路と電気的に接続されたチップコンデンサとを備え、前記回路形成部と前記基台の大きさを略等しくするとともに、前記チップコンデンサは前記回路形成部上ににクリーム半田で固着された高周波モジュール。 A base made of an insulator, a recess provided in the base, an integrated circuit flip-chip mounted on the bottom surface of the recess, and a recess in the base that is electrically connected to the integrated circuit A circuit forming portion that covers the top surface of the chip, and a chip capacitor that is housed in the recess and is electrically connected to the integrated circuit, the circuit forming portion and the base being substantially the same size. A high frequency module in which the chip capacitors are fixed on the circuit forming portion with cream solder. 回路形成部上には水晶振動子が設けられた請求項１に記載の高周波モジュール。 The high frequency module according to claim 1, wherein a crystal resonator is provided on the circuit forming portion. 高周波信号が入力される第１の入力端子と、この第１の入力端子に入力された信号が第１のチップコンデンサを介して供給されるフィルタと、このフィルタの出力が一方の入力に供給される混合回路と、この混合回路の出力が第２のチップコンデンサを介して供給される出力端子と、前記混合回路の他方の端子に第３のチップコンデンサを介して局部発振周波数が入力される第２の入力端子とを設けて受信器が形成され、回路形成部には、前記第１から第３のコンデンサのうちの少なくともいずれかひとつと、前記フィルタとが設けられた請求項１に記載の高周波モジュール。 A first input terminal to which a high-frequency signal is input, a filter to which a signal input to the first input terminal is supplied via a first chip capacitor, and an output of the filter are supplied to one input A mixing circuit, an output terminal to which an output of the mixing circuit is supplied via a second chip capacitor, and a second oscillation frequency input to the other terminal of the mixing circuit via a third chip capacitor. 2. The receiver according to claim 1, wherein at least one of the first to third capacitors and the filter are provided in the circuit forming unit. High frequency module. フィルタと混合回路との間には増幅回路が挿入された請求項３に記載の高周波モジュール。 The high frequency module according to claim 3, wherein an amplifier circuit is inserted between the filter and the mixing circuit. 混合器と増幅回路とは集積回路内に収納された請求項４に記載の高周波モジュール。 The high-frequency module according to claim 4, wherein the mixer and the amplifier circuit are housed in an integrated circuit. 凹部を有するとともにこの凹部の底面に集積回路をフリップチップ実装する第１の工程と、この第１の工程の後に前記集積回路を接着材で封止する第２の工程と、この第２の工程の後に前記接着材を硬化させる第３の工程と、この第３の工程の後に前記基台凹部側の天面にクリーム半田を印刷する第４の工程とを有する第１の部品と、この第１の部品とは別であって、回路形成部にクリーム半田を印刷する第１の工程と、この第１の工程の後で前記印刷されたクリーム半田上にチップコンデンサを実装する第２の工程と、この第２の工程の後で熱を加えて前記チップコンデンサを接着する第３の工程とを有する第２の部品を前記第１の部品の基台の天面に実装し、その後で熱を加えて接着する工程とから成る高周波モジュールの製造方法。 A first step of flip-chip mounting the integrated circuit on the bottom surface of the concave portion and a second step of sealing the integrated circuit with an adhesive after the first step, and the second step A first part having a third step of curing the adhesive after the third step, and a fourth step of printing cream solder on the top surface of the base recess side after the third step; A first step of printing cream solder on the circuit forming portion, and a second step of mounting a chip capacitor on the printed cream solder after the first step. And mounting a second component on the top surface of the base of the first component after the second step, and applying a third step of bonding the chip capacitor by applying heat after the second step. A method of manufacturing a high-frequency module comprising a step of adding and adhering. 凹部を有するとともにこの凹部の底面に集積回路をフリップチップ実装する第１の工程と、この第１の工程の後に前記集積回路を接着材で封止する第２の工程と、この第２の工程の後に前記接着材を硬化させる第３の工程とを有する第１の部品と、この第１の部品とは別であって、回路形成部にクリーム半田を印刷する工程と、この工程の後で前記印刷されたクリーム半田上に前記第１の部品とチップコンデンサを実装する第４の工程と、この第４の工程の後で熱を加えて前記チップコンデンサと前記第１の部品とを同時に接着させる第５の工程とから成る高周波モジュールの製造方法。 A first step of flip-chip mounting the integrated circuit on the bottom surface of the concave portion and a second step of sealing the integrated circuit with an adhesive after the first step, and the second step A first component having a third step of curing the adhesive after the step, a step of printing the cream solder on the circuit forming portion, which is separate from the first component, and after this step A fourth step of mounting the first component and the chip capacitor on the printed cream solder, and heat is applied after the fourth step to bond the chip capacitor and the first component simultaneously. A method for manufacturing a high-frequency module, comprising: a fifth step.
JP2007048764A 2007-02-28 2007-02-28 High-frequency module and method for manufacturing it Pending JP2007173860A (en)

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