JP2007173745A - Method of manufacturing p-type iii-nitride semiconductor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a p-type III-nitride semiconductor with which a light-emitting element with a low driving voltage and a sufficiently high inverse voltage can be obtained with high yield. <P>SOLUTION: The present invention relates to the method of manufacturing the p-type III-nitride semiconductor which is characterized in that a nitrogen source containing a hydrogen atom is used to grow a III-nitride semiconductor containing a p-type dopant, inert gases are then used as carrier gases and the circulation of the nitrogen source containing the hydrogen atom is stopped, thereby decreasing the temperature while supplying a nitrogen atom from a nitrogen source not containing the hydrogen atom. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a group III nitride p-type semiconductor manufacturing method and a group III nitride semiconductor light emitting device manufactured using the same. In particular, the present invention relates to a method for manufacturing a group III nitride p-type semiconductor that can obtain a light-emitting element having a low driving voltage (Vf) and a sufficiently high reverse voltage (Vr) with high yield.

  In recent years, Group III nitride semiconductor materials have attracted attention as semiconductor materials for light-emitting elements that emit light of short wavelengths. In general, Group III nitride semiconductors use various oxide crystals such as sapphire single crystals and Group III-V compound semiconductor crystals as substrates, on which metal organic chemical vapor deposition (MOCVD) or molecular beam is applied. The layers are stacked by an epitaxy method (MBE method) or a hydride vapor phase epitaxy method (HVPE method).

  In a group III nitride semiconductor, it has been difficult to form a p-type semiconductor having a sufficient carrier concentration for a long time. However, a method of irradiating Mg-doped gallium nitride (GaN) with a low-velocity electron beam (see Patent Document 1), and a method of heat-treating Mg-doped gallium nitride in an atmosphere containing no hydrogen (Patent Document 2) It was found that a p-type semiconductor having a sufficient carrier concentration can be obtained. The mechanism for obtaining a sufficient carrier concentration is said to be activated by dehydrogenating the p-type dopant in the semiconductor that has been passivated with hydrogen by the above-described method.

As a method for growing a group III nitride semiconductor having good crystallinity, a metal organic chemical vapor deposition method (MOCVD method) is generally used. However, in a growth apparatus that performs crystal growth in the MOCVD method, hydrogen gas used as a carrier gas for transporting a raw material compound onto a substrate and hydrogen generated by decomposition of ammonia (NH ₃ ) used as a nitrogen raw material are decomposed. Molecular or radical or atomic hydrogen is present in high concentration. These hydrogens are taken into the crystal during the growth of the crystal layer of the group III nitride semiconductor, and a bond is formed between the p-type dopant doped in the crystal and cooling from the crystal layer growth temperature. The p-type dopant thus passivated with hydrogen is not active and does not generate holes. However, by irradiating the sample with an electron beam or performing a heat treatment, the bond between the p-type dopant and hydrogen in the crystal is broken, and the p-type dopant can be activated by expelling hydrogen from the crystal. It becomes.

  Of the above two methods, the method of irradiating with an electron beam is not widely used industrially because the region that can be processed at one time is limited and it takes time to process the entire area. .

  On the other hand, in a wafer having a p-type group III nitride semiconductor having a p-type group III nitride semiconductor manufactured by a heat treatment method, among the electrical characteristics measured by forming an electrode, a specified value is reverse to the pn junction. It has been found that chips having a low voltage (Vr) when a current flows are mixed at a certain rate. Low Vr indicates that current leaks to the pn junction, which is not desirable as a product. That is, the yield is greatly reduced by removing this chip. Generally, when dehydrogenating from a group III nitride semiconductor by heat treatment, nitrogen is also released at the same time, so that it is known that crystallinity is lowered, and this phenomenon is considered to be a cause of lowering Vr.

In addition, when a gallium nitride compound semiconductor doped with p-type impurities is cooled, the resistance of the layer doped with p-type impurities is reduced by switching from an atmosphere containing ammonia gas to an atmosphere of hydrogen or nitrogen at a temperature of 400 ° C. or higher. The technique to do is disclosed (refer patent document 3). As an example in this document, after the growth of the Mg-doped layer, cooling to 600 ° C. was performed with a mixed gas of NH ₃ and H ₂ , and supply of NH ₃ was stopped at 600 ° C. to switch to an atmosphere containing only hydrogen. An example is shown.

However, in our experiment, when NH ₃ was circulated to 600 ° C. and cooling was performed, the effect of lowering the driving voltage as an element could not be obtained. In particular, when the positive electrode material is a metal such as Pt, it has been found that the driving voltage that has been sufficiently lowered before bonding is increased by the heat of about 300 ° C. applied during bonding.

Furthermore, when cooling to room temperature after the growth of the group III nitride semiconductor, it is reported that sufficient carrier concentration can be obtained by substituting the atmosphere gas with an inert gas other than H ₂ gas and NH ₃ gas. (See Patent Document 4). In the embodiment, it is shown that nitrogen substitution is performed through a vacuum state and substitution with nitrogen gas or inert gas is performed to obtain a p-type semiconductor.

However, even if the atmosphere gas is replaced with an inert gas other than H ₂ gas or NH ₃ gas and cooled, a chip having a low driving voltage cannot generally be obtained with high yield. That is, it is not possible to obtain a chip with good reproducibility and good characteristics only by controlling the conditions specified in this document. Further, it has been found that when the positive electrode material is Pt or the like, the drive voltage increases due to heat applied during bonding.

  In addition, a technique for performing substitution with an inert gas at a growth temperature of 1100 ° C. immediately after the growth of a nitride semiconductor has been disclosed (see Patent Document 5). Furthermore, in this method, it is necessary to take 2-3 hours from substituting with an inert gas to lowering to room temperature.

  However, it has been confirmed by our experiments that the Vr of the manufactured chip is lowered in this method in which the replacement with the inert gas is performed immediately after the growth is completed. Moreover, lowering the temperature over a long time also lowers Vr.

  Finally, a method for growing a low-resistance p-type gallium nitride compound semiconductor in which a crystal grown at a growth temperature of 700 ° C. or higher is cooled at 700 ° C. or lower in a carrier gas atmosphere other than hydrogen (patent) Reference 6). In the example of this document, after the growth of the p-type gallium nitride compound semiconductor at 1030 ° C., the atmosphere formed from hydrogen and ammonia is replaced with nitrogen at 700 ° C.

  We have also studied this method. First, even if cooling was performed at 700 ° C. or lower in a gas atmosphere other than hydrogen, a chip having a low driving voltage could not be obtained with high yield. That is, it is not possible to obtain a chip with good reproducibility and good characteristics only by controlling the conditions specified in this document. In addition, when the positive electrode material is Pt or the like, the drive voltage is increased due to heat applied during bonding.

  In summary, the methods disclosed in Patent Documents 2 and 5 result in a chip having a low Vr and a leakage property, while the methods disclosed in Patent Documents 3, 4, and 6 result in a high drive voltage. In particular, when Pt or the like is used as the positive electrode material, the drive voltage increases due to heat applied during bonding.

  As described above, in producing a group III nitride semiconductor device, a method for forming a layer containing a p-type dopant which has both device characteristics and yield and has no problem has not been proposed yet.

  Also, in these conventional examples, it is necessary to reduce the resistance of the layer containing the p-type dopant, and it is stated that any technique provides a low-resistance p-type semiconductor layer.

JP-A-2-257679 JP-A-5-183189 JP-A-8-115880 JP-A-8-125222 JP-A-9-129929 JP-A-9-199758

  The present invention has been made to solve the above-described problems of the prior art, and an object of the present invention is to provide a light emitting device having a low driving voltage and a sufficiently high reverse voltage in a high yield. A method for manufacturing a nitride p-type semiconductor is provided.

The present invention provides the following inventions.
(1) In a method for producing a group III nitride p-type semiconductor, a nitrogen source containing a hydrogen atom is used to grow a group III nitride semiconductor containing a p-type dopant, and then an inert gas is used as a carrier gas. And a method of producing a group III nitride p-type semiconductor, wherein the flow of the nitrogen source containing hydrogen atoms is stopped, and the temperature is lowered while supplying nitrogen atoms from a nitrogen source not containing hydrogen atoms.

  (2) The manufacturing method according to (1) above, wherein the temperature at the end of growth is 900 ° C. or higher.

  (3) The method according to item 1 or 2, wherein the nitrogen source not containing hydrogen atoms is a decomposition product of the deposit in the growth reactor.

  (4) The manufacturing method according to the above item (3), wherein the decomposition of the deposit is performed by making the temperature change of the member to which the deposit adheres more gradual than the temperature change of the substrate and confining heat.

  (5) The manufacturing method according to any one of (1) to (4) above, wherein the carrier gas during semiconductor growth contains hydrogen gas.

  (6) The group III nitride p-type semiconductor contains hydrogen atoms in an amount greater than 1/5 of the concentration of the p-type dopant and less than the concentration of the p-type dopant. The manufacturing method as described in any one of claim | item.

  (7) The manufacturing method according to any one of the above items 1 to 6, wherein the group III nitride p-type semiconductor has an electrical resistivity of 20 Ωcm to 10000 Ωcm.

  (8) A group III nitride semiconductor light-emitting device having an n-type layer, a light-emitting layer, and a p-type layer made of a group III nitride semiconductor on a substrate, and a negative electrode and a positive electrode provided on the n-type layer and the p-type layer, respectively And a manufacturing method of the p-type layer is the manufacturing method according to any one of 1 to 7 above.

  (9) The light emitting device as described in (8) above, wherein the positive electrode uses a platinum group metal or ITO selected from Pd, Pt, Rh, Os, Ir and Ru.

  (10) The light emitting device as described in (9) above, wherein the positive electrode uses ITO.

  (11) The light emitting device as described in 8 or 9 above, wherein the light emitting device is a flip chip type.

  (12) The light-emitting element according to any one of (8) to (10), wherein the light-emitting element is a face-up type.

(13) A lamp comprising the light emitting device according to any one of items 8 to 12 above.
(14) An electronic device in which the lamp according to item 13 is incorporated.
(15) A mechanical device in which the electronic device described in the above item 14 is incorporated.

  According to the present invention, a p-type group III nitride semiconductor having sufficient characteristics that can be used as a semiconductor element can be obtained. By using this group III nitride p-type semiconductor, a group III nitride semiconductor light emitting device having a high Vr without causing an increase in driving voltage due to heat can be manufactured with high yield.

  Group III nitride semiconductors in group III nitride p-type semiconductors to which the manufacturing method of the present invention can be applied include GaN, binary mixed crystals such as InN and AlN, ternary mixed crystals such as InGaN and AlGaN, All quaternary mixed crystals such as InAlGaN are included. Further, in the present invention, a ternary mixed crystal such as GaPN or GaNAs containing a group V element other than nitrogen, a quaternary mixed crystal such as InGaPN, InGaAsN, AlGaPN, or AlGaAsN containing In or Al, further In, A ternary mixed crystal such as AlInGaPN including both Al, AlInGaAsN, AlGaPAsN including both P and As, and InGaPAsN, and a ternary mixed crystal of AlInGaPAsN including all elements are also included in the group III nitride semiconductor.

The present invention is a ternary mixed crystal such as GaN, InN and AlN, a ternary mixed crystal such as InGaN and AlGaN, and a quaternary system such as InAlGaN, which are relatively easy to produce and have a low risk of decomposition. It can be particularly preferably used for a group III nitride semiconductor containing only N as a V group such as a mixed crystal. When represented by the general formula Al _x In _y Ga _1-xy N (0 ≦ x + y ≦ 1), x is preferably in the range of 0 to 0.5, and y is preferably in the range of 0 to 0.1.

In addition, p-type dopants that can be used in the present invention include Mg, Ca, Zn, Cd, Hg, and the like that are reported or expected to be doped into a group III nitride semiconductor and exhibit p-type conductivity. . Among these, Mg having a high activation rate by heat treatment is particularly preferable as the p-type dopant. The amount of the dopant is preferably 1 × 10 ¹⁸ to 1 × 10 ²¹ cm ⁻³ . If it is 1 × 10 ¹⁸ cm ⁻³ or less, the emission intensity is reduced. On the other hand, if it exceeds 1 × 10 ²¹ cm ⁻³ , the crystallinity is deteriorated, which is not preferable. More preferably, it is 1 * 10 < ¹⁹ > -5 * 10 < ²⁰ > cm < ^-3 >.

  The p-type semiconductor layer manufactured by the method described in the present invention may contain hydrogen atoms in the crystal. In order to fabricate a device having a high reverse voltage Vr, it may be preferable that the crystal contains hydrogen atoms. The amount of hydrogen atoms contained in the crystal is desirably smaller than the amount of doped p-type dopant. If the hydrogen atom content is the same as the p-type dopant content or more than the p-type dopant content, it is difficult to make electrical contact with the p-type electrode. Less is better. The content of hydrogen atoms is more preferably 9/10 or less of the p-type dopant, and particularly preferably 7/8 or less. However, when the hydrogen atom content is 1/5 or less of the p-type dopant, nitrogen desorption occurs at the same time. More preferably, it is 1/3 or more, and more preferably 1/2 or more. Note that the atomic concentrations of magnesium and hydrogen in the p-type semiconductor layer are quantified by a general SIMS method (secondary ion mass spectrometry).

  In addition, by including hydrogen in the crystal, the p-type layer does not have a low electrical resistance, but this does not pose a problem for device characteristics. In an element using a group III nitride semiconductor, the p-type layer is often formed thinner than in the case of other semiconductors. Therefore, the electric resistance of the p-type layer itself has a little influence on the drive voltage Vf of the element. Absent. A high resistivity of the p-type layer is desirable in order to keep Vr high.

  The electrical resistivity of the p-type layer is preferably about 20 Ωcm to 10000 Ωcm. If it is higher than 10,000 Ωcm, the emission intensity may be reduced, and if it is lower than 20 Ωcm, the Vr may be reduced. More desirably, it is 50 Ωcm to 2000 Ωcm, and particularly desirably 100 Ωcm to 1000 Ωcm. The resistivity is measured by a general TLM (Transfer Length Measurement) method.

  The growth method of the group III nitride p-type semiconductor to which the present invention is applied is not particularly limited, and MOCVD (metal organic chemical vapor deposition), HVPE (hydride vapor deposition), MBE (molecular beam epitaxy), etc. It can be applied to all methods known to grow group III nitride semiconductors. A preferred growth method is the MOCVD method from the viewpoint of film thickness controllability and mass productivity.

In the MOCVD method, hydrogen gas (H ₂ ) or nitrogen gas (N ₂ ) is used as a carrier gas, trimethyl gallium (TMG) or triethyl gallium (TEG) is used as a Ga source which is a group III material, and trimethyl aluminum (TMA) is used as an Al source. ) Or triethylaluminum (TEA), trimethylindium (TMI) or triethylindium (TEI) as the In source, and ammonia (NH ₃ ) or hydrazine (N ₂ H ₄ ) as the nitrogen source containing hydrogen atoms, respectively. It is done. As the p-type dopant, for example, biscyclopentadienyl magnesium (Cp ₂ Mg) or bisethylcyclopentadienyl magnesium ((EtCp) ₂ Mg) is used as the Mg raw material, and dimethyl zinc (Zn (CH ₃ CH ₃ ) is used as the Zn raw material. ) Use ₂ ) respectively.

The effect of the present invention is great when H ₂ is contained as a carrier gas and / or when NH ₃ is used as a nitrogen source.

  The growth temperature is preferably 900 ° C. or higher in order to obtain good crystallinity and contact resistance. More preferably, it is 950 degreeC or more and 1200 degrees C or less.

  After the growth of a group III nitride semiconductor containing a p-type dopant, the temperature is lowered to room temperature and the semiconductor stack is taken out from the growth apparatus. It is necessary to switch the carrier gas to an inert gas containing no hydrogen gas at the same temperature as the growth temperature. If the circulation of hydrogen gas is continued for about 1 minute or more which is allowed as a time lag required for switching, the driving voltage is not sufficiently lowered. Nitrogen gas is preferable as the inert gas for replacing the carrier gas, but argon, helium, or a mixture thereof can also be used.

  Simultaneously with the switching of the carrier gas, it is important to switch from a nitrogen source containing hydrogen atoms to a nitrogen source not containing hydrogen atoms. As the nitrogen source not containing hydrogen atoms, an azide, a decomposition product of a deposit in a growth reactor, or a mixture thereof is preferable. More preferably, it is a decomposition product of a deposit.

  In the decomposition of the deposit, the temperature change of the member to which the deposit is attached is made slower than the temperature change of the substrate, the heat is trapped, and the decomposition of the deposit is promoted. Therefore, a higher temperature is preferable as the temperature at the end of the growth of the group III nitride semiconductor containing the p-type dopant. The deposit is deposited in the growth reactor during the group III nitride semiconductor growth. The feature of the deposit is a single crystal or polycrystal of AlGaInN and a mixture thereof.

  Moreover, it is desirable to start the temperature decrease immediately after changing the nitrogen source and switching the carrier gas. When the temperature holding time after completion of the growth is long, not only is the crystallinity lowered, but thermal damage to the light emitting layer is accumulated, and the light emission intensity is lowered.

  The group III nitride p-type semiconductor and the manufacturing method thereof of the present invention can be used for manufacturing various semiconductor elements. For example, in addition to semiconductor light emitting devices such as light emitting diodes and laser diodes, any semiconductor device such as various high-speed transistors and light receiving devices that require group III nitride p-type semiconductors can be manufactured. It is possible to use. Among these various semiconductor elements, it can be particularly suitably used for the production of a semiconductor light emitting element that requires formation of a pn junction and formation of a positive electrode with good characteristics.

  FIG. 1 is a diagram schematically showing a group III nitride semiconductor light-emitting device manufactured using the group III nitride p-type semiconductor of the present invention and the manufacturing method thereof. An n-type semiconductor layer 3 of group III nitride, a light emitting layer 4 and a p-type semiconductor layer 5 are sequentially laminated on the substrate 1 with a buffer layer 2 as necessary, and a negative electrode 6 is formed on the n-type semiconductor layer 3. However, the positive electrode 7 is provided on the p-type semiconductor layer 5.

  For the substrate 1, any conventionally known material such as sapphire, SiC, GaN, AlN, Si, ZnO or other oxide substrate can be used without any limitation. Sapphire is preferable. The buffer layer 2 is provided as necessary in order to adjust the lattice mismatch between the substrate and the n-type semiconductor layer 3 grown thereon. Conventionally known buffer layer technology is used as needed.

  The composition and structure of the n-type semiconductor layer 3 may be set to a desired composition and structure using known techniques well known in this technical field. Usually, the n-type semiconductor layer is composed of a contact layer capable of obtaining good ohmic contact with the negative electrode and a cladding layer having a larger band gap energy than the light emitting layer. The negative electrode 6 may also have a desired composition and structure using known techniques well known in this technical field.

  The light emitting layer 4 can also use conventionally well-known composition and structures, such as a single quantum well structure (SQW) and a multiple quantum well structure (MQW), without any limitation.

  The p-type semiconductor layer 5 is formed by the manufacturing method of the present invention. About the composition and structure, what is necessary is just to make it a desired composition and structure using the well-known technique well known in this technical field. Usually, like an n-type semiconductor layer, it consists of a cladding layer having a band gap energy larger than that of a light emitting layer and a contact layer capable of obtaining good ohmic contact with the positive electrode.

  As a material of the positive electrode 7 brought into contact with the p-type layer produced by the method of the present invention, metals such as Au, Ni, Co, Cu, Pd, Pt, Rh, Os, Ir, and Ru can be used. Moreover, transparent oxides, such as ITO, NiO, CoO, can also be used. As a form using a transparent oxide, you may include in the said metal film as a lump, and you may form in a layer form and overlap with the said metal film. Of course, a transparent oxide can be used alone. As the transparent oxide, ITO is preferable from the viewpoints of transparency and conductivity.

  In particular, when the present invention is used when a platinum group metal such as Pd, Pt, Rh, Os, Ir, Ru, and ITO are used as a positive electrode material, an increase in drive voltage due to heat during bonding can be prevented. So it will be more effective. Among platinum group metals, high purity Pd, Pt and Rh can be obtained relatively easily and are easy to use.

  The positive electrode may be formed so as to cover almost the entire surface, or may be formed in a lattice shape or a tree shape with a gap. After forming the positive electrode, thermal annealing may be performed for the purpose of alloying or transparency, but it may not be performed.

  As a form of the element, a so-called face-up (FU) type in which light emission is extracted from the semiconductor side using a transparent positive electrode, or so-called flip chip (FC) in which light emission is extracted from the substrate side using a reflection type positive electrode. It is good as a type.

  The group III nitride semiconductor light emitting device manufactured using the manufacturing method of the present invention can be formed into a lamp by providing a transparent cover by means well known in the art, for example. In addition, a white lamp can be manufactured by combining the group III nitride semiconductor light emitting device of the present invention and a cover having a phosphor.

  In addition, since a lamp manufactured from the group III nitride semiconductor light emitting device of the present invention has a low driving voltage, an electronic device such as a mobile phone, a display, or a panel incorporating the lamp manufactured by this technology, or the electronic device is incorporated. However, mechanical devices such as automobiles, computers, and game machines can be driven with low power and can achieve high characteristics. In particular, the battery-powered devices such as mobile phones, game machines, toys, and automobile parts exhibit power saving effects.

  EXAMPLES Hereinafter, the present invention will be described in detail with reference to examples, but the present invention is not limited only to these examples.

Example 1
FIG. 2 shows a schematic cross-sectional view of the epitaxial multilayer structure 11 used in the LED 10 manufactured in this example. Moreover, in FIG. 3, the plane schematic diagram of LED10 is shown.

The laminated structure 11 is formed by sequentially forming an undoped GaN layer (layer thickness = 8 μm) 102 on a substrate 101 made of sapphire c-plane ((0001) crystal plane) through a buffer layer (not shown) made of AlN, Si-doped n-type GaN layer (layer thickness = 2 μm, carrier concentration = 1 × 10 ¹⁹ cm ⁻³ ) 103, Si-doped n-type Al _0.07 Ga _0.93 N cladding layer (layer thickness = 25 nm, carrier concentration = 1 × 10 ¹⁸ cm) ⁻³ ) 104, 6 Si-doped GaN barrier layers (layer thickness = 14.0 nm, carrier concentration = 1 × 10 ¹⁸ cm ⁻³ ) and 5 undoped In _0.20 Ga _0.80 N well layers (layer thickness = 2) .5 nm), a light emitting layer 105 having a multiple quantum structure, an Mg-doped p-type Al _0.07 Ga _0.93 N clad layer (layer thickness = 10 nm) 106, and an Mg-doped p-type Al _0.02 Ga _0.98 N contact layer ( layer (Thickness = 150 nm) 107 was laminated. Each of the constituent layers 102 to 107 of the laminated structure 11 was grown by a general low pressure MOCVD means.

In particular, the Mg-doped p-type AlGaN contact layer 107 was grown according to the following procedure.
(1) After completing the growth of the Mg-doped p-type Al _0,07 Ga _0.93 N cladding layer 106, the pressure in the growth reactor was set to 2 × 10 ⁴ Pascals (Pa). Hydrogen was used as the carrier gas.
(2) Vapor phase growth of the Mg-doped AlGaN layer was started at 1020 ° C. using trimethylgallium, trimethylaluminum and ammonia as raw materials and biscyclopentamagnesium as a Mg doping source.
(3) An Mg-doped Al _0.02 Ga _0.98 N layer with a layer thickness of 0.15 μm is supplied by continuously supplying trimethylgallium, trimethylaluminum, ammonia and biscyclopentamagnesium into the growth reactor for 4 minutes. Grown up.
(4) The supply of trimethylgallium, trimethylaluminum and biscyclopentamagnesium into the growth reactor was stopped, and the growth of the Mg-doped p-type Al _0.02 Ga _0.98 N layer was stopped.

  After the vapor phase growth of the contact layer 107 made of the Mg-doped p-type AlGaN layer is completed, the carrier gas is immediately switched from hydrogen to nitrogen, the flow of ammonia is stopped, and the decomposition of the deposit in the growth reactor is started. did. The decomposition of the deposit is achieved by raising the temperature of the quartz member by turning all the gas flowing between the quartz member with the deposit and the water-cooled furnace member facing the wafer in the growth reactor into nitrogen. Carried out. The temperature of this quartz member can be controlled independently of the wafer temperature. At the same time, the energization of the high frequency induction heating type heater used to heat the substrate 101 was stopped.

  Further, after maintaining for 5 minutes in this state, the decomposition of the deposit in the growth reactor was stopped by lowering the temperature of the quartz member. At this time, the temperature of the substrate was 650 ° C. FIG. 4 shows a schematic diagram of this cooling process.

After cooling to room temperature in this state, the laminated structure 11 was taken out from the growth reactor, and the atomic concentrations of magnesium and hydrogen in the contact layer 107 were quantified by a general SIMS analysis method. Mg atoms were distributed at a concentration of 7 × 10 ¹⁹ cm ^{−3 at} a substantially constant concentration in the depth direction from the surface. On the other hand, hydrogen atoms were present at a substantially constant concentration of 6 × 10 ¹⁹ cm ⁻³ . The resistivity was estimated to be approximately 150 Ωcm from the measurement by a general TLM method.

  LED10 was produced using the epitaxial laminated structure 11 provided with said p-type contact layer. First, general dry etching was performed on a region where the negative electrode 108 was to be formed, and the surface of the Si-doped GaN layer 103 was exposed only in that region. A negative electrode 108 formed by stacking titanium (Ti) / aluminum (Al) was formed on the exposed surface portion.

  Next, a positive electrode 109 made of ITO having a thickness of 1 μm was formed over almost the entire surface of the remaining contact layer 107 so as to have a light-transmitting property in order to extract light emitted from the light emitting layer from the semiconductor layer side to the outside. Furthermore, a bonding pad 110 having Au as the outermost surface was formed on the translucent positive electrode 109.

  After the formation of the negative electrode 108 and the positive electrode 109, the back surface of the sapphire substrate 101 was polished using fine diamond abrasive grains and finally finished to a mirror surface. Thereafter, the laminated structure 11 was cut and separated into individual square LEDs 10 having a 350 μm square.

  A forward current was passed between the negative electrode 108 and the positive electrode 109 of the LED chip manufactured by such a process, and the electrical characteristics and the light emission characteristics were evaluated. When the forward current was 20 mA, the forward drive voltage (Vf) was 3.0 V, and when the current was 10 μA, the reverse voltage (Vr) was 20 V or more. The wavelength of light emitted from the translucent positive electrode 109 to the outside was 455 nm, and the light emission output measured with a general integrating sphere was 10 mW. In addition, about 10000 LEDs were obtained from a wafer having a diameter of 5.1 cm (2 inches), excluding defective appearance, and such characteristics were exhibited without variation.

(Comparative Example 1)
A Mg-doped p-type GaN contact layer was formed by changing the post-growth processing method from that in Example 1 described above. In this comparative example, after the laminated structure described in Example 1 was formed by the same procedure and conditions as described in Example 1, immediately after vapor phase growth, the hydrogen of the used carrier gas was switched to nitrogen, The ammonia flow was stopped, the temperature of the quartz member facing the wafer was lowered, and the wafer temperature was lowered to 350 ° C. FIG. 5 is a diagram schematically showing the temperature lowering process.

The sample produced in Comparative Example 1 was measured for the concentration of Mg and H by the SIMS method in the same manner as in the Example. The Mg atom was the same as in Example 1 at a concentration of 7 × 10 ¹⁹ cm ^−3. On the other hand, hydrogen atoms were present at a concentration of 1 × 10 ¹⁹ cm ⁻³ . Moreover, when the resistivity was measured by the TLM method similar to that of Example 1, it was estimated to be approximately 10 Ωcm.

  Using the obtained laminated structure, an LED was produced in the same manner as in Example 1 and evaluated in the same manner as in Example 1. When the forward current was 20 mA, the forward drive voltage (Vf) was 3.0 V and the light emission output was 10 mW, but when the current was 10 μA, the reverse voltage (Vr) was 5 V. .

  The method for producing a group III nitride p-type semiconductor provided by the present invention can simultaneously realize characteristics of high Vr and low driving voltage. Therefore, it is extremely useful for manufacturing a group III nitride semiconductor light emitting device.

It is the figure which showed typically the group III nitride semiconductor light-emitting device of this invention. 2 is a schematic cross-sectional view of an epitaxial multilayer structure manufactured in Example 1. FIG. 2 is a schematic plan view of an LED manufactured in Example 1. FIG. 3 is a schematic diagram illustrating a temperature lowering method in Example 1. FIG. 6 is a schematic diagram showing a temperature lowering method in Comparative Example 1. FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Substrate 2 Buffer layer 3 N-type semiconductor layer 4 Light emitting layer 5 P-type semiconductor layer 6 Negative electrode 7 Positive electrode 10 LED
DESCRIPTION OF SYMBOLS 11 Laminated structure 101 Substrate 102 Undoped GaN layer 103 n-type GaN layer 104 n-type AlGaN clad layer 105 Light emitting layer with multiple quantum wells 106 p-type AlGaN clad layer 107 p-type AlGaN contact layer 108 Negative electrode 109 Positive electrode 110 Positive electrode bonding pad

Claims (15)

  In a method for producing a group III nitride p-type semiconductor, a nitrogen source containing a hydrogen atom is used to grow a group III nitride semiconductor containing a p-type dopant, an inert gas is used as a carrier gas, and hydrogen A method for producing a Group III nitride p-type semiconductor, wherein the flow of a nitrogen source containing atoms is stopped, and the temperature is lowered while nitrogen atoms are supplied from a nitrogen source not containing hydrogen atoms.   The manufacturing method according to claim 1, wherein the temperature at the end of growth is 900 ° C. or more.   The method according to claim 1 or 2, wherein the nitrogen source not containing hydrogen atoms is a decomposition product of deposits in the growth reactor.   4. The manufacturing method according to claim 3, wherein the decomposition of the deposit is performed by making the temperature change of the member to which the deposit adheres more gradual than the temperature change of the substrate and confining heat.   The manufacturing method according to any one of claims 1 to 4, wherein the carrier gas at the time of semiconductor growth contains hydrogen gas.   The group III nitride p-type semiconductor contains an amount of hydrogen atoms that is greater than 1/5 of the concentration of the p-type dopant and less than the concentration of the p-type dopant. The manufacturing method according to claim 1.   The manufacturing method according to claim 1, wherein the group III nitride p-type semiconductor has an electrical resistivity of 20 Ωcm to 10000 Ωcm.   In a group III nitride semiconductor light-emitting device having an n-type layer, a light-emitting layer, and a p-type layer made of a group III nitride semiconductor on a substrate, and a negative electrode and a positive electrode provided on the n-type layer and the p-type layer, respectively, p A method for producing a mold layer is the production method according to any one of claims 1 to 7, wherein the group III nitride semiconductor light emitting device is characterized.   The light emitting device according to claim 8, wherein the positive electrode uses a platinum group metal selected from Pd, Pt, Rh, Os, Ir and Ru or ITO.   The light emitting device according to claim 9, wherein the positive electrode uses ITO.   The light emitting device according to claim 8 or 9, wherein the light emitting device is of a flip chip type.   The light emitting device according to any one of claims 8 to 10, wherein the light emitting device is a face-up type.   The lamp | ramp which uses the light emitting element as described in any one of Claims 8-12.   An electronic device in which the lamp according to claim 13 is incorporated.   A mechanical device in which the electronic device according to claim 14 is incorporated.

Images